Yongbok Kim feafe82cc2 target/mips: Amend CP0 WatchHi register implementation ... WatchHi is extended by the field MemoryMapID with the GINVT instruction. The field is accessible by MTHC0/MFHC0 in 32-bit architectures and DMTC0/ DMFC0 in 64-bit architectures. Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com> Signed-off-by: Yongbok Kim <yongbok.kim@mips.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1579883929-1517-4-git-send-email-aleksandar.markovic@rt-rk.com>		2020-01-29 19:28:52 +01:00
..
cp0_timer.c
cpu-param.h
cpu-qom.h
cpu.c	cpu: Use cpu_class_set_parent_reset()	2020-01-24 20:59:06 +01:00
cpu.h	target/mips: Amend CP0 WatchHi register implementation	2020-01-29 19:28:52 +01:00
dsp_helper.c
gdbstub.c
helper.c	target/mips: Clean up helper.c	2019-10-25 18:37:01 +02:00
helper.h	target/mips: Amend CP0 WatchHi register implementation	2020-01-29 19:28:52 +01:00
internal.h
kvm_mips.h
kvm.c	kvm: introduce kvm_kernel_irqchip_* functions	2019-12-17 19:32:45 +01:00
lmi_helper.c
machine.c	target/mips: Amend CP0 WatchHi register implementation	2020-01-29 19:28:52 +01:00
Makefile.objs
mips-defs.h
mips-semi.c	target/mips: semihosting: Remove 'uhi_done' label in helper_do_semihosting()	2020-01-29 19:28:52 +01:00
msa_helper.c	target/mips: Refactor handling of vector compare 'less than' (signed) instructions	2019-10-25 18:37:01 +02:00
op_helper.c	target/mips: Amend CP0 WatchHi register implementation	2020-01-29 19:28:52 +01:00
TODO
trace-events
translate_init.inc.c
translate.c	target/mips: Amend CP0 WatchHi register implementation	2020-01-29 19:28:52 +01:00