OpenE2K/qemu-e2k
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ff7936f009
qemu-e2k/target
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Siarhei Volkau ff7936f009 target/mips/mxu: Add S32SLT D16SLT D16AVG[R] Q8AVG[R] insns 
These instructions are part of pool1, see the grand tree above
in the file. Q8ADD is part of pool1 too but belong to another
category of instructions, thus will be made in later patches.

Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Message-Id: <20230608104222.1520143-8-lis8215@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-07-10 23:33:38 +02:00
..
alpha target/alpha: Use float64_to_int64_modulo for CVTTQ 2023-07-01 08:26:54 +02:00
arm target/arm: Use aesdec_IMC 2023-07-09 13:47:05 +01:00
avr target/avr: Fix handling of interrupts above 33. 2023-07-08 07:24:38 +03:00
cris target: Widen pc/cs_base in cpu_get_tb_cpu_state 2023-06-26 17:32:59 +02:00
hexagon target: Widen pc/cs_base in cpu_get_tb_cpu_state 2023-06-26 17:32:59 +02:00
hppa target: Widen pc/cs_base in cpu_get_tb_cpu_state 2023-06-26 17:32:59 +02:00
i386 target/i386: Use aesdec_ISB_ISR_IMC_AK 2023-07-08 07:30:18 +01:00
loongarch target: Widen pc/cs_base in cpu_get_tb_cpu_state 2023-06-26 17:32:59 +02:00
m68k target: Widen pc/cs_base in cpu_get_tb_cpu_state 2023-06-26 17:32:59 +02:00
microblaze target/microblaze: Define TCG_GUEST_DEFAULT_MO 2023-06-26 17:33:00 +02:00
mips target/mips/mxu: Add S32SLT D16SLT D16AVG[R] Q8AVG[R] insns 2023-07-10 23:33:38 +02:00
nios2 target/nios2 : Explicitly ask for target-endian loads and stores 2023-07-01 08:26:54 +02:00
openrisc target: Widen pc/cs_base in cpu_get_tb_cpu_state 2023-06-26 17:32:59 +02:00
ppc target/ppc: Use aesdec_ISB_ISR_AK_IMC 2023-07-08 07:30:17 +01:00
riscv target/riscv: Use aesdec_ISB_ISR_IMC_AK 2023-07-09 13:47:17 +01:00
rx target: Widen pc/cs_base in cpu_get_tb_cpu_state 2023-06-26 17:32:59 +02:00
s390x target: Widen pc/cs_base in cpu_get_tb_cpu_state 2023-06-26 17:32:59 +02:00
sh4 target: Widen pc/cs_base in cpu_get_tb_cpu_state 2023-06-26 17:32:59 +02:00
sparc target/sparc: Use tcg_gen_lookup_and_goto_ptr for v9 WRASI 2023-06-28 10:53:57 +01:00
tricore target: Widen pc/cs_base in cpu_get_tb_cpu_state 2023-06-26 17:32:59 +02:00
xtensa target/xtensa: Assert that interrupt level is within bounds 2023-07-06 13:26:43 +01:00
Kconfig hw/loongarch: Add support loongson3 virt machine type. 2022-06-06 18:09:03 +00:00
meson.build target/loongarch: Add target build suport 2022-06-06 18:09:03 +00:00