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Define x86 fused multiply-add intrinsics

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This defines the following intrinsics for 128 and 256 bit vectors of f32
and f64:

 * `fmadd`
 * `fmaddsub`
 * `fmsub`
 * `fmsubadd`
 * `fnmadd`
 * `fnmsub`

The `_sd` and `_ss` variants are not included yet.

Intel intrinsic reference: https://software.intel.com/en-us/node/523929

The intrinsics there are listed under AVX2, but in the Intel Intrinsic
Guide they are part of the "FMA" technology, and LLVM puts them under
FMA, not AVX2.
This commit is contained in:
Ruud van Asseldonk 2016-03-05 15:52:08 +01:00
parent d31d8a9a91
commit 8872163b32
1 changed files with 47 additions and 0 deletions
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47
src/etc/platform-intrinsics/x86/fma.json Normal file
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{
"llvm_prefix": "llvm.x86.fma.",
"intrinsics": [
{
"intrinsic": "{0.width_mm}_fmadd_{0.data_type}",
"width": [128, 256],
"llvm": "vfmadd.{0.data_type_short}{0.width_suffix}",
"ret": "f(32-64)",
"args": ["0", "0", "0"]
},
{
"intrinsic": "{0.width_mm}_fmaddsub_{0.data_type}",
"width": [128, 256],
"llvm": "vfmaddsub.{0.data_type_short}{0.width_suffix}",
"ret": "f(32-64)",
"args": ["0", "0", "0"]
},
{
"intrinsic": "{0.width_mm}_fmsub_{0.data_type}",
"width": [128, 256],
"llvm": "vfmsub.{0.data_type_short}{0.width_suffix}",
"ret": "f(32-64)",
"args": ["0", "0", "0"]
},
{
"intrinsic": "{0.width_mm}_fmsubadd_{0.data_type}",
"width": [128, 256],
"llvm": "vfmsubadd.{0.data_type_short}{0.width_suffix}",
"ret": "f(32-64)",
"args": ["0", "0", "0"]
},
{
"intrinsic": "{0.width_mm}_fnmadd_{0.data_type}",
"width": [128, 256],
"llvm": "vfnmadd.{0.data_type_short}{0.width_suffix}",
"ret": "f(32-64)",
"args": ["0", "0", "0"]
},
{
"intrinsic": "{0.width_mm}_fnmsub_{0.data_type}",
"width": [128, 256],
"llvm": "vfnmsub.{0.data_type_short}{0.width_suffix}",
"ret": "f(32-64)",
"args": ["0", "0", "0"]
}
]
}