With the addition of section16 tests we have multiple tests
advertising themselves as "mbind sections" and "mbind section
contents". This patch fixes that, and fails on quite a few targets
that force an OSABI value. It's a pain specifying all the relevant
arm targets on an xfail line, so I wrote supports_gnu_osabi.
binutils/
* testsuite/lib/binutils-common.exp (match_target): Accept '!' before
TCL procedure.
(supports_gnu_osabi): New procedure.
(is_generic): New, from ld-lib.exp.
(supports_gnu_unique): Use the above.
gas/
* testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
xfail, and rename test.
* testsuite/gas/elf/section12b.d: Likewise.
* testsuite/gas/elf/section16a.d: Likewise.
* testsuite/gas/elf/section16b.d: Likewise.
ld/
* testsuite/lib/ld-lib.exp (is_generic): Delete.
* testsuite/ld-unique/unique.exp: Exclude tic6x.
i386-moss is an ELF target needing ldelf.c. x86 openbsd wouldn't even
build, so I added entries to do the same as netbsd. Quite likely this
isn't ideal but if the openbsd folk don't contribute their changes
this is what they get.
* configure.tgt (i[3-7]86-*-moss*): Don't clear targ_extra_ofiles.
(i[3-7]86-*-openbsd*, x86_64-*-openbsd*): Add.
struct info_print_options is defined in both symtab.c and stack.c, which is
an ODR violation. So, I am renaming info_print_options and related
structs/functions in symtab.c:
info_print_options ==> info_vars_funcs_options
info_print_options_defs ==> info_vars_funcs_options_defs
make_info_print_options_def_group ==> make_info_vars_funcs_options_def_group
info_print_command_completer ==> info_vars_funcs_command_completer
gdb/ChangeLog:
* symtab.c (info_print_options): Rename to
info_vars_funcs_options.
(info_print_options_defs): Rename to
info_vars_funcs_options_defs.
(make_info_print_options_def_group): Rename to
make_info_vars_funcs_options_def_group.
(info_print_command_completer): Rename to
info_vars_funcs_command_completer.
(info_variables_command): Apply name changes.
(info_functions_command): Likewise.
(_initialize_symtab): Likewise.
This was a typo introduced in f6ac5f3d63.
Found by looking through NetBSD's GDB patches:
https://github.com/NetBSD/pkgsrc-wip/blob/master/gdb-netbsd/patches/patch-gdb_sparc-nat.h
This patch can't be tested on Linux because Linux does not use the
sparc_target template.
gdb/ChangeLog:
2020-02-05 Christian Biesinger <cbiesinger@google.com>
* sparc-nat.h (struct sparc_target) <xfer_partial>: Fix base class
function call.
Change-Id: I4fa88cbdc365efe89b84cc0619b60db38718d9ce
Makes the comment match the macro name in the #define/#ifdef.
gdb/ChangeLog:
2020-02-05 Christian Biesinger <cbiesinger@google.com>
* ppc-nbsd-tdep.h: Fix macro name in #endif comment.
Change-Id: If7b2e49e65495b8eb9ed7b6c9a11277579a93a05
In preparation for RISC-V/Linux `gdbserver' support factor out parts of
native target description determination code that can be shared between
the programs.
gdb/
* nat/riscv-linux-tdesc.h: New file.
* nat/riscv-linux-tdesc.c: New file, taking code from...
* riscv-linux-nat.c (riscv_linux_nat_target::read_description):
... here.
* configure.nat <linux> <riscv*>: Add nat/riscv-linux-tdesc.o to
NATDEPFILES.
In lib/fortran.exp, in the helper function fortran_int4, there is
currently no support for the LLVM Fortran compiler, Flang. As a
result we return the default pattern 'unknown' to match against all
4-byte integer types, which causes many tests to fail.
The same is true for all of the other helper functions related to
finding a suitable type pattern.
This commit adds support for Flang. There should be no change when
testing with gfortran.
gdb/testsuite/ChangeLog:
* lib/fortran.exp (fortran_int4): Handle clang.
(fortran_int8): Likewise.
(fortran_real4): Likewise.
(fortran_real8): Likewise.
(fortran_complex4): Likewise.
(fortran_logical4): Likewise.
(fortran_character1): Likewise.
Change-Id: Ife0d9828f78361fbd992bf21af746042b017dafc
We assign the simulator inferior a fake ptid. If this ptid is ever
set to null_ptid then we are going to run into problems - the
simulator ptid is what we return from gdbsim_target::wait, and this in
turn is used to look up the inferior data with a call to
find_inferior_pid, which asserts the pid is not 0 (which it is in
null_pid).
This commit adds an assert that the simulator's fake pid is not
null_ptid. There should be no user visible changes after this commit.
gdb/ChangeLog:
* remote-sim.c (sim_inferior_data::sim_inferior_data): Assert that
we don't set the fake simulator ptid to the null_ptid.
Change-Id: I6e08effe70e70855aea13c9caf4fd6913d5af56d
Add note to 'Race detection' entry in README about the possibility that
check-read1 makes failing tests pass.
gdb/testsuite/ChangeLog:
2020-02-04 Tom de Vries <tdevries@suse.de>
* README (Race detection): Add note.
Change-Id: I12ef2f0ec35abc5a0221585bf30e5f4f0616aa7c
The current inferior_exited_re regexp contains a '.*':
...
set inferior_exited_re "(?:\\\[Inferior \[0-9\]+ \\(.*\\) exited)"
...
This means that while matching a single line:
...
$ tclsh
% set re "(?:\\\[Inferior \[0-9\]+ \\(.*\\) exited)"
(?:\[Inferior [0-9]+ \(.*\) exited)
% set line "\[Inferior 1 (process 33) exited\]\n"
[Inferior 1 (process 33) exited]
% regexp $re $line
1
...
it also matches more than one line:
...
$ tclsh
% set re "(?:\\\[Inferior \[0-9\]+ \\(.*\\) exited)"
(?:\[Inferior [0-9]+ \(.*\) exited)
% set line "\[Inferior 1 (process 33) exited\]\n\[Inferior 2 (process 44) exited\]\n"
[Inferior 1 (process 33) exited]
[Inferior 2 (process 44) exited]
% regexp $re $line
1
...
Fix this by using "\[^\n\r\]*" instead of ".*".
Build and reg-tested on x86_64-linux.
gdb/testsuite/ChangeLog:
2020-02-04 Tom de Vries <tdevries@suse.de>
* lib/gdb.exp (inferior_exited_re): Use "\[^\n\r\]*" instead of ".*".
Change-Id: Id7b1dcecd8c7fda3d1ab34b4fa1364d301748333
It is incorrect to "continue" in the ppc_elf_relocate_section reloc
processing loop except when editing or deleting relocs. The normal
loop processing arranges to write the relocs if shuffling them over a
deleted entry. Deleting only happens for debug sections currently and
those sections won't contain R_PPC_VLE_ADDR20 relocs, so this patch
doesn't fix a bug that would trigger with any normal object file.
* elf32-ppc.c (ppc_elf_relocate_section): After applying
R_PPC_VLE_ADDR20, goto copy_reloc.
The inferior_exited_re regexp uses capturing parentheses by default:
...
set inferior_exited_re "(\\\[Inferior \[0-9\]+ \\(.*\\) exited)"
...
The parentheses are there to be able to use the expression as an atom, f.i.,
to have '+' apply to the whole regexp in "${inferior_exited_re}+".
But the capturing is not necessary, and it can be confusing because it's not
obvious in a regexp using "$inferior_exited_re (bla|bli)" that the first
captured expression is in $inferior_exited_re.
Replace by non-capturing parentheses. If we still want to capture the
expression, we can simply (and more clearly) use "($inferior_exited_re)".
Build and reg-tested on x86_64-linux.
gdb/testsuite/ChangeLog:
2020-02-04 Tom de Vries <tdevries@suse.de>
* lib/gdb.exp (inferior_exited_re): Use non-capturing parentheses.
Change-Id: I7640c6129b1ada617424d6a63730d4b119c58ef3
This patch fixes test failures power8 and power9 caused by changes on
opcodes:
The dissasembler does not emit whitespace for instructions
anymore (c2b1c27545)
The dissasembler generates extended mnemonics for some instructions
instead (aae9718e4d)
The ldmx instruction was removed. This instruction was never
implemented (6fbc939cfd)
gdb/testsuite/ChangeLog:
2020-02-03 Rogerio A. Cardoso <rcardoso@linux.ibm.com>
* gdb.arch/powerpc-power8.exp: Delete trailing whitespace of
tbegin., tend. instructions. Replace bctar-, bctar+, bctarl-,
bctarl+ extended mnemonics when avaliable by bgttar, bnstarl,
blttar, bnetarl.
* gdb.arch/powerpc-power8.s: Fix comments. Fix instructions
binary for blttar, bnetarl.
* gdb.arch/powerpc-power9.exp: Delete trailing whitespace of
wait instruction. Delete ldmx test.
* gdb.arch/powerpc-power9.s: Delete ldmx instruction.
In the function f77_print_array_1, the variable 'i' which holds the
index is of datatype 'int', while bounds are of datatype LONGEST. Due to
size of int being smaller than LONGEST, the variable 'i' stores
incorrect values for high indexes (higher than max limit of int). Due
to this issue in sources, two abnormal behaviors are seen while printing
arrays with high indexes (please check array-bounds-high.f90) For high
indexes with negative sign, gdb prints empty array even if the array has
elements.
(gdb) p arr
$1 = ()
For high indexes with positive sign, gdb crashes. We have now changed
the datatype of 'i' to LONGEST which is same as datatype of bounds.
gdb/ChangeLog:
* f-valprint.c (f77_print_array_1): Changed datatype of index
variable to LONGEST from int to enable it to contain bound
values correctly.
gdb/testsuite/ChangeLog:
* gdb.fortran/array-bounds-high.exp: New file.
* gdb.fortran/array-bounds-high.f90: New file.
Change-Id: Ie2dce9380a249e634e2684b9c90f225e104369b7
Fix RISC-V native Linux support to handle a 64-bit FPU (FLEN == 64) with
both RV32 and RV64 systems, which is a part of the current Linux ABI for
hard-float systems, rather than assuming that (FLEN == XLEN) in target
description determination and that (FLEN == 64) in register access.
We can do better however and not rely on any particular value of FLEN
and probe for it dynamically, by observing that the PTRACE_GETREGSET
ptrace(2) call will only accept an exact regset size, and that will
reflect FLEN. Therefore iterate over the call in target description
determination with a geometrically increasing regset size until a match
is marked by a successful ptrace(2) call completion or we run beyond the
maximum size we can support.
Update register accessors accordingly, using FLEN determined to size the
buffer used for NT_PRSTATUS requests and then to exchange data with the
regcache.
Also handle a glibc bug where ELF_NFPREG is defined in terms of NFPREG,
however NFPREG is nowhere defined.
gdb/
* riscv-linux-nat.c [!NFPREG] (NFPREG): New macro.
(supply_fpregset_regnum, fill_fpregset): Handle regset buffer
offsets according to FLEN determined.
(riscv_linux_nat_target::read_description): Determine FLEN
dynamically.
(riscv_linux_nat_target::fetch_registers): Size regset buffer
according to FLEN determined.
(riscv_linux_nat_target::store_registers): Likewise.
Musl is giving warnings about these includes in this way:
warning: #warning redirecting incorrect #include <sys/errno.h> to <errno.h>
warning: #warning redirecting incorrect #include <sys/fcntl.h> to <fcntl.h>
gdb/testsuite/Changelog:
* gdb.base/fileio.c: Remove #include of <sys/errno.h>.
Replace #include of <sys/fcntl.h> by <fcntl.h>.
Clang's integrated assembler supports multiple section with the same
name:
.section .text,"ax",@progbits,unique,1
nop
.section .text,"ax",@progbits,unique,2
nop
"unique,N" assigns the number, N, as the section ID, to a section. The
valid values of the section ID are between 0 and 4294967295. It can be
used to distinguish different sections with the same section name.
This is useful with -fno-unique-section-names -ffunction-sections.
-ffunction-sections by default generates .text.foo, .text.bar, etc.
Using the same string can save lots of space in .strtab.
This patch adds section_id to bfd_section and reuses the linker
internal bit in BFD section flags, SEC_LINKER_CREATED, for assmebler
internal use to mark valid section_id. It also updates objdump to
compare section pointers if 2 sections comes from the same file since
2 different sections can have the same section name.
bfd/
PR gas/25380
* bfd-in2.h: Regenerated.
* ecoff.c (bfd_debug_section): Add section_id.
* section.c (bfd_section): Add section_id.
(SEC_ASSEMBLER_SECTION_ID): New.
(BFD_FAKE_SECTION): Add section_id.
binutils/
PR gas/25380
* objdump.c (sym_ok): Return FALSE if 2 sections are in the
same file with different section pointers.
gas/
PR gas/25380
* config/obj-elf.c (section_match): Removed.
(get_section): Also match SEC_ASSEMBLER_SECTION_ID and
section_id.
(obj_elf_change_section): Replace info and group_name arguments
with match_p. Also update the section ID and flags from match_p.
(obj_elf_section): Handle "unique,N". Update call to
obj_elf_change_section.
* config/obj-elf.h (elf_section_match): New.
(obj_elf_change_section): Updated.
* config/tc-arm.c (start_unwind_section): Update call to
obj_elf_change_section.
* config/tc-ia64.c (obj_elf_vms_common): Likewise.
* config/tc-microblaze.c (microblaze_s_data): Likewise.
(microblaze_s_sdata): Likewise.
(microblaze_s_rdata): Likewise.
(microblaze_s_bss): Likewise.
* config/tc-mips.c (s_change_section): Likewise.
* config/tc-msp430.c (msp430_profiler): Likewise.
* config/tc-rx.c (parse_rx_section): Likewise.
* config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
* doc/as.texi: Document "unique,N" in .section directive.
* testsuite/gas/elf/elf.exp: Run "unique,N" tests.
* testsuite/gas/elf/section15.d: New file.
* testsuite/gas/elf/section15.s: Likewise.
* testsuite/gas/elf/section16.s: Likewise.
* testsuite/gas/elf/section16a.d: Likewise.
* testsuite/gas/elf/section16b.d: Likewise.
* testsuite/gas/elf/section17.d: Likewise.
* testsuite/gas/elf/section17.l: Likewise.
* testsuite/gas/elf/section17.s: Likewise.
* testsuite/gas/i386/unique.d: Likewise.
* testsuite/gas/i386/unique.s: Likewise.
* testsuite/gas/i386/x86-64-unique.d: Likewise.
* testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
ld/
PR gas/25380
* testsuite/ld-i386/pr22001-1c.S: Use "unique,N" in .section
directives.
* testsuite/ld-i386/tls-gd1.S: Likewise.
* testsuite/ld-x86-64/pr21481b.S: Likewise.
More non-bugs flagged by ubsan, unless you happen to be compiling for
a 1's complement host.
cpu/
* frv.cpu (f-u12): Multiply rather than left shift signed values.
(f-label16, f-label24): Likewise.
opcodes/
* frv-ibld.c: Regenerate.
When the command "info registers" (same as "info registers general"),
is issued, _all_ the registers from a tdesc XML are printed. This
includes the registers with empty register groups (set as "") which
are supposed to be only printed by "info registers all" (or "info
all-registers").
This bug got introduced after all the overhauls that the
tdesc_register_in_reggroup_p() went through. You can see that the
logic of tdesc_register_in_reggroup_p() did NOT remain the same after
all those changes:
git difftool c9c895b9666..HEAD -- gdb/target-descriptions.c
With the current implementation, when the reg->group is an empty
string, this function returns -1, while in the working revision
(c9c895b966), it returned 0. This patch makes sure that the 0 is
returned again.
The old implementation of tdesc_register_in_reggroup_p() returned
-1 when "reggroup" was set to "all_reggroups" at line 4 below:
1 tdesc_register_reggroup_p (...)
2 {
3 ...
4 ret = tdesc_register_in_reggroup_p (gdbarch, regno, reggroup);
5 if (ret != -1)
6 return ret;
7
8 return default_register_reggroup_p (gdbarch, regno, reggroup);
9 }
As a result, the execution continued at line 8 and the
default_register_reggroup_p(..., reggroup=all_reggroups) would
return 1. However, with the current implementation of
tdesc_register_in_reggroup_p() that allows checking against any
arbitrary group name, it returns 0 when comparing the "reg->group"
against the string "all" which is the group name for "all_reggroups".
I have added a special check to cover this case and
"info all-registers" works as expected.
gdb/ChangeLog:
* target-descriptions.c (tdesc_register_in_reggroup_p): Return 0
when reg->group is empty and reggroup is not.
Change-Id: I9eaf9d7fb36410ed5684ae652fe4756b1b2e61a3
There's already existing logic to handle this on other targets, so
this patch just makes nios2 use it.
2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
bfd/
* elf-eh-frame.c (_bfd_elf_write_section_eh_frame): DW_EH_PE_datarel
encodings are relative to the GOT on nios2, too.
The nios2 ABI documentation lists %gotoff as assembler syntax for the
R_NIOS2_GOTOFF relocation, used to represent a 32-bit GOT-relative offset
in data sections. This was previously unimplemented in GAS.
2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
gas/
* config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
%tls_ldo.
We noticed +mve was not enabling DSP instructions as it should, reported in PR
25472.
The MVE architecture extension for Armv8.1-M Mainline implies DSP extensions.
This patch reflects that in the '+mve' command line option.
gas/ChangeLog:
2020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
PR gas/25472
* config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
(armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
+mve.
* testsuite/gas/arm/mve_dsp.d: New test.
This patch adds support for assembly instructions vldmia, vldmdb, vstmia
and vstmdb in MVE. This instructions are already supported for Armv8-M
Floating-point Extension.
gas/ChangeLog:
2020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
to support VLDMIA instruction for MVE.
(fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
instruction for MVE.
(fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
instruction for MVE.
(fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
instruction for MVE.
* testsuite/gas/arm/mve-ldst.d: New test.
* testsuite/gas/arm/mve-ldst.s: Likewise.
bfcvt converts a .S input to a .H output, so any predicated movprfx
needs to operate on .S rather than .H. In common with SVE2 narrowing
top operations, bfcvtnt doesn't accept movprfx.
2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
opcodes/
* aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
gas/
* testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
.s for the movprfx.
* testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
* testsuite/gas/aarch64/sve-movprfx_28.d,
* testsuite/gas/aarch64/sve-movprfx_28.l,
* testsuite/gas/aarch64/sve-movprfx_28.s: New test.
ravenscar-thread.c needed a change to adapt to multi-target:
ravenscar_thread_target::mourn_inferior called the mourn_inferior
method on the target beneat -- but when the target beneath was the
remote target, this resulted in the ravenscar target being deleted.
Switching the order of the calls to unpush_target and the beneath's
mourn_inferior fixes this problem.
gdb/ChangeLog
2020-01-31 Tom Tromey <tromey@adacore.com>
* ravenscar-thread.c (ravenscar_thread_target::mourn_inferior):
Call beneath target's mourn_inferior after unpushing.
Change-Id: Ia80380515c403adc40505a6b3420c9cb35754370
In TUI mode, if the disassembly output for the program is less than
one screen long, then currently if the user scrolls down until on the
last assembly instruction is displayed and then tries to scroll up
using Page-Up, the display doesn't update - they are stuck viewing the
last line.
If the user tries to scroll up using the Up-Arrow, then the display
scrolls normally.
What is happening is on the Page-Up we ask GDB to scroll backward the
same number of lines as the height of the TUI ASM window. The back
scanner, which looks for a good place to start disassembling, fails to
find a starting address which will provide the requested number of new
lines before we get back to the original starting address (which is
not surprising, our whole program contains less than a screen height
of instructions), as a result the back scanner gives up and returns
the original starting address.
When we scroll with Up-Arrow we only ask the back scanner to find 1
new instruction, which it manages to do, so this scroll works.
The solution here is, when we fail to find enough instructions, to
return the lowest address we did manage to find. This will ensure we
jump to the lowest possible address in the disassembly output.
gdb/ChangeLog:
PR tui/9765
* tui/tui-disasm.c (tui_find_disassembly_address): If we don't
have enough lines to fill the screen, still return the lowest
address we found.
gdb/testsuite/ChangeLog:
PR tui/9765
* gdb.tui/tui-layout-asm-short-prog.S: New file.
* gdb.tui/tui-layout-asm-short-prog.exp: New file.
Change-Id: I6a6a7972c68a0559e9717fd8d82870b669a40af3
