Commit Graph

3187 Commits

Author SHA1 Message Date
Mike Frysinger
075a845a92 sim: bfin: fix dsp insns IH saturation/rounding behavior
When using the IH modifier, we need to first saturate the value before
rounding it, and then further saturate it a bit more.  This makes the
sim match the hardware behavior with these insns.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 19:24:57 +00:00
Mike Frysinger
b02cc5b9df sim: bfin: fix inverted changelog entry 2011-06-18 18:09:35 +00:00
Mike Frysinger
73aae8efb2 sim: bfin: fix accumulator edge case saturation
When the accumulator saturates, it needs to be greater than, but not
equal to, the largest unsigned value as this is what the hardware does.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 17:27:01 +00:00
Mike Frysinger
886ea33b69 sim: bfin: use freeargv for freeing argvs
Since the argv array was allocated with dupargv, it needs to be freed
with freeargv to avoid leaks.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 17:20:38 +00:00
Mike Frysinger
ce6f492fff sim: erc32: ignore --sysroot that gdb passes down 2011-06-09 15:33:03 +00:00
Joel Brobecker
94e4274dc0 sim/ppc: Fix check for --sysroot= option
Fixes an error reported by Tristan and which can be evidenced by
doing:

        % powerpc-elf-gdb
        (gdb) target sim --sysroot=var
        Invalid option: --sysroot=/var
        [...]

sim/ppc/ChangeLog:

        * psim.c (psim_options): Fix length of comparison when checking
        for --sysroot= option.
2011-06-09 14:21:43 +00:00
Joel Brobecker
807b48afa0 Spelling fixes in ChangeLog. 2011-06-09 14:21:36 +00:00
Joel Brobecker
11eef9ed35 ppc sim: Improve invalid option error message
This patch improves the error message when an invalid option is
detected, by also printing the option that actually caused the error.
For instance, from GDB:

        (gdb) target sim --hello
        Invalid option: --hello
        Usage:
        [...]

We also added the usage after an invalid long-name option (Eg: --hello)
to be in line with what's being done for all other invalid options
being detected.

sim/ppc/ChangeLog:

        * psim.c (psim_options): Add option that cause the error
        in invalid-option error messages. Print the usage when
        detecting an invalid long-name option.
2011-06-08 16:44:28 +00:00
Joel Brobecker
8294052ca9 ppc sim: Allow --sysroot command-line option
There was a recent change that cuased the "target sim" command
to add a --sysroot option to the argument vector passed down to
the simulator.  This caused a failure in the powerpc simulator,
as it did not recognize it.  This patch fixes the problem by adding
support for the --sysroot option (it ignores it).

sim/ppc/ChangeLog:

        * psim.c (psim_options): Accept and ignore `--sysroot=...'.
2011-06-08 16:44:20 +00:00
Mike Frysinger
6248039b9e sim: bfin: add missing gitignore file 2011-06-05 21:32:34 +00:00
Mike Frysinger
1d7b4a7037 sim: bfin: import testsuite
Now that the common sim testsuite code supports .S and .c files, we
can import the Blackfin testsuite.  There are about ~800 tests here,
so I'm only attaching a compressed patch of them.  Other than adding
files to sim/testsuite/sim/bfin/, the sim/configure.tgt file was
updated to mark Blackfin as having a testsuite, and sim/configure
regenerated.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-04 17:44:22 +00:00
Mike Frysinger
eb3243445a sim: bfin: add support for glued SIC interrupt lines
The BF537 family glues a bunch of peripherals into single interrupt lines
that run into the SIC.  To model this same behavior in the sim, we need to
use the glue-or device, and in order to use that, we need to tweak things
a bit in the mach code to allow declaring of these new devices.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-04 17:18:04 +00:00
Mike Frysinger
082e1c4a87 sim: bfin: push SIC mappings to device tree
The machs.c file is the best place for holding cpu-specific details, so
restructure the way the SIC manages its ports to do just that.  Now the
SIC's have a standard set of input pins and the different line routing
from peripherals is kept in the device tree only.  This better models
the hardware where the SIC doesn't care about the exact peripheral that
is sending it stuff, just which input pin it gets it on.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-04 17:11:19 +00:00
Joel Brobecker
91c6776727 Spelling fixe in sim/ppc/vm.c
From Stephen Kitt  <steve@sk2.org>
        * vm.c (vm_synchronize_context): Spelling fix in function
        documentation.
2011-06-03 23:47:04 +00:00
Joel Brobecker
d009417cdb Minor spelling fix in ChangeLog. 2011-06-03 23:46:46 +00:00
Mike Frysinger
36f3e98103 sim: bfin: dma: fix indentation 2011-06-03 05:03:31 +00:00
Joel Brobecker
248d2a8fdc Add `sim_complete_command' definition to erc32 sim
This patch fixes a build failure at link time due to
sim_complete_command being undefined.  There was a recent change
that added this function to all the ports that do not use the
common/ subdir.  But somehow, the erc32 port got missed.

sim/erc32/ChangeLog:

        * interf.c (sim_complete_command): New stub function.
2011-06-01 17:35:02 +00:00
Mike Frysinger
440db57552 sim: fix minor --sysroot mem leak
The current --sysroot parsing attempts to keep from leaking memory by
treating the empty string specially (sine this is the initial value),
but it ends up leaking memory when the arg is an empty string.  So if
someone uses --sysroot "", the old value is leaked, as is the new one.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-27 18:05:16 +00:00
Mike Frysinger
3ddcae71bb sim: common: add back Blackfin syscalls
A semi-recent change which regenerated nltvals.def somehow missed all of
the Blackfin syscalls.  So regenerate against the latest tree to get them
back.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-26 18:20:13 +00:00
Mike Frysinger
ea1f7d4c8e sim: bfin: switch to new syscall trace level
Now that the common code supports the syscall trace level, change the
Blackfin code from using the event level to the syscall level.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-26 00:14:43 +00:00
Mike Frysinger
3a49ea9fac sim: add syscall tracing level
It's useful to be able to trace just the system calls the simulated
program is calling, so add a new --trace-syscall option for ports to
leverage if they choose.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-26 00:09:59 +00:00
Mike Frysinger
f2db709f4f sim: bfin: move model data into machs.h
Pull the model data (register addresses/sizes) out of the different model
files and into the machs.h header.  The models themselves don't care about
where they're mapped, only the mach code does.  This allows us to keep the
model headers from being included in the mach code which can cause issues
with model-specific names colliding.  Such as when a newer device model is
created, but with incompatible register names/layouts.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25 12:54:19 +00:00
Mike Frysinger
c43aadcaa6 sim: bfin: add a performance monitor stub
No counters get updated, but there is enough here for software to
poke things and work.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25 12:41:29 +00:00
Mike Frysinger
dfb61fb66f sim: bfin: add bf526-0.2/bf54x-0.4 rom regions
Add regions for the on-chip roms on some newer Blackfin parts.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25 12:35:05 +00:00
Mike Frysinger
dd931b2ff2 sim: glue: allow bitwise devices to only glue ints
Some Blackfin parts tie a bunch of interrupt lines into a single OR
gate before feeding the result into the SIC.  The glue-or device in
the sim provides a nice way of modeling this exact behavior.  At the
moment though, it requires the device to be mapped into the address
space so that things could write to it directly.  This is not needed
for the Blackfin usage, so make it optional.  Now the glue devices
can be used to simply tie interrupt lines together.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-23 23:00:35 +00:00
Mike Frysinger
0e31da218e sim: glue: implement or/xor funcs
The glue device has a bunch of "todos" for the misc bitwise devices.
So implement two for fun -- the glue-or and glue-xor.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-23 22:59:54 +00:00
Mike Frysinger
0641104b2e sim: tests: support .S/.c files
Rather than requiring all sim tests to be preprocessed .s files, add
support for .S and .c files so we can easily write code using a higher
level language like C.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-16 18:48:31 +00:00
Mike Frysinger
efac2223c4 sim: bfin: allow pushing of SP
The hardware respects this insn, and some code (like the on-chip bootrom)
uses it, so allow it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-14 16:00:37 +00:00
Mike Frysinger
28fe96b798 sim: bfin: implement loop back support in the UARTs
The UART has a LOOP_ENA bit in its MCR register where writes to the THR
go to the RBR.  Implement support for this mode.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-14 15:59:09 +00:00
Mike Frysinger
34b47c3828 sim: fix func call style (space before paren)
Committed this as obvious:
	-foo(...);
	+foo (...);

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-11 20:02:42 +00:00
Hans-Peter Nilsson
3fc8ee5409 PR sim/12737
* sim/arm/iwmmxt/wcmpgt.cgs, sim/arm/iwmmxt/wmac.cgs,
	sim/arm/iwmmxt/wsra.cgs, sim/arm/xscale/blx.cgs: Kfail.
2011-05-11 04:59:28 +00:00
Mike Frysinger
b44f3f638e sim: bfin: fix UART LSR read-only bit saturation
A few bits in the newer UART LSR register are not sticky, so make sure
we clear them when returning updated status rather than leaving them
always set.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-09 18:14:01 +00:00
Joseph Myers
4d393d60c4 gdb:
* configure.host (xscale*): Don't handle target.
	* configure.tgt (thumb*-*-* | strongarm*-*-* | xscale-*-*): Don't
	handle targets.

gdb/gdbserver:
	* README: Don't mention xscale*-*-linux*.
	* configure.srv (xscale*-*-linux*): Don't handle target.

gdb/testsuite:
	* gdb.base/a2-run.exp (strongarm-*-coff): Don't handle target.
	* gdb.base/float.exp (xscale*-*-*, strongarm*-*-*): Don't handle
	targets.
	* gdb.base/long_long.exp (xscale*-*-*, strongarm*-*-*): Don't
	handle targets.

sim:
	* configure.tgt (thumb*-*-* | strongarm*-*-* | xscale-*-*): Don't
	handle targets.
	* configure: Regenerate.

sim/testsuite:
	* configure: Regenerate.
	* sim/arm/allinsn.exp (xscale*-*-*): Don't handle target.
	* sim/arm/misc.exp (thumb*-*-*, xscale*-*-*): Don't handle
	targets.
	* sim/arm/iwmmxt/iwmmxt.exp: Test for arm*-*-* instead of
	xscale*-*-*.
	* sim/arm/thumb/allthumb.exp (thumb*-*-*): Don't handle target.
	* sim/arm/xscale/xscale.exp: Test for arm*-*-* instead of
	xscale*-*-*.
2011-05-04 19:28:16 +00:00
Mike Frysinger
2613074f8f sim: bfin: constify dmac pmap arrays
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-27 21:29:03 +00:00
Mike Frysinger
054c055baf sim: gpio: add output support
Make all of the pins bidirectional, and support sending signals when
software drives the pins as outputs.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-26 05:47:14 +00:00
Mike Frysinger
5e0ba1a39e sim: gpio: update mask a/b signals better
When the mask a/b MMRs are written, the output signal might change levels
(as pins are [un]masked), so make sure we update the output level.

Further, make sure we handle edge ints correctly by first sending a high
signal followed by a low signal.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-26 05:46:02 +00:00
Mike Frysinger
af9f7da78b sim: add sim_complete_command stubs for non-common-using ports
For the ports that don't use the common/ subdir, we need to add stub funcs
to them to avoid build failures with gdb and command completion.  These do
not implement the actual completion functionality ... any port that wants
that can either convert to the common/ subdir, or fill out the function on
their own time.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-16 18:16:36 +00:00
Mike Frysinger
0427acfba0 sim: bfin: use store buffer with more 32bit insns
A bunch of 32bit insns were not using the store buffer, so when they were
used in parallel insns, they would incorrectly clobber a register early.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-16 17:37:55 +00:00
Mike Frysinger
5592f70ec8 gdb: sim: add style fixes lost between git->cvs 2011-04-15 16:23:19 +00:00
Mike Frysinger
56a9aa1d10 gdb: sim: add command line completion
For now, only the sub-command name is completed.  No support yet for
completing options to that command.  But even this is a huge step as
currently, nothing is completed, and the basic "help sim" is fairly
obtuse as to what exactly the "sim" command accepts.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-15 03:43:46 +00:00
Mike Frysinger
d2cfa400a1 sim: bfin: handle implicit DISALGNEXCPT with video insns
When most video related insns are used in parallel with Ireg loads, the
DISALGNEXCPT insn behavior is implicitly in effect.

Reported-by: Anton Shokurov <shokurov.anton.v@yandex.ru>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-15 01:21:21 +00:00
Mike Frysinger
e10d6db33d sim: bfin: respect the port level on signals to the SIC
The SIC latches ints from peripherals to the CEC, but the peripherals
need to be able to tell the SIC when to stop.  So use the incoming level
to figure out when to set the int bits and when to clear it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 05:23:26 +00:00
Mike Frysinger
8aacdaf48d sim: bfin: add missing GPIO pin 15
Each GPIO block has 16 pins, and I only added 15 in the original
port list.  So add the missing 16th.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 05:22:23 +00:00
Mike Frysinger
d45bea91ec sim: dv-glue: fix up style a bit
This touches up the code a bit to match GNU style.  No functional changes.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-02 06:02:51 +00:00
Mike Frysinger
12c4cbd553 sim: fix up style a bit
This touches up the code a bit to match GNU style.  No functional changes.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-02 05:30:16 +00:00
Mike Frysinger
2b12772f43 sim: bfin: add OTP output port
This doesn't currently generate any interrupts (as there doesn't appear
to be any documentation to *when* it would even do so), but since the
HRM does say an interrupt line exists between the OTP and the SIC, add
one for completeness sake.  This will make a follow up patch easier.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-01 22:32:04 +00:00
Mike Frysinger
6294f8ea1e sim: bfin: regen configure to include new cfi device 2011-03-29 18:39:51 +00:00
Mike Frysinger
66ee273116 sim: cfi: new flash device simulation
This simulates a CFI flash.  Its pretty configurable via the device
tree.  For now, only basic read/write/erase operations are supported
for the Intel command set, but it's easy enough to extend support.
It's certainly enough to trick Das U-Boot into using it for probing,
reading, writing, and erasing.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-29 17:57:21 +00:00
Mike Frysinger
1a3af0bfc3 sim: bfin: fix sign extension with 16bit acc add insns
The current implementation attempts to handle the 16bit sign extension
itself.  Unfortunately, it gets it right in some cases.  So rather than
fix that logic, just drop it in favor of using 16bit signed casts.  Now
gcc will take care of getting the logic right.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-29 01:41:49 +00:00
Mike Frysinger
36aef94270 sim: bfin: handle saturation with RND12 sub insns
The current handling of the subtraction insn with the RND12 modifier
works when saturation isn't involved.  So add handling for this edge
case to match the hardware.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-27 04:03:05 +00:00