Make _bfd_riscv_relax_call handle section alignment padding same as
the _bfd_riscv_relax_lui and _bfd_riscv_relax_pc functions already
do. Use the max section alignment if section boundaries are crossed,
otherwise the alignment of the containing section.
bfd/
PR 25181
* elfnn-riscv.c (_bfd_riscv_relax_call): Always add max_alignment to
foff. If sym_sec->output_section and sec->output_section are the same
and not *ABS* then set max_alignment to that section's alignment.
ld/
PR 25181
* testsuite/ld-riscv-elf/call-relax-0.s: New file.
* testsuite/ld-riscv-elf/call-relax-1.s: New file.
* testsuite/ld-riscv-elf/call-relax-2.s: New file.
* testsuite/ld-riscv-elf/call-relax-3.s: New file.
* testsuite/ld-riscv-elf/call-relax.d: New test.
* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run call-relax test.
Change-Id: Iaf65cee52345abf1955f36e8e72c4f6cc0db8d9a
Two patches from Nelson Chu.
It is better to use the linker's callback functions to handle the link time
error when relocating. The unresolved relocation error can be regarded as
an unsupported relocation. To make user easier to understand different errors,
we need to extend the current error message format of the callback function
since the format is fixed.
bfd/
* elfnn-riscv.c (riscv_elf_relocate_section): Use asprintf to extend
the error message if needed, and then store the result into the
`msg_buf`. Finally, remember to free the unused `msg_buf`. All error
message for the dangerous relocation should be set before we call the
callback function. If we miss the error message since linker runs out
of memory, we should set the default error message for the error.
ld/
* testsuite/ld-riscv-elf/lib-nopic-01a.s: Create the shared library
lib-nopic-01a.so, it will be linked with lib-nopic-01b.s.
* testsuite/ld-riscv-elf/lib-nopic-01b.s: Add new test for the
unresolved relocation. Link the non-pic code into a shared library
may cause the error.
* testsuite/ld-riscv-elf/lib-nopic-01b.d: Likewise.
* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run the new test only when
the shared library is supported.
R_RISCV_CALL, R_RISCV_JAL and R_RISCV_RVC_JUMP are pc-relative relocation.
For now, we do not allow the object with these relocation links into a shared
library since the referenced symbols may be loaded to the places that too far
from the pc. We can improve the error message for these unsupported relocation
to notice user that they should recompile their code with `fPIC`.
bfd/
* elfnn-riscv.c (riscv_elf_relocate_section): Report the error message
that user should recompile their code with `fPIC` when linking non-pic
code into shared library.
ld/
* testsuite/ld-riscv-elf/lib-nopic-01b.d: Update the error message.
Change-Id: Ib3347a0a6fa1c2b20a9647c314d5bec2c322ff04
For the lui and auipc relaxations, since the symbol value of an undefined weak
symbol is always be zero, we can optimize the patterns into a single LI/MV/ADDI
instruction.
bfd/
* elfnn-riscv.c (riscv_pcgp_hi_reloc): Add new field undefined_weak.
(riscv_record_pcgp_hi_reloc): New parameter undefined_weak.
Set undefined_weak field from it.
(relax_func_t): New parameter undefined_weak.
(_bfd_riscv_relax_call): New ignored parameter undefined_weak.
(_bfd_riscv_relax_tls_le): Likewise.
(_bfd_riscv_relax_align): Likewise.
(_bfd_riscv_relax_delete): Likewise.
(_bfd_riscv_relax_lui): New parameter undefined_weak. If true,
allow relaxing. For LO12* relocs, set rs1 to x0 when undefined_weak.
(_bfd_riscv_relax_pc): New parameter undefined_weak. For LO12* relocs,
set undefined_weak from hi_reloc. If true, allow relaxing. For LO12*
relocs, set rs1 to x0 when undefined_weak and change to non-pcrel
reloc.
(_bfd_riscv_relax_section): New local undefined_weak. Set for
undef weak relocs that can be relaxed. Pass to relax_func call.
ld/
* testsuite/ld-riscv-elf/weakref32.s: Add relaxable undef weak code.
* testsuite/ld-riscv-elf/weakref64.s: Likewise.
* testsuite/ld-riscv-elf/weakref32.d: Updated.
* testsuite/ld-riscv-elf/weakref64.d: Updated.
This fixes a problem originally reported at
https://github.com/riscv/riscv-binutils-gdb/issues/173
If you have code linked at address zero, you can have a lui instruction
loading a value 0x800 which gets relaxed to a c.lui which is valid (c.lui 0x1
followed by addi -0x800). Relaxation can reduce the value below 0x800 at which
point the c.lui 0x0 is no longer valid. We can fix this by converting the
c.lui to a c.li which can load 0.
bfd/
* elfnn-riscv.c (perform_relocation) <R_RISCV_RVC_LUI>: If
RISCV_CONST_HIGH_PART (value) is zero, then convert c.lui instruction
to c.li instruction, and use ENCODE_RVC_IMM to set value.
ld/
* testsuite/ld-riscv-elf/c-lui-2.d: New.
* testsuite/ld-riscv-elf/c-lui-2.ld: New.
* testsuite/ld-riscv-elf/c-lui-2.s: New.
* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run the c-lui-2 test.
bfd/
* elfnn-riscv.c (riscv_resolve_pcrel_lo_relocs): Add check for reloc
overflow with addend. Use reloc_dangerous instead of reloc_overflow.
Add strings for the two errors handled here.
(riscv_elf_relocate_section) In case R_RISCV_PCREL_LO12_I, rewrite
comment. Only give error with addend when used with section symbol.
In case bfd_reloc_dangerous, update error string.
ld/
* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run pcrel-lo-addend-2.
* testsuite/ld-riscv/elf/ld-riscv-elf/pcrel-lo-addend-2.d: New.
* testsuite/ld-riscv/elf/ld-riscv-elf/pcrel-lo-addend-2.s: New.
* testsuite/ld-riscv/elf/ld-riscv-elf/pcrel-lo-addend.d: Update name
and error string.
bfd/
* elfnn-riscv.c (riscv_elf_relocate_section): Use bfd_reloc_dangerous
when pcrel_lo reloc has an addend. Use reloc_dangerous callback for
bfd_reloc_dangerous. Use einfo instead of warning callback for errors.
Add %X%P to error messages.
ld/
* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run pcrel-lo-addend test.
* testsuite/ld-riscv-elf/pcrel-lo-addend.d: New.
* testsuite/ld-riscv-elf/pcrel-lo-addend.s: New.
This matches the ISA specification. This also adds two tests: one to
make sure the assembler rejects invalid 'c.lui's, and one to make sure
we only relax valid 'c.lui's.
bfd/ChangeLog
2017-10-24 Andrew Waterman <andrew@sifive.com>
* elfnn-riscv.c (_bfd_riscv_relax_lui): Don't relax to c.lui
when rd is x0.
include/ChangeLog
2017-10-24 Andrew Waterman <andrew@sifive.com>
* opcode/riscv.h (VALID_RVC_LUI_IMM): c.lui can't load the
immediate 0.
gas/ChangeLog
2017-10-24 Andrew Waterman <andrew@sifive.com>
* testsuite/gas/riscv/c-lui-fail.d: New testcase.
gas/testsuite/gas/riscv/c-lui-fail.l: Likewise.
gas/testsuite/gas/riscv/c-lui-fail.s: Likewise.
gas/testsuite/gas/riscv/riscv.exp: Likewise.
ld/ChangeLog
2017-10-24 Andrew Waterman <andrew@sifive.com>
* ld/testsuite/ld-riscv-elf/c-lui.d: New testcase.
ld/testsuite/ld-riscv-elf/c-lui.s: Likewise.
ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp: New test suite.
Jim Wilson