2004-06-14 Chris Demetriou <cgd@broadcom.com>
* elf32-mips.c (elf_mips_gnu_pcrel32): Add (undoing 2004-04-24
removal) with updated comment.
(bfd_elf32_bfd_reloc_type_lookup): Add back case for
BFD_RELOC_32_PCREL.
(mips_elf32_rtype_to_howto): Add back case for R_MIPS_PC32.
* elfxx-mips.c (mips_elf_calculate_relocation): Likewise.
[ include/elf/ChangeLog ]
2004-06-14 Chris Demetriou <cgd@broadcom.com>
* mips.h (R_MIPS_PC32): Add back (undoing removal on 2004-04-24),
with an updated comment.
bfd:
* Makefile.am: Regenerate dependencies.
* Makefile.in: Regenerate.
* archures.c: Add bfd_mach_sh3_nommu .
* bfd-in2.h: Regenerate.
* cpu-sh.c: Add sh3-nommu architecture.
(bfd_to_arch_table): Create new table.
(sh_get_arch_from_bfd_mach): Create new function.
(sh_get_arch_up_from_bfd_mach): Create new function.
(sh_merge_bfd_arch): Create new function.
* elf32-sh.c (sh_ef_bfd_table): Add table.
(sh_elf_check_relocs): Replace switch statement with
use of sh_ef_bfd_table .
(sh_elf_get_flags_from_mach): Add new function.
(sh_find_elf_flags): Likewise.
(sh_elf_copy_private_data): Replace most of non-elf contents
with a call to sh_merge_bfd_arch() .
gas:
* Makefile.am: Regenerate dependecies.
* Makefile.in: Regenerate.
* config/tc-sh.c (valid_arch): Make unsigned.
(preset_target_arch): Likewise.
(md_begin): Use new architecture flags system.
(get_specific): Likewise.
(assemble_ppi): Likewise.
(md_assemble): Likewise. Also fix error check for bad opcodes.
(md_parse_option): Likewise. Also generate -isa values according
to the table in bfd/cpu-sh.c instead of just constants. Also
allow <arch>-up ISA variants.
(sh_elf_final_processing): Replace if-else chain with a call to
sh_find_elf_flags().
* testsuite/gas/sh/arch: New directory.
* testsuite/gas/sh/arch/arch.exp: New test script.
* testsuite/gas/sh/arch/arch_expected.txt: New file.
* testsuite/gas/sh/arch/sh.s: New file.
* testsuite/gas/sh/arch/sh2.s: New file.
* testsuite/gas/sh/arch/sh-dsp.s: New file.
* testsuite/gas/sh/arch/sh2e.s: New file.
* testsuite/gas/sh/arch/sh3-nommu.s: New file.
* testsuite/gas/sh/arch/sh3.s: New file.
* testsuite/gas/sh/arch/sh3-dsp.s: New file.
* testsuite/gas/sh/arch/sh3e.s: New file.
* testsuite/gas/sh/arch/sh4-nommu-nofpu.s: New file.
* testsuite/gas/sh/arch/sh4-nofpu.s: New file.
* testsuite/gas/sh/arch/sh4.s: New file.
* testsuite/gas/sh/arch/sh4a-nofpu.s: New file.
* testsuite/gas/sh/arch/sh4al-dsp.s: New file.
* testsuite/gas/sh/arch/sh4a.s: New file.
include/elf:
* sh.h (EF_SH_HAS_DSP): Remove.
(EF_SH_HAS_FP): Remove.
(EF_SH_MERGE_MACH): Remove.
(EF_SH4_NOFPU): Convert to decimal.
(EF_SH4A_NOFPU): Likewise.
(EF_SH4_NOMMU_NOFPU): Likewise.
(EF_SH3_NOMMU): Add new macro.
(EF_SH_BFD_TABLE): Likewise.
(sh_find_elf_flags): Add prototype.
(sh_elf_get_flags_from_mach): Likewise.
opcodes:
* sh-dis.c (target_arch): Make unsigned.
(print_insn_sh): Replace (most of) switch with a call to
sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
* sh-opc.h: Redefine architecture flags values.
Add sh3-nommu architecture.
Reorganise <arch>_up macros so they make more visual sense.
(SH_MERGE_ARCH_SET): Define new macro.
(SH_VALID_BASE_ARCH_SET): Likewise.
(SH_VALID_MMU_ARCH_SET): Likewise.
(SH_VALID_CO_ARCH_SET): Likewise.
(SH_VALID_ARCH_SET): Likewise.
(SH_MERGE_ARCH_SET_VALID): Likewise.
(SH_ARCH_SET_HAS_FPU): Likewise.
(SH_ARCH_SET_HAS_DSP): Likewise.
(SH_ARCH_UNKNOWN_ARCH): Likewise.
(sh_get_arch_from_bfd_mach): Add prototype.
(sh_get_arch_up_from_bfd_mach): Likewise.
(sh_get_bfd_mach_from_arch_set): Likewise.
(sh_merge_bfd_arc): Likewise.
ld:
* testsuite/ld-sh/arch/arch.exp: New test script.
* testsuite/ld-sh/arch/arch_expected.txt: New file.
* testsuite/ld-sh/arch/sh.s: New file.
* testsuite/ld-sh/arch/sh2.s: New file.
* testsuite/ld-sh/arch/sh-dsp.s: New file.
* testsuite/ld-sh/arch/sh2e.s: New file.
* testsuite/ld-sh/arch/sh3-nommu.s: New file.
* testsuite/ld-sh/arch/sh3.s: New file.
* testsuite/ld-sh/arch/sh3-dsp.s: New file.
* testsuite/ld-sh/arch/sh3e.s: New file.
* testsuite/ld-sh/arch/sh4-nommu-nofpu.s: New file.
* testsuite/ld-sh/arch/sh4-nofpu.s: New file.
* testsuite/ld-sh/arch/sh4.s: New file.
* testsuite/ld-sh/arch/sh4a-nofpu.s: New file.
* testsuite/ld-sh/arch/sh4al-dsp.s: New file.
* testsuite/ld-sh/arch/sh4a.s: New file.
2004-04-23 Chris Demetriou <cgd@broadcom.com>
* coff-mips.c (mips_relhi_reloc, mips_rello_reloc)
(mips_switch_reloc, mips_read_relocs, mips_relax_section)
(mips_relax_pcrel16, PCREL16_EXPANSION_ADJUSTMENT): Remove.
(mips_relocate_hi): Remove now-unused 'adjust' and 'pcrel' arguments,
and update comments to reflect current usage.
(mips_howto_table): Remove entries for MIPS_R_RELHI, MIPS_R_RELLO,
and MIPS_R_SWITCH, as well as several empty entries. Update comment
for MIPS_R_PCREL16.
(mips_ecoff_swap_reloc_in, mips_ecoff_swap_reloc_out)
(mips_adjust_reloc_out, mips_bfd_reloc_type_lookup): Remove support
for MIPS_R_SWITCH, MIPS_R_RELLO, and MIPS_R_RELHI relocations.
(mips_adjust_reloc_in): Likewise, adjust maximum accepted relocation
type number to be MIPS_R_PCREL16.
(mips_relocate_section): Remove support for link-time relaxation
of branches used by embedded-PIC. Remove support for MIPS_R_SWITCH,
MIPS_R_RELLO, and MIPS_R_RELHI relocations.
(_bfd_ecoff_bfd_relax_section): Redefine to bfd_generic_relax_section.
* ecoff.c (ecoff_indirect_link_order): Remove support for link-time
relaxation of branches used by embedded-PIC.
* ecofflink.c (bfd_ecoff_debug_accumulate): Likewise.
* libecoff.h (struct ecoff_section_tdata): Remove embedded-PIC
related members, update comment.
* pe-mips.c: Remove disabled (commented-out and #if 0'd)
code related to embedded-PIC.
* elfxx-mips.c (_bfd_mips_elf_read_ecoff_info): Remove
initialization of now-removed 'adjust' member of
'struct ecoff_debug_info'.
[ include/coff/ChangeLog ]
2004-04-23 Chris Demetriou <cgd@broadcom.com>
* mips.h (MIPS_R_RELHI, MIPS_R_RELLO, MIPS_R_SWITCH): Remove
(MIPS_R_PCREL16): Update comment.
* ecoff.h (struct ecoff_value_adjust): Remove structure.
(struct ecoff_debug_info): Remove 'adjust' member.
(INVLPG_Fixup): New function.
(PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
* opcode/i386.h (i386_optab): Remove CpuNo64 from sysenter and
sysexit.
opcodes:
* sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
* sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
accordingly.
bfd:
* archures.c: Add bfd_mach_sh4_nommu_nofpu.
* cpu-sh.c: Ditto.
* elf32-sh.c: Ditto.
* bfd-in2.h: Regenerate.
include/elf:
* sh.h: Add EF_SH4_NOMMU_NOFPU.
gas:
* config/tc-sh.c (md_parse_option): Add -isa=sh4-nofpu and
-isa=sh4-nommu-nofpu options. Adjust help messages accordingly.
(sh_elf_final_processing): Output BFD type sh4_nofpu if that is
the most general type or the user specifically requested it.
(md_assemble): Add a new error message for when an instruction
is understood, but is not allowed due to an -isa option.
2003-12-04 H.J. Lu <hongjiu.lu@intel.com>
* elfxx-ia64.c (elfNN_ia64_relax_section): Use the
need_relax_finalize field in link_info instead of
relax_finalizing to check if the relax finalize pass is being
done.
include/
2003-12-04 H.J. Lu <hongjiu.lu@intel.com>
* bfdlink.h (bfd_link_info): Change relax_finalizing to
need_relax_finalize.
ld/
2003-12-04 H.J. Lu <hongjiu.lu@intel.com>
* emultempl/ia64elf.em (gld${EMULATION_NAME}_after_parse): Set
link_info.need_relax_finalize to TRUE.
* ldlang.c (lang_process): Use link_info.need_relax_finalize
instead of link_info.relax_finalizing.
* ldmain.c (main): Likewise.
for loading addresses using CALL relocations.
Don't emit CALL relocations when a base register is used.
* gas/mips/lca-svr4pic.d: New test for the "lca" macro.
* gas/mips/lca-xgot.d: Likewise.
* gas/mips/lca.s: Source for the new tests.
* gas/mips/mips.exp: Run the new tests.
* opcode/mips.h: Define new enum members, M_LCA_AB and M_DLCA_AB.
* mips-opc.c (mips_builtin_opcodes): Handle new macros: "lca" and
"dlca".
2003-10-24 H.J. Lu <hongjiu.lu@intel.com>
* elflink.h (NAME(bfd_elf,size_dynamic_sections)): Look up
hash table for real symbols.
include/
2003-10-24 H.J. Lu <hongjiu.lu@intel.com>
* bfdlink.h (bfd_elf_version_expr): Add "symbol" and remove
"wildcard".
ld/
2003-10-24 H.J. Lu <hongjiu.lu@intel.com>
* ldlang.c (lang_vers_match): Check "symbol" instead of
"wildcard" and "pattern". Fix a typo.
(lang_finalize_version_expr_head): Likewise.
(lang_register_vers_node): Likewise.
(realsymbol): New function.
(lang_new_vers_pattern): Set "symbol" and remove "wildcard".
* ldlex.l (V_IDENTIFIER): Allow '\\'.
* elflink.c (_bfd_elf_export_symbol): Adjust for globals and locals
field changes.
(_bfd_elf_link_assign_sym_version): Likewise.
* elflink.h (size_dynamic_sections): Likewise.
include/
* bfdlink.h (struct bfd_elf_version_expr): Remove match field.
Add wildcard and mask fields.
(BFD_ELF_VERSION_C_TYPE): Define.
(BFD_ELF_VERSION_CXX_TYPE): Likewise.
(BFD_ELF_VERSION_JAVA_TYPE): Likewise.
(struct bfd_elf_version_expr_head): New.
(struct bfd_elf_version_tree): Add match field.
Change type of globals and locals fields
to struct bfd_elf_version_expr_head.
ld/
* ldlang.c: Include hashtab.h.
(lang_vers_match_lang_c, lang_vers_match_lang_cplusplus,
lang_vers_match_lang_java): Remove.
(lang_vers_match): New function.
(lang_new_vers_pattern): Initialize wildcard and mask
fields, don't initialize match.
(lang_new_vers_node): Use xcalloc. Adjust for globals and
locals field type changes. Set match field.
(version_expr_head_hash, version_expr_head_eq): New functions.
(lang_finalize_version_expr_head): New function.
(lang_register_vers_node): Call lang_finalize_version_expr_head.
Search in hash table if not wildcard when looking for duplicates.
* emultempl/ppc64elf.em (new_vers_pattern): Don't bother with
duplicate checking. Initialize all fields of dot_entry from entry
with the exception of pattern and next.
(_bfd_mmix_before_linker_allocation): Rename from
_bfd_mmix_prepare_linker_allocated_gregs.
(_bfd_mmix_after_linker_allocation): Rename from
_bfd_mmix_finalize_linker_allocated_gregs.
* callback.h (struct host_callback_struct): New members ftruncate
and truncate.
gdb:
sim/common:
* callback.c (os_ftruncate, os_truncate): New functions.
(default_callback): Initialize ftruncate and truncate members.
sim/sh:
* syscall.h (SYS_truncate, SYS_ftruncate): Define.
* interp.c (trap): Add support for SYS_ftruncate and SYS_truncate.
2003-10-14 Bob Wilson <bob.wilson@acm.org>
* elf32-xtensa.c (get_is_linkonce_section): Delete.
(xtensa_is_property_section, xtensa_is_littable_section): Use
XTENSA_INSN_SEC_NAME and XTENSA_LIT_SEC_NAME macros. Do not recognize
linkonce sections containing ".xt.insn" and ".xt.lit" substrings.
(xtensa_get_property_section_name): Check section name instead of
calling get_is_linkonce_section. Remove unused bfd parameter. Use
XTENSA_INSN_SEC_NAME and XTENSA_LIT_SEC_NAME macros. Never generate
linkonce section names by appending ".xt.insn" or ".xt.lit".
(xtensa_read_table_entries): Remove bfd argument in call to
xtensa_get_property_section_name. Free section name when done.
(elf_xtensa_combine_prop_entries): Free leaking table.
gas ChangeLog:
2003-10-14 Bob Wilson <bob.wilson@acm.org>
* config/tc-xtensa.c (xtensa_create_property_segments): Remove bfd
argument in call to xtensa_get_property_section_name. Formatting.
include ChangeLog:
2003-10-14 Bob Wilson <bob.wilson@acm.org>
* elf/xtensa.h: Formatting. Fix comments about property section
names for linkonce sections.
[bfd/ChangeLog]
* coff-i860.c (coff_i860_reloc_nyi): New function.
(howto_table): Add entries for relocations PAIR, HIGHADJ, HIGH,
LOWn, SPLITn, and BRADDR.
(RTYPE2HOWTO): Check that the r_type is within the howto_table
before trying to access the entry.
(coff_i860_rtype_to_howto): Likewise.
(coff_i860_reloc_type_lookup): New function.
(i860_reloc_processing): New function.
(coff_bfd_reloc_type_lookup): Define macro.
(RELOC_PROCESSING): Define macro.
Minor formatting adjustments.
[include/coff/ChangeLog]
* coff/i860.h (COFF860_R_PAIR, COFF860_R_LOW0, COFF860_R_LOW1,
COFF860_R_LOW2, COFF860_R_LOW3, COFF860_R_LOW4, COFF860_R_SPLIT0,
COFF860_R_SPLIT1, COFF860_R_SPLIT2, COFF860_R_HIGHADJ,
COFF860_R_BRADDR): Define new relocation constants and document.
Minor formatting adjustments.
2003-08-16 Jason Eckhardt <jle@rice.edu>
* i860.h (fmov.ds): Expand as famov.ds.
(fmov.sd): Expand as famov.sd.
(pfmov.ds): Expand as pfamov.ds.
gas/testsuite/ChangeLog:
2003-08-16 Jason Eckhardt <jle@rice.edu>
* gas/i860/pseudo-ops01.{s,d}: New files.
* gas/i860/i860.exp: Execute the new test above.
* gas/i860/README.i860: Mention that pseudo-ops need more testing
and remove the align fill defect from the list.
* elf32-ppc.c (R_PPC_RELAX32): New relocation.
(ppc_elf_install_value): New function.
(ppc_elf_sort_rela): Remove.
(ppc_elf_relax_section): Rewrite. Remove old relaxation
and replace with out of range branch stubs.
(ppc_elf_relocate_section): Handle R_PPC_RELAX32.
2003-07-28 Eric Christopher <echristo@redhat.com>
* ppc.h (R_PPC_RELAX32): New. Fake relocation.
* mips.h (CPU_RM7000): New macro.
(OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns.
bfd/
* archures.c (bfd_mach_mips7000): New.
* bfd-in2.h: Regenerated.
* cpu-mips.c (arch_info_struct): Add an entry for mips:7000.
* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips7000.
(mips_mach_extensions): Add an entry for it.
opcodes/
* mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries.
gas/
* config/tc-mips.c (hilo_interlocks): True for CPU_RM7000.
(mips_cpu_info_table): Add rm7000 and rm9000 entries.
gas/testsuite/
* gas/mips/rm7000.[sd]: New test.
* gas/mips/mips.exp: Run it.
