Commit Graph

167 Commits

Author SHA1 Message Date
Julian Brown 4e9d3b813b * arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
on 64-bit hosts.
2006-06-12 15:31:28 +00:00
Paul Brook c22aaad1c7 2006-06-06 Paul Brook <paul@codesourcery.com>
opcodes/
	* arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
	instructions.
	(neon_opcodes): Add conditional execution specifiers.
	(thumb_opcodes): Ditto.
	(thumb32_opcodes): Ditto.
	(arm_conditional): Change 0xe to "al" and add "" to end.
	(ifthen_state, ifthen_next_state, ifthen_address): New.
	(IFTHEN_COND): Define.
	(print_insn_coprocessor, print_insn_neon): Print thumb conditions.
	(print_insn_arm): Change %c to use new values of arm_conditional.
	(print_insn_thumb16): Print thumb conditions.  Add %I.
	(print_insn_thumb32): Print thumb conditions.
	(find_ifthen_state): New function.
	(print_insn): Track IT block state.
gas/testsuite/
	* gas/arm/thumb2_bcond.d: Update expected output.
	* gas/arm/thumb32.d: Ditto.
	* gas/arm/vfp1_t2.d: Ditto.
	* gas/arm/vfp1xD_t2.d: Ditto.
binutils/testsuite/
	* binutils-all/arm/objdump.exp: New file.
	* binutils-all/arm/thumb2-cond.s: New test.
2006-06-07 14:08:19 +00:00
Julian Brown 1f3c39b9e6 * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
vldm/vstm.
2006-05-05 18:56:01 +00:00
Julian Brown 0dbde4cf38 * arm-dis.c (print_insn_neon): Disassemble floating-point constant
VMOV.
2006-04-26 16:02:07 +00:00
Julian Brown 16980d0b05 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
%<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
	Add unified load/store instruction names.
	(neon_opcode_table): New.
	(arm_opcodes): Expand meaning of %<bitfield>['`?].
	(arm_decode_bitfield): New.
	(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
	Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
	(print_insn_neon): New.
	(print_insn_arm): Adjust print_insn_coprocessor call. Call
	print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
	(print_insn_thumb32): Likewise.
2006-04-26 15:40:55 +00:00
Paul Brook c16d2bf065 2006-03-16 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (insns): Add "svc".
gas/testsuite/
	* gas/arm/svc.d: New test.
	* gas/arm/svc.s: New test.
	* gas/arm/inst.d: Accept svc mnemonic.
	* gas/arm/thumb.d: Ditto.
	* gas/arm/wince_inst.d: Ditto.
opcodes/
	* arm-dis.c (arm_opcodes): Rename swi to svc.
	(thumb_opcodes): Ditto.
2006-03-16 15:08:48 +00:00
Paul Brook 62b3e31101 2006-02-24 Paul Brook <paul@codesourcery.com>
gas/
	* config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
	arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
	(struct asm_barrier_opt): Define.
	(arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
	(parse_psr): Accept V7M psr names.
	(parse_barrier): New function.
	(enum operand_parse_code): Add OP_oBARRIER.
	(parse_operands): Implement OP_oBARRIER.
	(do_barrier): New function.
	(do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
	(do_t_cpsi): Add V7M restrictions.
	(do_t_mrs, do_t_msr): Validate V7M variants.
	(md_assemble): Check for NULL variants.
	(v7m_psrs, barrier_opt_names): New tables.
	(insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
	(md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
	(arm_cpu_option_table): Add Cortex-M3, R4 and A8.
	(arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
	(struct cpu_arch_ver_table): Define.
	(cpu_arch_ver): New.
	(aeabi_set_public_attributes): Use cpu_arch_ver.  Set
	Tag_CPU_arch_profile.
	* doc/c-arm.texi: Document new cpu and arch options.
gas/testsuite/
	* gas/arm/thumb32.d: Fix expected msr and mrs output.
	* gas/arm/arch7.d: New test.
	* gas/arm/arch7.s: New test.
	* gas/arm/arch7m-bad.l: New test.
	* gas/arm/arch7m-bad.d: New test.
	* gas/arm/arch7m-bad.s: New test.
include/opcode/
	* arm.h: Add V7 feature bits.
opcodes/
	* arm-dis.c (arm_opcodes): Add V7 instructions.
	(thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
	(print_arm_address): New function.
	(print_insn_arm): Use it.  Add 'P' and 'U' cases.
	(psr_name): New function.
	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
2006-02-24 15:36:36 +00:00
Paul Brook 36b0c57df5 2005-11-02 Paul Brook <paul@codesourcery.com>
* arm-dis.c (print_insn_thumb32): Word align blx target address.
2005-11-02 16:53:11 +00:00
Alan Modra 9a2ff3f50c * arm-dis.c (print_insn): Warning fix. 2005-10-31 06:10:33 +00:00
Paul Brook f1022c90ad 2005-10-26 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (insns): Correct "sel" entry.
gas/testsuite/
	* gas/arm/archv6.d: Adjust expected output.
opcodes/
	* arm-dis.c (arm_opcodes): Correct "sel" entry.
2005-10-26 14:09:29 +00:00
Richard Earnshaw 19590ef7f6 2005-10-08 James Lemke <jim@wasabisystems.com>
* arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
	operations.
2005-10-08 14:52:07 +00:00
Paul Brook 3eb17e6bd2 2005-09-08 Paul Brook <paul@codesourcery.com>
bfd/
	* reloc.c: Rename BFD_RELOC_ARM_SMI to BFD_RELOC_ARM_SMC.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
opcodes/
	* arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
gas/
	* config/tc-arm.c (do_smi, do_t_smi): Rename ...
	(do_smc, do_t_smc): ... to this.
	(insns): Remane smi to smc.
	(md_apply_fix, tc_gen_reloc): Rename BFD_RELOC_ARM_SMI to
	BFD_RELOC_ARM_SMC.
gas/testsuite/
	* gas/arm/arch6zk.d: Rename smi to smc.
	* gas/arm/arch6zk.s: Ditto.
	* gas/arm/thumb32.d: Ditto.
	* gas/arm/thumb32.s: Ditto.
2005-09-08 12:49:27 +00:00
Paul Brook b13dd07a55 2005-09-02 Paul Brook <paul@codesourcery.com>
* arm-dis.c (coprocessor_opcodes): Add null terminator.
2005-09-02 14:54:27 +00:00
Paul Brook 8f06b2d82f 2005-09-02 Paul Brook <paul@codesourcery.com>
bfd/
	* libbdf.h: Regenerate.
	* bfd-in2.h: Regenerate.
	* reloc.c: Add BFD_RELOC_ARM_T32_CP_OFF_IMM and
	BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
gas/
	* config/tc-arm.c (encode_arm_cp_address): Use
	BFD_RELOC_ARM_T32_CP_OFF_IMM in thumb mode.
	(do_iwmmxt_wldstbh): Use BFD_RELOC_ARM_T32_CP_OFF_IMM_S2 in thumb
	mode.
	(md_assemble): Only allow coprocessor instructions when Thumb-2 is
	available.
	(cCE, cC3): Define.
	(insns): Use them for coprocessor instructions.
	(md_pcrel_from_section): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM.
	(get_thumb32_insn): New function.
	(put_thumb32_insn): New function.
	(md_apply_fix): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM and
	BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
gas/testsuite/
	* gas/arm/vfp-bad_t2.d, gas/arm/vfp-bad_t2.l, arm/vfp-bad_t2.s,
	gas/arm/vfp1_t2.d, gas/arm/vfp1_t2.s, gas/arm/vfp1xD_t2.d,
	gas/arm/vfp1xD_t2.s, gas/arm/vfp2_t2.d, gas/arm/vfp2_t2.s): New files.
opcodes/
	* arm-dis.c (coprocessor_opcodes): New.
	(arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
	(print_insn_coprocessor): New function.
	(print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
	format characters.
	(print_insn_thumb32): Use print_insn_coprocessor.
2005-09-02 13:12:45 +00:00
Paul Brook a2dfd01fa7 2005-08-30 Paul Brook <paul@codesourcery.com>
opcodes/
	* arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
gas/testsuite/
	* gas/arm/thumb.d: Change "sub rn, rn, rn" to "subs rn, rn, rn".
	* gas/arm/thumb32.d: Ditto.
2005-08-30 11:21:59 +00:00
Paul Brook e9f89963c4 2005-07-29 Paul Brook <paul@codesourcery.com>
bfd/
	* reloc.c: Add BFD_RELOC_ARM_T32_ADD_PC12.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
gas/
	* config/tc-arm.c (T16_32_TAB): Add "addr". Fix encoding of push and
	pop.
	(do_t_addr): Implement 32-bit variant.
	(do_t_push_pop): Make some errors warnings.  Handle single register
	32-bit case.
	(insns): Use tCE for adr.
	(md_pcrel_from_section): Handle BFD_RELOC_ARM_T32_ADD_PC12.
	(md_apply_fix): Ditto.
gas/testsuite/
	* gas/arm/thumb32.d: Fix expected output for writeback addressing
	modes.  Add single high reg push/pop test.
	* gas/asm/thumb32.s: Add single high reg push/pop test.
opcodes/
	* arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
2005-07-29 17:39:39 +00:00
Paul Brook 92e90b6eb3 2005-07-29 Paul Brook <paul@codesourcery.com>
bfd/
	* reloc.c (BFD_RELOC_ARM_T32_IMM12): Add.
	* bfd-in2.h: Regeenrate.
	* libbfd.h: Regenerate.
gas/
	* config/tc-arm.c (parse_tb): New function.
	(enum operand_parse_code): Add OP_TB.
	(parse_operands): Handle OP_TB.
	(do_t_add_sub_w, do_t_tb): New functions.
	(insns): Add entries for addw, subw, tbb and tbh.
	(md_apply_fix): Handle BFD_RELOC_ARM_T32_IMM12.
gas/testsuite/
	* gas/arm/thumb32.s: Add tests for addw, subw, tbb and tbh.
	* gas/arm/thumb32.d: Ditto.
opcodes/
	* arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
	(print_insn_thumb32): Fix decoding of thumb2 'I' operands.
2005-07-29 17:28:33 +00:00
Jim Wilson 0fd3a4776c Kaveh Ghazi's printf format attribute checking patch.
bfd:
	* elf32-xtensa.c (vsprint_msg): Add format attribute.  Fix
	format bugs.
	* vms.h (_bfd_vms_debug): Add format attribute.
	(_bfd_vms_debug, _bfd_hexdump): Fix typos.

binutils:
	* bucomm.h (report): Add format attribute.
	* dlltool.c (inform): Likewise.
	* dllwrap.c (display, inform, warn): Likewise.
	* objdump.c (objdump_sprintf): Likewise.
	* readelf.c (error, warn): Likewise.  Fix format bugs.

gas:
	* config/tc-tic30.c (debug): Add format attribute.  Fix format
	bugs.

include:
	* dis-asm.h (fprintf_ftype): Add format attribute.

opcodes:
	* arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
	d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
	ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
	m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
	ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
	v850-dis.c: Fix format bugs.
	* ia64-gen.c (fail, warn): Add format attribute.
	* or32-opc.c (debug): Likewise.
2005-07-07 19:27:52 +00:00
Nick Clifton 22f8fcbd5c arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction disassembly
pattern.
vfp1xD.d: Adjust expected fadds disassemblies now that the dissassembler has
  been fixed.
2005-07-07 11:37:10 +00:00
Zack Weinberg 6b5d3a4d35 opcodes:
* arm-opc.h: Delete; fold contents into ...
	* arm-dis.c: ... here.  Move includes of internal COFF headers
	next to includes of internal ELF headers.
	(streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
	(struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
	(struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
	(arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
	(iwmmxt_wwnames, iwmmxt_wwssnames):
	Make const.
	(regnames): Remove iWMMXt coprocessor register sets.
	(iwmmxt_regnames, iwmmxt_cregnames): New statics.
	(get_arm_regnames): Adjust fourth argument to match above changes.
	(set_iwmmxt_regnames): Delete.
	(print_insn_arm): Constify 'c'.  Use ISO syntax for function
	pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
	and iwmmxt_cregnames, not set_iwmmxt_regnames.
	(print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
	ISO syntax for function pointer calls.
include:
	* dis-asm.h (get_arm_regnames): Update prototype.
2005-06-08 17:27:41 +00:00
Zack Weinberg 4a5329c63a * arm-dis.c: Split up the comments describing the format codes, so
that the ARM and 16-bit Thumb opcode tables each have comments
	preceding them that describe all the codes, and only the codes,
	valid in those tables.  (32-bit Thumb table is already like this.)
	Reorder the lists in all three comments to match the order in
	which the codes are implemented.
	Remove all forward declarations of static functions.  Convert all
	function definitions to ISO C format.
	(print_insn_arm, print_insn_thumb16, print_insn_thumb32):
	Return nothing.
	(print_insn_thumb16): Remove unused case 'I'.
	(print_insn): Update for changed calling convention of subroutines.
2005-06-07 22:16:52 +00:00
Zack Weinberg c19d120533 include/elf:
* arm.h: Import complete list of official relocation names
	and numbers from AAELF.  Define FAKE_RELOCs for old names.
	Remove a few old names no longer used anywhere.

bfd:
	* elf32-arm.c: Wherever possible, use official reloc names
	from AAELF.
	(elf32_arm_howto_table, elf32_arm_tls_gd32_howto)
	(elf32_arm_tls_ldo32_howto, elf32_arm_tls_ldm32_howto)
	(elf32_arm_tls_le32_howto, elf32_arm_tls_ie32_howto)
	(elf32_arm_vtinherit_howto, elf32_arm_vtentry_howto)
	(elf32_arm_pc11_howto, elf32_arm_thm_pc9_howto, elf32_arm_got_prel)
	(elf32_arm_r_howto): Replace with elf32_arm_howto_table_1,
	elf32_arm_howto_table_2, and elf32_arm_howto_table_3.
	Add many new relocations from AAELF.
	(elf32_arm_howto_from_type): Update to match.
	(elf32_arm_reloc_map): Add entries for R_ARM_THM_JUMP24,
	R_ARM_THM_JUMP11, R_ARM_THM_JUMP19, R_ARM_THM_JUMP8,
	R_ARM_THM_JUMP6, R_ARM_GNU_VTINHERIT, and R_ARM_GNU_VTENTRY.
	(elf32_arm_reloc_type_lookup): Use elf32_arm_howto_from_type.
	(elf32_arm_final_link_relocate): Add support for
	R_ARM_THM_JUMP24, R_ARM_THM_JUMP19, R_ARM_THM_JUMP6.  Remove
	case entries redundant with default.

	* reloc.c: Reorganize ARM relocations.  Add Thumb
	assembler-internal relocations BFD_RELOC_ARM_T32_OFFSET_U8,
	BFD_RELOC_ARM_T32_OFFSET_IMM, BFD_RELOC_ARM_T32_IMMEDIATE.
	Add visible relocations BFD_RELOC_THUMB_PCREL_BRANCH7,
	BFD_RELOC_THUMB_BRANCH20, BFD_RELOC_THUMB_BRANCH25.
	Delete unused relocations BFD_RELOC_ARM_GOT12, BFD_RELOC_ARM_COPY.
	* bfd-in2.h, libbfd.h: Regenerate.

opcodes:
	* arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
	instructions.  Adjust disassembly of some opcodes to match
	unified syntax.
	(thumb32_opcodes): New table.
	(print_insn_thumb): Rename print_insn_thumb16; don't handle
	two-halfword branches here.
	(print_insn_thumb32): New function.
	(print_insn): Choose among print_insn_arm, print_insn_thumb16,
	and print_insn_thumb32.  Be consistent about order of
	halfwords when printing 32-bit instructions.

gas:
	* hash.c (hash_lookup): Add len parameter.  All callers changed.
	(hash_find_n): New interface.
	* hash.h: Prototype hash_find_n.
	* sb.c: Include as.h.
	(scrub_from_sb, sb_to_scrub, scrub_position): New statics.
	(sb_scrub_and_add_sb): New interface.
	* sb.h: Prototype sb_scrub_and_add_sb.
	* input-scrub.c (input_scrub_include_sb): Use sb_scrub_and_add_sb.

	* config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL): Remove
	reference to BFD_RELOC_ARM_GOT12 which is never generated.
	* config/tc-arm.c: Rewrite, adding Thumb-2 support.

gas/testsuite:
	* gas/arm/arm.exp: Convert all existing "gas_test" tests to
	"run_dump_test" tests.  Run more tests unconditionally.  Run new tests.
	* gas/arm/arch4t.s, gas/arm/arch6zk.s, gas/arm/arm3.s, gas/arm/arm6.s
	* gas/arm/arm7dm.s, gas/arm/bignum1.s, gas/arm/float.s
	* gas/arm/immed.s, gas/arm/iwmmxt.s, gas/arm/offset.s, gas/arm/thumb.s:
	Adjust to work as a dump test.
	* gas/arm/arch4t.d, gas/arm/arch6zk.d, gas/arm/arm3.d, gas/arm/arm6.d
	* gas/arm/arm7dm.d, gas/arm/bignum1.d, gas/arm/float.d
	* gas/arm/immed.d, gas/arm/iwmmxt.d, gas/arm/offset.d, gas/arm/thumb.d:
	New files.

	* gas/arm/armv1-bad.l, gas/arm/armv1-bad.s: Remove tests for
	diagnostics that don't happen in the first pass anymore.

	* gas/arm/iwmmxt-bad.l, gas/arm/r15-bad.l, gas/arm/req.l
	* gas/arm/vfp-bad.l:
	Update expected diagnostics.
	* gas/arm/pic.d: Update expected reloc name.
	* gas/arm/thumbv6.d: CPY no longer appears in disassembly.
	* gas/arm/r15-bad.s: Avoid two-argument mul.
	* gas/arm/req.s: Adjust comments.
	* gas/arm/maverick.d, gas/arm/maverick.s: Avoid inappropriate
	use of PC.

	* gas/arm/macro-1.d, gas/arm/macro1.s
	* gas/arm/t16-bad.l, gas/arm/t16-bad.s
	* gas/arm/tcompat.d, gas/arm/tcompat.s
	* gas/arm/tcompat2.d, gas/arm/tcompat2.s
	* gas/arm/thumb32.d, gas/arm/thumb32.s
	New test pair.

ld/testsuite:
	* ld-arm/mixed-app.d: Adjust expected disassembly a little.
2005-05-18 05:40:12 +00:00
Nick Clifton f432110413 Update the address and phone number of the FSF 2005-05-07 07:34:31 +00:00
Zack Weinberg 885fc2570f gas:
* config/tc-arm.c (tinsns): Add ARMv6K instructions sev, wfe,
	wfi, yield.
opcodes:
	* arm-dis.c (thumb_opcodes): Add ARMv6K instructions nop, sev,
	wfe, wfi, yield.
gas/testsuite:
	* gas/arm/thumbv6k.d, gas/arm/thumbv6k.s: New dump test.
	* gas/arm/arm.exp: Run it.
2005-03-12 18:25:47 +00:00
Zack Weinberg b9fd58c7eb Revert accidental commit of V6K ops 2005-03-12 18:17:42 +00:00
Zack Weinberg 0a003adc41 include:
* opcode/arm.h: Adjust comments for ARM_EXT_V4T and ARM_EXT_V5T.
	Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2,
	and ARM_ARCH_V6ZKT2.
opcodes:
	* arm-dis.c (arm_opcodes): Document %E and %V.
	Add entries for v6T2 ARM instructions:
	bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
	(print_insn_arm): Add support for %E and %V.
2005-03-12 18:14:05 +00:00
Richard Earnshaw 6255809cae * arm-dis.c: Correct top-level comment. 2004-11-29 10:12:57 +00:00
Richard Earnshaw 2fbad81528 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
architecuture defining the insn.
(arm_opcodes, thumb_opcodes): Delete.  Move to ...
* arm-dis.c (arm_opcodes, thumb_opcodes): Here.
Also include opcode/arm.h.
* Makefile.am (arm-dis.lo): Update dependency list.
* Makefile.in: Regenerate.
2004-11-27 11:09:21 +00:00
Daniel Jacobowitz b7693d0213 bfd/
* elf32-arm.c (PLT_THUMB_STUB_SIZE): Define.
	(elf32_arm_plt_thumb_stub): New.
	(struct elf32_arm_link_hash_entry): Add plt_thumb_refcount
	and plt_got_offset.
	(elf32_arm_link_hash_traverse): Fix typo.
	(elf32_arm_link_hash_table): Add obfd.
	(elf32_arm_link_hash_newfunc): Initialize new fields.
	(elf32_arm_copy_indirect_symbol): Copy plt_thumb_refcount.
	(elf32_arm_link_hash_table_create): Initialize obfd.
	(record_arm_to_thumb_glue): Mark the glue as a local ARM function.
	(record_thumb_to_arm_glue): Mark the glue as a local Thumb function.
	(bfd_elf32_arm_get_bfd_for_interworking): Verify that the
	interworking BFD is not dynamic.
	(bfd_elf32_arm_process_before_allocation): Handle R_ARM_PLT32.  Do
	not emit glue for PLT references.
	(elf32_arm_final_link_relocate): Handle Thumb functions.  Do not
	emit glue for PLT references.  Support the Thumb PLT prefix.
	(elf32_arm_gc_sweep_hook): Handle R_ARM_THM_PC22 and
	plt_thumb_refcount.
	(elf32_arm_check_relocs): Likewise.
	(elf32_arm_adjust_dynamic_symbol): Handle Thumb functions and
	plt_thumb_refcount.
	(allocate_dynrelocs): Handle Thumb PLT references.
	(elf32_arm_finish_dynamic_symbol): Likewise.
	(elf32_arm_symbol_processing): New function.
	(elf_backend_symbol_processing): Define.
opcodes/
	* arm-dis.c (WORD_ADDRESS): Define.
	(print_insn): Use it.  Correct big-endian end-of-section handling.
gas/testsuite/
	* gas/arm/mapping.d: Expect F markers for Thumb code.
	* gas/arm/unwind.d: Update big-endian pattern.
ld/
	* emultempl/armelf.em (arm_elf_set_bfd_for_interworking): Don't use
	a dynamic object for stubs.
ld/testsuite/
	* ld-arm/mixed-app.d, ld-arm/mixed-app.r, ld-arm/mixed-app.s,
	ld-arm/mixed-app.sym, ld-arm/mixed-lib.d, ld-arm/mixed-lib.r,
	ld-arm/mixed-lib.s, ld-arm/mixed-lib.sym, ld-arm/arm-dyn.ld,
	ld-arm/arm-lib.ld: New files.
	* ld-arm/arm-app-abs32.d, ld-arm/arm-app-abs32.r, ld-arm/arm-app.d,
	ld-arm/arm-app.r, ld-arm/arm-lib-plt32.d, ld-arm/arm-lib-plt32.r,
	ld-arm/arm-lib.d, ld-arm/arm-lib.r, ld-arm/arm-static-app.d,
	ld-arm/arm-static-app.r: Update for big-endian.
	* ld-arm/arm-elf.exp: Run the new tests.
2004-11-17 17:50:28 +00:00
Nick Clifton 0dd132b63c Apply Paul Brook's patch to implement armv6k instructions 2004-09-30 16:21:50 +00:00
Mark Mitchell 09d92015d3 * gas/arm/arm.exp: Add archv6 and thumbv6.
* gas/arm/archv6.d: New file.
	* gas/arm/archv6.s: Likewise.
	* gas/arm/thumbv6.d: Likewise.
	* gas/arm/thumbv6.s: Likewise.

	Add V6 support.
	* config/tc-arm.c (ARM_EXT_V6): New macro.
	(ARM_ARCH_V6): Likewise.
	(SHIFT_IMMEDIATE): Likewise.
	(SHIFT_LSL_OR_ASR_IMMEDIATE): Likewise.
	(SHIFT_ASR_IMMEDIATE): Likewise.
	(SHIFT_LSL_IMMMEDIATE): Likewise.
	(do_cps): New function.
	(do_cpsi): Likewise.
	(do_ldrex): Likewise.
	(do_pkhbt): Likewise.
	(do_pkhtb): Likewise.
	(do_qadd16): Likewise.
	(do_rev): Likewise.
	(do_rfe): Likewise.
	(do_sxtah): Likewise.
	(do_sxth): Likewise.
	(do_setend): Likewise.
	(do_smlad): Likewise.
	(do_smlald): Likewise.
	(do_smmul): Likewise.
	(do_ssat): Likewise.
	(do_usat): Likewise.
	(do_srs): Likewise.
	(do_ssat16): Likewise.
	(do_usat16): Likewise.
	(do_strex): Likewise.
	(do_umaal): Likewise.
	(do_cps_mode): Likewise.
	(do_cps_flags): Likewise.
	(do_endian_specifier): Likewise.
	(do_pkh_core): Likewise.
	(do_sat): Likewise.
	(do_sat16): Likewise.
	(insns): Add V6 instructions.
	(do_t_cps): New function.
	(do_t_cpy): Likewise.
	(do_t_setend): Likewise.
	(THUMB_CPY): New macro.
	(tinsns): Add V6 instructions.
	(decode_shift): Handle V6 restricted-shift options.
	(thumb_mov_compare): Support CPY.
	(arm_cores): Add arm1136js and arm1136jfs.
	(arm_archs): Add armv6.
	(arm_fpus): Add arm1136jfs.
	* doc/c-arm.texi (ARM Options): Mention arm1136js, arm1136jfs, and
	armv6 options.

	* gas/arm/arm.exp: Add archv6 and thumbv6.
	* gas/arm/archv6.d: New file.
	* gas/arm/archv6.s: Likewise.
	* gas/arm/thumbv6.d: Likewise.
	* gas/arm/thumbv6.s: Likewise.

	* arm-dis.c (print_arm_insn): Add 'W' macro.
	* arm-opc.h (arm_opcodes): Add V6 instructions.
	(thumb_opcodes): Likewise.
2003-12-06 01:25:29 +00:00
Nick Clifton 22a398e190 Add new field to disassemble_info structure: symbol_is_valid() and use it to
skip displaying arm elf mapping symbols in disassembly output.
2003-11-14 15:12:44 +00:00
Daniel Jacobowitz 8e6446ff53 * arm-dis.c (print_arm_insn): Print "-" after "#". 2003-11-03 14:47:22 +00:00
Nick Clifton f02232aaa3 Add support for unindexed form of Addressing Mode 5 2003-08-19 13:05:42 +00:00
Nick Clifton 31e0f3cd45 * objdump.c (main) :Accept multiple -M switch.
* doc/binutils.texi: Document that multiple -M switches are accepted and that
  a single -M switch can contain comma separated options.
* arm-dis.c (parse_arm_disassembler_option): Do not expect option string to be
  NUL terminated.
  (parse_disassembler_options): Allow options to be space or comma separated.
2003-07-18 11:34:41 +00:00
Nick Clifton 5a6c681789 Fixes for iWMMXt contribution. 2003-04-01 13:08:06 +00:00
Nick Clifton e16bb312f5 Add iWMMXt support 2003-03-25 20:56:01 +00:00
Alan Modra 6a51a8a8d3 * arm-dis.c (print_insn_arm): Constify "insn". Formatting.
(print_insn_thumb): Likewise.
	* h8500-dis.c (print_insn_h8500): Constify "opcode".
	* mcore-dis.c (print_insn_mcore): Constify "op".  Formatting.
	* ns32k-dis.c (print_insn_arg <case 'F'>): Use a union to avoid
	type-punned pointer warnings.
	<case 'L'>: Likewise.  Fix error message too.
	* pdp11-dis.c (print_reg): Warning fix.
	* sh-dis.c (print_movxy): Constify "op" param.
	(print_insn_ddt): Constify sh_opcode_info vars.
	(print_insn_ppi): Likewise.
	(print_insn_sh): Likewise.
	* tic30-dis.c (cnvt_tmsfloat_ieee): Use a union to avoid
	type-punned pointer warnings.
	* w65-dis.c (print_insn_w65): Constify "op".
2002-12-02 13:13:37 +00:00
Alan Modra b34976b65a s/boolean/bfd_boolean/ s/true/TRUE/ s/false/FALSE/. Simplify
comparisons of bfd_boolean vars with TRUE/FALSE.  Formatting.
2002-11-30 08:39:46 +00:00
Nick Clifton baf0cc5e96 Fix handling of BLX instruction to conform to Operations definition in the
ARM ARM.
2002-05-23 12:48:23 +00:00
Richard Earnshaw a2fc1b1f19 * arm-opc.h (arm_opcodes): Use generic rule %5?hb instead of %h.
* arm-dis.c (print_insn_arm): Don't handle 'h' case.
2002-01-19 12:27:24 +00:00
Richard Earnshaw a660f11eb1 * arm-opc.h (arm_opcodes): Add patterns for VFP instructions.
* arm-dis.c (print_insn_arm): Support new disassembly qualifiers for
VFP bitfields.
2002-01-15 15:41:23 +00:00
Aldy Hernandez b1ee46c5af * opcodess/arm-opc.h (arm_opcodes): Add cirrus insns.
* opcodes/arm-dis.c (print_insn_arm): Add 'I' case.
2001-10-08 18:50:37 +00:00
Nick Clifton d5b2f4d67c Fix compile time warning messages 2001-09-19 17:40:28 +00:00
Phil Blundell 4053649742 2001-07-13 Philip Blundell <philb@gnu.org>
* arm-dis.c (print_insn_arm): Use decimal for offsets in LDR/STR.
2001-07-16 19:04:31 +00:00
Nick Clifton 060d22b0d0 Fix typos in ChangeLogs; fix dates in copyright notices 2001-03-13 22:58:38 +00:00
Nick Clifton 4f3c3dbb37 Fix BLX(1) for Thumb 2001-03-06 22:33:47 +00:00
Nick Clifton 6a56ec7ea3 Fix disassembly of arm-elf instructions with relocs associated with them. 2001-01-09 20:29:48 +00:00
Nick Clifton 077b8428ab Add ARM v5t, v5te and XScale support 2000-11-25 00:21:40 +00:00
Alexandre Oliva 6eeeb4b407 * arm-dis.c (print_insn_arm): Output combinations of PSR flags. 2000-07-04 05:47:22 +00:00
Scott Bambrough 7c03c75e90 2000-06-26 Scott Bambrough <scottb@netwinder.org>
* arm-dis.c (regnames): Add an additional register set to match
	the set used by GCC.  Make it the default.
2000-06-26 16:50:29 +00:00
Nick Clifton 322f2c4579 Add support for _x and _s flags to MSR instruction 2000-05-15 19:25:22 +00:00
Fernando Nasser a7f8487eec 2000-02-14 Fernando Nasser <fnasser@totem.to.cygnus.com>
* arm-dis.c: Change flavor name from atpcs-special to
	special-atpcs to prevent name conflict in gdb.
	(get_arm_regname_num_options, set_arm_regname_option,
	get_arm_regnames): New functions.  API to access the several
	flavor of register names.  Note: Used by gdb.
	(print_insn_thumb): Use the register name entry from the currently
	selected flavor for LR and PC.
2000-02-14 19:02:47 +00:00
Nick Clifton a3d9c82d14 Rename parse_disassembler_option (again) 2000-02-07 18:27:19 +00:00
Nick Clifton 6c082ed806 Rename parse_disassembler_option to parse_arm_disassembler_option and allow it
to be exported.
2000-01-28 01:55:09 +00:00
Nick Clifton 58efb6c0fd Add ATPCS support to ARM disassembler.
Document ARM disassembler options.
2000-01-27 22:17:12 +00:00
Nick Clifton 2f0ca46a49 Apply Thoams de Lellis's patch to fic disassembly of Thumb instructions when
bounded by non-function labels.
2000-01-27 20:05:32 +00:00
Nick Clifton cb26882951 Prevent double dumping of raw thumb instructions. 2000-01-25 22:10:13 +00:00
Nick Clifton 01c7f6303d Add support for --disassembler-options=force-thumb 2000-01-03 20:50:57 +00:00
Donald Lindsay cfbd315cb2 Added 'X' format to ARM code. 1999-11-16 03:37:02 +00:00
Nick Clifton cb6a5892d8 fix compile time warnings. 1999-10-27 18:14:17 +00:00
Nick Clifton 9f20bbfd4c Display hex equivalent of rotated ARM constants. 1999-07-05 07:44:09 +00:00
Ian Lance Taylor 6094e721e9 * alpha-dis.c: Don't include <stdlib.h>.
* arm-dis.c: Include "sysdep.h".
	* tic30-dis.c: Don't include <stdlib.h> or <string.h>.  Include
	"sysdep.h".
	* Makefile.am: Rebuild dependencies.
	* Makefile.in: Rebuild.
1999-06-21 10:11:52 +00:00
Nick Clifton 5876e06d81 Add detection of IMB and IMBRange SWIs. 1999-06-16 02:58:52 +00:00
Nick Clifton dd92f63977 Add -M command line switch to objdump - text of switch is passed on to disassembler
Add support for register name set selection ot ARM disassembler.
1999-06-16 02:24:36 +00:00
Nick Clifton 886796f9fa Make LDRH/LDRB consistent with LDR when target is PC-relative 1999-06-04 07:14:10 +00:00
Richard Henderson 252b5132c7 19990502 sourceware import 1999-05-03 07:29:11 +00:00