o bfd_read and bfd_write lose an unnecessary param and become
bfd_bread and bfd_bwrite.
o bfd_*alloc now all take a bfd_size_type arg, and will error if
size_t is too small. eg. 32 bit host, 64 bit bfd, verrry big files
or bugs in linker scripts etc.
o file_ptr becomes a bfd_signed_vma. Besides matching sizes with
various other types involved in handling sections, this should make
it easier for bfd to support a 64 bit off_t on 32 bit hosts that
provide it.
o I've made the H_GET_* and H_PUT_* macros (which invoke bfd_h_{get,put}_*)
generally available. They now cast their args to bfd_vma and
bfd_byte * as appropriate, which removes a swag of casts from the
source.
o Bug fixes to bfd_get8, aix386_core_vec, elf32_h8_relax_section, and
aout-encap.c.
o Zillions of formatting and -Wconversion fixes.
(BFD_DEFAULT_TARGET_SIZE): New.
(BFD_ARCH_SIZE): Comment.
* configure.in (target_size): New. Set instead of target64 in
selvecs case statement. Set target64 from it.
(bfd_default_target_size): New. Set from taget_size. AC_SUBST.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* config.bfd (mips*el*-*-linux-gnu*): Use traditional little
endian MIPS ELF target.
* config.bfd (mips*-*-linux-gnu*): Use traditional big endian
MIPS ELF target.
* configure.in (bfd_elf64_tradbigmips_vec): New. Traditional
64bit big endian MIPS ELF target.
(bfd_elf64_tradlittlemips_vec): New. Traditional 64bit little
endian MIPS ELF target.
* configure: Regenerated.
* elf32-mips.c (IRIX_COMPAT): Handle traditional 64bit and
little endian targets.
(mips_elf_sym_is_global): Handle traditional targets.
* elf64-mips.c (bfd_elf64_tradbigmips_vec): New. Traditional
64bit big endian MIPS ELF target.
(bfd_elf64_tradlittlemips_vec): New. Traditional 64bit little
endian MIPS ELF target.
* targets.c: (_bfd_target_vector): Add bfd_elf64_tradbigmips_vec
and bfd_elf64_tradlittlemips_vec.
* configure.in: Recognize FreeBSD/arm, FreeBSD/PowerPC, and treat
FreeBSD/i386-CURRENT differently until I can figure out the needed
corefile changes.
* configure: Regenerate.
* config.bfd: Recognize FreeBSD/x86-64, FreeBSD/ia64, FreeBSD/arm,
FreeBSD/PowerPC, and FreeBSD/sparc64.
Approved by: Philip Blundell <philb@gnu.org>
Message-Id: <E14URxF-00023n-00@kings-cross.london.uk.eu.org>
* configure.in: Recognize alpha-*-freebsd*.
* configure: Regenerate.
I had this in my local tree for along time and had gotten approval for this
on Mon, 22 May 2000 15:45:01 -0700 but somehow managed to never commit it.
Approved by: Nick Clifton <nickc@cygnus.com>
Message-Id: <200005222245.PAA14600@elmo.cygnus.com>
underscore on symbols. Make sure to only link same kind.
* elf32-cris.c (cris_elf_object_p,
cris_elf_final_write_processing, cris_elf_print_private_bfd_data,
cris_elf_merge_private_bfd_data): New.
(elf_backend_object_p, elf_backend_final_write_processing,
bfd_elf32_bfd_print_private_bfd_data,
bfd_elf32_bfd_merge_private_bfd_data): Define.
<Target vector definition>: Include elf32-target.h twice with
different macro settings:
(TARGET_LITTLE_SYM): First as bfd_elf32_cris_vec, then as
bfd_elf32_us_cris_vec.
(TARGET_LITTLE_NAME): First as "elf32-cris", then "elf32-us-cris".
(elf_symbol_leading_char): First as 0, then '_'.
(INCLUDED_TARGET_FILE): Define for second include of elf32-target.h.
* config.bfd (cris-*-*): Add bfd_elf32_us_cris_vec to targ_selvecs.
* configure.in (bfd_elf32_cris_vec, cris_aout_vec): New vector.
* configure: Regenerate.
* targets.c: Declare bfd_elf32_us_cris_vec.
* po/bfd.pot: Regenerate.
* include/opcode/i860.h (btne, bte, bla): Changed these opcodes
to use sbroff ('r') instead of split16 ('s').
(J, K, L, M): New operand types for 16-bit aligned fields.
(ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
use I, J, K, L, M instead of just I.
(T, U): New operand types for split 16-bit aligned fields.
(st.x): Changed these opcodes to use S, T, U instead of just S.
(andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
exist on the i860.
(pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
(pfeq.ss, pfeq.dd): New opcodes.
(st.s): Fixed incorrect mask bits.
(fmlow): Fixed incorrect mask bits.
(fzchkl, pfzchkl): Fixed incorrect mask bits.
(faddz, pfaddz): Fixed incorrect mask bits.
(form, pform): Fixed incorrect mask bits.
(pfld.l): Fixed incorrect mask bits.
(fst.q): Fixed incorrect mask bits.
(all floating point opcodes): Fixed incorrect mask bits for
handling of dual bit.
* include/elf/i860.h: New file.
(elf_i860_reloc_type): Defined ELF32 i860 relocations.
* bfd/cpu-i860.c: Added comments.
* bfd/elf32-i860.c (TARGET_LITTLE_SYM): Defined to
bfd_elf32_i860_little_vec.
(TARGET_LITTLE_NAME): Defined to "elf32-i860-little".
(ELF_MAXPAGESIZE): Changed to 4096.
* bfd/targets.c (bfd_elf32_i860_little_vec): Declaration of
new target.
(bfd_target_vector): Added bfd_elf32_i860_little_vec.
* bfd/config.bfd (i860-stardent-sysv4*, i860-stardent-elf*): Added
config for little endian elf32 i860.
(targ_defvec): Define for the new config above
as "bfd_elf32_i860_little_vec".
(targ_selvecs): Define for the new config above
as "bfd_elf32_i860_vec bfd_elf32_i860_little_vec"
* bfd/configure.in (bfd_elf32_i860_little_vec): Added recognition
of new target vec.
* bfd/configure: Regenerated.
* opcodes/i860-dis.c: New file.
(print_insn_i860): New function.
(print_br_address): New function.
(sign_extend): New function.
(BITWISE_OP): New macro.
(I860_REG_PREFIX): New macro.
(grnames, frnames, crnames): New structures.
* opcodes/disassemble.c (ARCH_i860): Define.
(disassembler): Add check for bfd_arch_i860 to set disassemble
function to print_insn_i860.
* include/dis-asm.h (print_insn_i860): Add prototype.
* opcodes/Makefile.in (CFILES): Added i860-dis.c.
(ALL_MACHINES): Added i860-dis.lo.
(i860-dis.lo): New dependences.
* opcodes/configure.in: New bits for bfd_i860_arch.
* opcodes/configure: Regenerated.
