Commit Graph

15 Commits

Author SHA1 Message Date
Nick Clifton 60bcf0fa8c Applied Stephane Carrez <Stephane.Carrez@worldnet.fr> patches to add support
for m68hc11 and m68hc12 processors.
2000-06-19 01:22:44 +00:00
Nicholas Duffek 39c20e8f1e * disassemble.c (disassembler): Refer to the PowerPC 620 using
bfd_mach_ppc_620 instead of 620.
2000-06-16 20:46:47 +00:00
Nick Clifton c1485d85e0 Replace defines with those from intl/libgettext.h to quieten gcc warnings. 2000-05-30 18:35:35 +00:00
Timothy Wall 5c84d377b6 Support for tic54x target. 2000-05-06 17:14:34 +00:00
Clinton Popetz 7f6d05e83e Add XCOFF64 support.
bfd:
	* Makefile.am (coff64-rs6000.lo): New rule.
	* Makefile.in: Regenerate.
	* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
	xcoff_is_local_label_name, xcoff_rtype2howto,
	xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
	xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
	xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
	(NO_COFF_SYMBOLS): Define.
	(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
	xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
	internally.
	(MINUS_ONE): New macro.
	(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
	relocation.
	(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
	coff_SWAP_aux_out): Map to the new functions.
	* coff64-rs6000.c: New file.
	* libcoff.h (bfd_coff_backend_data): Add new fields
	_bfd_coff_force_symnames_in_strings and
	_bfd_coff_debug_string_prefix_length.
	(bfd_coff_force_symnames_in_strings,
	bfd_coff_debug_string_prefix_length): New macros for above fields.
	* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
	Set machine to 620 for XCOFF64.  Use bfd_coff_swap_sym_in instead
	of using coff_swap_sym_in directly.
	(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
	(coff_set_flags) Set magic for XCOFF64.
	(coff_compute_section_file_positions): Add symbol name length to
	string section length if bfd_coff_debug_string_prefix_length is
	true.
	(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
	(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
	using coff_swap_lineno_in directly.
	(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
	and _bfd_coff_debug_string_prefix_length fields.
	* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
	symbol names into strings table when
	bfd_coff_force_symnames_in_strings is true.
	* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
	SET_RELOC_VADDR): New macros.
	(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
	(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
	code.
	(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
	changes within RS6000COFF_C specific code.
	(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
	MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
	* reloc.c (bfd_perform_relocation, bfd_install_relocation):
	Extend existing hack on target name.
	* xcofflink.c (XCOFF_XVECP): Extend existing hack on
	target name.
	* coff-tic54x.c (ticof): Keep up to date with new fields
	in bfd_coff_backend_data.
	* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
	targ_selvecs to include rs6000coff64_vec for rs6000.
	* configure.in: Add rs6000coff64_vec case.
 	* cpu-powerpc.c: New bfd_arch_info_type.

	gas:
	* as.c (parse_args): Allow md_parse_option to override -a listing
	option.
	* config/obj-coff.c (add_lineno): Change type of offset parameter
	from "int" to "bfd_vma."
	* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
	(ppc_mach, ppc_subseg_align, ppc_target_format): New.
	(ppc_change_csect): Align correctly for XCOFF64.
	(ppc_machine): New function, which discards "ppc_machine" line.
	(ppc_tc): Cons for 8 when code is 64 bit.
	(md_apply_fix3): Don't check operand->insert.  Handle 64 bit
	relocations.
	(md_parse_option): Handle -a64 and -a32.
	(ppc_xcoff64): New.
	* config/tc-ppc.h (TARGET_MACH): Define.
	(TARGET_FORMAT): Move to function.
	(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.

	include:
	* include/coff/rs6k64.h: New file.

	opcodes:
	* configure.in: Add bfd_powerpc_64_arch.
	* disassemble.c (disassembler): Use print_insn_big_powerpc for
	64 bit code.
2000-04-26 15:09:44 +00:00
Jim Wilson 800eeca487 IA-64 ELF support. 2000-04-21 20:22:24 +00:00
Alan Modra 0d8dfecfe9 More portability patches. Include sysdep.h everywhere. 2000-04-14 04:16:58 +00:00
Ian Lance Taylor 9aaaa29133 * disassemble.c (disassembler_usage): Don't use a prototype. Mark
the parameter ATTRIBUTE_UNUSED.
	* ppc-opc.c: Add ATTRIBUTE_UNUSED as needed.
2000-04-02 06:26:09 +00:00
Alan Modra adde6300e0 ATMEL AVR microcontroller support. 2000-03-27 08:39:14 +00:00
Alan Modra 5b93d8bb51 Add IBM 370 support. 2000-02-23 13:52:23 +00:00
Nick Clifton 58efb6c0fd Add ATPCS support to ARM disassembler.
Document ARM disassembler options.
2000-01-27 22:17:12 +00:00
Nick Clifton 94470b237b Add support for documenting target specific disassembler options 2000-01-27 21:44:26 +00:00
Ian Lance Taylor 1e608f986c 1999-09-04 Steve Chamberlain <sac@pobox.com>
* pj-opc.c: New file.
	* pj-dis.c: New file.
	* disassemble.c	(disassembler): Handle bfd_arch_pj.
	* configure.in: Handle bfd_pj_arch.
	* Makefile.am: Rebuild dependencies.
	(CFILES): Add pj-dis.c and pj-opc.c.
	(ALL_MACHINES): Add pj-dis.lo and pj-opc.lo.
	* configure, Makefile.in: Rebuild.
1999-09-04 17:14:37 +00:00
Nick Clifton dd92f63977 Add -M command line switch to objdump - text of switch is passed on to disassembler
Add support for register name set selection ot ARM disassembler.
1999-06-16 02:24:36 +00:00
Richard Henderson 252b5132c7 19990502 sourceware import 1999-05-03 07:29:11 +00:00