Commit Graph

100128 Commits

Author SHA1 Message Date
Jim Wilson
403d1bd91d RISC-V: Change -march parsing.
bfd/
	2020-01-22  Maxim Blinov  <maxim.blinov@embecosm.com>
	* bfd/elfnn-riscv.c (riscv_skip_prefix): New.
	(riscv_prefix_cmp): Likewise.
	(riscv_non_std_ext_p): Deleted.
	(riscv_std_sv_ext_p): Likewise.
	(riscv_non_std_sv_ext_p): Likewise.
	(riscv_merge_non_std_and_sv_ext): Rename to...
	(riscv_merge_multi_letter_ext): and modified to use riscv_prefix_cmp.
	(riscv_merge_arch_attr_info): Replace 3 calls to
	riscv_merge_non_std_and_sv_ext with single call to
	riscv_merge_multi_letter_ext.
	* bfd/elfxx-riscv.c (riscv_parse_std_ext): Break if we
	encounter a 'z' prefix.
	(riscv_get_prefix_class): New function, return prefix class based
	on first few characters of input string.
	(riscv_parse_config): New structure to factor out minor differences
	in extension class parsing behaviour.
	(riscv_parse_sv_or_non_std_ext): Rename to...
	(riscv_parse_prefixed_ext): and parameterise with
	riscv_parse_config.
	(riscv_std_z_ext_strtab, riscv_std_s_ext_strtab): New.
	(riscv_multi_letter_ext_valid_p): New.
	(riscv_ext_x_valid_p, riscv_ext_z_valid_p, riscv_ext_s_valid_p): New.
	(riscv_parse_subset): Delegate all non-single-letter parsing work
	to riscv_parse_prefixed_ext.
	* bfd/elfxx-riscv.h (riscv_isa_ext_class): New type.
	(riscv_get_prefix_class): Declare.

	gas/
	2020-01-22  Maxim Blinov  <maxim.blinov@embecosm.com>
	* testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
	s exts must be known, so rename *ok* to *fail*.
	* testsuite/gas/riscv/march-ok-sx.d: Likewise.
	* testsuite/gas/riscv/march-ok-s-with-version: Likewise.
	* testsuite/gas/riscv/march-fail-s.l: Expected error messages for
	above change.
	* testsuite/gas/riscv/march-fail-sx.l: Likewise.
	* testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.

Change-Id: Ic4d91a13d055a10d30ab28752a380a669b59f29c
2020-01-22 16:45:04 -08:00
GDB Administrator
3401347452 Automatic date update in version.in 2020-01-23 00:00:24 +00:00
Jozef Lawrynowicz
b7dcc42dfd MSP430: Fix simulator execution of RRUX instruction
The MSP430X RRUX instruction (unsigned right shift) is synthesized as
the RRC (rotate right through carry) instruction, but with the ZC
(zero carry) bit of the opcode extention word set.

Ensure the carry flag is ignored when the ZC bit is set.

sim/msp430/ChangeLog:

2020-01-22  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* msp430-sim.c (msp430_step_once): Ignore the carry flag when executing
	an RRC instruction, if the ZC bit of the extension word is set.

sim/testsuite/sim/msp430/ChangeLog:

2020-01-22  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* rrux.s: New test.
2020-01-22 21:52:29 +00:00
H.J. Lu
be4c5e58bd x86: Always disallow double word suffix with word general register
In 64-bit mode, double word suffix in mnemonic with word general register
is disallowed.  Otherwise, assembler gives a warning:

$ cat /tmp/x.s
	movl	%ax, %bx
	movl	%ds, %ax
	movl	%ax, %cs
$ gcc -c /tmp/x.s
/tmp/x.s: Assembler messages:
/tmp/x.s:1: Error: incorrect register `%bx' used with `l' suffix
/tmp/x.s:2: Error: incorrect register `%ax' used with `l' suffix
/tmp/x.s:3: Error: incorrect register `%ax' used with `l' suffix
$ gcc -c /tmp/x.s -m32
/tmp/x.s: Assembler messages:
/tmp/x.s: Assembler messages:
/tmp/x.s:1: Warning: using `%ebx' instead of `%bx' due to `l' suffix
/tmp/x.s:1: Warning: using `%eax' instead of `%ax' due to `l' suffix
/tmp/x.s:2: Warning: using `%eax' instead of `%ax' due to `l' suffix
/tmp/x.s:3: Warning: using `%eax' instead of `%ax' due to `l' suffix

This patch makes it a hard error in all modes.  Now we get:

$ gcc -c /tmp/x.s -m32
/tmp/x.s: Assembler messages:
/tmp/x.s:1: Error: incorrect register `%bx' used with `l' suffix
/tmp/x.s:2: Error: incorrect register `%ax' used with `l' suffix
/tmp/x.s:3: Error: incorrect register `%ax' used with `l' suffix

	PR gas/25438
	* config/tc-i386.c (check_long_reg): Always disallow double word
	suffix in mnemonic with word general register.
	* testsuite/gas/i386/general.s: Replace word general register
	with double word general register for movl.
	* testsuite/gas/i386/inval.s: Add tests for movl with word general
	register.
	* testsuite/gas/i386/general.l: Updated.
	* testsuite/gas/i386/inval.l: Likewise.
2020-01-22 09:24:14 -08:00
H.J. Lu
6a462ad49e x86-64: Skip GNU2 TLS tests only without compiler support
After fixing:

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93319
https://sourceware.org/bugzilla/show_bug.cgi?id=25416

-mtls-dialect=gnu2 is working for x32 with GCC 10.  Skip GNU2 TLS tests
only if compiler doesn't support it.

	PR ld/25416
	* testsuite/ld-x86-64/tls.exp: Skip GNU2 TLS tests only without
	compiler support.
2020-01-22 06:22:41 -08:00
Alan Modra
a804e4760a PowerPC64 tls_get_addr_desc static support
This provides a linker generated __tls_get_addr_desc wrapper function
preserving registers around a __tls_get_addr call.  The idea being to
support __tls_get_addr_desc without requiring a glibc update.

bfd/
	* elf64-ppc.c (struct ppc_link_hash_table): Add tga_group.
	(ppc64_elf_archive_symbol_lookup): Extract __tls_get_addr_opt for
	__tls_get_addr_desc.
	(ppc64_elf_size_stubs): Add section for linker generated
	__tls_get_addr_desc wrapper function.  Loop at least once if
	generating this function.
	(emit_tga_desc, emit_tga_desc_eh_frame): New functions.
	(ppc64_elf_build_stubs): Generate __tls_get_addr_desc.
ld/
	* testsuite/ld-powerpc/tlsdesc3.d,
	* testsuite/ld-powerpc/tlsdesc3.wf,
	* testsuite/ld-powerpc/tlsdesc4.d,
	* testsuite/ld-powerpc/tlsdesc4.s,
	* testsuite/ld-powerpc/tlsdesc4.wf: New tests.
	* testsuite/ld-powerpc/powerpc.exp: Run them.
2020-01-22 17:14:08 +10:30
Alan Modra
9e7028aa1e PowerPC64 __tls_get_addr_desc
This implements register saving and restoring in the __tls_get_addr
call stub, so that when glibc supports the optimized tls call stub gcc
can generate code that assumes only r0, r12 and of course r3 are
changed on a __tls_get_addr call.  When gcc expects __tls_get_addr
calls to preserve registers the call will be to __tls_get_addr_desc,
which will be translated by the linker to a call to __tls_get_addr_opt.

bfd/
	* elf64-ppc.h (struct ppc64_elf_params): Add no_tls_get_addr_regsave.
	* elf64-ppc.c (struct ppc_link_hash_table): Add tga_desc and
	tga_desc_fd.
	(is_tls_get_addr): Match tga_desc and tga_desc_df too.
	(STDU_R1_0R1, ADDI_R1_R1): Define.
	(tls_get_addr_prologue, tls_get_addr_epilogue): New functions.
	(ppc64_elf_tls_setup): Set up tga_desc and tga_desc_fd.  Indirect
	tga_desc_fd to opt_fd, and tga_desc to opt.  Set
	no_tls_get_addr_regsave.
	(branch_reloc_hash_match): Add hash3 and hash4.
	(ppc64_elf_tls_optimize): Handle tga_desc_fd and tga_desc too.
	(ppc64_elf_size_dynamic_sections): Likewise.
	(ppc64_elf_relocate_section): Likewise.
	(plt_stub_size, build_plt_stub): Likewise.  Size regsave
	__tls_get_addr stub.
	(build_tls_get_addr_stub): Build regsave __tls_get_addr stub and
	eh_frame.
	(ppc_size_one_stub): Handle tga_desc_fd and tga_desc too.  Size
	eh_frame for regsave __tls_get_addr.
gas/
	* config/tc-ppc.c (parse_tls_arg): Handle tls arg for
	__tls_get_addr_desc and __tls_get_addr_opt.
ld/
	* emultempl/ppc64elf.em (ppc64_opt, PARSE_AND_LIST_LONGOPTS),
	(PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Support
	--tls-get-addr-regsave and --no-tls-get-addr-regsave.
	(params): Init new field.
	* ld.texi (--tls-get-addr-regsave, --no-tls-get-addr-regsave):
	Document.
	* testsuite/ld-powerpc/tlsdesc.s,
	* testsuite/ld-powerpc/tlsdesc.d,
	* testsuite/ld-powerpc/tlsdesc.wf,
	* testsuite/ld-powerpc/tlsdesc2.d,
	* testsuite/ld-powerpc/tlsdesc2.wf,
	* testsuite/ld-powerpc/tlsexenors.d,
	* testsuite/ld-powerpc/tlsexenors.r,
	* testsuite/ld-powerpc/tlsexers.d,
	* testsuite/ld-powerpc/tlsexers.r,
	* testsuite/ld-powerpc/tlsexetocnors.d,
	* testsuite/ld-powerpc/tlsexetocrs.d,
	* testsuite/ld-powerpc/tlsexetocrs.r,
	* testsuite/ld-powerpc/tlsopt6.d,
	* testsuite/ld-powerpc/tlsopt6.wf: New.
	* testsuite/ld-powerpc/powerpc.exp: Run new tests.
2020-01-22 17:14:08 +10:30
Alan Modra
abc489c64a PowerPC64 TLS optimization fix
When linking with --no-tls-optimize the linker doesn't generate a call
or long branch stub to __tls_get_addr in some circumstances, giving:

relocation truncated to fit: R_PPC64_REL24 against symbol `__tls_get_addr'

	* elf64-ppc.c (ppc64_elf_size_stubs): Correct condition under
	which __tls_get_addr calls will be eliminated.
2020-01-22 17:14:08 +10:30
Yuri Chornoivan
c48acf6f26 PR25417, Fix minor typos
PR 25417
binutils/
	* readelf.c (get_alpha_symbol_other): Fix error message typo.
ld/
	* ldlang.c (ldlang_open_ctf): Fix error message typo.
	* emultempl/z80elf.em (z80_elf_after_open): Likewise.
2020-01-22 17:14:08 +10:30
H.J. Lu
1e1613647f pr23900-1.d: Adjusted
Linux program headers may look like

Section to Segment mapping:
  Segment Sections...
   00     .note.gnu.property .text
   01     .note.gnu.property
   02     .note.gnu.property

or

Section to Segment mapping:
  Segment Sections...
   00     .note.gnu.property
   01     .text
   02     .note.gnu.property
   03     .note.gnu.property

Update pr23900-1.d to accept both.

	* testsuite/ld-elf/pr23900-1.d: Adjusted.
2020-01-21 16:20:38 -08:00
GDB Administrator
ea91954d07 Automatic date update in version.in 2020-01-22 00:00:33 +00:00
Simon Marchi
a12378729f gdb: add declaration for _initialize_gdbarch in gdbarch.sh
In commit

  gdb: add back declarations for _initialize functions
  6c2659886f

I wrongfully edited gdbarch.c, instead of editing gdbarch.sh and
re-generating gdbarch.c.  This patch fixes gdbarch.sh to add a
declaration for _initialize_gdbarch.  gdbarch.c is not changed, as the
output of gdbarch.sh now matches the current state of gdbarch.c.

gdb/ChangeLog:

	* gdbarch.sh: Add declaration for _initialize_gdbarch.
2020-01-21 18:30:25 -05:00
Simon Marchi
b3ee6dd9f2 gdb: remove uses of iterate_over_inferiors in remote-sim.c
This removes the two uses of iterate_over_inferiors, in favor of
range-based loops.

gdb/ChangeLog:

	* remote-sim.c (check_for_duplicate_sim_descriptor): Remove.
	(get_sim_inferior_data): Remove use of iterate_over_inferiors,
	replace with range-based for.
	(gdbsim_interrupt_inferior): Remove.
	(gdbsim_target::interrupt): Replace iterate_over_inferiors use
	with a range-based for.  Inline code from
	gdbsim_interrupt_inferior.
2020-01-21 16:28:26 -05:00
Simon Marchi
f9fac3c81b gdb: fix indentation in infrun.c
I noticed the indentation there was off, this patch fixes it.

gdb/ChangeLog:

	* infrun.c (proceed): Fix indentation.
2020-01-21 16:04:51 -05:00
Tom Tromey
f6474de9aa Allow use of Pygments to colorize source code
While GNU Source Highlight is good, it's also difficult to build and
distribute.  For one thing, it needs Boost.  For another, it has an
unusual configuration and installation setup.

Pygments, a Python library, doesn't suffer from these issues, and so I
thought it would be a reasonable fallback.

This patch implements this idea.  GNU Source Highlight is preferred,
but if it is unavailable (or fails), the extension languages are
tried.  This patch also implements support for Pygments.

Something similar could be done for Guile, using:

    https://dthompson.us/projects/guile-syntax-highlight.html

However, I don't know enough about Guile internals to make this
happen, so I have not done it here.

gdb/ChangeLog
2020-01-21  Tom Tromey  <tromey@adacore.com>

	* source-cache.c (source_cache::ensure): Call ext_lang_colorize.
	* python/python.c (python_extension_ops): Update.
	(gdbpy_colorize): New function.
	* python/lib/gdb/__init__.py (colorize): New function.
	* extension.h (ext_lang_colorize): Declare.
	* extension.c (ext_lang_colorize): New function.
	* extension-priv.h (struct extension_language_ops) <colorize>: New
	member.
	* cli/cli-style.c (_initialize_cli_style): Update help text.

Change-Id: I5e21623ee05f1f66baaa6deaeca78b578c031bf4
2020-01-21 12:39:17 -07:00
H.J. Lu
b4654b109b pr23900-1.d: Also check PT_GNU_PROPERTY program header
Also pass -l to readelf to check PT_GNU_PROPERTY program header.

	PR ld/23900
	* testsuite/ld-elf/pr23900-1.d: Also pass -l to readelf.
2020-01-21 05:43:59 -08:00
Jan Beulich
e3ed17f393 x86: testsuite adjustments after commit 1a0351246a
The odd behavior of certain COFF/PE targets makes necessary some
mechanical adjustments.
2020-01-21 14:41:05 +01:00
Luis Machado
f0c702d4b8 Convert an int flag variable to bool
As suggested, the cond variable is really supposed to be a bool. So,
make it so.

gdb/ChangeLog:

2020-01-21  Luis Machado  <luis.machado@linaro.org>

	* aarch64-tdep.c (struct aarch64_displaced_step_closure)
	<cond>: Change type to bool.
	(aarch64_displaced_step_b_cond): Update cond to use bool type.
	(aarch64_displaced_step_cb): Likewise.
	(aarch64_displaced_step_tb): Likewise.
2020-01-21 10:26:27 -03:00
Luis Machado
1ab139e5be Add more debugging output to aarch64_displaced_step_fixup
While debugging the step-over-syscall problem, i wanted to see a bit more
debugging output to try to determine the root cause.

This patch does this.

gdb/ChangeLog:

2020-01-21  Luis Machado  <luis.machado@linaro.org>

	* aarch64-tdep.c (aarch64_displaced_step_fixup): Add more debugging
	output.
2020-01-21 10:25:54 -03:00
Luis Machado
0c27188999 Fix step-over-syscall.exp failure
In particular, this one:

FAIL: gdb.base/step-over-syscall.exp: fork: displaced=on: check_pc_after_cross_syscall: single step over fork final pc

When ptrace fork event reporting is enabled, GDB gets a PTRACE_EVENT_FORK
event whenever the inferior executes the fork syscall.

Then the logic is that GDB needs to step the inferior yet again in order to
receive a predetermined SIGTRAP, but no execution takes place because the
signal was already queued for delivery. That means the PC should stay the same.

I noticed the aarch64 code is currently adjusting the PC in this situation,
making the inferior skip an instruction without executing it.

The following change checks if we did not execute the instruction
(pc - to == 0), making proper adjustments for such case.

Regression tested on aarch64-linux-gnu on the tryserver.

gdb/ChangeLog:

2020-01-21  Luis Machado  <luis.machado@linaro.org>

	* aarch64-tdep.c (struct aarch64_displaced_step_closure )
	<pc_adjust>: Adjust the documentation.
	(aarch64_displaced_step_fixup): Check if PC really moved before
	adjusting it.
2020-01-21 10:25:15 -03:00
Jan Beulich
1a0351246a x86: replace adhoc ambiguous operand checking for CRC32
There's no need (anymore?) to heavily special case this - just make
generic logic consider only its first operand, and deal with the case
of an 'l' suffix not being allowed in a pattern.
2020-01-21 08:30:05 +01:00
Jan Beulich
c006a730e9 x86: improve handling of insns with ambiguous operand sizes
Commit b76bc5d54e ("x86: don't default variable shift count insns to
8-bit operand size") pointed out a very bad case, but the underlying
problem is, as mentioned on various occasions, much larger: Silently
selecting a (nowhere documented afaict) certain default operand size
when there's no "sizing" suffix and no suitable register operand(s) is
simply dangerous (for the programmer to make mistakes).

While in Intel syntax mode such mistakes already lead to an error (which
is going to remain that way), AT&T syntax mode now gains warnings in
such cases by default, which can be suppressed or promoted to an error
if so desired by the programmer. Furthermore at least general purpose
insns now consistently have a default applied (alongside the warning
emission), rather than accepting some and refusing others.

No warnings are (as before) to be generated for "DefaultSize" insns as
well as ones acting on selector and other fixed-width values. For
SYSRET, however, the DefaultSize needs to be dropped - it had been
wrongly put there in the first place, as it's unrelated to .code16gcc
(no stack accesses involved).

As set forth as a prereq when I first mentioned this intended change a
few years back, Linux as well as gcc have meanwhile been patched to
avoid (emission of) ambiguous operands (and hence triggering of the new
warning).

Note that I think that in 64-bit mode IRET and far RET would better get
a diagnostic too, as it's reasonably likely that a suffix-less instance
really is meant to be a 64-bit one. But I guess I better make this a
separate follow-on patch.

Note further that floating point operations with integer operands are an
exception for now: They continue to use short (16-bit) operands by
default even in 32- and 64-bit modes.

Finally note that while {,V}PCMPESTR{I,M} would, strictly speaking, also
need to be diagnosed, with their 64-bit forms not being very useful I
think it is better to continue to avoid warning about them (by way of
them carrying IgnoreSize attributes).
2020-01-21 08:28:25 +01:00
Jan Beulich
c906a69a1f x86: VCVTNEPS2BF16{X,Y} should permit broadcasting
Just like other VCVT*{X,Y} templates do, and to allow the programmer
flexibility (might be relevant in particular when heavily macro-izing
code), the two templates should also have Broadcast set, just like their
X/Y-suffix-less counterparts. This in turn requires them to also have
* Dword set on their memory operands, to cover the logic added to
  i386gen by 4a1b91eabb ("x86: Expand Broadcast to 3 bits"),
* RegXMM/RegYMM set on their source operands, to satisfy broadcast
  sizing logic in gas itself.
Otherwise ATTSyntax templates wouldn't need such operand size attributes.

While extending the test cases, also add Intel syntax broadcast forms
without explicit size specifiers.
2020-01-21 08:25:31 +01:00
GDB Administrator
53570fbcca Automatic date update in version.in 2020-01-21 00:00:33 +00:00
Nick Clifton
26916852e1 Updated translations for various binutils sub-directories 2020-01-20 15:10:23 +00:00
H.J. Lu
14470f0755 x86-64: Fix TLSDESC relaxation for x32
For x32, we must encode "lea x@TLSDESC(%rip), %reg" with a REX prefix
even if it isn't required.  Otherwise linker can’t safely perform
GDesc -> IE/LE optimization.  X32 TLSDESC sequences can be:

40 8d 05 00 00 00 00	rex lea	x@TLSDESC(%rip), %reg
...
67 ff 10		call	*x@TLSCALL(%eax)

or the same sequence as LP64:

48 8d 05 00 00 00 00	lea	foo@TLSDESC(%rip), %reg
...
ff 10			call	*foo@TLSCALL(%rax)

We need to support both sequences for x32.  For both GDesc -> IE/LE
transitions,

67 ff 10		call	*x@TLSCALL(%eax)

should relaxed to

0f 1f 00		nopl	(%rax)

For GDesc -> LE transition,

40 8d 05 00 00 00 00	rex lea	x@TLSDESC(%rip), %reg

should relaxed to

40 c7 c0 fc ff ff ff	rex movl $x@tpoff, %reg

For GDesc -> IE transition,

40 8d 05 00 00 00 00	rex lea	x@TLSDESC(%rip), %reg

should relaxed to

40 8b 05 00 00 00 00	rex movl x@gottpoff(%rip), %eax

bfd/

	PR ld/25416
	* elf64-x86-64.c (elf_x86_64_check_tls_transition): Support
	"rex leal x@tlsdesc(%rip), %reg" and "call *x@tlsdesc(%eax)" in
	X32 mode.
	(elf_x86_64_relocate_section): In x32 mode, for GDesc -> LE
	transition, relax "rex leal x@tlsdesc(%rip), %reg" to
	"rex movl $x@tpoff, %reg", for GDesc -> IE transition, relax
	"rex leal x@tlsdesc(%rip), %reg" to
	"rex movl x@gottpoff(%rip), %eax".  For both transitions, relax
	"call *(%eax)" to "nopl (%rax)".

gas/

	PR ld/25416
	* config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
	for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
	x32 object.
	* testsuite/gas/i386/ilp32/x32-tls.d: Updated.
	* testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
	R_X86_64_GOTPC32_TLSDESC relocation.

ld/

	PR ld/25416
	* testsuite/ld-x86-64/pr25416-1.s: New file
	* testsuite/ld-x86-64/pr25416-1a.d: Likewise.
	* testsuite/ld-x86-64/pr25416-1b.d: Likewise.
	* testsuite/ld-x86-64/pr25416-1.s: Likewise.
	* testsuite/ld-x86-64/pr25416-2.s: Likewise.
	* testsuite/ld-x86-64/pr25416-2a.d: Likewise.
	* testsuite/ld-x86-64/pr25416-2b.d: Likewise.
	* testsuite/ld-x86-64/pr25416-3.d: Likewise.
	* testsuite/ld-x86-64/pr25416-3.s: Likewise.
	* testsuite/ld-x86-64/pr25416-4.d: Likewise.
	* testsuite/ld-x86-64/pr25416-4.s: Likewise.
	* testsuite/ld-x86-64/pr25416-5a.c: Likewise.
	* testsuite/ld-x86-64/pr25416-5b.s: Likewise.
	* testsuite/ld-x86-64/pr25416-5c.s: Likewise.
	* testsuite/ld-x86-64/pr25416-5d.s: Likewise.
	* testsuite/ld-x86-64/pr25416-5e.s: Likewise.
	* testsuite/ld-x86-64/x86-64.exp: Run PR ld/25416 tests.
2020-01-20 07:01:07 -08:00
Alan Modra
b9ca1af69e Don't touch r11 in __tls_get_addr stub
This modifies the special __tls_get_addr stub that checks for a
tlsdesc style __tls_index entry and returns early.  Not using r11
isn't much benefit at the moment but a followup patch will preserve
regs around the first call to __tls_get_addr when the __tls_index
entry isn't yet set up for an early return.

bfd/
	* elf64-ppc.c (LD_R11_0R3, CMPDI_R11_0, STD_R11_0R1, LD_R11_0R1),
	(MTLR_R11): Don't define.
	(LD_R0_0R3, CMPDI_R0_0): Define.
	(build_tls_get_addr_stub): Don't use r11 in stub.
ld/
	* testsuite/ld-powerpc/tlsexe.d: Match new __tls_get_addr stub.
	* testsuite/ld-powerpc/tlsexeno.d: Likewise.
	* testsuite/ld-powerpc/tlsexetoc.d: Likewise.
	* testsuite/ld-powerpc/tlsexetocno.d: Likewise.
	* testsuite/ld-powerpc/tlsopt5.d: Likewise.
2020-01-20 18:58:05 +10:30
Alan Modra
ed7007c18a PowerPC64 ppc_elf_hash_entry, defined_sym_val, is_tls_get_addr
* elf64-ppc.c (ppc_elf_hash_entry): New function, use throughout file.
	(defined_sym_val, is_tls_get_addr): Likewise.
2020-01-20 16:54:19 +10:30
Alan Modra
4d6cbb6442 ubsan: hppa: negation of -2147483648
* hppa-dis.c (fput_const): Remove useless cast.
2020-01-20 15:45:50 +10:30
Alan Modra
2bddb71a74 ubsan: arm: out of bounds array access
.inst 0x81bdfe9f

disassembles as
   0:	81bdfe9f 	ldaexdhi	pc, reg-names-std, [sp]

I'm quite sure "reg-names-std" isn't an ARM register.

	* arm-dis.c (print_insn_arm): Wrap 'T' value.
2020-01-20 15:45:50 +10:30
Simon Marchi
cf1d9e092f sim: don't rely on inferior_ptid in gdbsim_target::wait
When running a program with the simulator target, I get:

    /home/simark/src/binutils-gdb/gdb/inferior.c:279: internal-error: inferior* find_inferior_pid(process_stratum_target*, int): Assertion `pid != 0' failed.

This can be reproduced by building a GDB for --target=arm-none-gnueabi,
and running with

    $ ./gdb -nx --data-directory=data-directory a.out -ex "target sim" -ex load -ex "b main" -ex r

Where a.out is any program with a main.

The problem is that gdbsim_target::wait assumes that inferior_ptid has
the value of the thread it wants to report an event for.

Actually, it's the target's responsibility to come up with the ptid of
the thread the event is for.  In the sim target, that ptid is stored in
sim_inferior_data::remote_sim_ptid, so return that instead of
inferior_ptid.

ChangeLog:

	* remote-sim.c (gdbsim_target::wait): Return
	sim_data->remote_sim_ptid instead of inferior_ptid.
2020-01-19 19:48:16 -05:00
Simon Marchi
b760fb3a1c sim: add some stdlib.h includes
When trying to compile GDB with --target=avr, with gcc 9.2.0, I am
getting a bunch of:

    /home/simark/src/binutils-gdb/sim/avr/../common/nrun.c:94:7: error: implicit declaration of function ‘abort’ [-Werror=implicit-function-declaration]
       94 |       abort ();
          |       ^~~~~
    /home/simark/src/binutils-gdb/sim/avr/../common/nrun.c:94:7: error: incompatible implicit declaration of built-in function ‘abort’ [-Werror]
    /home/simark/src/binutils-gdb/sim/avr/../common/nrun.c:94:7: note: include ‘<stdlib.h>’ or provide a declaration of ‘abort’

I did what the compiler told me and added the relevant includes in the
problematic files.

sim/common/ChangeLog:

	* nrun.c: Include stdlib.h.
	* sim-core.c: Likewise.
	* sim-engine.c: Likewise.
	* sim-io.c: Likewise.
	* sim-module.c: Likewise.
	* sim-reason.c: Likewise.
2020-01-19 19:48:16 -05:00
GDB Administrator
f1cf2aa54e Automatic date update in version.in 2020-01-20 00:00:34 +00:00
Tom Tromey
4d89c1c79f Call disassemble_free_target in gdb
Commit 20135676fc ("PR24960, Memory leak
from disassembler") added "disassemble_free_target" to opcodes.  This
is used to free target-specific data when finished with a
disassembler.

This patch changes gdb to call this function where needed.

gdb/ChangeLog
2020-01-19  Tom Tromey  <tom@tromey.com>

	* disasm.c (~gdb_disassembler): New destructor.
	(gdb_buffered_insn_length): Call disassemble_free_target.
	* disasm.h (class gdb_disassembler): Declare destructor.  Use
	DISABLE_COPY_AND_ASSIGN.

Change-Id: I245ba5b7dec5e5d9f29cd21832c6e2b4fecef047
2020-01-19 13:24:32 -07:00
Tom Tromey
c0ab21c22b Replace init_cutu_and_read_dies with a class
init_cutu_and_read_dies takes a callback function, which I've always
found somewhat difficult to follow.  This patch replaces this function
with a class, and changes the callers to use it.  In some cases this
allows for the removal of a helper struct and helper function as well.

gdb/ChangeLog
2020-01-19  Tom Tromey  <tom@tromey.com>

	* dwarf2read.c (abbrev_table_up): Move typedef earlier.
	(die_reader_func_ftype): Remove.
	(cutu_reader): New class.
	(dw2_get_file_names_reader): Remove "data" parameter.
	(dw2_get_file_names): Use cutu_reader.
	(create_debug_type_hash_table): Update.
	(read_cutu_die_from_dwo): Update comment.
	(lookup_dwo_unit): Add dwo_name parameter.
	(cutu_reader::init_tu_and_read_dwo_dies): Now a method.  Remove
	die_reader_func_ftype and data parameters.
	(cutu_reader::cutu_reader): Rename from init_cutu_and_read_dies.
	Remove die_reader_func_ftype and data parameters.
	(~cutu_reader): New; from init_cutu_and_read_dies.
	(cutu_reader::cutu_reader): Rename from
	init_cutu_and_read_dies_no_follow.  Remove die_reader_func_ftype
	and data parameters.
	(init_cutu_and_read_dies_simple): Remove.
	(struct process_psymtab_comp_unit_data): Remove.
	(process_psymtab_comp_unit_reader): Remove data parameter; add
	want_partial_unit and pretend_language parameters.
	(process_psymtab_comp_unit): Use cutu_reader.
	(build_type_psymtabs_reader): Remove data parameter.
	(build_type_psymtabs_1): Use cutu_reader.
	(process_skeletonless_type_unit): Likewise.
	(load_partial_comp_unit_reader): Remove.
	(load_partial_comp_unit): Use cutu_reader.
	(load_full_comp_unit_reader): Remove.
	(load_full_comp_unit): Use cutu_reader.
	(struct create_dwo_cu_data): Remove.
	(create_dwo_cu_reader): Remove datap parameter; add dwo_file and
	dwo_unit parameters.
	(create_cus_hash_table): Use cutu_reader.
	(struct dwarf2_read_addr_index_data): Remove.
	(dwarf2_read_addr_index_reader): Remove.
	(dwarf2_read_addr_index): Use cutu_reader.
	(read_signatured_type_reader): Remove.
	(read_signatured_type): Use cutu_reader.

Change-Id: I4ef2f29e73108ce94bfe97799f8f638ed272212d
2020-01-19 13:16:25 -07:00
Tom Tromey
45bbae5c4b Remove flickering from the TUI
In some cases, the TUI flickers when redrawing.  This can be seen
mostly easily when switching layouts.

This patch fixes the problem by exploiting the double buffering that
curses already does.  In some spots, the TUI will now disable flushing
the curses buffers to the screen; and then flush them all at once when
the rendering is complete.

gdb/ChangeLog
2020-01-19  Tom Tromey  <tom@tromey.com>

	* tui/tui.c (tui_show_assembly): Use tui_suppress_output.
	* tui/tui-wingeneral.h (class tui_suppress_output): New.
	(tui_wrefresh): Declare.
	* tui/tui-wingeneral.c (suppress_output): New global.
	(tui_suppress_output, ~tui_suppress_output): New constructor and
	destructor.
	(tui_wrefresh): New function.
	(tui_gen_win_info::refresh_window): Use tui_wrefresh.
	(tui_gen_win_info::make_window): Call wnoutrefresh when needed.
	* tui/tui-regs.h (struct tui_data_window) <no_refresh>: Declare
	method.
	* tui/tui-regs.c (tui_data_window::erase_data_content): Call
	tui_wrefresh.
	(tui_data_window::no_refresh): New method.
	(tui_data_item_window::refresh_window): Call tui_wrefresh.
	(tui_reg_command): Use tui_suppress_output
	* tui/tui-layout.c (tui_set_layout): Use tui_suppress_output.
	* tui/tui-data.h (struct tui_gen_win_info) <no_refresh>: New
	method.
	* tui/tui-command.c (tui_refresh_cmd_win): Call tui_wrefresh.

Change-Id: Icb832ae100b861de3af3307488e636fa928d5c9f
2020-01-19 13:08:49 -07:00
Tom Tromey
4f13c1c00b Make "file" clear TUI source window
I noticed that a plain "file" will leave the current source file in
the TUI source window.  Instead, I think, it should clear the source
window.  This patch implements this.

gdb/ChangeLog
2020-01-19  Tom Tromey  <tom@tromey.com>

	* tui/tui-winsource.c (tui_update_source_windows_with_line):
	Handle case where symtab is null.

gdb/testsuite/ChangeLog
2020-01-19  Tom Tromey  <tom@tromey.com>

	* gdb.tui/main.exp: Add check for plain "file".

Change-Id: I8424acf837f1a47f75bc6a833d1e917d4c10b51e
2020-01-19 13:08:48 -07:00
Simon Marchi
fa47e4463a gdb/linux-fork: simplify one_fork_p
Unless I'm missing something, this function is a complicated way of
saying "fork_list.size () == 1".

gdb/ChangeLog:

	* linux-fork.c (one_fork_p): Simplify.
2020-01-19 11:54:02 -05:00
GDB Administrator
6ae3a726d4 Automatic date update in version.in 2020-01-19 00:01:01 +00:00
Roland McGrath
69d2461893 Fix ld-x86-64/align-branch-1 test failure on --target=x86_64-elf
ld/ChangeLog
	* testsuite/ld-x86-64/align-branch-1.d: Loosen instruction regexps
	to admit whatever absolute address.  The label-relative address is
	what the test needs to verify.
2020-01-18 14:42:24 -08:00
Nick Clifton
b248e9ce9a Update the notes on how to create a branch prior to a new release. 2020-01-18 14:37:55 +00:00
Nick Clifton
1b1bb2c67b Update version to 2.34.50. Regenerate configure and .pot files. 2020-01-18 14:12:07 +00:00
Nick Clifton
ae77468624 Add markers for 2.34 branch to the NEWS files and ChangeLogs. 2020-01-18 13:50:25 +00:00
Nick Clifton
4fb3a8daaf Update top level config files with copies from the official repository.
2020-01-01  Ben Elliston  <bje@gnu.org>

	* config.guess: Update copyright years.
	* config.sub: Likewise.

	2019-12-21  Ben Elliston  <bje@gnu.org>

	* config.guess (set_cc_for_build): Prevent multiple calls by
	checking if $tmp is already set. We can't check CC_FOR_BUILD as
	the user may set it externally. Thanks to Torbj?rn Granlund for
	the bug report.

	2019-12-21  Torbj?rn Granlund  <tg@gmplib.org>

	* config.guess (alpha:Linux:*:*): Guard against missing
	/proc/cpuinfo by redirecting standard error to /dev/null.

	2019-09-12  Daniel Bittman  <danielbittman1@gmail.com>

	* config.guess (*:Twizzler:*:*): New.
	* config.sub (-twizzler*): New.

	2019-07-24  Ben Elliston  <bje@gnu.org>

	* config.guess (mips:OSF1:*.*): Whitespace cleanup.

	2019-06-30  Ben Elliston  <bje@gnu.org>

	* config.sub (case $os): Match nsk* and powerunix. Don't later
	match nsk* and set os=nsk which removes the OS version number.

	2019-06-30  Ben Elliston  <bje@gnu.org>

	* config.sub: Recognise os108*.

	2019-06-26  Ben Elliston  <bje@gnu.org>

	* config.sub (hp300): Set $os to hpux.

	2019-06-26  Ben Elliston  <bje@gnu.org>

	* config.sub (vsta): Move into alphabetical order.

	2019-06-10  Ben Elliston  <bje@gnu.org>

	* config.guess (*:OS108:*:*): Recognise new OS.

	2019-05-28  Ben Elliston  <bje@gnu.org>

	* config.guess (*:Darwin:*:*): Run xcode-select to determine if a
	system compiler is installed. If not, do not run set_cc_for_build,
	as the default cc will open a dialog box asking to install
	Xcode. If no C compiler is available, guess based on uname -p and
	uname -m.

	2019-05-28  Ben Elliston  <bje@gnu.org>

	* config.guess (*:Darwin:*:*): Simplify UNAME_PROCESSOR.
2020-01-18 13:43:19 +00:00
GDB Administrator
503f691989 Automatic date update in version.in 2020-01-18 00:00:28 +00:00
Simon Marchi
c4d3fc1480 Make all-gdbsupport depend on all-bfd
Trying to run "make all-gdbsupport" at the top-level in a build from scratch
results in:

make[2]: Entering directory '/home/smarchi/build/binutils-gdb/gdbsupport'
  CC       agent.o
In file included from /home/smarchi/src/binutils-gdb/gdbsupport/common-defs.h:133,
                 from /home/smarchi/src/binutils-gdb/gdbsupport/agent.c:20:
/home/smarchi/src/binutils-gdb/gdbsupport/common-types.h:35:10: fatal error: bfd.h: No such file or directory
   35 | #include "bfd.h"
      |          ^~~~~~~

Before building all-gdbsupport, we need all-bfd to run, so that bfd.h is
generated.

(Once this patch is merged in the binutils-gdb repo, I'll send it to gcc
to keep the files in sync.)

ChangeLog:

	* Makefile.def: Add dependencies of all-gdbsupport on all-bfd.
	* Makefile.in: Re-generate.
2020-01-17 13:40:21 -05:00
Christian Biesinger
07f1f3aa53 Fix spelling errors
seperate -> separate

bfd/ChangeLog:

2020-01-17  Christian Biesinger  <cbiesinger@google.com>

	* coff-arm.c: Fix spelling error (seperate).
	* elfxx-riscv.c (riscv_parse_sv_or_non_std_ext): Fix spelling
	error (seperate).
	* sysdep.h (strnlen): Fix spelling error (seperate).

opcodes/ChangeLog:

2020-01-17  Christian Biesinger  <cbiesinger@google.com>

	* opintl.h: Fix spelling error (seperate).

sim/arm/ChangeLog:

2020-01-17  Christian Biesinger  <cbiesinger@google.com>

	* iwmmxt.c: Fix spelling error (seperate).

Change-Id: I55e5f47bcf3cf3533d2acb7ad338f1be0d5f30f9
2020-01-17 12:34:03 -06:00
Nick Clifton
76e2944437 Fix a libiberty testsuite failure.
* testsuite/demangle-expected: Update expected demangling of
	enable_if pattern.
2020-01-17 15:56:55 +00:00
Thomas Troeger
82a9ed2050 Improve the performance of the ascii art jump visualizer.
* objdump.c (jump_info_visualize_address): Discard jumps that are
	no longer needed.
	(disassemble_bytes): Only compute the maximum level if jumps were
	detected.
2020-01-17 15:27:31 +00:00
Pedro Alves
67b10306d1 Fix gdbsupport build on compilers that don't default to C++11 or above
gdbsupport fails to build with compilers that don't default to C++11
or above.  gdbsupport's configure.ac is already using
AX_CXX_COMPILE_STDCXX, which sets CXX_DIALECT to the -std=gnu++11
switch if necessary, but the problem is that nowhere are we using
CXX_DIALECT.  This fixes it.

gdbsupport/ChangeLog:
2020-01-17   Pedro Alves  <palves@redhat.com>

	* Makefile.am: Append CXX_DIALECT to CXX.
	* Makefile.in: Regenerate.
2020-01-17 15:19:42 +00:00