Commit Graph

104 Commits

Author SHA1 Message Date
Ian Lance Taylor 4db3857a87 From Grant Erickson <gerickso@Brocade.COM>:
* ppc-opc.c: Correct dcread--it takes 3 arguments, not 2.
2000-02-22 07:44:54 +00:00
Alan Modra f6af82bd44 This lot mainly cleans up `comparison between signed and unsigned' gcc
warnings.  One usused var, and a macro parenthesis fix too.  Also check
input sections are elf when doing gc in elflink.h.
2000-02-21 12:01:27 +00:00
Joern Rennecke d4845d5762 bfd:
Reinstate bits of sh4 support that got accidentally deleted.
Add sh-dsp support.

bfd:

	* archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros.
	(bfd_mach_sh3_dsp): Likewise.
	(bfd_mach_sh4): Reinstate.
	(bfd_default_scan): Recognize 7410, 7708, 7729 and 7750.
	* bfd-in2.h: Regenerate.
	* coff-sh.c (struct sh_opcode): flags is no longer short.
	(USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros.
	(sh_opcode41, sh_opcode42): Integrate as sh_opcode41.
	(sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes.
	(sh_opcode41, sh_opcode4, sh_opcode80): Likewise.
	(sh_opcodes): No longer const.
	(sh_dsp_opcodef0, sh_dsp_opcodef): New arrays.
	(sh_insn_uses_reg): Check for USESAS and USESR8.
	(sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS.
	(_bfd_sh_align_load_span): Return early for SH4.
	Modify sh_opcodes lookup table for sh-dsp / sh3-dsp.
	Take into account that field b of a parallel processing insn
	could be mistaken for a separate insn.
	* cpu-sh.c (arch_info_struct): New array elements for
	sh2, sh-dsp and sh3-dsp.
	Reinstate element for sh4.
	(SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros.
	(SH4_NEXT): Reinstate.
	(SH3_NEXT, SH3E_NEXT): Adjust.
	* elf-bfd.h (_sh_elf_set_mach_from_flags): Declare.
	* elf32-sh.c (sh_elf_set_private_flags): New function.
	(sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise.
	(sh_elf_merge_private_data): New function.
	(elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define.
	(bfd_elf32_bfd_copy_private_bfd_data): Define.
	(bfd_elf32_bfd_merge_private_bfd_data): Change to
	sh_elf_merge_private_data.

gas:

	* config/tc-sh.c ("elf/sh.h"): Include.
	(sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables.
	(md.begin): Initialize target_arch.
	Only include opcodes in has table that match selected architecture.
	(parse_reg): Recognize register names for sh-dsp.
	(parse_at): Recognize post-modify addressing.
	(get_operands): The leading space is now optional.
	(get_specific): Remove FDREG_N support.  Add support for sh-dsp
	arguments.  Update valid_arch.
	(build_Mytes): Add support for SDT_REG_N.
	(find_cooked_opcode): New function, broken out of md_assemble.
	(assemble_ppi, sh_elf_final_processing): New functions.
	(md_assemble): Use find_cooked_opcode and assemble_ppi.
	(md_longopts, md_parse_option): New option: -dsp.
	* config/tc-sh.h (elf_tc_final_processing): Define.
	(sh_elf_final_processing): Declare.

include/elf:

	* sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros.
	(EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise.
	(EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise.

opcodes:

	* sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
	(print_insn_ppi): Likewise.
	(print_insn_shx): Use info->mach to select appropriate insn set.
	Add support for sh-dsp.  Remove FD_REG_N support.
	* sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
	(sh_arg_type): Likewise.  Remove FD_REG_N.
	(sh_dsp_reg_nums): New enum.
	(arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
	(arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
	(arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
	(arch_sh3_dsp_up): Likewise.
	(sh_opcode_info): New field: arch.
	(sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
	D_REG_N.  Fill in arch field.  Add sh-dsp insns.
2000-02-17 00:33:36 +00:00
Fernando Nasser a7f8487eec 2000-02-14 Fernando Nasser <fnasser@totem.to.cygnus.com>
* arm-dis.c: Change flavor name from atpcs-special to
	special-atpcs to prevent name conflict in gdb.
	(get_arm_regname_num_options, set_arm_regname_option,
	get_arm_regnames): New functions.  API to access the several
	flavor of register names.  Note: Used by gdb.
	(print_insn_thumb): Use the register name entry from the currently
	selected flavor for LR and PC.
2000-02-14 19:02:47 +00:00
Nick Clifton 97ee9b94b2 Add support for M340 part. 2000-02-10 21:41:11 +00:00
Nick Clifton a3d9c82d14 Rename parse_disassembler_option (again) 2000-02-07 18:27:19 +00:00
Timothy Wall 940b2b788c octets vs bytes changes for binutils 2000-02-03 18:12:55 +00:00
Nick Clifton 6c082ed806 Rename parse_disassembler_option to parse_arm_disassembler_option and allow it
to be exported.
2000-01-28 01:55:09 +00:00
Nick Clifton 58efb6c0fd Add ATPCS support to ARM disassembler.
Document ARM disassembler options.
2000-01-27 22:17:12 +00:00
Nick Clifton 94470b237b Add support for documenting target specific disassembler options 2000-01-27 21:44:26 +00:00
Nick Clifton 2f0ca46a49 Apply Thoams de Lellis's patch to fic disassembly of Thumb instructions when
bounded by non-function labels.
2000-01-27 20:05:32 +00:00
Nick Clifton cb26882951 Prevent double dumping of raw thumb instructions. 2000-01-25 22:10:13 +00:00
Nick Clifton 06b53c1bff Add 'add" as an offial alias for "addu" 2000-01-21 00:27:29 +00:00
Nick Clifton 3442f30943 fix spelling of Motorola 2000-01-20 19:08:43 +00:00
Nick Clifton 01c7f6303d Add support for --disassembler-options=force-thumb 2000-01-03 20:50:57 +00:00
Alan Modra 3138f287b1 x86 indirect jump/call syntax fixes. Disassembly fix for lcall. 1999-12-27 16:10:31 +00:00
Jeff Law a9af5e0481 * m10300-opc.c, m10300-dis.c: Add am33 support. 1999-12-01 10:36:22 +00:00
Jeff Law 61e8273b2c * hppa-dis.c (unit_cond_names): Add PA2.0 unit condition names.
(print_insn_hppa): Handle 'B' operand.
1999-11-25 03:29:14 +00:00
Nick Clifton 96ac8957e8 Fix binary pattern for cpfg,f0,c instruction 1999-11-22 15:13:26 +00:00
Gavin Romig-Koch 5fce5ddfd3 For include/opcode:
* mips.h (INSN_ISA5): New.

For opcodes:

	* mips-opc.c (I5): New.
	(abs.ps,add.ps,alnv.ps,c.COND.ps,cvt.s.pl,cvt.s.pu,cvt.ps.s
	madd.ps,movf.ps,movt.ps,mul.ps,net.ps,nmadd.ps,nmsub.ps,
	pll.ps,plu.ps,pul.ps,puu.ps,sub.ps,suxc1,luxc1): New.
1999-11-18 19:53:48 +00:00
Donald Lindsay cfbd315cb2 Added 'X' format to ARM code. 1999-11-16 03:37:02 +00:00
Gavin Romig-Koch 6e3708af13 * mips-opc.c (la): Create a version that just uses addiu directly.
(dla): Expand to daddiu if possible.
1999-11-15 15:34:17 +00:00
Nick Clifton c156a9fd87 Add ssnop pattern. 1999-11-11 11:38:41 +00:00
Gavin Romig-Koch 2bd7f1f332 For include/opcode:
* mips.h (OPCODE_IS_MEMBER): New.

For gas:

	* config/tc-mips.c (macro_build): Use OPCODE_IS_MEMBER.
	(mips_ip): Use OPCODE_IS_MEMBER.

For opcodes:

	* mips-dis.c (_print_insn_mips): Use OPCODE_IS_MEMBER.
1999-11-01 19:29:55 +00:00
Nick Clifton 11fd822a84 oops - omitted from previous delta 1999-10-29 09:48:23 +00:00
Nick Clifton fd2a3b10de Define SHORT_AR and use for MVTACC (fix for CR: 101340) 1999-10-29 09:47:52 +00:00
Nick Clifton b8d5f53766 fix typo in previous delta 1999-10-28 09:05:19 +00:00
Nick Clifton cb6a5892d8 fix compile time warnings. 1999-10-27 18:14:17 +00:00
Nick Clifton 452a37f009 revert previous delta 1999-10-25 16:30:37 +00:00
Nick Clifton 9cac79d30b Apply patch supplied for case 102229 to implement new insns psrclr and psrset. 1999-10-25 15:28:44 +00:00
Michael Meissner 446a06c9b8 Add md expression support; Cleanup alpha warnings 1999-10-18 22:29:15 +00:00
Jeff Law 1c170bd8b2 * hppa-dis.c (print_insn_hppa): Add new codes 'cc', 'cd', 'cC',
'co', '@'.

        * hppa-dis.c (print_insn_hppa): Removed unused args.  Fix '?W'.

        * hppa-dis.c (print_insn_hppa):  Implement codes "?N", "?Q".
1999-10-10 07:58:37 +00:00
Diego Novillo c43185deeb Added seven new instructions ld, ld2w, sac, sachi, slae, st and
st2w for d10v. Created new testsuite for d10v to verify new
instructions.
1999-10-07 06:17:04 +00:00
Doug Evans 1fa60b5dde * fr30-asm.c,fr30-desc.h: Rebuild.
* m32r-asm.c,m32r-desc.c,m32r-desc.h: Rebuild.  Add m32rx support.
	* m32r-dis.c,m32r-ibld.c,m32r-opc.c,m32r-opc.h,m32r-opinst.c: Ditto.
1999-10-05 00:05:52 +00:00
Nick Clifton abf4be04fa Fix bit patterns of some load/store instructions to match latest docs. 1999-09-29 14:18:05 +00:00
Jeff Law e4df56c400 Remove accidental case duplication. 1999-09-23 15:58:08 +00:00
Jeff Law 1fb72ed144 * hppa-dis.c (print_insn_hppa): Replace 'B', 'M', 'g' and 'l' with
cleaner code using completer prefixes.  Add 'Y'.
1999-09-23 14:28:25 +00:00
Jeff Law 9c1faa8229 * hppa-dis.c: (print_insn_hppa): Correct 'cJ', 'cc'. 1999-09-19 20:17:48 +00:00
Jeff Law b3fe7ee280 * hppa-dis.c (extract_22): New function. 1999-09-19 20:14:30 +00:00
Jeff Law eb32eb44aa * hppa-dis.c (print_insn_hppa): Handle 'J', 'K', and 'cc'. 1999-09-19 20:10:45 +00:00
Jeff Law f322c2c2c1 * hppa-dis.c (print_insn_hppa): Handle 'fe' and 'cJ'. 1999-09-19 19:52:39 +00:00
Jeff Law d758242c73 * hppa-dis.c (print_insn_hppa): Handle '#', 'd', and 'cq'. 1999-09-19 19:29:37 +00:00
Jeff Law 838c65f040 * hppa-dis.c (print_insn_hppa): Handle 'm', 'h', '='. 1999-09-19 18:50:17 +00:00
Jeff Law 3610d1317d * hppa-dis.c (print_insn_hppa): Handle 'X' operand. 1999-09-19 18:11:48 +00:00
Jeff Law 69138680ad * hppa-dis.c (print_insn_hppa): Handle 'B' operand. 1999-09-19 17:36:54 +00:00
Jeff Law 2784abe525 * hppa-dis.c (print_insn_hppa): Handle 'M' and 'L' operands. 1999-09-19 17:06:11 +00:00
Jeff Law a5c4b2b4cd * hppa-dis.c (print_insn_hppa): Handle 'l' operand. 1999-09-19 16:59:47 +00:00
Jeff Law 321e8dac9b * hppa-dis.c (print_insn_hppa): Handle 'g' operand. 1999-09-19 16:44:16 +00:00
Jeff Law e46def7bdf * hppa-dis.c (print_insn_hppa): Output a space after 'X' completer. 1999-09-18 19:11:39 +00:00
Jeff Law 46e36b17b0 * hppa-dis.c: (print_insn_hppa): Do output a space before a 'v'
operand.
1999-09-18 18:19:56 +00:00