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17 Commits

Author SHA1 Message Date
Andrew Cagney b85e4829fa 2002-11-22 Andrew Cagney <ac131313@redhat.com> 
* dv-core.c: Update copyright.  sim/common contributed to the FSF.
	* dv-glue.c, dv-pal.c, hw-base.c, hw-base.h, hw-device.c: Ditto.
	* hw-device.h, hw-handles.c, hw-handles.h: Ditto.
	* hw-instances.c, hw-instances.h, hw-properties.c: Ditto.
	* hw-properties.h, hw-tree.c, hw-tree.h, sim-alu.h: Ditto.
	* sim-basics.h, sim-bits.c, sim-bits.h, sim-config.c: Ditto.
	* sim-config.h, sim-core.c, sim-core.h, sim-endian.c: Ditto.
	* sim-endian.h, sim-events.c, sim-events.h, sim-inline.c: Ditto.
	* sim-inline.h, sim-io.c, sim-io.h, sim-n-bits.h: Ditto.
	* sim-n-core.h, sim-n-endian.h, sim-types.h: Ditto.
 2002-11-23 01:12:05 +00:00
Chris Demetriou 6439295f61 2002-02-10 Chris Demetriou <cgd@broadcom.com> 
* callback.c: Fix some spelling errors.
        * hw-device.h: Likewise.
        * hw-tree.c: Likewise.
        * sim-abort.c: Likewise.
        * sim-alu.h: Likewise.
        * sim-core.h: Likewise.
        * sim-events.c: Likewise.
        * sim-events.h: Likewise.
        * sim-fpu.h: Likewise.
        * sim-profile.h: Likewise.
        * sim-utils.c: Likewise.
 2002-02-10 23:11:37 +00:00
Stan Shebs 7a292a7adf import gdb-19990422 snapshot 1999-04-26 18:34:20 +00:00
Stan Shebs c906108c21 Initial creation of sourceware repository 1999-04-16 01:35:26 +00:00
Stan Shebs 071ea11e85 Initial creation of sourceware repository 1999-04-16 01:34:07 +00:00
Doug Evans 169c74762a * sim-core.h (SIM_CORE_SIGNAL_FN): New typedef. 
* sim-core.c (sim_core_signal): Make extern, always define.
 1998-06-11 07:55:29 +00:00
Doug Evans 2307e0ee98 Good grief. Detailed function descriptions should accompany their definition. 1998-03-03 00:45:10 +00:00
Doug Evans 751197f231 (profile_print_core): Simplify by calling sim_core_map_to_str. 
* sim-core.h (sim_core_map_to_str): Declare.
	* sim-core.c (sim_core_map_to_str): Make non-static.
 1998-02-25 07:36:23 +00:00
Andrew Cagney fcc86d82f7 Make memory regions layered (just like existing device regions) so 
that overlapping regions can be defined.
Allow the layer (level) of a memory region to be specified as part of
an address parameter to memory options.
Update simulators.
 1997-10-31 08:49:10 +00:00
Doug Evans d048b52dbb * sim-core.h (sim_core_write_8): Define. 1997-10-30 21:45:12 +00:00
Andrew Cagney a86809d323 Implement sim_core_{read,write}_word using sim_core_{read,write}_<N>. 1997-10-28 02:13:09 +00:00
Andrew Cagney f45dd42b32 Add 128 bit transfers to sim core. 1997-10-27 03:00:12 +00:00
Andrew Cagney fd89abc204 Handle core regions which start at a poorly aligned address. 1997-10-14 23:45:52 +00:00
Andrew Cagney a34abff813 o Add modulo argument to sim_core_attach 
o	Add sim-memopt module - memory option processing.
 1997-09-04 03:47:39 +00:00
Andrew Cagney cd0d873d0f Preliminary suport for xor-endian suport in core module. 1997-05-23 09:19:43 +00:00
Andrew Cagney 7a418800c1 Start of implementation of a distributed (between processors) 
simulator core object.
 1997-05-05 13:21:04 +00:00
David Edelsohn c967f1874a * Makefile.in (sim-options_h): Define. 
(sim-{module,options,trace,profile,utils}.o): Clean up dependencies.
	(sim-model.o): Add new rule.
	(cgen-{scache,trace,utils}.o): Add new rules.
	* aclocal.m4 (SIM_AC_OPTION_{SCACHE,DEFAULT_MODEL}): Add.
	* cgen-scache.c (scache_print_profile): Change `sd' arg to `cpu'.
	Indent output by 2 spaces.
	* cgen-scache.h (scache_print_profile): Update.
	* cgen-trace.c (trace_insn_fini): Indent output by 2 spaces.
	Use trace_printf, not fprintf.
	(trace_extract): Use trace_printf, not cgen_trace_printf.
	* genmloop.sh (!FAST case): Increment `insn_count'.
	* sim-base.h (sim_state_base): Only include scache_size if WITH_SCACHE.
	(sim_cpu_base): Rename member `sd' to `state' to be consistent with
	access macro's name.
	* sim-core.c (sim_core_init): Use EXTERN_SIM_CORE to define it.
	Change return type to SIM_RC.
	(sim_core_{install,uninstall}): New functions.
	* sim-core.h (sim_core_{install,uninstall}): Declare.
	(sim_core_init): Use EXTERN_SIM_CORE to define it.
	Change return type to SIM_RC.
	* sim-model.h (models,machs,model_install): Declare.
	* sim-module.c (modules): Add scache_install, model_install.
	(sim_post_argv_init): Set cpu->state backlinks.
	* sim-options.c (standard_options): Delete --simcache-size,--max-insns.
	(standard_option_handler): Likewise.
	* sim-profile.c (PROFILE_{HISTOGRAM,LABEL}_WIDTH): Move to
	sim-profile.h.
	(*): Assume ANSI C.
	(profile_options): Delete --profile-simcache.
	(profile_option_handler): Likewise.
	(profile_print_insn): Change `sd' arg to `cpu'.  Indent output 2
	spaces.
	(profile_print_{memory,model}): Likewise.
	(profile_print_simcache): Delete.
	(profile_print_speed): New function.
	(profile_print): Rewrite.
	* sim-profile.h (PROFILE_scache): Renamed from PROFILE_simcache.
	(WITH_PROFILE_SCACHE_P): Renamed from WITH_PROFILE_SIMCACHE_P.
	(PROFILE_DATA): Delete members simcache_{hits,misses}.
	(PROFILE_COUNT_SIMCACHE_{HIT,MISS}): Delete.
	(PROFILE_{CALLBACK,CPU_CALLBACK}): New types.
	(profile_print): Update prototype.
 1997-05-01 18:05:37 +00:00