Use frag symbols with a non-zero offset directly in `fix_new_exp' calls
made in PIC branch relaxation. There is no need here to make a helper
symbol to hold the result of a `symbol+offset' calculation requested as
only branches to local symbols are relaxed and in this case the LO16
part of the PIC address load sequence will have the offset accounted for
in calculation against the local GOT entry retrieved as the GOT16 high
part. Consequently actual code produed is identical whether a helper
symbol is used or the original `symbol+offset' expression used directly.
Verify that this is indeed the case with GAS and LD tests.
gas/
* config/tc-mips.c (md_convert_frag): Don't make a helper
expression symbol for `fix_new_exp' called with a non-zero
offset.
* testsuite/gas/mips/relax-offset.d: New test.
* testsuite/gas/mips/mips1@relax-offset.d: New test.
* testsuite/gas/mips/r3000@relax-offset.d: New test.
* testsuite/gas/mips/r3900@relax-offset.d: New test.
* testsuite/gas/mips/micromips@relax-offset.d: New test.
* testsuite/gas/mips/relax-offset.l: New stderr output.
* testsuite/gas/mips/relax-offset.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
ld/
* testsuite/ld-mips-elf/relax-offset.dd: New test.
* testsuite/ld-mips-elf/relax-offset.gd: New test.
* testsuite/ld-mips-elf/relax-offset-umips.dd: New test.
* testsuite/ld-mips-elf/relax-offset-umips.gd: New test.
* testsuite/ld-mips-elf/relax-offset.ld: New test linker script.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
(prune_warnings): New temporary procedure.
Add GAS tests to verify Imagination interAptiv MR2 instruction assembly,
disassembly and ELF object file flags.
Add LD tests to verify Imagination interAptiv MR2 ELF object file
link-time compatibility and flag merging/propagation. Use the framework
enhancement added with commit 7575e6a752 ("MIPS/LD/testsuite:
mips-elf-flags: Add MIPS ABI Flags handling").
gas/
* testsuite/gas/mips/elf_mach_interaptiv-mr2.d: New test.
* testsuite/gas/mips/save-err.d: New test.
* testsuite/gas/mips/save-sub.d: New test.
* testsuite/gas/mips/interaptiv-mr2@save.d: New test.
* testsuite/gas/mips/mips1@save-sub.d: New test.
* testsuite/gas/mips/mips2@save-sub.d: New test.
* testsuite/gas/mips/mips3@save-sub.d: New test.
* testsuite/gas/mips/mips4@save-sub.d: New test.
* testsuite/gas/mips/mips5@save-sub.d: New test.
* testsuite/gas/mips/mips32@save-sub.d: New test.
* testsuite/gas/mips/mips64@save-sub.d: New test.
* testsuite/gas/mips/mips16@save-sub.d: New test.
* testsuite/gas/mips/mips16e@save-sub.d: New test.
* testsuite/gas/mips/r3000@save-sub.d: New test.
* testsuite/gas/mips/r3900@save-sub.d: New test.
* testsuite/gas/mips/r4000@save-sub.d: New test.
* testsuite/gas/mips/vr5400@save-sub.d: New test.
* testsuite/gas/mips/interaptiv-mr2@save-sub.d: New test.
* testsuite/gas/mips/sb1@save-sub.d: New test.
* testsuite/gas/mips/octeon2@save-sub.d: New test.
* testsuite/gas/mips/octeon3@save-sub.d: New test.
* testsuite/gas/mips/xlr@save-sub.d: New test.
* testsuite/gas/mips/r5900@save-sub.d: New test.
* testsuite/gas/mips/mips16e2-copy.d: New test.
* testsuite/gas/mips/mips16e2-copy-err.d: New test.
* testsuite/gas/mips/save.d: Remove `MIPS16e' from the `name'
option. Adjust for trailing padding change.
* testsuite/gas/mips/mips16e2-copy-err.l: New stderr output.
* testsuite/gas/mips/save-sub.s: New test source.
* testsuite/gas/mips/mips16e2-copy.s: New test source.
* testsuite/gas/mips/mips16e2-copy-err.s: New test source.
* testsuite/gas/mips/save.s: Update description, change trailing
padding and remove trailing white space.
* testsuite/gas/mips/mips.exp: Expand `save' and `save-err'
tests across the regular MIPS interAptiv MR2 architecture. Run
the new tests.
ld/
* testsuite/ld-mips-elf/mips-elf-flags.exp: Add interAptiv MR2
tests.
Fix incorrect adjustment of diff relocs when relaxing, and thus the
resulting source line to address mismatch.
Fix two issues when adjusting diff relocs to account for
deleted bytes.
1. Don't adjust the difference if the end address is the shrinked
insn's address i.e. use < instead of <=. The relaxation code deletes
count bytes from or after shrinked_insn_address, so the difference
between start_address and end_address should remain unchanged in this
case.
2. Adjust the reloc addend if the difference is to be adjusted and
symval + reloc addend is past the shrinked insn address. This is
because for a typical sym1 - sym2 diff reloc, sym1 is .text +
irel->r_addend, and the addend should be reduced to account for the
shrinked insn.
For example, assume the reloc value is .text + 0x8 with .text = 0, the
diff value in the object file = 0x4, and shrinked_insn_address = 0x4
with count = 0x2. Then the existing code writes 0x2 into the object
file to account for the deleted bytes, as shrinked_insn_address lies
between 0x8 and 0x8 - 0x4 = 0x4, but leaves the addend as is. The next
time the reloc is looked at, the code sees if a shrinked_insn_address
lies between 0x8 and 0x8 - 0x2 = 0x6, instead of 0x6 and 0x4. If there
happens to be one, then the diff value in the object file ends up
getting reduced again.
bfd/
2017-06-27 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/13402
* elf32-avr.c (elf32_avr_adjust_diff_reloc_value): Adjust
reloc addend if necessary. Adjust diff only if
shrinked_insn_address < end_address.
ld/
2017-06-27 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/13402
* testsuite/ld-avr/pr13402.d: New test.
* testsuite/ld-avr/pr13402.s: New test.
Complement commit 351cdf24d2 ("[MIPS] Implement O32 FPXX, FP64 and
FP64A ABI extensions") and add optional MIPS ABI Flags handling to
`good_combination' in the `mips-elf-flags.exp' test script. This lets
callers of this procedure request to examine MIPS ABI Flags in addition
to the `e_flags' member of the ELF file header so as to verify that
flags are merged correctly by LD. The presence of further arguments
triggers this verification, in which case `readelf' is called with the
`-A' option additionally specified and the ISA member, the ISA Extension
member and the ASEs member will be examined as per the arguments.
Unlike with `readelf -h' output consider a failure to retrieve the
member requested a test case failure rather than an unresolved result.
This is because unlike with the `e_flags' member of the ELF file header
which is always there in any valid ELF file the MIPS ABI Flags structure
is optional in LD output and the absence of this structure when expected
is surely a bug in LD.
ld/
* testsuite/ld-mips-elf/mips-elf-flags.exp (good_combination):
Add an `args' final argument and examination code for `readelf
-A' output. Update procedure description accordingly.
For ELF file header flag verification done in `good_combination' in the
`mips-elf-flags.exp' test script the version of `readelf' built along
with the rest of binutils has to be used rather than any such executable
already present on the build system, so that flags recognized by the
tool match those supported by LD being tested. Use `remote_exec' as
elsewhere in the LD test framework and also with GAS and LD used here,
getting and arranging for extra reporting of `readelf' calls included in
test logs on this occasion as well.
ld/
* testsuite/ld-mips-elf/mips-elf-flags.exp (good_combination):
Use `remote_exec' to call `readelf'. Log the command issued.
For the purpose of link-time object compatibility handling verification
code in the `good_combination' procedure from the `mips-elf-flags.exp'
test script only examines the `e_flags' member of the ELF file header
and ignores data from any ELF program or section headers present. Use
`readelf -h' rather than `readelf --headers' then to obtain data for
examination, avoiding unnecessary processing to extract this extraneous
information.
ld/
* testsuite/ld-mips-elf/mips-elf-flags.exp (good_combination):
Use `readelf -h' rather than `readelf --headers'.
Make BFD agree with GAS and mark the LSI MiniRISC CW4010 processor core
(for an odd reason referred to as LSI R4010 across our code base) as a
MIPS II processor in BFD as well, fixing a bug that has been there since
forever and addressing linker warnings like:
$ as -m4010 empty.s -o 4010.o
$ ld -r 4010.o -o 4010-r.o
ld: 4010.o: warning: Inconsistent ISA between e_flags and .MIPS.abiflags
$
due to the ISA level being recorded as MIPS III in ELF file header's
`e_flags' vs MIPS II in the MIPS ABI Flags section:
$ readelf -Ah 4010.o
ELF Header:
Magic: 7f 45 4c 46 01 02 01 00 00 00 00 00 00 00 00 00
Class: ELF32
Data: 2's complement, big endian
Version: 1 (current)
OS/ABI: UNIX - System V
ABI Version: 0
Type: REL (Relocatable file)
Machine: MIPS R3000
Version: 0x1
Entry point address: 0x0
Start of program headers: 0 (bytes into file)
Start of section headers: 348 (bytes into file)
Flags: 0x20821000, 4010, o32, mips3
Size of this header: 52 (bytes)
Size of program headers: 0 (bytes)
Number of program headers: 0
Size of section headers: 40 (bytes)
Number of section headers: 11
Section header string table index: 10
Attribute Section: gnu
File Attributes
Tag_GNU_MIPS_ABI_FP: Hard float (double precision)
MIPS ABI Flags Version: 0
ISA: MIPS2
GPR size: 32
CPR1 size: 32
CPR2 size: 0
FP ABI: Hard float (double precision)
ISA Extension: LSI R4010
ASEs:
None
FLAGS 1: 00000000
FLAGS 2: 00000000
$
Available documentation[1][2] clearly indicates the LSI CW4010 processor
is only backwards compatible with the MIPS R4000 processor as far as the
latter's 32-bit instructions are concerned and consequently can only be
considered a MIPS II ISA implementation (with vendor extensions).
This fixes an LD testsuite failure:
FAIL: MIPS incompatible objects: "-march=r4010 -32" "-march=r4650 -32"
triggered for the `mips-sgi-irix5' and `mips-sgi-irix6' targets.
References:
[1] Paul Cobb, Bob Caulk, Joe Cesana, "The MiniRISC CW4010: A
Superscalar MIPS Processor ASIC Core", LSI Logic, July 1995,
presented at Hot Chips VII, Stanford University, Stanford,
California, August 1995
[2] "MiniRISC MR4010 Superscalar Microprocessor Reference Device", LSI
Logic, November 1996, Doc. No. DB09-000028-00, Order No. C15017
bfd/
* cpu-mips.c (arch_info_struct): Mark the 4010 32-bit.
* elfxx-mips.c (mips_set_isa_flags) <bfd_mach_mips4010>: Set
E_MIPS_ARCH_2 rather than E_MIPS_ARCH_3 in `e_flags'.
(mips_mach_extensions): Mark `bfd_mach_mips4010' as extending
`bfd_mach_mips6000' rather than `bfd_mach_mips4000'.
ld/
* testsuite/ld-mips-elf/lsi-4010-isa.d: New test.
* ld/testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
Correct .startof.SECNAME/.sizeof.SECNAME tests for MIPS/IRIX targets,
complementing commit dc74becf49 ("ld: Add tests for -Ur") and commit
da614360f5 ("ld: Add tests for .startof.SECNAME/.sizeof.SECNAME") with
subsequent updates, and in reference to commit cbd0eecf26 ("Always
define referenced __start_SECNAME/__stop_SECNAME") and commit
7dba9362c1 ("Rewrite __start and __stop symbol handling").
These targets set the STT_OBJECT type for non-function symbol
references, according to `elf_frob_symbol' code in gas/config/obj-elf.c:
/* The Irix 5 and 6 assemblers set the type of any common symbol and
any undefined non-function symbol to STT_OBJECT. We try to be
compatible, since newer Irix 5 and 6 linkers care. However, we
only set undefined symbols to be STT_OBJECT if we are on Irix,
because that is the only time gcc will generate the necessary
.global directives to mark functions. */
if (S_IS_COMMON (symp))
symbol_get_bfdsym (symp)->flags |= BSF_OBJECT;
if (strstr (TARGET_OS, "irix") != NULL
&& ! S_IS_DEFINED (symp)
&& (symbol_get_bfdsym (symp)->flags & BSF_FUNCTION) == 0)
symbol_get_bfdsym (symp)->flags |= BSF_OBJECT;
and consequently entries in the symbol table listing from `readelf'
produced with these tests do not match the NOTYPE pattern expected,
causing test suite failures:
FAIL: ld-elf/sizeofa
FAIL: ld-elf/sizeofc
FAIL: ld-elf/startofa
FAIL: ld-elf/startofc
specifically with the `mips-sgi-irix5' and `mips-sgi-irix6' targets.
Given that it does not matter for the feature covered by these tests
whether the type of the symbols produced is STT_NOTYPE or STT_OBJECT
adjust the problematic cases to accept either type, removing the
failures observed.
ld/
* testsuite/ld-elf/sizeofa.d: Also accept the OBJECT type for
the symbols examined.
* testsuite/ld-elf/sizeofc.d: Likewise.
* testsuite/ld-elf/startofa.d: Likewise.
* testsuite/ld-elf/startofc.d: Likewise.
All sections on a --just-syms bfd are discarded from the output, so
attaching linker created sections to such a bfd results in errors.
In other cases, like the .note.GNU-stack check, it's wrong to have a
--just-syms object potentially affect the output.
bfd/
* elflink.c (_bfd_elf_link_create_dynstrtab): Don't make dynobj
a --just-syms bfd.
(_bfd_elf_size_group_sections): Skip --just-syms bfds.
(bfd_elf_size_dynamic_sections): Ignore .note.GNU-stack and
.preinit_array on --just-syms bfds.
(_bfd_elf_gc_mark_extra_sections): Skip --just-syms bfds.
(elf_gc_sweep, bfd_elf_parse_eh_frame_entries): Likewise.
(bfd_elf_gc_sections, bfd_elf_discard_info): Likewise.
ld/
* emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Skip
--just-syms bfds when looking for a place to attach .note.gnu.build-id
and .eh_frame_hdr sections. Delete dead code.
=== Context ===
This patch is part of a patch series to add support for ARMv8-R
architecture. Its purpose is to add support for ARMv8-R in the linker.
=== Patch description ===
This patch is composed of 3 changes:
1) The main change is the addition of the logic for merging a file whose
Tag_CPU_arch build attribute is 15 (ARMv8-R). Namely, all pre-ARMv8 are
merged into ARMv8-R as well as ARMv8-R itself. ARMv8-A (14) merges into
ARMv8-A. ARMv8-M Baseline (16) and Mainline (17) are not allowed to
merge merge with ARMv8-R. Note that merging only occurs if the two
profiles are identical or one is S (Application or Realtime) and the
other is R.
2) using_thumb_only, using_thumb2_bl, using_thumb2 and arch_has_arm_nop
are updated according to capabilities of ARMv8-R and their BFD_ASSERT
updated to reflect that the logic is valid for ARMv8-R.
3) 2 build attribute merging tests are added to test the first change.
2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (using_thumb_only): Update list of architectures in
BFD_ASSERT for which the logic is valid.
(using_thumb2_bl): Likewise.
(using_thumb2): Likewise and return true for ARMv8-R.
(arch_has_arm_nop): Likewise.
(tag_cpu_arch_combine): New v8r table for ARMv8-R Tag_CPU_arch
merging logic. Update commentis for value 15 of v8m_baseline,
v8m_mainline and v4t_plus_v6_m arrays. Use v8r array to decide
merging of value 15 of Tag_CPU_arch.
ld/
* testsuite/ld-arm/arm-elf.exp (EABI attribute merging 11): New test.
(EABI attribute merging 12): Likewise.
* testsuite/ld-arm/attr-merge-11a.s: New file.
* testsuite/ld-arm/attr-merge-11b.s: New file.
* testsuite/ld-arm/attr-merge-11.attr: New file.
* testsuite/ld-arm/attr-merge-12a.s: New file.
* testsuite/ld-arm/attr-merge-12b.s: New file.
* testsuite/ld-arm/attr-merge-12.attr: New file.
This patch adds a new S/390 specific segment type: PT_S390_PGSTE. For
binaries marked with that segment the kernel will allocate 4k page
tables. The only user so far will be qemu.
ld/ChangeLog:
2017-06-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* Makefile.in: Add s390.em as build dependency.
* emulparams/elf64_s390.sh (EXTRA_EM_FILE): Add s390.em.
* emultempl/s390.em: New file.
* gen-doc.texi: Add documentation for --s390-pgste option.
* ld.texinfo: Likewise.
include/ChangeLog:
2017-06-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* elf/s390.h (PT_S390_PGSTE): Define macro.
binutils/ChangeLog:
2017-06-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* readelf.c (get_s390_segment_type): Add support for the new
segment type PT_S390_PGSTE.
(get_segment_type): Call get_s390_segment_type.
elfcpp/ChangeLog:
2017-06-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* elfcpp.h (enum PT): Add PT_S390_PGSTE to enum.
bfd/ChangeLog:
2017-06-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* elf-s390.h: New file.
* elf64-s390.c (struct elf_s390_link_hash_table): Add params
field.
(elf_s390_additional_program_headers): New function.
(elf_s390_modify_segment_map): New function.
(bfd_elf_s390_set_options): New function.
(elf_backend_additional_program_headers)
(elf_backend_modify_segment_map): Add macro definitions.
To support IBT in Intel Control-flow Enforcement Technology (CET)
instructions:
https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
#define GNU_PROPERTY_X86_FEATURE_1_AND 0xc0000002
#define GNU_PROPERTY_X86_FEATURE_1_IBT (1U << 0)
are added to GNU program properties to indicate that all executable
sections are compatible with IBT when ENDBR instruction starts each
valid target where an indirect branch instruction can land.
GNU_PROPERTY_X86_FEATURE_1_IBT is set on output only if it is set on
all relocatable inputs.
The followings changes are made to the Procedure Linkage Table (PLT):
1. For 64-bit x86-64, PLT is changed to
PLT0: push GOT[1]
bnd jmp *GOT[2]
nop
...
PLTn: endbr64
push namen_reloc_index
bnd jmp PLT0
together with the second PLT section:
PLTn: endbr64
bnd jmp *GOT[namen_index]
nop
BND prefix is also added so that IBT-enabled PLT is compatible with MPX.
2. For 32-bit x86-64 (x32) and i386, PLT is changed to
PLT0: push GOT[1]
jmp *GOT[2]
nop
...
PLTn: endbr64 # endbr32 for i386.
push namen_reloc_index
jmp PLT0
together with the second PLT section:
PLTn: endbr64 # endbr32 for i386.
jmp *GOT[namen_index]
nop
BND prefix isn't used since MPX isn't supported on x32 and BND registers
aren't used in parameter passing on i386.
GOT is an array of addresses. Initially, GOT[namen_index] is filled
with the address of the ENDBR instruction of the corresponding entry
in the first PLT section. The function, namen, is called via the
ENDBR instruction in the second PLT entry. GOT[namen_index] is updated
to the actual address of the function, namen, at run-time.
2 linker command line options are added:
1. -z ibtplt: Generate IBT-enabled PLT.
2. -z ibt: Generate GNU_PROPERTY_X86_FEATURE_1_IBT in GNU program
properties as well as IBT-enabled PLT.
bfd/
* elf32-i386.c (elf_i386_lazy_ibt_plt0_entry): New.
(elf_i386_lazy_ibt_plt_entry): Likewise.
(elf_i386_pic_lazy_ibt_plt0_entry): Likewise.
(elf_i386_non_lazy_ibt_plt_entry): Likewise.
(elf_i386_pic_non_lazy_ibt_plt_entry): Likewise.
(elf_i386_eh_frame_lazy_ibt_plt): Likewise.
(elf_i386_lazy_plt_layout): Likewise.
(elf_i386_non_lazy_plt_layout): Likewise.
(elf_i386_link_hash_entry): Add plt_second.
(elf_i386_link_hash_table): Add plt_second and
plt_second_eh_frame.
(elf_i386_allocate_dynrelocs): Use the second PLT if needed.
(elf_i386_size_dynamic_sections): Use .plt.got unwind info for
the second PLT. Check the second PLT.
(elf_i386_relocate_section): Use the second PLT to resolve
PLT reference if needed.
(elf_i386_finish_dynamic_symbol): Fill and use the second PLT if
needed.
(elf_i386_finish_dynamic_sections): Set sh_entsize on the
second PLT. Generate unwind info for the second PLT.
(elf_i386_plt_type): Add plt_second.
(elf_i386_get_synthetic_symtab): Support the second PLT.
(elf_i386_parse_gnu_properties): Support
GNU_PROPERTY_X86_FEATURE_1_AND.
(elf_i386_merge_gnu_properties): Support
GNU_PROPERTY_X86_FEATURE_1_AND. If info->ibt is set, turn
on GNU_PROPERTY_X86_FEATURE_1_IBT
(elf_i386_link_setup_gnu_properties): If info->ibt is set,
turn on GNU_PROPERTY_X86_FEATURE_1_IBT. Use IBT-enabled PLT
for info->ibtplt, info->ibt or GNU_PROPERTY_X86_FEATURE_1_IBT
is set on all relocatable inputs.
* elf64-x86-64.c (elf_x86_64_lazy_ibt_plt_entry): New.
(elf_x32_lazy_ibt_plt_entry): Likewise.
(elf_x86_64_non_lazy_ibt_plt_entry): Likewise.
(elf_x32_non_lazy_ibt_plt_entry): Likewise.
(elf_x86_64_eh_frame_lazy_ibt_plt): Likewise.
(elf_x32_eh_frame_lazy_ibt_plt): Likewise.
(elf_x86_64_lazy_ibt_plt): Likewise.
(elf_x32_lazy_ibt_plt): Likewise.
(elf_x86_64_non_lazy_ibt_plt): Likewise.
(elf_x32_non_lazy_ibt_plt): Likewise.
(elf_x86_64_get_synthetic_symtab): Support the second PLT.
(elf_x86_64_parse_gnu_properties): Support
GNU_PROPERTY_X86_FEATURE_1_AND.
(elf_x86_64_merge_gnu_properties): Support
GNU_PROPERTY_X86_FEATURE_1_AND. If info->ibt is set, turn
on GNU_PROPERTY_X86_FEATURE_1_IBT
(elf_x86_64_link_setup_gnu_properties): If info->ibt is set,
turn on GNU_PROPERTY_X86_FEATURE_1_IBT. Use IBT-enabled PLT
for info->ibtplt, info->ibt or GNU_PROPERTY_X86_FEATURE_1_IBT
is set on all relocatable inputs.
binutils/
* readelf.c (decode_x86_feature): New.
(print_gnu_property_note): Call decode_x86_feature on
GNU_PROPERTY_X86_FEATURE_1_AND.
* testsuite/binutils-all/i386/empty.d: New file.
* testsuite/binutils-all/i386/empty.s: Likewise.
* testsuite/binutils-all/i386/ibt.d: Likewise.
* testsuite/binutils-all/i386/ibt.s: Likewise.
* testsuite/binutils-all/x86-64/empty-x32.d: Likewise.
* testsuite/binutils-all/x86-64/empty.d: Likewise.
* testsuite/binutils-all/x86-64/empty.s: Likewise.
* testsuite/binutils-all/x86-64/ibt-x32.d: Likewise.
* testsuite/binutils-all/x86-64/ibt.d: Likewise.
* testsuite/binutils-all/x86-64/ibt.s: Likewise.
include/
* bfdlink.h (bfd_link_info): Add ibtplt and ibt.
* elf/common.h (GNU_PROPERTY_X86_FEATURE_1_AND): New.
(GNU_PROPERTY_X86_FEATURE_1_IBT): Likewise.
ld/
* Makefile.am (ELF_X86_DEPS): Add $(srcdir)/emulparams/cet.sh.
* Makefile.in: Regenerated.
* NEWS: Mention GNU_PROPERTY_X86_FEATURE_1_IBT, -z ibtplt
and -z ibt.
* emulparams/cet.sh: New file.
* testsuite/ld-i386/ibt-plt-1.d: Likewise.
* testsuite/ld-i386/ibt-plt-1.s: Likewise.
* testsuite/ld-i386/ibt-plt-2.s: Likewise.
* testsuite/ld-i386/ibt-plt-2a.d: Likewise.
* testsuite/ld-i386/ibt-plt-2b.d: Likewise.
* testsuite/ld-i386/ibt-plt-2c.d: Likewise.
* testsuite/ld-i386/ibt-plt-2d.d: Likewise.
* testsuite/ld-i386/ibt-plt-3.s: Likewise.
* testsuite/ld-i386/ibt-plt-3a.d: Likewise.
* testsuite/ld-i386/ibt-plt-3b.d: Likewise.
* testsuite/ld-i386/ibt-plt-3c.d: Likewise.
* testsuite/ld-i386/ibt-plt-3d.d: Likewise.
* testsuite/ld-i386/plt-main-ibt.dd: Likewise.
* testsuite/ld-i386/plt-pie-ibt.dd: Likewise.
* testsuite/ld-i386/property-x86-empty.s: Likewise.
* testsuite/ld-i386/property-x86-ibt.s: Likewise.
* testsuite/ld-i386/property-x86-ibt1a.d: Likewise.
* testsuite/ld-i386/property-x86-ibt1b.d: Likewise.
* testsuite/ld-i386/property-x86-ibt2.d: Likewise.
* testsuite/ld-i386/property-x86-ibt3a.d: Likewise.
* testsuite/ld-i386/property-x86-ibt3b.d: Likewise.
* testsuite/ld-i386/property-x86-ibt4.d: Likewise.
* testsuite/ld-i386/property-x86-ibt5.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-1-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-1.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-1.s: Likewise.
* testsuite/ld-x86-64/ibt-plt-2.s: Likewise.
* testsuite/ld-x86-64/ibt-plt-2a-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2a.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2b-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2b.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2c-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2c.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2d-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-2d.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3.s: Likewise.
* testsuite/ld-x86-64/ibt-plt-3a-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3a.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3b-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3b.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3c-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3c.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3d-x32.d: Likewise.
* testsuite/ld-x86-64/ibt-plt-3d.d: Likewise.
* testsuite/ld-x86-64/plt-main-ibt-now.rd: Likewise.
* testsuite/ld-x86-64/plt-main-ibt-x32.dd: Likewise.
* testsuite/ld-x86-64/plt-main-ibt.dd: Likewise.
* testsuite/ld-x86-64/property-x86-empty.s: Likewise.
* testsuite/ld-x86-64/property-x86-ibt.s: Likewise.
* testsuite/ld-x86-64/property-x86-ibt1a-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt1a.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt1b-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt1b.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt2-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt2.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt3a-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt3a.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt3b-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt3b.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt4-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt4.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt5-x32.d: Likewise.
* testsuite/ld-x86-64/property-x86-ibt5.d: Likewise.
* emulparams/elf32_x86_64.sh: Source emulparams/cet.sh.
(TINY_READONLY_SECTION): Add .plt.sec.
* emulparams/elf_i386.sh: Likewise.
* emulparams/elf_x86_64.sh: Source emulparams/cet.sh.
* ld.texinfo: Document -z ibtplt and -z ibt.
* testsuite/ld-i386/i386.exp: Run IBT and IBT PLT tests.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
* testsuite/ld-x86-64/pr21481b.S (check): Updated for x32.
Since the BFD section count may not be cleared for shared objects during
linking, we should check the DYNAMIC bit for input shared objects.
bfd/
PR ld/21626
* elf-properties.c (_bfd_elf_link_setup_gnu_properties): Check
the DYNAMIC bit instead of bfd_count_sections.
ld/
PR ld/21626
* testsuite/ld-i386/i386.exp: Run ld/21626 tests.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
For some pc-relative relocations we want to allow them under PIC mode while
a normal global symbol defined in the same dynamic object can still bind
externally through copy relocation. So, we should not allow pc-relative
relocation against such symbol.
SYMBOL_REFERENCES_LOCAL should be used and is more accurate than the original
individual checks.
bfd/
* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Use
SYMBOL_REFERENCES_LOCAL.
ld/
* testsuite/ld-aarch64/aarch64-elf.exp: Update test name
* testsuite/ld-aarch64/pcrel.s: Add new testcases.
* testsuite/ld-aarch64/pcrel_pic_undefined.d: Update the expected
warnings.
* testsuite/ld-aarch64/pcrel_pic_defined_local.d: Rename ...
* testsuite/ld-aarch64/pcrel_pic_defined.d: ... to this.
Update expected warnings.
ELF Linker command line option to set stack size is "-z stack-size=SIZE",
not "-z stacksize=SIZE".
* exsup.c (elf_shlib_list_options): Display "-z stack-size=SIZE"
instead of "-z stacksize=SIZE".
As discussed at the PR, this patch tries to avoid COPY relocation generation
and propagate the original relocation into runtime if it was relocating on
writable section. The ELIMINATE_COPY_RELOCS has been set to true and it's
underlying infrastructure has been improved so that the COPY reloc elimination
at least working on absoluate relocations (ABS64) on AArch64.
BFD linker copy relocation elimination framwork requires the backend to always
allocate dynrelocs for all those relocation types that are possible to introduce
copy relocations. This is for adjust_dynamic_symbol hook to be able to get all
symbol reference information. Should one symbol is referenced by more than one
relocations, if there is any of them needs copy relocation then linker should
generate it.
bfd/
PR ld/21532
* elfnn-aarch64.c (ELIMINATE_COPY_RELOCS): Set to 1.
(elfNN_aarch64_final_link_relocate): Also propagate relocations to
runtime for if there needs copy relocation elimination.
(need_copy_relocation_p): New function. Return true for symbol with
pc-relative references and if it's against read-only sections.
(elfNN_aarch64_adjust_dynamic_symbol): Use need_copy_relocation_p.
(elfNN_aarch64_check_relocs): Allocate dynrelocs for relocation types
that are related with accessing external objects.
(elfNN_aarch64_gc_sweep_hook): Sync the relocation types with the change
in elfNN_aarch64_check_relocs.
ld/
* testsuite/ld-aarch64/copy-reloc-exe-2.s: New test source file.
* testsuite/ld-aarch64/copy-reloc-2.d: New test.
* testsuite/ld-aarch64/copy-reloc-exe-eliminate.s: New test source file.
* testsuite/ld-aarch64/copy-reloc-eliminate.d: New test.
* testsuite/ld-aarch64/copy-reloc-so.s: Define new global objects.
* testsuite/ld-aarch64/aarch64-elf.exp: Run new tests.
ld-gc/pr20022.d requires support for dynamic relocations in .text
section.
PR ld/20022
* testsuite/ld-gc/pr20022.d: Skip on targets without dynamic
relocations in .text section.
Symbol lookup in linker will always fail on targets with leading char
in symbol name since __start_SECNAME and __stop_SECNAME in C may be
___start_SECNAME and ___stop_SECNAME in assembly. Also tests with
--gc-sections always fails on targets without --gc-sections support.
* testsuite/ld-elf/pr21562a.d: Skip on targets with leading char
in in symbol name or without --gc-sections.
* testsuite/ld-elf/pr21562b.d: Likewise.
* testsuite/ld-elf/pr21562c.d: Likewise.
* testsuite/ld-elf/pr21562d.d: Likewise.
* testsuite/ld-elf/pr21562i.d: Likewise.
* testsuite/ld-elf/pr21562j.d: Likewise.
* testsuite/ld-elf/pr21562k.d: Likewise.
* testsuite/ld-elf/pr21562l.d: Likewise.
* testsuite/ld-elf/pr21562m.d: Likewise.
* testsuite/ld-elf/pr21562n.d: Likewise.
* testsuite/ld-elf/pr21562e.d: Skip on targets with leading char
in symbol name.
* testsuite/ld-elf/pr21562f.d: Likewise.
* testsuite/ld-elf/pr21562g.d: Likewise.
* testsuite/ld-elf/pr21562h.d: Likewise.
Symbol lookup in linker will always fail on targets with leading char
in symbol name since __start_SECNAME and __stop_SECNAME in C may be
___start_SECNAME and ___stop_SECNAME in assembly.
* testsuite/ld-elf/sizeofa.d: Skip on targets with leading char
in symbol name.
* testsuite/ld-elf/sizeofb.d: Likewise.
* testsuite/ld-elf/startofa.d: Likewise.
* testsuite/ld-elf/startofb.d: Likewise.
In particular this adds support for the epiphany-rtems target.
bfd/
* config.bfd (epiphany-*-elf): Accept epiphany-*-*.
ld/
* configure.tgt (epiphany-*-elf): Accept epiphany-*-*.
__start_SECNAME and __stop_SECNAME shouldn't be defined for "ld -r".
* ldlang.c (lang_set_startof): Skip if config.build_constructors
is FALSE.
* testsuite/ld-elf/sizeofc.d: New file.
* testsuite/ld-elf/startofc.d: Likewise.
Currently, linker will define __start_SECNAME and __stop_SECNAME symbols
only for orphaned sections.
However, during garbage collection, ELF linker marks all sections with
references to __start_SECNAME and __stop_SECNAME symbols as used even
when section SECNAME isn't an orphaned section and linker won't define
__start_SECNAME nor __stop_SECNAME. And ELF linker stores the first
input section whose name matches __start_SECNAME or __stop_SECNAME in
u.undef.section for garbage collection. If these symbols are provided
in linker script, u.undef.section is set to the section where they will
defined by linker script, which leads to the incorrect output.
This patch changes linker to always define referenced __start_SECNAME and
__stop_SECNAME if the input section name is the same as the output section
name, which is always true for orphaned sections, and SECNAME is a C
identifier. Also __start_SECNAME and __stop_SECNAME symbols are marked
as hidden by ELF linker so that __start_SECNAME and __stop_SECNAME symbols
for section SECNAME in different modules are unique. For garbage
collection, ELF linker stores the first matched input section in the
unused vtable field.
bfd/
PR ld/20022
PR ld/21557
PR ld/21562
PR ld/21571
* elf-bfd.h (elf_link_hash_entry): Add start_stop. Change the
vtable field to a union.
(_bfd_elf_is_start_stop): Removed.
* elf32-i386.c (elf_i386_convert_load_reloc): Also check for
__start_SECNAME and __stop_SECNAME symbols.
* elf64-x86-64.c (elf_x86_64_convert_load_reloc): Likewise.
* elflink.c (_bfd_elf_is_start_stop): Removed.
(_bfd_elf_gc_mark_rsec): Check start_stop instead of calling
_bfd_elf_is_start_stop.
(elf_gc_propagate_vtable_entries_used): Skip __start_SECNAME and
__stop_SECNAME symbols. Updated.
(elf_gc_smash_unused_vtentry_relocs): Likewise.
(bfd_elf_gc_record_vtinherit): Likewise.
(bfd_elf_gc_record_vtentry): Likewise.
ld/
PR ld/20022
PR ld/21557
PR ld/21562
PR ld/21571
* ld.texinfo: Update __start_SECNAME/__stop_SECNAME symbols.
* ldlang.c (lang_insert_orphan): Move handling of __start_SECNAME
and __stop_SECNAME symbols to ...
(lang_set_startof): Here. Also define __start_SECNAME and
__stop_SECNAME for -Ur.
* emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Mark
referenced __start_SECNAME and __stop_SECNAME symbols as hidden
and set start_stop for garbage collection.
* testsuite/ld-elf/pr21562a.d: New file.
* testsuite/ld-elf/pr21562a.s: Likewise.
* testsuite/ld-elf/pr21562a.t: Likewise.
* testsuite/ld-elf/pr21562b.d: Likewise.
* testsuite/ld-elf/pr21562b.s: Likewise.
* testsuite/ld-elf/pr21562b.t: Likewise.
* testsuite/ld-elf/pr21562c.d: Likewise.
* testsuite/ld-elf/pr21562c.t: Likewise.
* testsuite/ld-elf/pr21562d.d: Likewise.
* testsuite/ld-elf/pr21562d.t: Likewise.
* testsuite/ld-elf/pr21562e.d: Likewise.
* testsuite/ld-elf/pr21562f.d: Likewise.
* testsuite/ld-elf/pr21562g.d: Likewise.
* testsuite/ld-elf/pr21562h.d: Likewise.
* testsuite/ld-elf/pr21562i.d: Likewise.
* testsuite/ld-elf/pr21562j.d: Likewise.
* testsuite/ld-elf/pr21562k.d: Likewise.
* testsuite/ld-elf/pr21562l.d: Likewise.
* testsuite/ld-elf/pr21562m.d: Likewise.
* testsuite/ld-elf/pr21562n.d: Likewise.
* testsuite/ld-gc/pr20022.d: Likewise.
* testsuite/ld-gc/pr20022a.s: Likewise.
* testsuite/ld-gc/pr20022b.s: Likewise.
* testsuite/ld-gc/gc.exp: Run PR ld/20022 tests.
* testsuite/ld-gc/pr19161.d: Also accept local __start_SECNAME
symbol.
* testsuite/ld-gc/start.d: Likewise.
* testsuite/ld-x86-64/lea1a.d: Updated.
* testsuite/ld-x86-64/lea1b.d: Updated.
* testsuite/ld-x86-64/lea1d.d: Updated.
* testsuite/ld-x86-64/lea1e.d: Likewise.
Test -Ur with __start_SECNAME, __stop_SECNAME, .startof.SECNAME and
.sizeof.SECNAME. __start_SECNAME and __stop_SECNAME should be defined
to the start and the end of section SECNAME. .startof.SECNAME and
.sizeof.SECNAME should be undefined.
* testsuite/ld-elf/sizeof.d: New file.
* testsuite/ld-elf/sizeof.s: Likewise.
* testsuite/ld-elf/startof.d: Likewise.
* testsuite/ld-elf/startof.s: Likewise.
arm-none-eabi-ld supports shared libraries. However, the toolchain may be
configured to generate statically linked executable by default.
It is required to have --no-dynamic-linker option before adding dynamic symbol
to static executable.
For dynamically linked executable, the behavior won't change.
ld/ChangeLog
2017-06-13 Renlin Li <renlin.li@arm.com>
* testsuite/ld-elf/shared.exp (build_tests): Add --no-dynamic-linker
option to rdynamic-1 and dynamic-1 tests.
This reverts commit bc327528fd.
This patch can only be committed after PC-relative relocation types
support on copy relocation elimination is also completed.
In the case of static relocation, the GOT entries are fixed at link time
and are set by the linker.
In order to compute the right TLS offset it is necessary to add TCB_SIZE
to the offset, just in case the dynamic linker is not expected to be
executed (static linked case).
This problem does appear in dynamic linked applications, as the dynamic
linker is adding this TCB_SIZE by operating the TCB block structure.
Problem revealed in GLIBC with static linking.
bfd/ChangeLog:
Cupertino Miranda <cmiranda@synopsys.com>
arc-got.h (relocate_fix_got_relocs_for_got_info): Added TCB_SIZE to
patched section contents for TLS IE reloc.
elf32-arc.c: Remove TCB_SIZE preprocessor macro.
Rebase to 0006
Dump local IFUNC functions in the map file when generating IRELATIVE
relocations if -Map is used.
bfd/
* elf32-i386.c (elf_i386_check_relocs): Set local IFUNC symbol
name. Use local IFUNC symbol name string to report unsupported
non-PIC call to IFUNC function.
(elf_i386_relocate_section): Dump local IFUNC name with minfo
when generating R_386_IRELATIVE relocation.
(elf_i386_finish_dynamic_symbol): Likewise.
* elf_x86_64_check_relocs (elf_x86_64_check_relocs): Set local
IFUNC symbol name.
(elf_x86_64_relocate_section): Dump local IFUNC name with minfo
when generating R_X86_64_IRELATIVE relocation.
(elf_x86_64_finish_dynamic_symbol): Likewise.
ld/
* testsuite/ld-ifunc/ifunc-1-local-x86.d: Pass
"-Map tmpdir/ifunc-1-local-x86.map" to ld and check
ifunc-1-local-x86.map.
* testsuite/ld-ifunc/ifunc-1-x86.d: Pass
"-Map tmpdir/ifunc-1-x86.map" to ld and check ifunc-1-x86.map.
* testsuite/ld-ifunc/ifunc-1-local-x86.map: New file.
* testsuite/ld-ifunc/ifunc-1-x86.map: Likewise.
As discussed at the PR, this patch tries to avoid COPY relocation generation
and propagate the original relocation into runtime if it was relocating on
writable section. The ELIMINATE_COPY_RELOCS has been set to true and it's
underlying infrastructure has been improved so that the COPY reloc elimination
at least working on absoluate relocations (ABS64) after this patch.
bfd/
PR ld/21532
* elfnn-aarch64.c (ELIMINATE_COPY_RELOCS): Set to 1.
(elfNN_aarch64_final_link_relocate): Also propagate relocations to
runtime for copy relocation elimination cases.
(alias_readonly_dynrelocs): New function.
(elfNN_aarch64_adjust_dynamic_symbol): Keep the dynamic relocs instead
of generating copy relocation if it is not against read-only sections.
(elfNN_aarch64_check_relocs): Likewise.
ld/
* testsuite/ld-aarch64/copy-reloc-eliminate.d: New test.
* testsuite/ld-aarch64/copy-reloc-exe-eliminate.s: New test source file.
* testsuite/ld-aarch64/aarch64-elf.exp: Run new testcase.
Various targets fail this testcase due to ld not supporting binary output.
* testsuite/ld-unique/pr21529.d: xfail aarch64, arm, hppa, ia64,
nds32, and score. Match any output.
Maciej W. Rozycki
Senthil Kumar Selvaraj
Andreas Krebbel
Alan Modra
Thomas Preud'homme
H.J. Lu
Jiong Wang
Nick Clifton
Georg-Johann Lay
Sebastian Huber
Georg-Johann Lay
Renlin Li
Cupertino Miranda
Andrew Burgess