Commit Graph

1017 Commits

Author SHA1 Message Date
Andrew Cagney 9e03a68f13 Add LMA_P and DO_WRITE arguments to sim/common/sim-load.c:sim_load_file().
Update all simulators.
Clarify behavour of sim_load in remote-sim.h
1997-10-22 05:26:27 +00:00
Doug Evans 2328ef1c98 * nrun.c (main): Exit if bfd_openr fails.
Call bfd_check_format after bfd_openr.
1997-10-22 02:12:41 +00:00
Doug Evans 897a1d7863 * nrun.c (main): Remove useless test of name != NULL. 1997-10-22 01:38:49 +00:00
Jeff Law f4ab2b2fdc * simops.c: Correctly handle register restores for "ret" and "retf"
instructions.
pr13306 related stuff.
1997-10-21 16:07:53 +00:00
Andrew Cagney 92ad193bb0 Use SIM*_OVERFLOW_RESULT defined in sim-alu.h 1997-10-21 07:57:33 +00:00
Andrew Cagney b7432f0f27 Pacify GCC -Wall 1997-10-21 07:41:46 +00:00
Andrew Cagney aa324b9b1e Output pc profile statistics once gathered. 1997-10-21 07:40:00 +00:00
Andrew Cagney e2f8ffb736 Delete profile support from MIPS simulator, use sim/common/sim-profile
module instead.
Generate a "gmon.out" (gprof) when profiling the target PC.
Add target PC profiling option --profile-pc-granularity (bucket size)
1997-10-21 03:41:21 +00:00
Andrew Cagney 293a0876f8 Have single bit macros return an unsigned result. Avoids risk (and
need) of sign extending results.
1997-10-20 07:27:55 +00:00
Andrew Cagney fb5a2a3e39 Make mips registers of type unsigned_word.
Ensure all references to MIPS registers use same type.
1997-10-20 06:28:53 +00:00
Andrew Cagney 0a0ecb2120 Add 8 bit arithmetic to sim-alu.
Fix flags (Carry, oVerflow) for negate and subtract.
Add ALU*_RESULT macros for accessing final result of ALU op.
1997-10-20 02:03:06 +00:00
Andrew Cagney afb1dbe851 Preliminary tests for sim-alu module. 1997-10-17 03:57:53 +00:00
Andrew Cagney ea985d2472 Move register definitions and macros out of interp.c and into sim-main.h 1997-10-16 03:50:48 +00:00
Andrew Cagney 085c1cb988 Checkpoint IGEN version of MIPS simulator. 1997-10-16 03:41:57 +00:00
Andrew Cagney 284e759d1f Rename generated file engine.c to oengine.c. 1997-10-16 03:39:13 +00:00
Andrew Cagney 339fb14904 * gencode.c (build_instruction): Use FPR_STATE not fpr_state. 1997-10-16 03:29:47 +00:00
Andrew Cagney 8b70f83790 * gencode.c (build_instruction): For "FPSQRT", output correct number
of arguments to Recip.
1997-10-16 03:23:16 +00:00
Andrew Cagney eaa202ddd4 * gen-semantics.c (print_semantic_body): Use CIA not cia.ip. Escape
newlines at end of generated call to sim_engine_abort.
1997-10-16 03:19:41 +00:00
Andrew Cagney 81b3b32cda Sanitize additional files. 1997-10-15 00:05:28 +00:00
Andrew Cagney 5a9bddea84 Enable d10v simulator testsuite - two tests: Hello World and exit47. 1997-10-15 00:00:41 +00:00
Andrew Cagney fd89abc204 Handle core regions which start at a poorly aligned address. 1997-10-14 23:45:52 +00:00
Andrew Cagney 7456a10d9b * sim-alu.h (ALU64_HAD_OVERFLOW): Define.
(ALU64_SUB): Define.
* Make-common.in (all): Build SIM_EXTRA_ALL first.
(.gdbinit): Remove dependencies, generate once per build.
1997-10-14 09:39:05 +00:00
Andrew Cagney 055ee2977f Checkpoint IGEN version of MIPS simulator. 1997-10-14 09:34:08 +00:00
Andrew Cagney 0c2c5f6141 Move global MIPS simulator variables into sim_cpu struct. 1997-10-14 09:26:03 +00:00
Andrew Cagney 1b217de0f3 Correct type of address argument for sim_core_{read,write} 1997-10-14 09:24:57 +00:00
Andrew Cagney 18c64df613 o Add support for configuring wordsize, fp hardware and target
endianness.  Provide defaults for some tier-1 mips targets.
o	Parameterize all functions with SIM_DESC.
1997-10-14 07:27:31 +00:00
Andrew Cagney d5cecca93c Output line-ref to original igen source file when generating trace
statements.
Define NIA macro (dependant on gen-delayed-branch).
Verify opening/closing quote in input assembler strings.
1997-10-14 02:54:08 +00:00
Fred Fish 1155e06e3f * simops.c (OP_6A01): Change OP_POSTDEC to OP_POSTINC and move
exception generation code to OP_6E01.
	(OP_6E01): Change OP_POSTINC to OP_POSTDEC and insert exception
	generation code.
PR 13550
1997-10-13 18:26:52 +00:00
Fred Fish b83093ff79 * simops.c (OP_6401): postdecrement on r15 is OK, remove exception.
(OP_6601): Ditto.
PR 13498
1997-10-11 16:50:05 +00:00
Fred Fish 93f0cb6975 * simops.c (OP_6401): postdecrement on r15 is OK, remove exception.
(OP_6601): Ditto.
1997-10-11 16:48:47 +00:00
Andrew Cagney 49a6eed58a Snap. Gets through igen's checks. 1997-10-09 08:38:22 +00:00
Andrew Cagney 8782bfcfc4 Add -Wnodiscard option so that warning about discarded instructions
can be suppressed.
Allow ``<insn-spec> { <nmemonic> | <model> }'' in instruction file.
1997-10-09 08:35:33 +00:00
Andrew Cagney 2875c6c685 Build IGEN with the MIPS simulator. 1997-10-09 00:41:14 +00:00
Andrew Cagney f2b3001251 MIPS/IGEN checkpoint - doesn't build. 1997-10-08 04:16:01 +00:00
Andrew Cagney 391c71708e Checkpoint IGEN input file for MIPS simulator. 1997-10-07 08:45:11 +00:00
Andrew Cagney b3c77578dc Rewrite simulator floating point module. Do not rely on host FP
implementation.  Add preliminary support for different IEEE-754
rounding modes.  Implement SQRT in software.
Update TiC80 simulator.
Add sim-fpu -> TestFloat interface for testing.
1997-10-03 00:03:35 +00:00
Andrew Cagney 63fe2cc799 Fix typo, WITH_TARGET_WORD_BITSIZE not WITH_TARGET_BITSIZE. 1997-10-02 23:37:30 +00:00
Andrew Cagney adf4739efe Add access to hi part of r5900 128 bit registers. 1997-09-30 03:45:51 +00:00
Bob Manson 26b20b0a0e * configure: Regenerated.
Can't hack one without the other...
1997-09-29 21:46:32 +00:00
Andrew Cagney e9b53280ba Do not sanitize out sim/testsuite/common directory. 1997-09-29 00:24:08 +00:00
Fred Fish 5f90b21e40 * d10v_sim.h (INC_ADDR): Align MOD_E to increment before testing
for end condition.
PR 13334
1997-09-27 20:04:22 +00:00
Fred Fish 823f2df47f * interp.c (pc_addr): Discard upper bit(s) of PC in case
IMAP1 selects unified memory.
PR 13275
1997-09-27 19:57:05 +00:00
Mark Alexander 6eedf3f4e5 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB. 1997-09-26 20:56:55 +00:00
Felix Lee b28ad90b4d * sim-main.h: delete null override of SIM_ENGINE_HALT_HOOK and
SIM_ENGINE_RESTART_HOOK.
1997-09-26 19:24:45 +00:00
Stu Grossman 68f92f98ac * sim-break.c (sim_set_breakpoint sim_clear_breakpoint): Use ZALLOC
and zfree instead of xmalloc and free.  Prevents warnings.
1997-09-25 18:22:46 +00:00
Andrew Cagney af51b8d56d Add/use SIM_AC_OPTION_BITSIZE. 1997-09-25 07:19:05 +00:00
Andrew Cagney 7a3fb4e6ea * config/v850/tm-v850.h (BREAKPOINT): Use 1 word DIVH insn with
RRRRR=0 for simulator breakpoint. Previous breakpoint insn was two
words.
1997-09-25 07:01:21 +00:00
Andrew Cagney e63bc706fe Allow gencode.c to generate input to the igen generator. 1997-09-25 04:23:24 +00:00
Andrew Cagney eb2e3c85ca Pacify GCC -Wall 1997-09-25 04:13:50 +00:00
Stu Grossman b9d580a4b0 * Make-common.in: New files sim-break.c, sim-break.h.
* sim-base.h:  Add point to breakpoint list to sim_state_base.
	* sim-break.c sim-break.h:  New modules that implement intrinsic
	breakpoint support.
	* sim-module.c:  Add breakpoint module.
1997-09-25 00:51:17 +00:00