Commit Graph

88020 Commits

Author SHA1 Message Date
Pedro Alves
69ffd7f270 gdb/NEWS: Mention that C++ is now the default
gdb/ChangeLog:
2016-08-05  Pedro Alves  <palves@redhat.com>

	* NEWS: Mention that GDB and GDBserver build with a C++ compiler
	by default.
2016-08-05 17:09:31 +01:00
Pedro Alves
1baf514936 gdb/configure --help: suggest --disable-build-with-cxx instead of --enable...
We build by default with a C++ compiler, but "configure --help" still
says "--enable-build-with-cxx", which hints that it is by default
disabled.  Update the --help text.

gdb/ChangeLog:
2016-08-05  Pedro Alves  <palves@redhat.com>

	* build-with-cxx.m4: Change help string to be in terms of
	--disable-build-with-cxx.
	* configure: Regenerate.

gdb/gdbserver/ChangeLog:
2016-08-05  Pedro Alves  <palves@redhat.com>

	* configure: Regenerate.
2016-08-05 16:54:29 +01:00
Nick Clifton
b126985ec3 Ensure ARM VPUSH and VPOP instructions do not affect more than 16 registers.
PR gas/20429
	* config/tc-arm.c (do_vfp_nsyn_push): Check that no more than 16
	registers are pushed.
	(do_vfp_nsyn_pop): Check that no more than 16 registers are
	popped.
	* testsuite/gas/arm/pr20429.s: New test.
	* testsuite/gas/arm/pr20429.d: New test driver.
	* testsuite/gas/arm/pr20429.1: Expected error output.
2016-08-05 11:26:13 +01:00
Nick Clifton
7ea12e5c3a Fix the generation of alignment frags in code sections for AArch64.
PR gas/20364
	* config/tc-aarch64.c (s_ltorg): Change the mapping state after
	aligning the frag.
	(aarch64_init): Treat rs_align frags in code sections as
	containing code, not data.
	* testsuite/gas/aarch64/pr20364.s: New test.
	* testsuite/gas/aarch64/pr20364.d: New test driver.
2016-08-05 10:37:57 +01:00
GDB Administrator
cca8e7e482 Automatic date update in version.in 2016-08-05 00:00:22 +00:00
Thomas Preud'homme
54ddd295b5 2016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
	* bfd-in.h (bfd_elf32_arm_set_target_relocs): Add one parameter.
	* bfd-in2.h: Regenerate.
	* elf32-arm.c (struct elf32_arm_link_hash_table): Declare new
	cmse_implib field.
	(bfd_elf32_arm_set_target_relocs): Add new parameter to initialize
	cmse_implib field in struct elf32_arm_link_hash_table.
	(elf32_arm_filter_cmse_symbols): New function.
	(elf32_arm_filter_implib_symbols): Likewise.
	(elf_backend_filter_implib_symbols): Define to
	elf32_arm_filter_implib_symbols.

ld/
	* emultempl/armelf.em (cmse_implib): Declare and define this new
	static variable.
	(arm_elf_create_output_section_statements): Add new cmse_implib
	parameter.
	(OPTION_CMSE_IMPLIB): Define macro.
	(PARSE_AND_LIST_LONGOPTS): Add entry for new --cmse-implib switch.
	(PARSE_AND_LIST_OPTIONS): Likewise.
	(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_CMSE_IMPLIB case.
	* ld.texinfo (--cmse-implib): Document new option.
	* testsuite/ld-arm/arm-elf.exp
	(Secure gateway import library generation): New test.
	(Secure gateway import library generation: errors): Likewise.
	* testsuite/ld-arm/cmse-implib.s: New file.
	* testsuite/ld-arm/cmse-implib-errors.out: Likewise.
	* testsuite/ld-arm/cmse-implib.rd: Likewise.
2016-08-04 15:54:57 +01:00
Thomas Preud'homme
4ba2ef8fbe 2016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
	* elf32-arm.c (CMSE_PREFIX): Define macro.
	(elf32_arm_stub_cmse_branch_thumb_only): Define stub sequence.
	(cmse_branch_thumb_only): Declare stub.
	(struct elf32_arm_link_hash_table): Define cmse_stub_sec field.
	(elf32_arm_get_plt_info): Add globals parameter.  Use it to return
	FALSE if there is no PLT.
	(arm_type_of_stub): Adapt to new elf32_arm_get_plt_info signature.
	(elf32_arm_final_link_relocate): Likewise.
	(elf32_arm_gc_sweep_hook): Likewise.
	(elf32_arm_gc_mark_extra_sections): Mark sections holding ARMv8-M
	secure entry functions.
	(arm_stub_is_thumb): Add case for arm_stub_cmse_branch_thumb_only.
	(arm_dedicated_stub_output_section_required): Change to a switch case
	and add a case for arm_stub_cmse_branch_thumb_only.
	(arm_dedicated_stub_output_section_required_alignment): Likewise.
	(arm_stub_dedicated_output_section_name): Likewise.
	(arm_stub_dedicated_input_section_ptr): Likewise and remove
	ATTRIBUTE_UNUSED for htab parameter.
	(arm_stub_required_alignment): Likewise.
	(arm_stub_sym_claimed): Likewise.
	(arm_dedicated_stub_section_padding): Likewise.
	(cmse_scan): New function.
	(elf32_arm_size_stubs): Call cmse_scan for ARM M profile targets.
	Set stub_changed to TRUE if such veneers were created.
	(elf32_arm_swap_symbol_in): Add detection code for CMSE special
	symbols.

include/
	* arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
	(ARM_SET_SYM_CMSE_SPCL): Likewise.

ld/
	* ld.texinfo (Placement of SG veneers): New concept entry.
	* testsuite/ld-arm/arm-elf.exp
	(Secure gateway veneers: no .gnu.sgstubs section): New test.
	(Secure gateway veneers: wrong entry functions): Likewise.
	(Secure gateway veneers (ARMv8-M Baseline)): Likewise.
	(Secure gateway veneers (ARMv8-M Mainline)): Likewise.
	* testsuite/ld-arm/cmse-veneers.s: New file.
	* testsuite/ld-arm/cmse-veneers.d: Likewise.
	* testsuite/ld-arm/cmse-veneers.rd: Likewise.
	* testsuite/ld-arm/cmse-veneers.sd: Likewise.
	* testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out: Likewise.
	* testsuite/ld-arm/cmse-veneers-wrong-entryfct.out: Likewise.
2016-08-04 15:36:52 +01:00
Stefan Trleman
024425668d Fix generation of relocs for 32-bit Sparc Solaris targets.
PR gas/20427
	* config/tc-sparc.c (cons_fix_new_sparc): Prevent the generation
	of 64-bit relocation types when assembling for a 32-bit Solaris
	target.
2016-08-04 14:57:23 +01:00
Yao Qi
6f67973b42 Determine target description for native aarch64
I find the following test fail when I test native aarch64 gdb with
arm program,

(gdb) PASS: gdb.base/attach-pie-noexec.exp: attach
set architecture arm^M
warning: Selected architecture arm is not compatible with reported target architecture aarch64^M
Architecture `arm' not recognized.^M
The target architecture is set automatically (currently aarch64)^M
(gdb) FAIL: gdb.base/attach-pie-noexec.exp: set architecture arm

GDB thinks the target is aarch64, but it isn't.  Nowadays, we are
using some entries AT_PHENT and AT_HWCAP in auxv to determine whether
the process is a 32-bit arm one or 64-bit aarch64 one, and get the
right gdbarch.  However, in the process of parsing auxv (in
inf_ptrace_auxv_parse), the size of int and data pointer of
target_gdbarch is used.  If debug program exists (in most of cases),
target_gdbarch is already set according to the debug program, which
is arm in my case.  Then, GDB can parse auxv successfully.  However,
in gdb.base/attach-pie-noexec.exp, the debug program is removed,
target_gdbarch is aarch64 when GDB parse auxv, so GDB can't parse
it successfully.

Instead of using auxv, we check the return value of ptrace NT_ARM_VFP.
If the program is an arm process, NT_ARM_VFP is OK, otherwise, error
is returned.

Additionally, we only return tdesc_arm_with_neon for arm process,
because neon is mandatory on ARMv8.

gdb:

2016-08-04  Yao Qi  <yao.qi@linaro.org>

	* aarch64-linux-nat.c (tdesc_arm_with_vfpv3): Remove the
	declaration.
	(aarch64_linux_read_description): Remove code on getting
	auxv and select target description on it.  Select target
	description by the result of NT_ARM_VFP ptrace request.
2016-08-04 11:39:19 +01:00
Yao Qi
fcd4a73d7d Quiet ptrace error ESRCH in regsets_fetch_inferior_registers
When I run process-dies-while-detaching.exp with GDBserver, I see many
warnings printed by GDBserver,

ptrace(regsets_fetch_inferior_registers) PID=26183: No such process
ptrace(regsets_fetch_inferior_registers) PID=26183: No such process
ptrace(regsets_fetch_inferior_registers) PID=26184: No such process
ptrace(regsets_fetch_inferior_registers) PID=26184: No such process

regsets_fetch_inferior_registers is called when GDBserver resumes each
lwp.

 #2  0x0000000000428260 in regsets_fetch_inferior_registers (regsets_info=0x4690d0 <aarch64_regsets_info>, regcache=0x31832020)
    at /home/yao/SourceCode/gnu/gdb/git/gdb/gdbserver/linux-low.c:5412
 #3  0x00000000004070e8 in get_thread_regcache (thread=0x31832940, fetch=fetch@entry=1) at /home/yao/SourceCode/gnu/gdb/git/gdb/gdbserver/regcache.c:58
 #4  0x0000000000429c40 in linux_resume_one_lwp_throw (info=<optimized out>, signal=0, step=0, lwp=0x31832830)
    at /home/yao/SourceCode/gnu/gdb/git/gdb/gdbserver/linux-low.c:4463
 #5  linux_resume_one_lwp (lwp=0x31832830, step=<optimized out>, signal=<optimized out>, info=<optimized out>)
    at /home/yao/SourceCode/gnu/gdb/git/gdb/gdbserver/linux-low.c:4573

The is the case that threads are disappeared when GDB/GDBserver resumes
them.  We check errno for ESRCH, and don't print error messages, like
what we are doing in regsets_store_inferior_registers.

gdb/gdbserver:

2016-08-04  Yao Qi  <yao.qi@linaro.org>

	* linux-low.c (regsets_fetch_inferior_registers): Check
	errno is ESRCH or not.
2016-08-04 10:44:18 +01:00
GDB Administrator
dabcfa6ef3 Automatic date update in version.in 2016-08-04 00:00:19 +00:00
Tom Tromey
282a0691a7 PR python/18565 - make Frame.function work for inline frames
PR python/18565 notes that calling frame filters don't work properly for
inlined functions.  This happens because Frame.function on an inline
frame will yield the wrong result.  This patch changes this code to use
find_frame_funname instead, which handles inline frames properly.

Built and regtested on x86-64 Fedora 24.

2016-08-03  Tom Tromey  <tom@tromey.com>

	PR python/18565:
	* python/py-frame.c (frapy_function): Use find_frame_funname.

2016-08-03  Tom Tromey  <tom@tromey.com>

	PR python/18565:
	* gdb.python/py-frame-inline.exp: Add Frame.function test.
2016-08-03 09:04:08 -06:00
Tom Tromey
d10153cfc6 Avoid potential memory leak in find_frame_funname
The PR 18565 thread pointed out that, if cp_remove_params can throw
(we aren't quite sure), then find_frame_funname could leak some
memory.  This patch avoids any potential issue by rearranging some
code in find_frame_funname.

Built and regtested on x86-64 Fedora 24.

2016-08-03  Tom Tromey  <tom@tromey.com>

	* stack.c (find_frame_funname): Avoid any possible leak in case
	cp_remove_params can throw.
2016-08-03 09:04:08 -06:00
Tom Tromey
8d2a0a14e5 Update NEWS to mention Python breakpoint events
An earlier patch added three new breakpoint-related events to the
Python API.  However, at that time, I forgot to update NEWS.  This
patch supplies the missing entry.

2016-08-03  Tom Tromey  <tom@tromey.com>

	* NEWS: Mention new Python breakpoint events.
2016-08-03 08:14:23 -06:00
GDB Administrator
f72b087237 Automatic date update in version.in 2016-08-03 00:00:18 +00:00
Tom Tromey
33541b2e56 Add myself as Rust maintainer
A while ago, Pedro announced that I would be the Rust maintainer for
gdb.  However, I neglected to update the MAINTAINERS file until now.

2016-08-02  Tom Tromey  <tom@tromey.com>

	* MAINTAINERS (Core): Add self as Rust maintainer.
2016-08-02 16:58:37 -06:00
Yao Qi
979659d084 [GDBserver] Remove td_ta_event_addr td_ta_set_event and td_ta_event_getmsg
As a result of this commit,

  9b4c5f878f
  (Remove support for thread events without PTRACE_EVENT_CLONE in GDBServer.)

the last usage of td_ta_event_addr td_ta_set_event and
td_ta_event_getmsg were removed.  They are no longer used.  This patch
is to remove them.

gdb/gdbserver:

2016-08-02  Yao Qi  <yao.qi@linaro.org>

	* thread-db.c (struct thread_db) <td_ta_event_getmsg_p>: Remove.
	<td_ta_set_event_p, td_ta_event_addr_p>: Remove.
	(thread_db_load_search): Update.
	(try_thread_db_load_1): Don't look for td_ta_event_addr,
	td_ta_set_event and td_ta_event_getmsg.
2016-08-02 16:04:09 +01:00
Alan Modra
89d77b8a52 PowerPC64 ld segfault with code in non-executable sections
PR ld/20428
	* elf64-ppc.c (ppc_get_stub_entry): Don't segfault on NULL group.
2016-08-02 23:39:09 +09:30
Nick Clifton
fa3fcee7b8 Synchronize libiberty sources with FSF GCC mainline version.
include	* libiberty.h (MAX_ALLOCA_SIZE): New macro.

libiberty * make-relative-prefix.c (make_relative_prefix_1): Fall back to
	malloc if alloca argument is greater than MAX_ALLOCA_SIZE.

	* cp-demangle.c (cplus_demangle_operators): Add f[lrLR].
	(d_expression_1): Handle them.
	(d_maybe_print_fold_expression): New.
	(d_print_comp_inner): Use it.
	(d_index_template_argument): Handle negative index.

	* cp-demangle.c (cplus_demangle_operators): Add sP and sZ.
	(d_print_comp_inner): Handle them.
	(d_template_args_1): Split out from d_template_args.
	(d_args_length): New.

	PR c++/70926
	* cplus-dem.c: Handle large values and overflow when demangling
	length variables.
	(demangle_template_value_parm): Read only until end of mangled string.
	(do_hpacc_template_literal): Likewise.
	(do_type): Handle overflow when demangling array indices.

	* cp-demangle.c (cplus_demangle_print_callback): Avoid zero-length
	  VLAs.

	PR c++/70498
	* cp-demangle.c (d_expression_1): Formatting fix.

	* cplus-dem.c (enum type_kind_t): Add tk_rvalue_reference
	constant.
	(demangle_template_value_parm): Handle tk_rvalue_reference
	type kind.
	(do_type): Support 'O' type id (rvalue references).

	* testsuite/demangle-expected: Add tests.

	PR c++/70498
	* cp-demangle.c: Parse numbers as integer instead of long to avoid
	overflow after sanity checks. Include <limits.h> if available.
	(INT_MAX): Define if necessary.
	(d_make_template_param): Takes integer argument instead of long.
	(d_make_function_param): Likewise.
	(d_append_num): Likewise.
	(d_identifier): Likewise.
	(d_number): Parse as and return integer.
	(d_compact_number): Handle overflow.
	(d_source_name): Change variable type to integer for parsed number.
	(d_java_resource): Likewise.
	(d_special_name): Likewise.
	(d_discriminator): Likewise.
	(d_unnamed_type): Likewise.
	* testsuite/demangle-expected: Add regression test cases.

	* configure: Remove SH5 support.

	PR c++/69687
	* cplus-dem.c: Include <limits.h> if available.
	(INT_MAX): Define if necessary.
	(remember_type, remember_Ktype, register_Btype, string_need):
	Abort if we detect cases where we the size of the allocation would
	overflow.

	PR c++/70492
	* cplus-dem.c (gnu_special): Handle case where consume_count returns
	-1.

	PR c++/67394
	PR c++/70481
	* cplus-dem.c (squangle_mop_up): Zero bsize/ksize after freeing
	btypevec/ktypevec.
	* testsuite/demangle-expected: Add coverage tests.
2016-08-02 13:26:28 +01:00
Nick Clifton
a94d834c9d Fix SH GOT allocation in the presence of linker garbage collection.
PR ld/17739
ld	* emulparams/shelf.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Define with
	valye 'yes'.
	* emulparams/shelf32.sh: Likewise.
	* emulparams/shelf32.sh: Likewise.
	* emulparams/shelf_nto.sh: Likewise.
	* emulparams/shelf_nto.sh: Likewise.
	* emulparams/shelf_vxworks.sh: Likewise.
	* emulparams/shelf_vxworks.sh: Likewise.
	* emulparams/shlelf32_linux.sh: Likewise.
	* emulparams/shlelf32_linux.sh: Likewise.
	* emulparams/shlelf_linux.sh: Likewise.
	* emulparams/shlelf_linux.sh: Likewise.
	* emulparams/shlelf_nto.sh: Likewise.
	* emulparams/shlelf_nto.sh: Likewise.

bfd	* elf32-sh.c (sh_elf_gc_sweep_hook): Delete.
	(elf_backend_sweep_hook): Delete.
2016-08-02 11:56:55 +01:00
Nick Clifton
2d5bddc1eb Avoid compile time warning when building on 32-bit host.
PR binutils/17512
	* resbin.c (bin_to_res_version): Cast variables to correct type
	for printing in error message.
2016-08-02 11:06:28 +01:00
GDB Administrator
80b476c2bf Automatic date update in version.in 2016-08-02 00:00:20 +00:00
Andrew Jenner
dfdaec14b0 Fix some PowerPC VLE BFD issues and add some PowerPC VLE instructions.
bfd/
        * elf32-ppc.c (is_branch_reloc): Recognise VLE branch relocations.
        (ppc_elf_howto_raw): Fix dst_mask of R_PPC_VLE_REL15.
        (ppc_elf_vle_split16): Clear field before inserting.

        opcodes/
        * ppc-opc.c (vle_opcodes): Alias 'e_cmpwi' to 'e_cmpi' and
        'e_cmplwi' to 'e_cmpli' instead.
        (OPVUPRT, OPVUPRT_MASK): Define.
        (powerpc_opcodes): Add E200Z4 insns.
        (vle_opcodes): Add context save/restore insns.

        include/
        * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
2016-08-01 09:42:31 -07:00
Joel Brobecker
751b375e01 Update NEWS post GDB 7.12 branch creation.
gdb/ChangeLog:

	* NEWS: Create a new section for the next release branch.
	Rename the section of the current branch, now that it has
	been cut.
2016-08-01 08:28:26 -07:00
Joel Brobecker
b2bd7787d3 Bump version to 7.12.50.DATE-git.
Now that the GDB 7.12 branch has been created, we can
bump the version number.

gdb/ChangeLog:

	GDB 7.12 branch created (41bfcd638a):
	* version.in: Bump version to 7.12.50.DATE-git.
2016-08-01 08:23:20 -07:00
Yao Qi
41bfcd638a Swap "single-process" and "multi-process" in process-dies-while-detaching.exp
"single-process" and "multi-process" are used in the test message of
process-dies-while-detaching.exp, but they are misplaced due to

    set mode [expr {$multi_process ? "single-process" : "multi-process"}]

This patch is to swap them.

gdb/testsuite:

2016-08-01  Yao Qi  <yao.qi@linaro.org>

	* gdb.threads/process-dies-while-detaching.exp (do_test): Set
	variable mode to "multi-process" if $multi_process is 1, otherwise
	set it to "single-process".
2016-08-01 10:00:31 +01:00
Nick Clifton
781bf64d24 Update Swedish translation in bfd directory. 2016-08-01 09:59:04 +01:00
Yao Qi
e3465b24a2 Tweak gdb.cp tests for aarch32
There are some gdb.cp/ tests fails if the program is compiled for arm
32-bit but GDB/GDBserver is aarch64 64-bit program, because target triplet
doesn't match "arm*-*-*".  Instead, we can use is_aarch32_target.

gdb/testsuite:

2016-08-01  Yao Qi  <yao.qi@linaro.org>

	* gdb.cp/anon-struct.exp: Check is_aarch32_target.
	* gdb.cp/cpexprs.exp: Likewise.
	* gdb.cp/m-static.exp: Likewise.
2016-08-01 09:32:06 +01:00
GDB Administrator
5e3d6ca4de Automatic date update in version.in 2016-08-01 00:00:20 +00:00
GDB Administrator
a161b769b0 Automatic date update in version.in 2016-07-31 00:00:20 +00:00
GDB Administrator
3e684cf25a Automatic date update in version.in 2016-07-30 00:00:19 +00:00
Jose E. Marchesi
c88960d081 gas: avoid spurious failures in non-ELF targets in the SPARC testsuite.
Many of the existing sparc tests fail in non-ELF targets (coff and
a.out) due to spurious differences in the expected results:

- Unlike ELF, a.out text sections are aligned to 2**3 and padded
  accordingly.  The padding instruction is a `nop' (01 00 00 00).

- Likewise, coff text sections are also aligned to 2**3 and padded
  accordingly.  However, the padding instruction in these targets is an
  `illtrap 0' (00 00 00 00).

- Unlike ELF, a.out and coff binaries don't contain hardware
  capabilities bits that could be used by BFD to determine the opcodes
  architecture corresponding to the instructions encoded in the
  objects (v9, v9a, v9b, v9c, etc).  Consequently, in both a.out and
  coff tests we would need to pass proper `-m sparc:vXXX' options when
  invoking objdump before comparing results.

In order to fix these issues, the most obvious solution would be to have
three variants of .d files per impacted test.  For example, for save.d
we would have: save-elf.d, save-aout.d and save-coff.d.  Using the
`#source' directive, a single save.s file would provide the input for
all of them.  However, this approach has the following problems:

- The #target and #notarget .d directives are very limited: they use
  globs instead of regular expressions, and thus it is not possible (or
  too messy) to use them to discriminate between elf, coff and a.out
  sparc targets.

- It adds little or no value to have variants of all these tests for all
  the target types, and it would be a burden to maintain them.  Actually
  the features tested in the spuriously failing tests (relatively modern
  sparc instructions, registers and asis) are not really found in
  running coff or a.out sparc systems.

This patch changes sparc.exp so it will run these tests only in
ELF-targets, using the more standard `is_elf_format' from
binutils-common.exp instead of the ad-hoc (and less convenient, as it
must be called before _every_ single elf-only test) sparc_elf_setup.

Incidentally, the patch also fixes the #name entry for save-args.d.

Tested in sparc*-*-linux-gnu, sparc-aout and sparc-coff targets.

gas/ChangeLog:

2016-07-27  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* testsuite/gas/sparc/sparc.exp: Use is_elf_format to discriminate
	ELF targets.
	Run natural, natural-32, pr4587, ticc-imm-reg, v8-movwr-imm,
	pause, save-args, cbcond, cfr, crypto edge, flush, hpcvis3, ima,
	ld_st_fsr, ldtw_sttw, ldd_std, ldx_stx, ldx_efsr, mwait, mcdper,
	sparc5vis4, xcrypto, v9branch1 and imm-plus-rreg only in ELF
	targets.
	(sparc_elf_setup): Delete.
	* testsuite/gas/sparc/save-args.d: Fix a copy-paste typo in the
	test's #name entry.
2016-07-29 00:17:04 -07:00
GDB Administrator
76539d80f7 Automatic date update in version.in 2016-07-29 00:00:19 +00:00
Nick Clifton
4931146e91 Fix decoding of Windows resources.
PR binutils/17512
	* rescoff.c (read_coff_res_dir): Fix detection of buffer overrun.
	* resbin.c (bin_to_res_version): Allow for the padded length of a
	version block to be longer than the recorded length.  Skip padding
	bytes.
2016-07-28 15:37:16 +01:00
GDB Administrator
ff20cab8a2 Automatic date update in version.in 2016-07-28 00:00:30 +00:00
Maciej W. Rozycki
7bd374a44d MIPS/GAS: Implement microMIPS branch/jump compaction
Convert microMIPS branches and jumps whose delay slot would be filled by
a generated NOP instruction to the corresponding compact form where one
exists, in a manner similar to MIPS16 JR->JRC and JALR->JALRC swap.

Do so even where the transformation switches from a 16-bit to a 32-bit
branch encoding for no benefit in code size reduction, as this is still
advantageous.  This is because a branch/NOP pair takes 2 pipeline slots
or a 2-cycle completion latency except in superscalar implementations.
Whereas a compact branch may or may not stall on its target fetch, so it
will at most have a 2-cycle completion latency and may have only 1 even
in scalar implementations, and in superscalar implementations it is
expected to have no worse latency as a branch/NOP pair has.  Also it
won't stall and therefore take the extra latency cycle in the not-taken
case.

Technically this is the same as MIPS16 compaction: for the qualifying
instruction encodings the APPEND_ADD_COMPACT machine code generation
method is selected where APPEND_ADD_WITH_NOP otherwise would and tells
the code generator in `append_insn' to convert the regular form of an
instruction to its corresponding compact form.  For this the opcode is
tweaked as necessary and the microMIPS opcode table is scanned for the
matching updated instruction.  A non-$0 `rt' operand to BEQ and BNE
instructions is moved to the `rs' operand field of BEQZC and BNEZC
encodings as required.

Unlike with MIPS16 compaction however we need to handle out-of-distance
branch relaxation as well.  We do this by deferring the generation of
any delay-slot NOP required to relaxation made in `md_convert_frag', by
converting the APPEND_ADD_WITH_NOP machine code generation to APPEND_ADD
where a relaxed instruction is recorded.  Relaxation then, depending on
actual code produced, chooses between either using a compact branch or
jump encoding and emitting the NOP outstanding if no compact encoding is
possible.

For code simplicity's sake the relaxation pass is retained even if the
principle of preferring a compact encoding to a 16-bit branch/NOP pair
means, in the absence of out-of-range branch relaxation, that a single
compact branch machine code instruction will eventually be produced from
a given assembly source instruction.

	gas/
	* config/tc-mips.c (RELAX_MICROMIPS_ENCODE): Add `nods' flag.
	(RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16)
	(RELAX_MICROMIPS_MARK_TOOFAR16, RELAX_MICROMIPS_CLEAR_TOOFAR16)
	(RELAX_MICROMIPS_TOOFAR32, RELAX_MICROMIPS_MARK_TOOFAR32)
	(RELAX_MICROMIPS_CLEAR_TOOFAR32): Shift bits.
	(get_append_method): Also return APPEND_ADD_COMPACT for
	microMIPS instructions.
	(find_altered_mips16_opcode): Exclude macros from matching.
	Factor code out...
	(find_altered_opcode): ... to this new function.
	(find_altered_micromips_opcode): New function.
	(frag_branch_delay_slot_size): Likewise.
	(append_insn): Handle microMIPS branch/jump compaction.
	(macro_start): Likewise.
	(relaxed_micromips_32bit_branch_length): Likewise.
	(md_convert_frag): Likewise.
	* testsuite/gas/mips/micromips.s: Add conditional explicit NOPs
	for delay slot filling.
	* testsuite/gas/mips/micromips-b16.s: Add explicit NOPs for
	delay slot filling.
	* testsuite/gas/mips/micromips-size-1.s: Likewise.
	* testsuite/gas/mips/micromips.l: Adjust line numbers.
	* testsuite/gas/mips/micromips-warn.l: Likewise.
	* testsuite/gas/mips/micromips-size-1.l: Likewise.
	* testsuite/gas/mips/micromips.d: Adjust padding.
	* testsuite/gas/mips/micromips-trap.d: Likewise.
	* testsuite/gas/mips/micromips-insn32.d: Likewise.
	* testsuite/gas/mips/micromips-noinsn32.d: Likewise.
	* testsuite/gas/mips/micromips@beq.d: Update patterns for
	branch/jump compaction.
	* testsuite/gas/mips/micromips@bge.d: Likewise.
	* testsuite/gas/mips/micromips@bgeu.d: Likewise.
	* testsuite/gas/mips/micromips@blt.d: Likewise.
	* testsuite/gas/mips/micromips@bltu.d: Likewise.
	* testsuite/gas/mips/micromips@branch-misc-4.d: Likewise.
	* testsuite/gas/mips/micromips@branch-misc-4-64.d: Likewise.
	* testsuite/gas/mips/micromips@branch-misc-5.d: Likewise.
	* testsuite/gas/mips/micromips@branch-misc-5pic.d: Likewise.
	* testsuite/gas/mips/micromips@branch-misc-5-64.d: Likewise.
	* testsuite/gas/mips/micromips@branch-misc-5pic-64.d: Likewise.
	* testsuite/gas/mips/micromips@jal-svr4pic-local.d: Likewise.
	* testsuite/gas/mips/micromips@jal-svr4pic-local-n32.d:
	Likewise.
	* testsuite/gas/mips/micromips@jal-svr4pic-local-n64.d:
	Likewise.
	* testsuite/gas/mips/micromips@loc-swap.d: Likewise.
	* testsuite/gas/mips/micromips@loc-swap-dis.d: Likewise.
	* testsuite/gas/mips/micromips@relax.d: Likewise.
	* testsuite/gas/mips/micromips@relax-at.d: Likewise.
	* testsuite/gas/mips/micromips@relax-swap3.d: Likewise.
	* testsuite/gas/mips/branch-extern-2.d: Likewise.
	* testsuite/gas/mips/branch-extern-4.d: Likewise.
	* testsuite/gas/mips/branch-section-2.d: Likewise.
	* testsuite/gas/mips/branch-section-4.d: Likewise.
	* testsuite/gas/mips/branch-weak-2.d: Likewise.
	* testsuite/gas/mips/branch-weak-5.d: Likewise.
	* testsuite/gas/mips/micromips-branch-absolute.d: Likewise.
	* testsuite/gas/mips/micromips-branch-absolute-n32.d: Likewise.
	* testsuite/gas/mips/micromips-branch-absolute-n64.d: Likewise.
	* testsuite/gas/mips/micromips-branch-absolute-addend.d:
	Likewise.
	* testsuite/gas/mips/micromips-branch-absolute-addend-n32.d:
	Likewise.
	* testsuite/gas/mips/micromips-branch-absolute-addend-n64.d:
	Likewise.
	* testsuite/gas/mips/micromips-compact.d: New test.
	* testsuite/gas/mips/mips.exp: Run the new test.

	ld/
	* testsuite/ld-mips-elf/micromips-branch-absolute.d: Update
	patterns for branch compaction.
	* testsuite/ld-mips-elf/micromips-branch-absolute-addend.d:
	Likewise.

	opcodes/
	* micromips-opc.c (micromips_opcodes): Reorder "bc" next to "b",
	"beqzc" next to "beq", "bnezc" next to "bne" and "jrc" next to
	"j".
2016-07-27 17:38:31 +01:00
Graham Markall
db18dbabad Begin implementing ARC NPS-400 Accelerator instructions
opcodes * arc-nps400-tbl.h: Change block comments to GNU format.
        * arc-dis.c: Add new globals addrtypenames,
        addrtypenames_max, and addtypeunknown.
        (get_addrtype): New function.
        (print_insn_arc): Print colons and address types when
        required.
        * arc-opc.c: Add MAKE_INSERT_NPS_ADDRTYPE macro and use to
        define insert and extract functions for all address types.
        (arc_operands): Add operands for colon and all address
        types.
        * arc-nps-400-tbl.h: Add NPS-400 BMU instructions to opcode table.
        * arc-opc.c: Add NPS_BD_TYPE and NPS_BMU_NUM operands,
        insert_nps_bd_num_buff and extract_nps_bd_num_buff functions.
        * arc-nps-400-tbl.h: Add NPS-400 PMU instructions to opcode table.
        * arc-opc.c: Add NPS_PMU_NXT_DST and NPS_PMU_NUM_JOB operands,
        insert_nps_pmu_num_job and extract_nps_pmu_num_job functions.

include * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
        ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
        ARC_NUM_ADDRTYPES.
        * opcode/arc.h: Add BMU to insn_class_t enum.
        * opcode/arc.h: Add PMU to insn_class_t enum.

gas     * config/tc-arc.c: Add new global arc_addrtype_hash.
        Define O_colon and O_addrtype.
        (debug_exp): Add O_colon and O_addrtype.
        (tokenize_arguments): Handle colon and address type
        tokens.
        (declare_addrtype): New function.
        (md_begin): Initialise arc_addrtype_hash.
        (arc_parse_name): Add lookup of address types.
	(assemble_insn): Handle colons and address types by
        ignoring them.
        * testsuite/gas/arc/nps400-8.s: New file.
        * testsuite/gas/arc/nps400-8.d: New file.
        * testsuite/gas/arc/nps400-8.s: Add PMU instruction tests.
        * testsuite/gas/arc/nps400-8.d: Add expected PMU
        instruction output.
2016-07-27 15:57:18 +01:00
Nick Clifton
61d2d2b549 Restrict linker garbage collection personality test to cfi enabled targets.
* testsuite/ld-gc/personality.d: Use "target cfi" to restrict the
	test to targets which support cfi.
2016-07-27 12:01:09 +01:00
Nick Clifton
147d994bcd Fix seg-fault when running garbage collection on coff binaries.
PR ld/20401
	* coffgen.c (fini_reloc_cookie_rels): Check for the extistence
	of the coff_section_data before using it.
2016-07-27 10:50:52 +01:00
Igor Kudrin
7fca8e8ff7 Fix warning in ldbuildid.c mingw32 code
* ldbuildid.c (generate_build_id): Warning fix.
2016-07-27 19:03:22 +09:30
Alan Modra
23fcf59aeb Fix aarch64_relocs.sh file mode 2016-07-27 16:26:42 +09:30
GDB Administrator
b6e11d01e0 Automatic date update in version.in 2016-07-27 00:00:21 +00:00
Alan Modra
293acfae4e Wean gdb and sim off private libbfd.h header
The major reason this header was needed, bfd_default_set_arch_mach,
has now moved to bfd.h.

gdb/
	* amd64-darwin-tdep.c: Don't include libbfd.h.
	* i386-darwin-tdep.c: Likewise.
	* rs6000-nat.c: Likewise.
	* rs6000-tdep.c: Likewise.
sim/aarch64/
	* memory.c: Don't include libbfd.h.
sim/rl78/
	* load.c: Don't include libbfd.h.
	(rl78_load): Don't use private iovec seek or read.
sim/rx/
	* load.c: Don't include libbfd.h.
	(rx_load): Don't use private iovec seek or read.
2016-07-27 09:01:45 +09:30
Pedro Alves
6598661d14 Fix PR server/20414 - x32 gdbserver always crashes inferior
Debugging an x32 process with an x32 gdbserver always results in:

 (gdb) c
 Continuing.

 Program received signal SIGSEGV, Segmentation fault.
 0xf7de9600 in _dl_debug_state () from target:/libx32/ld-linux-x32.so.2
 (gdb)

Looking at the remote debug logs reveals the problem, here:

  Packet received: T05swbreak:;06:a0d4ffff00000000;07:b8d3ffff00000000;10:0096def701000000;thread:p7d7a.7d7a;core:1;
                                                                          ^^^^^^^^^^^^^^^^

The underlined value is the expedited value of RIP (in little endian).
But notice that 01 in 0x01f7de9600, while gdb says the program stopped
at 0xf7de9600.  0x01ffffffff is over 32 bits, which indicates that
something wen't wrong somewhere in gdbserver.

The problem turns out to be in gdbserver's x86_get_pc / x86_set_pc
routines, where "unsigned long" is used assuming that it can fit a
64-bit value, while unsigned long is actually 32-bit on x32.  The
result is that collect_register_by_name / supply_register_by_name end
up reading/writing random bytes off the stack.

Fix this by using explicit uint64_t instead of unsigned long.
For consistency, use uint32_t instead of unsigned int in the 32-bit
paths.

gdb/gdbserver/ChangeLog:
2016-07-26  Pedro Alves  <palves@redhat.com>

	PR server/20414
	* linux-x86-low.c (x86_get_pc, x86_set_pc): Use uint64_t instead
	of unsigned long for 64-bit registers and use uint32_t instead of
	unsigned int for 32-bit registers.
2016-07-26 22:21:27 +01:00
Tom Tromey
0b31a4bcec PR python/20190 - compute TLS symbol without a frame
PR python/20190 arose from an exception I noticed when trying to use
the Python unwinder for Spider Monkey in Firefox.

The problem is that the unwinder wants to examine the value of a
thread-local variable.  However, sympy_value rejects this because
symbol_read_needs_frame returns true for a TLS variable.

This problem arose once before, though in a different context:

https://sourceware.org/bugzilla/show_bug.cgi?id=11803

At the time Pedro and Daniel pointed out a simpler way to fix that bug
(see links in 20190 if you are interested); but for this new bug I
couldn't think of a similar fix and ended up implementing Daniel's
other suggestion:

https://sourceware.org/ml/gdb-patches/2010-07/msg00393.html

That is, this patch makes it possible to detect whether a symbol needs
a specific frame, or whether it just needs the inferior to have
registers.

Built and regtested on x86-64 Fedora 24.

2016-07-26  Tom Tromey  <tom@tromey.com>

	* symtab.c (register_symbol_computed_impl): Update.
	PR python/20190:
	* value.h (symbol_read_needs): Declare.
	(symbol_read_needs_frame): Add comment.
	* symtab.h (struct symbol_computed_ops) <read_variable>: Update
	comment.
	<get_symbol_read_needs>: Rename.  Change return type.
	* findvar.c (symbol_read_needs): New function.
	(symbol_read_needs_frame): Rewrite.
	(default_read_var_value): Use symbol_read_needs.
	* dwarf2loc.c (struct symbol_needs_baton): Rename.
	<needs>: Renamed from needs_frame.  Changed type.
	(needs_frame_read_addr_from_reg, symbol_needs_get_reg_value)
	(symbol_needs_read_mem, symbol_needs_frame_base)
	(symbol_needs_frame_cfa, symbol_needs_tls_address)
	(symbol_needs_dwarf_call): Rename.
	(needs_dwarf_reg_entry_value): Update.
	(symbol_needs_ctx_funcs, dwarf2_loc_desc_get_symbol_read_needs):
	Rename and update.
	(locexpr_get_symbol_read_needs, loclist_symbol_needs): Likewise.
	(dwarf2_locexpr_funcs, dwarf2_loclist_funcs): Update.
	* defs.h (enum symbol_needs_kind): New.

2016-07-26  Tom Tromey  <tom@tromey.com>

	PR python/20190:
	* gdb.threads/tls.exp (check_thread_local): Add python symbol
	test.
2016-07-26 13:43:27 -06:00
Maciej W. Rozycki
8484fb7587 MIPS/GAS: Respect the `insn32' mode in branch relaxation
Complement:

commit 833794fc12
Author: Maciej W. Rozycki <macro@linux-mips.org>
Date:   Tue Jun 25 18:02:34 2013 +0000

<https://sourceware.org/ml/binutils/2013-06/msg00104.html>, ("microMIPS
insn32 mode support"), and fix an issue with microMIPS branch relaxation
producing 16-bit instructions in the `insn32' mode.  Use equivalent
32-bit instruction sequences.

	gas/
	* config/tc-mips.c (RELAX_MICROMIPS_ENCODE): Add `insn32' flag.
	(RELAX_MICROMIPS_INSN32): New macro.
	(RELAX_MICROMIPS_UNCOND, RELAX_MICROMIPS_COMPACT)
	(RELAX_MICROMIPS_LINK, RELAX_MICROMIPS_RELAX32)
	(RELAX_MICROMIPS_TOOFAR16, RELAX_MICROMIPS_MARK_TOOFAR16)
	(RELAX_MICROMIPS_CLEAR_TOOFAR16, RELAX_MICROMIPS_TOOFAR32)
	(RELAX_MICROMIPS_MARK_TOOFAR32, RELAX_MICROMIPS_CLEAR_TOOFAR32):
	Shift bits.
	(append_insn): Record `mips_opts.insn32' with relaxed microMIPS
	branches.
	(relaxed_micromips_32bit_branch_length): Handle the `insn32'
	mode.
	(md_convert_frag): Likewise.
	* testsuite/gas/mips/micromips-branch-relax.s: Add `insn32'
	conditionals.
	* testsuite/gas/mips/micromips-branch-relax.l: Update line
	numbers accordingly.
	* testsuite/gas/mips/micromips-branch-relax-pic.l: Likewise.
	* testsuite/gas/mips/micromips-branch-relax-insn32.d: New test.
	* testsuite/gas/mips/micromips-branch-relax-insn32-pic.d: New
	test.
	* testsuite/gas/mips/micromips-branch-relax-insn32.l: New
	stderr output.
	* testsuite/gas/mips/micromips-branch-relax-insn32-pic.l: New
	stderr output.
	* testsuite/gas/mips/mips.exp: Run the new tests.
2016-07-26 20:00:49 +01:00
Maciej W. Rozycki
54806ffa85 MIPS/BFD: Handle branches in PLT compression selection
Complement:

commit 1bbce13264
Author: Maciej W. Rozycki <macro@linux-mips.org>
Date:   Mon Jun 24 23:55:46 2013 +0000

<https://sourceware.org/ml/binutils/2013-06/msg00077.html>, ("MIPS:
Compressed PLT/stubs support"), and also choose between regular and
compressed PLT entries as appropriate for any branches referring.

	bfd/
	* elfxx-mips.c (mips_elf_calculate_relocation): Handle branches
	in PLT compression selection.
	(_bfd_mips_elf_check_relocs): Likewise.

	ld/
	* testsuite/ld-mips-elf/compressed-plt-1.s: Add branch support.
	* testsuite/ld-mips-elf/compressed-plt-1a.s: Likewise.
	* testsuite/ld-mips-elf/compressed-plt-1b.s: Likewise.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-branch.od: New
	test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-branch.rd: New
	test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-bronly.od:
	New test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-bronly.rd:
	New test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-branch.od:
	New test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-branch.rd:
	New test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-bronly.od:
	New test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-bronly.rd:
	New test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-branch.od:
	New test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-branch.rd:
	New test.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-07-26 20:00:48 +01:00
Pedro Alves
40c31709c6 Fix PR gdb/20413 - x32: linux_ptrace_test_ret_to_nx: Cannot PTRACE_PEEKUSER
An x32 gdb always issues this warning:

 (gdb) start
 Temporary breakpoint 1 at 0x4043e9: file foo.c, line 25.
 Starting program: a.out
 warning: linux_ptrace_test_ret_to_nx: Cannot PTRACE_PEEKUSER: Input/output error

 Temporary breakpoint 1, main (argc=1, argv=0xffffd544) at foo.c:25
 25      {
 (gdb)

As described in Linux commit 55283e253771 (x32: Add ptrace for x32):

    [...] PTRACE_PEEKUSR and PTRACE_POKEUSR are only allowed to access
    segment and debug registers. [...]

The fix is to use PTRACE_GETREGS instead.

gdb/ChangeLog:
2016-07-26  Pedro Alves  <palves@redhat.com>

	* nat/linux-ptrace.c: Include "gregset.h".
	(linux_ptrace_test_ret_to_nx): Use PTRACE_GETREGS instead of
	PTRACE_PEEKUSER.
2016-07-26 19:38:13 +01:00
Pedro Alves
9cf12d57c5 Fix PR gdb/20287 - x32 and "gdb_static_assert (sizeof (nat_siginfo_t) == sizeof (siginfo_t))"
Building an x32 gdb trips on a static assertion:

  In file included from .../src/gdb/common/common-defs.h:71:0,
		   from .../src/gdb/nat/amd64-linux-siginfo.c:21:
  .../src/gdb/common/gdb_assert.h:26:66: error: size of array ‘never_defined_just_used_for_checking’ is negative
     extern int never_defined_just_used_for_checking[(expr) ? 1 : -1]
								    ^
  .../src/gdb/nat/amd64-linux-siginfo.c:113:1: note: in expansion of macro ‘gdb_static_assert’
   gdb_static_assert (sizeof (nat_siginfo_t) == sizeof (siginfo_t));
   ^

The problem is that the way nat_siginfo_t is defined, it can only
match the host's siginfo_t object when gdb is built as a 64-bit
program.

Several bits of nat_siginfo_t are off:

- nat_siginfo_t's _pad field's definition is:

   int _pad[((128 / sizeof (int)) - 4)];

  while /usr/include/bits/siginfo.h has:

   # define __SI_MAX_SIZE     128
   # if __WORDSIZE == 64
   #  define __SI_PAD_SIZE     ((__SI_MAX_SIZE / sizeof (int)) - 4)
   # else
   #  define __SI_PAD_SIZE     ((__SI_MAX_SIZE / sizeof (int)) - 3)
   # endif

  and __WORDSIZE == 32 for x32.  This is what causes the size of
  nat_siginfo_t to be wrong and the assertion to fail.

- the nat_clock_t type is incorrect for 64-bit.  We have this:

   /* For native 64-bit, clock_t in _sigchld is 64bit aligned at 4 bytes.  */
   typedef long __attribute__ ((__aligned__ (4))) nat_clock_t;

  however, /usr/include/bits/siginfo.h has:

   # if defined __x86_64__ && __WORDSIZE == 32
   /* si_utime and si_stime must be 4 byte aligned for x32 to match the
      kernel.  We align siginfo_t to 8 bytes so that si_utime and si_stime
      are actually aligned to 8 bytes since their offsets are multiple of
      8 bytes.  */
   typedef __clock_t __attribute__ ((__aligned__ (4))) __sigchld_clock_t;
   #  define __SI_ALIGNMENT __attribute__ ((__aligned__ (8)))
   # else
   typedef __clock_t __sigchld_clock_t;
   #  define __SI_ALIGNMENT
   # endif

  So we're currently forcing 4-byte alignment on clock_t, when it
  should only be so for x32, not 64-bit.

The fix:

 - Leaves nat_siginfo_t strictly for the 64-bit ABI.

 - Adds a new typedef for the siginfo type that ptrace uses
   (ptrace_siginfo_t).  An x32 gdb always gets/sets an x32 siginfo_t
   type with PTRACE_GETSIGINFO/PTRACE_SETSIGINFO.

 - Uses this new ptrace_siginfo_t type instead of nat_siginfo_t as the
   intermediate conversion type.

gdb/ChangeLog:
2016-07-26  Pedro Alves  <palves@redhat.com>

	* amd64-linux-nat.c (amd64_linux_siginfo_fixup): Rename 'native'
	parameter to 'ptrace'.
	* nat/amd64-linux-siginfo.c (GDB_SI_SIZE): New define.
	(nat_uptr_t): New an unsigned long.
	(nat_clock_t): Remove attribute __aligned__.
	(struct nat_timeval): Delete.
	(nat_siginfo_t): Remove attribute __aligned__.
	(ptrace_siginfo_t): Define.
	(compat_siginfo_from_siginfo, siginfo_from_compat_siginfo)
	(compat_x32_siginfo_from_siginfo)
	(siginfo_from_compat_x32_siginfo): Make 'from' parameter const.
	Convert through a ptrace_siginfo_t instead of a nat_siginfo_t.
	Remove casts.
	(amd64_linux_siginfo_fixup_common): Rename 'native' parameter to
	'ptrace'.  Remove static assertions.
	(top level): New static assertions.

gdb/gdbserver/ChangeLog:
2016-07-26  Pedro Alves  <palves@redhat.com>

	* linux-x86-low.c (x86_siginfo_fixup): Rename 'native' parameter
	to 'ptrace'.
2016-07-26 19:35:40 +01:00
Igor Kudrin
d0d4152fa5 Add support for creating uuid based build-id's in a MinGW32 environment.
ld	* ldbuildid.c: Changes for MinGW32:
	Include windows.h and rpcdce.h.
	(validate_build_id_style): Allow "uuid" style.
	(generate_build_id): Fill in id_bits using UuidCreate().
2016-07-26 17:01:06 +01:00