Alan Modra
4b95cf5c0c
Update copyright years
2014-03-05 22:16:15 +10:30
Yufeng Zhang
f17c8bfcc8
opcodes/
...
* aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
gas/testsuite/
* gas/aarch64/fp-const0-parsing.s: New test.
* gas/aarch64/fp-const0-parsing.d: Likewise.
2014-02-27 15:06:56 +00:00
Yufeng Zhang
68a6428382
gas/
...
* config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
gas/testsuite/
* gas/aarch64/alias.s: Add tests.
* gas/aarch64/alias.d: Update.
* gas/aarch64/no-aliases.d: Update.
* gas/aarch64/diagnostic.s: Add tests.
* gas/aarch64/diagnostic.l: Update.
* gas/aarch64/illegal.s: Add tests.
* gas/aarch64/illegal.l: Update.
include/opcode/
* aarch64.h (enum aarch64_operand_class): Add AARCH64_OPND_CLASS_COND.
(enum aarch64_opnd): Add AARCH64_OPND_COND1.
opcodes/
* aarch64-dis.c (convert_ubfm_to_lsl): Check for cond != '111x'.
(convert_from_csel): Likewise.
* aarch64-opc.c (operand_general_constraint_met_p): Handle
AARCH64_OPND_CLASS_COND and AARCH64_OPND_COND1.
(aarch64_print_operand): Handle AARCH64_OPND_COND1.
* aarch64-tbl.h (aarch64_opcode_table): Use COND1 instead of
COND for cinc, cset, cinv, csetm and cneg.
(AARCH64_OPERANDS): Add entry for AARCH64_OPND_COND1.
* aarch64-asm-2.c: Re-generated.
* aarch64-dis-2.c: Ditto.
* aarch64-opc-2.c: Ditto.
2013-11-05 20:50:18 +00:00
Yufeng Zhang
e60bb1dd35
include/opcode/
...
* aarch64.h (AARCH64_FEATURE_CRC): New macro.
opcodes/
* aarch64-tbl.h (QL_I3SAMEW, QL_I3WWX): New macros.
(aarch64_feature_crc): New static.
(CRC): New macro.
(aarch64_opcode_table): Add entries for the crc32b, crc32h, crc32w,
crc32x, crc32cb, crc32ch, crc32cw and crc32cx instructions.
* aarch64-asm-2.c: Re-generate.
* aarch64-dis-2.c: Ditto.
* aarch64-opc-2.c: Ditto.
gas/
* config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
gas/testsuite/
* gas/aarch64/crc32.s: New test.
* gas/aarch64/crc32.d: Ditto.
2013-02-28 19:18:40 +00:00
Yufeng Zhang
e30181a58d
include/opcode/
...
2013-01-30 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64.h (aarch64_op): Add OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2.
opcodes/
2013-01-30 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64-tbl.h (aarch64_opcode_table): Flag sshll, sshll2, ushll and
ushll2 with F_HAS_ALIAS. Add entries for sxtl, sxtl2, uxtl and uxtl2.
* aarch64-asm.c (convert_xtl_to_shll): New function.
(convert_to_real): Handle OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2 by
calling convert_xtl_to_shll.
* aarch64-dis.c (convert_shll_to_xtl): New function.
(convert_to_alias): Handle OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2 by
calling convert_shll_to_xtl.
* aarch64-gen.c: Update copyright year.
* aarch64-asm-2.c: Re-generate.
* aarch64-dis-2.c: Re-generate.
* aarch64-opc-2.c: Re-generate.
gas/testsuite/
2013-01-30 Yufeng Zhang <yufeng.zhang@arm.com>
* gas/aarch64/alias.s: Add new tests.
* gas/aarch64/alias.d: Update.
* gas/aarch64/no-aliases.d: Update.
2013-01-30 15:43:32 +00:00
Yufeng Zhang
f5555712ba
include/opcode/
...
2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64.h (aarch64_op): Remove OP_V_MOVI_B.
opcodes/
2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Handle 8-bit MOVI.
* aarch64-dis.c (aarch64_ext_advsimd_imm_modified): Likewise.
* aarch64-opc.c (operand_general_constraint_met_p): For
AARCH64_MOD_LSL, move the range check on the shift amount before the
alignment check; change to call set_sft_amount_out_of_range_error
instead of set_imm_out_of_range_error.
* aarch64-tbl.h (QL_SIMD_IMM_B): Replace NIL with LSL.
(aarch64_opcode_table): Remove the OP enumerator from the asimdimm
8-bit MOVI entry; change the 2nd operand from SIMD_IMM to
SIMD_IMM_SFT.
gas/
2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
* config/tc-aarch64.c (output_operand_error_record): Change to output
the out-of-range error message as value-expected message if there is
only one single value in the expected range.
(programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
LSL #0 as a programmer-friendly feature.
gas/testsuite/
2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
* gas/aarch64/diagnostic.l: Update.
* gas/aarch64/movi.s: Add tests.
* gas/aarch64/movi.d: Update.
* gas/aarch64/programmer-friendly.s: Add comment.
2013-01-17 16:09:44 +00:00
Yufeng Zhang
fb098a1efc
opcodes/
...
2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64-opc.c (aarch64_print_operand): Change to print
AARCH64_OPND_IMM_MOV in hexadecimal in the instruction and in decimal
in comment.
* aarch64-tbl.h (aarch64_opcode_table): Remove the 'F_PSEUDO' flag
from the opcode entries of OP_MOV_IMM_LOG, OP_MOV_IMM_WIDEN and
OP_MOV_IMM_WIDE.
gas/testsuite/
2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com>
* gas/aarch64/int-insns.d: Update.
* gas/aarch64/mov.d: Update.
* gas/aarch64/reloc-insn.d: Update.
ld/testsuite/
2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com>
* ld-aarch64/emit-relocs-264.d: Append the '-Mno-aliases' option to
the objdump directive.
* ld-aarch64/emit-relocs-266.d: Ditto.
* ld-aarch64/emit-relocs-268.d: Ditto.
* ld-aarch64/emit-relocs-269.d: Ditto.
* ld-aarch64/emit-relocs-270.d: Ditto.
* ld-aarch64/emit-relocs-271.d: Ditto.
* ld-aarch64/emit-relocs-272.d: Ditto.
2013-01-04 14:59:33 +00:00
Nick Clifton
a06ea96464
Add support for 64-bit ARM architecture: AArch64
2012-08-13 14:52:54 +00:00