So far we only had an instruction flag which made an arbitrary number
of operands optional. This limits error checking capabilities for
instructions marked that way. With this patch the optparm flag only
allows a single optional parameter and another one is added (optparm2)
allowing 2 optional arguments. Hopefully we won't need more than that
in the future. So far there will be only a single use of optparm2.
gas/ChangeLog:
2017-05-30 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/tc-s390.c (md_gather_operands): Support new optparm2
instruction flag.
include/ChangeLog:
2017-05-30 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* opcode/s390.h: Add new instruction flags optparm2.
opcodes/ChangeLog:
2017-05-30 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* s390-dis.c (s390_print_insn_with_opcode): Support new optparm2
instruction flag.
* s390-mkopc.c (main): Recognize the new instruction flag when
parsing instruction list.
This commit adds support to GDB so that it can modify the disassembler-options
value that is passed to the disassembler, similar to objdump's -M option.
Currently, the only supported targets are ARM, PowerPC and S/390, but
adding support for a new target(s) is not difficult.
include/
* dis-asm.h (disasm_options_t): New typedef.
(parse_arm_disassembler_option): Remove prototype.
(set_arm_regname_option): Likewise.
(get_arm_regnames): Likewise.
(get_arm_regname_num_options): Likewise.
(disassemble_init_s390): New prototype.
(disassembler_options_powerpc): Likewise.
(disassembler_options_arm): Likewise.
(disassembler_options_s390): Likewise.
(remove_whitespace_and_extra_commas): Likewise.
(disassembler_options_cmp): Likewise.
(next_disassembler_option): New inline function.
(FOR_EACH_DISASSEMBLER_OPTION): New macro.
opcodes/
* disassemble.c Include "safe-ctype.h".
(disassemble_init_for_target): Handle s390 init.
(remove_whitespace_and_extra_commas): New function.
(disassembler_options_cmp): Likewise.
* arm-dis.c: Include "libiberty.h".
(NUM_ELEM): Delete.
(regnames): Use long disassembler style names.
Add force-thumb and no-force-thumb options.
(NUM_ARM_REGNAMES): Rename from this...
(NUM_ARM_OPTIONS): ...to this. Use ARRAY_SIZE.
(get_arm_regname_num_options): Delete.
(set_arm_regname_option): Likewise.
(get_arm_regnames): Likewise.
(parse_disassembler_options): Likewise.
(parse_arm_disassembler_option): Rename from this...
(parse_arm_disassembler_options): ...to this. Make static.
Use new FOR_EACH_DISASSEMBLER_OPTION macro to scan over options.
(print_insn): Use parse_arm_disassembler_options.
(disassembler_options_arm): New function.
(print_arm_disassembler_options): Handle updated regnames.
* ppc-dis.c: Include "libiberty.h".
(ppc_opts): Add "32" and "64" entries.
(ppc_parse_cpu): Use ARRAY_SIZE and disassembler_options_cmp.
(powerpc_init_dialect): Add break to switch statement.
Use new FOR_EACH_DISASSEMBLER_OPTION macro.
(disassembler_options_powerpc): New function.
(print_ppc_disassembler_options): Use ARRAY_SIZE.
Remove printing of "32" and "64".
* s390-dis.c: Include "libiberty.h".
(init_flag): Remove unneeded variable.
(struct s390_options_t): New structure type.
(options): New structure.
(init_disasm): Rename from this...
(disassemble_init_s390): ...to this. Add initializations for
current_arch_mask and option_use_insn_len_bits_p. Remove init_flag.
(print_insn_s390): Delete call to init_disasm.
(disassembler_options_s390): New function.
(print_s390_disassembler_options): Print using information from
struct 'options'.
* po/opcodes.pot: Regenerate.
binutils/
* objdump.c (main): Use remove_whitespace_and_extra_commas.
gdb/
* NEWS: Mention new set/show disassembler-options commands.
* doc/gdb.texinfo: Document new set/show disassembler-options commands.
* disasm.c: Include "arch-utils.h", "gdbcmd.h" and "safe-ctype.h".
(prospective_options): New static variable.
(gdb_disassembler::gdb_disassembler): Initialize
m_di.disassembler_options.
(gdb_buffered_insn_length_init_dis): Initilize di->disassembler_options.
(get_disassembler_options): New function.
(set_disassembler_options): Likewise.
(set_disassembler_options_sfunc): Likewise.
(show_disassembler_options_sfunc): Likewise.
(disassembler_options_completer): Likewise.
(_initialize_disasm): Likewise.
* disasm.h (get_disassembler_options): New prototype.
(set_disassembler_options): Likewise.
* gdbarch.sh (gdbarch_disassembler_options): New variable.
(gdbarch_verify_disassembler_options): Likewise.
* gdbarch.c: Regenerate.
* gdbarch.h: Likewise.
* arm-tdep.c (num_disassembly_options): Delete.
(set_disassembly_style): Likewise.
(arm_disassembler_options): New static variable.
(set_disassembly_style_sfunc): Convert short style name into long
option name. Call set_disassembler_options.
(show_disassembly_style_sfunc): New function.
(arm_gdbarch_init): Call set_gdbarch_disassembler_options and
set_gdbarch_verify_disassembler_options.
(_initialize_arm_tdep): Delete regnames variable and update callers.
(arm_disassembler_options): Initialize.
(disasm_options): New variable.
(num_disassembly_options): Rename from this...
(num_disassembly_styles): ...to this. Compute by scanning through
disasm_options.
(valid_disassembly_styles): Initialize using disasm_options.
Remove calls to parse_arm_disassembler_option, get_arm_regnames and
set_arm_regname_option.
Pass show_disassembly_style_sfunc to the "disassembler" setshow command.
* rs6000-tdep.c (powerpc_disassembler_options): New static variable.
(rs6000_gdbarch_init): Call set_gdbarch_disassembler_options and
set_gdbarch_verify_disassembler_options.
* s390-tdep.c (s390_disassembler_options): New static variable.
(s390_gdbarch_init):all set_gdbarch_disassembler_options and
set_gdbarch_verify_disassembler_options.
gdb/testsuite/
* gdb.arch/powerpc-power.exp: Delete test.
* gdb.arch/powerpc-power.s: Likewise.
* gdb.disasm/disassembler-options.exp: New test.
* gdb.arch/powerpc-altivec.exp: Likewise.
* gdb.arch/powerpc-altivec.s: Likewise.
* gdb.arch/powerpc-altivec2.exp: Likewise.
* gdb.arch/powerpc-altivec2.s: Likewise.
* gdb.arch/powerpc-altivec3.exp: Likewise.
* gdb.arch/powerpc-altivec3.s: Likewise.
* gdb.arch/powerpc-power7.exp: Likewise.
* gdb.arch/powerpc-power7.s: Likewise.
* gdb.arch/powerpc-power8.exp: Likewise.
* gdb.arch/powerpc-power8.s: Likewise.
* gdb.arch/powerpc-power9.exp: Likewise.
* gdb.arch/powerpc-power9.s: Likewise.
* gdb.arch/powerpc-vsx.exp: Likewise.
* gdb.arch/powerpc-vsx.s: Likewise.
* gdb.arch/powerpc-vsx2.exp: Likewise.
* gdb.arch/powerpc-vsx2.s: Likewise.
* gdb.arch/powerpc-vsx3.exp: Likewise.
* gdb.arch/powerpc-vsx3.s: Likewise.
* gdb.arch/arm-disassembler-options.exp: Likewise.
* gdb.arch/powerpc-disassembler-options.exp: Likewise.
* gdb.arch/s390-disassembler-options.exp: Likewise.
Unknown instructions are currently just dumped as .long 1234. On
S/390 we can do a bit better since the instruction length is encoded
in the opcode. That way also unknown instructions can be skipped
according to their real length. That way we can continue correctly
after that instruction. However, there are also some drawbacks with
that behavior when dumping data. So for now that behavior is only
enabled for text section but even there it might mess things up when
having a literal pool embedded in the code. Therefore I've left the
feature disabled by default and have added the -Minsnlength option to
enable it explicitely.
opcodes/ChangeLog:
2016-06-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* s390-dis.c (option_use_insn_len_bits_p): New file scope
variable.
(init_disasm): Handle new command line option "insnlength".
(print_s390_disassembler_options): Mention new option in help
output.
(print_insn_s390): Use the encoded insn length when dumping
unknown instructions.
- 32 128 bit vector registers (overlapping with the existing 16 64 bit
floating point registers)
- vector double instructions
- vector integer instructions
- scalar vector instructions (allowing to have more floating point
registers for scalar operations)
- vector string instructions
gas/ChangeLog:
* config/tc-s390.c (struct pd_reg): Remove.
(pre_defined_registers): Remove.
(REG_NAME_CNT): Remove.
(reg_name_search): Calculate the register number instead of doing
a lookup.
(register_name, tc_s390_regname_to_dw2regnum): Adopt to the new
reg_name_search signature.
(s390_parse_cpu): Support the new arch string z13.
(s390_insert_operand): Support for vector registers with the extra
field for the fifth bit of each vector register operand.
(md_gather_operand): Adjust to the new handling of optional
parameters.
* doc/as.texinfo: Document the z13 cpu string.
gas/testsuite/ChangeLog:
* gas/s390/esa-g5.d: Add a variant without the optional operand.
* gas/s390/esa-g5.s: Likewise.
* gas/s390/esa-z9-109.d: Likewise.
* gas/s390/esa-z9-109.s: Likewise.
* gas/s390/zarch-z9-109.d: Likewise.
* gas/s390/zarch-z9-109.s: Likewise.
* gas/s390/zarch-z10.d: For variants with a zero optional argument
it is not dumped by objdump anymore.
* gas/s390/zarch-zEC12.d: Likewise.
* gas/s390/zarch-z13.d: New file.
* gas/s390/zarch-z13.s: New file.
* gas/s390/s390.exp: Run the test for the z13 files.
include/opcode/ChangeLog:
* s390.h (s390_opcode_cpu_val): Add S390_OPCODE_Z13.
ld/testsuite/ChangeLog:
* ld-s390/tlsbin.dd: The nopr register operand is optional and not
printed if 0 anymore.
opcodes/ChangeLog:
* s390-dis.c (s390_extract_operand): Support vector register
operands.
(s390_print_insn_with_opcode): Support new operands types and add
new handling of optional operands.
* s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove
and include opcode/s390.h instead.
(struct op_struct): New field `flags'.
(insertOpcode, insertExpandedMnemonic): New parameter `flags'.
(dumpTable): Dump flags.
(main): Parse flags from the s390-opc.txt file. Add z13 as cpu
string.
* s390-opc.c: Add new operands types, instruction formats, and
instruction masks.
(s390_opformats): Add new formats for .insn.
* s390-opc.txt: Add new instructions.
readability and also fixes some minor issues.
S/390: Split disassembler routine into smaller functions
S/390: Fix disassembler's treatment of signed/unsigned operands
S/390: Fix off-by-one error in disassembler initialization
S/390: Simplify opcode search loop in disassembler
S/390: Drop function pointer dereferences in disassembler
S/390: Various minor simplifications in disassembler
Currently the disassembler for s390 (by default) assumes that a 31-bit
binary was compiled in "ESA" mode -- and then only disassembles a
limited opcode set. The change upgrades the default to the full "zarch"
opcode set even for 31-bit binaries.
opcodes/
* s390-dis.c (init_disasm): Default to full 'zarch' opcode
availability even for 31-bit programs.
* s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
(main): Likewise.
* s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
and 4 bit optional masks.
(INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
(MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
(s390_opformats): Likewise.
* s390-opc.txt: Add new instructions for cpu type z9-109.
S390_OPCODE_ZARCH.
(print_insn_s390): Use new modes field of s390_opcodes.
* s390-mkopc.c (ARCHBITS_ESAONLY, ARCHBITS_ESA, ARCHBITS_ESAME): Remove.
(s390_opcode_mode_val, s390_opcode_cpu_val): New enums.
(struct op_struct): Remove archbits. Add mode_bits and min_cpu.
(insertOpcode): Replace archbits by min_cpu and mode_bits.
(dumpTable): Write mode_bits and min_cpu instead of archbits.
(main): Adapt to new format in s390-opcode.txt.
* s390-opc.c (s390_opformats): Replace archbits by min_cpu and
mode_bits.
* s390-opc.txt: Replace archbits by min_cpu and mode_bits.
