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Author SHA1 Message Date
Michael Snyder e343a93ac0 2003-07-23 Michael Snyder <msnyder@redhat.com> 
* gencode.c: A few more fix-ups of refs and defs.
        (frchg): Raise SIGILL if in double-precision mode.
        (ldtlb): We don't simulate cache, so this is a no-op.
        (movsxy_tab): Correct a few bit pattern errors.
 2003-07-24 00:38:07 +00:00
Michael Snyder 1b606171ad 2003-07-09 Michael Snyder <msnyder@redhat.com> 
* gencode.c (prnd): Clear LSW of result to zeros.
 2003-07-23 21:47:28 +00:00
Michael Snyder b2bc310144 2003-07-23 Michael Snyder <msnyder@redhat.com> 
* pmuls.s: New	file.
 2003-07-23 21:45:36 +00:00
Michael Snyder fcfae95cf8 2003-07-09 Michael Snyder <msnyder@redhat.com> 
* gencode.c (pmuls): Expression is mis-parenthesized.
 2003-07-23 21:43:50 +00:00
Michael Snyder ac78c4ba99 2003-07-09 Michael Snyder <msnyder@redhat.com> 
* configure.in: Add testsuite to extra_subdirs for sh.
	* configure: Regenerate.
 2003-07-23 21:41:30 +00:00
Michael Snyder b7c7b62431 2003-07-09 Michael Snyder <msnyder@redhat.com> 
* sim/sh: New directory.  Tests for Renesas sh family.
 2003-07-23 21:41:09 +00:00
Michael Snyder 20358547b7 2003-07-08 Michael Snyder <msnyder@redhat.com> 
* allinsn.exp, testutils.inc, add.s, fabs.s, fadd.s, fcmpeq.s,
	fcmpgt.s, fcnvds.s, fcnvsd.s, fdiv.s, fldi0.s, fldi1.s, flds.s,
	float.s, fmac.s, fmov.s, fmul.s, fneg.s, frchg.s, fschg.s,
	fsqrt.s, fsub.s, ftrc.s, shll16.s, shll2.s, shll8.s, shll.s,
	shlr16.s, shlr2.s, shlr8.s, shlr.s, swap.s: New files.
 2003-07-23 21:40:43 +00:00
Michael Snyder c13a4caaf8 2003-07-09 Michael Snyder <msnyder@redhat.com> 
* gencode.c (ppi_gensim): For a conditional ppi insn, if the
        condition is false, we want to return (not break).  A break
        will take us to the end of the function where registers will
	be updated, whereas the desired outcome is for nothing to change.
 2003-07-23 21:28:06 +00:00
Michael Snyder b939d772c1 2003-06-27 Michael Snyder <msnyder@redhat.com> 
* gencode.c (op tab): Some fix-ups of refs and defs.
        (ocbi, ocbp): Cache not simulated, but may cause memory fault.
        (gensym_caselist): Add default case to switch statement.
        (expand_ppi_code): Add default case to switch statement.
 2003-07-23 21:25:41 +00:00
Michael Snyder d2f18ae42a 2003-06-27 Michael Snyder <msnyder@redhat.com> 
* gencode.c (op tab): Implement movca.l.
 2003-07-23 21:23:32 +00:00
Michael Snyder 9e1d0fc1a1 2003-06-27 Michael Snyder <msnyder@redhat.com> 
* gencode.c (op movsxy_tab): Fix an error in the bit pattern.
 2003-07-23 21:17:33 +00:00
Michael Snyder 15dee5d561 2003-06-27 Michael Snyder <msnyder@redhat.com> 
* gencode.c (gensim_caselist): The movy instructions use
        registers R6 and R7 (not R4 and R5 like the movx insns).
 2003-07-23 21:14:54 +00:00
Michael Snyder e22fef83d7 2003-07-22 Michael Snyder <msnyder@redhat.com> 
* compile.c (sim_resume): Revert 6-24 change, it does not
        work with gdb breakpoints.
 2003-07-22 19:07:30 +00:00
Michael Snyder 55acb21b1f 2003-07-17 Michael Snyder <msnyder@redhat.com> 
* compile.c (sim_resume): Handle shll reg, reg and shlr reg, reg.
 2003-07-18 00:10:41 +00:00
Michael Snyder 0f42aa719d 2003-07-17 Michael Snyder <msnyder@redhat.com> 
* compile.c (decode): IMM16 is always zero-extended.
 2003-07-18 00:08:23 +00:00
Michael Snyder e53a5a69d7 2003-07-03 Michael Snyder <msnyder@redhat.com> 
* gencode.c (movs): Fix a couple of text transpositions.
 2003-07-04 00:03:52 +00:00
Michael Snyder f0861129d5 2003-06-24 Michael Snyder <msnyder@redhat.com> 
* sim-main.h (SIM_WIFSTOPPED, SIM_WSTOPSIG): Define.
	* compile.c (sim_resume): Use the above to return stop signal.
 2003-07-02 19:04:58 +00:00
Michael Snyder 0b2828595e 2003-06-27 Michael Snyder <msnyder@redhat.com> 
* gencode.c (op movsxy_tab): Fix up some copy/paste errors
        in name: s/REG_x/REG_y/.
 2003-06-28 01:34:47 +00:00
Michael Snyder 8dc30ef74a 2003-06-27 Michael Snyder <msnyder@redhat.com> 
* gencode.c (op tab): Move misplaced semicolon.
 2003-06-27 21:18:42 +00:00
Michael Snyder ac59bf8dbf 2003-06-23 Michael Snyder <msnyder@redhat.com> 
* nrun.c (main): Delete h8/300 ifdef (sim now handles signals).
 2003-06-23 18:03:17 +00:00
Michael Snyder 72f536bd78 2003-06-23 Michael Snyder <msnyder@redhat.com> 
* sim-reg.c: Fix cut-and-paste bug in comment.
 2003-06-23 17:59:08 +00:00
Andrew Cagney 345d88d96e 2003-06-22 Andrew Cagney <cagney@redhat.com> 
Written by matthew green <mrg@redhat.com>, with fixes from Aldy
	Hernandez <aldyh@redhat.com>, Jim Wilson <wilson@redhat.com>, and
	Nick Clifton <nickc@redhat.com>.

	* ppc-instructions: Include altivec.igen and e500.igen.
	(model_busy, model_data): Add vr_busy and vscr_busy.
	(model_trace_release): Trace vr_busy and vscr_busy.
	(model_new_cycle): Update vr_busy and vscr_busy.
	(model_make_busy): Update vr_busy and vscr_busy.
	* registers.c (register_description): Add Altivec and e500
	registers.
	* psim.c (psim_read_register, psim_read_register): Handle Altivec
	and e500 registers.
	* ppc-spr-table (SPEFSCR): Add VRSAVE and SPEFSCR registers.
	* configure.in (sim_filter): When *altivec* add "av".  When *spe*
	or *simd* add e500.
	(sim_float): When *altivec* define WITH_ALTIVEC.  When *spe* add
	WITH_E500.
	* configure: Re-generate.
	* e500.igen, altivec.igen: New files.
	* e500_expression.h, altivec_expression.h: New files.
	* idecode_expression.h: Update copyright.  Include
	"e500_expression.h" and "altivec_expression.h".
	* e500_registers.h, altivec_registers.h: New files.
	* registers.h: Update copyright.  Include "e500_registers.h" and
	"altivec_registers.h".
	(registers): Add Altivec and e500 specific registers.
	* Makefile.in (IDECODE_H): Add "idecode_e500.h" and
	"idecode_altivec.h".
	(REGISTERS_H): Add "e500_registers.h" and "altivec_registers.h".
	(tmp-igen): Add dependencies on altivec.igen and e500.igen .
 2003-06-22 16:48:12 +00:00
Andrew Cagney ea0869653a 2003-06-22 Andrew Cagney <cagney@redhat.com> 
* interp.c (xfer_mem): Simplify.  Only do a single partial
	transfer.  Problem reported by Tom Rix.
 2003-06-22 13:38:28 +00:00
Andrew Cagney 1f1b28179f 2003-06-22 Andrew Cagney <cagney@redhat.com> 
From matthew green <mrg@redhat.com>:
        * sim-fpu.h: Update copyright.
	(sim_fpu_fraction, sim_fpu_guard): New prototypes.
        * sim-fpu.c: Update copyright.
	(sim_fpu_fraction, sim_fpu_guard): New inline functions.
 2003-06-22 13:36:26 +00:00
Andrew Cagney 4056a1ef29 Oops! Committed to much, reverting :-( 2003-06-22 13:31:57 +00:00
Andrew Cagney 89c0d7ddd7 Fix changelog 2003-06-22 13:29:17 +00:00
Andrew Cagney 911b23336b 2003-06-22 Andrew Cagney <cagney@redhat.com> 
Problems reported by Joshua LeVasseur.
	* emul_chirp.c: Update copyright.
	(chirp_emul_nextprop): Return the first property.
	* hw_htab.c: Update copyright.
	(htab_decode_hash_table): Fix check for htab size.
 2003-06-22 13:03:40 +00:00
Andrew Cagney 945d18fb9c 2003-06-21 Andrew Cagney <cagney@redhat.com> 
* interrupts.c: Update copyright.
	(external_interrupt): Fix test for already pending interrupt.
	Problem found by Joshua LeVasseur.
 2003-06-22 04:03:15 +00:00
Andrew Cagney 21f86aab13 2003-06-21 Andrew Cagney <cagney@redhat.com> 
* ppc-instructions: Add missing +8 line.  Found by blofeldus at
	yahoo.com.
 2003-06-22 01:52:34 +00:00
Andrew Cagney 0f2f1341dd 2003-06-21 Andrew Cagney <cagney@redhat.com> 
From Ian Lance Taylor <ian@airs.com>:
        * hw_nvram.c (hw_nvram_init_address): Correct call to memset--swap
        second and third arguments.
 2003-06-22 01:16:38 +00:00
Andrew Cagney 61ca1de73a 2003-06-21 Andrew Cagney <cagney@redhat.com> 
* hw_com.c (hw_com_device_init_data): Check that the output, and
	not input file opened.  Pointed out by masahino tky3.3web.ne.jp.
 2003-06-22 00:51:44 +00:00
Frank Ch. Eigler 6ec8fa7a80 2003-06-17 Doug Evans <dje@sebabeach.org> 
* cgen-trace.h (sim_disasm_read_memory): Update args to be compatible
	with disassemble_info:read_memory_func.
	* cgen-trace.c (sim_disasm_read_memory): Ditto.
 2003-06-20 17:27:10 +00:00
Andrew Cagney 601cecf016 2003-06-20 Andrew Cagney <cagney@redhat.com> 
* sim_calls.c (sim_create_inferior): Assert that
	psim_write_register succeeded.
	(sim_fetch_register, sim_store_register): Make "regname" constant.
	Delete Altivec hack.  Return result from psim_read_register /
	psim_write_register.
	* psim.h (psim_read_register, psim_write_register): Change return
	type to int.  Update comments.
	* psim.c: Update copyright.
	(psim_stack): Assert that the psim_read_register worked.
	(psim_read_register, psim_read_register): Return the register's
	size.  Allocate the cooked buffer dynamically.
	* hw_register.c: Update copyright.
	(do_register_init): Check that psim_write_register succeeded.
	* hw_init.c: Update copyright.
	(create_ppc_elf_stack_frame, create_ppc_aix_stack_frame): Assert
	that the register transfer worked.
 2003-06-20 13:32:34 +00:00
Andrew Cagney d81bb16ac0 2003-06-19 Andrew Cagney <cagney@redhat.com> 
* ld-insn.h: Update copyright.
	(cache_fields): Define.
	(insn_table_fields): Add insn_field_6 and insn_field_7.
	(load_insn_table): Pass in the "cache_rules".
	* ld-insn.c: Update copyright.
	(load_insn_table): Add parameter "cache_rules".  Handle "cache",
	"computed" and "scratch" fields.
	(main): Pass "cache_rules" to load_insn_table.
	* ld-cache.h: Update copyright.
	(append_cache_table): Declare.
	* ld-cache.c: Update copyright.
	(append_cache_table): New function.
	(load_cache_table): Call.
	* gen-model.c: Include "ld-cache.h".
	* gen-itable.c: Include "ld-cache.h".
	* igen.c: Move #include "ld-cache.h" to earlier.  Update
	copyright.
	(main): Permit a NULL "cache_rules".  Pass address of
	"cache_rules" to load_insn_table.
	* Makefile.in (tmp-ld-insn): Add "ld-cache.o".
	(tmp-igen): Do not include ppc-cache-rules.
	(gen-itable.o, gen-model.o): Add "ld-cache.h".
	* ppc-cache-rules: Delete file.
	* ppc-instructions: Add cache rules.
 2003-06-20 03:59:33 +00:00
Andrew Cagney 8d64d0fdca 2003-06-19 Andrew Cagney <cagney@redhat.com> 
* Makefile.in (ICACHE_CFLAGS, SEMANTICS_CFLAGS): Delete.
	(SIM_FPU_FLAGS): Define.
	(icache.o): Delete explicit compile command.
	(semantics.o, idecode.o): Delete explicit compile command.
	(NOWARN_CFLAGS, STD_CFLAGS): Append SIM_FPU_CFLAGS.
	* gen-support.c (gen_support_c): Generate #include of
	"sim-inline.h" and "sim-fpu.h", but conditional on
	HAVE_COMMON_FPU.
	* gen-idecode.c (gen_idecode_c): Ditto.
	* igen.c (gen_icache_c, gen_semantics_c): Wrap #include of
	"sim-inline.h" and "sim-fpu.h" in HAVE_COMMON_FPU conditional.
	Move to before "support.h".
	* Makefile.in, gen-support.c, gen-idecode.c, igen.c: Update
	copyright.
 2003-06-19 18:42:30 +00:00
Michael Snyder 3df3a316d3 2003-05-30 Alexandre Oliva <aoliva@redhat.com> 
* allinsn.exp: Fix typos introduced on 2003-05-27.

2003-05-29  Michael Snyder  <msnyder@redhat.com>

	* tas.s: Use er4 for h8h and h8s, er3 for h8sx.

2003-05-28  Michael Snyder  <msnyder@redhat.com>

	* subs.s: New file.
	* subx.s: New file.
	* allinsn.exp: Add new subs and subx tests.
	* testutils.inc: Simplify (and fix) set_carry_flag.
	(clear_carry_flag, set_zero_flag, clear_zero_flag...): New macros.
	* addx.s: Use simplified set_carry_flag.

2003-05-27  Michael Snyder  <msnyder@redhat.com>

	* tas.s: New file.
	* band.s: New file.
	* biand.s: New file.
	* allinsn.exp: Add tas, band, biand tests.
	* brabc.s: Add abs8 test.
	* bset.s: Add bset/ne, bclr/ne tests.

2003-05-23  Michael Snyder  <msnyder@redhat.com>

	* and.b.s: Add andc exr.
	* or.b.s: Add orc.exr.
	* xor.b.s: Add xor exr.

	* jmp.s: Fix 8-bit indirect test.  Add 7-bit vector test.

2003-05-22  Michael Snyder  <msnyder@redhat.com>

	* stack.s: Add rte/l and rts/l tests.
	* allinsn.exp: Add stack tests.

2003-05-21  Michael Snyder  <msnyder@redhat.com>

	* stack.s: New file: test stack operations.
	* stack.s: Add bsr, jsr tests.
	* stack.s: Add trapa, rte tests.

	* div.s: Corrections for size of dividend.

2003-05-20  Michael Snyder  <msnyder@redhat.com>

	* mul.s: Corrections for unsigned multiply.

	* div.s: New file, test div instructions.
	* allinsn.exp: Add div test.

2003-05-19  Michael Snyder  <msnyder@redhat.com>

	* mul.s: New file, test mul instructions.
	* allinsn.exp: Add mul test.
 2003-06-19 02:40:12 +00:00
Michael Snyder 9f70f8ec04 2003-06-18 Michael Snyder <msnyder@redhat.com> 
* compile.c: Replace "Hitachi" with "Renesas".
        (decode): Distinguish AV_H8S from AV_H8H.
        (sim_resume): H8SX can use any register for TAS.
        (decode): Add support for VECIND.
        (sim_resume): Implement rte/l and rts/l.
        (GETSR): New macro (actually old macro reincarnated).
        (decode): Add handling for IMM2.
        (sim_resume): Drop extra block around jmp, jsr, rts.
        Add handling for trapa and rte.
        For divxu.b, change 0xffff mask to 0xff.
        (set_h8300h): Add bfd_mach_h8300sxn machine.
 2003-06-19 02:14:14 +00:00
Michael Snyder 18ad32b593 2003-06-18 Corinna Vinschen <vinschen@redhat.com> 
* sim-main.h (enum h8_regnum): Turn around order of MACH, MACL
        and SBR, VBR (for benefit of gdb).
 2003-06-19 01:54:22 +00:00
Michael Snyder 173b1c982a 2003-06-05 Michael Snyder <msnyder@redhat.com> 
* compile.c (sim_fetch_register): Handle SBR, VBR, MACH, MACL.
	(sim_store_register): Ditto.
 2003-06-19 00:49:33 +00:00
Chris Demetriou 9a1d84fb16 2003-06-17 Richard Sandiford <rsandifo@redhat.com> 
* mips.igen (do_dmultx): Fix check for negative operands.
 2003-06-18 01:12:03 +00:00
Michael Snyder 27ebfdf49b 2003-06-04 Michael Snyder <msnyder@redhat.com> 
* compile.c (sim_info): Fix typo in output.

	* h8300/compile.c (set_h8300h): Replace 'flag' arguments
	with a bfd_machine argument, and decode it inline.
	Check for bfd_mach_h8300hn and bfd_mach_h8300sn.
 2003-06-05 02:18:01 +00:00
Michael Snyder 828c9ae668 2003-06-04 Michael Snyder <msnyder@redhat.com> 
* common/run.c (main): Remove SIM_H8300 ifdef.
	(usage): Ditto.
	* common/sim-options.c (STANDARD_OPTIONS): Add SIM_H8300SX.
	(standard_options): Add '-x' for h8/300sx.
	(standard_option_handler): Add case for SIM_H8300SX.
 2003-06-05 02:17:29 +00:00
Michael Snyder e8c1a4e716 2003-06-04 Michael Snyder <msnyder@redhat.com> 
* compile.c (sim_info): Fix typo in output.
 2003-06-04 18:28:21 +00:00
Michael Snyder dc5c3759e0 2003-06-03 Michael Snyder <msnyder@redhat.com> 
* h8300/compile.c: Add h8300sx insns and addressing modes.
	* h8300/sim-main.h: Replaces h8300/inst.h.
	* h8300/Makefile.in: Tweak to bring in some sim/common stuff.
 2003-06-03 21:38:27 +00:00
Ian Lance Taylor ae451ac6d4 Use $(SHELL) whenever we invoke move-if-change. 2003-05-16 07:11:43 +00:00
Michael Snyder a27a0651eb 2003-04-13 Michael Snyder <msnyder@redhat.com> 
* sim/h8300: New directory.  Tests for Renesas h8/300 family.
 2003-05-14 22:59:12 +00:00
Michael Snyder cd44367114 New ChangeLog 2003-05-14 21:08:29 +00:00
Michael Snyder 32ebdc4ce3 2003-05-14 Michael Snyder <msnyder@redhat.com> 
* addb.s, addw.s, addl.s, addw.s, addx.s, andb.s, andw.s, andl.s,
        bfld.s, brabc.s, bra.s, bset.s, cmpb.s, cmpw.s, cmpl.s, daa.s,
        das.s, dec.s, extw.s, extl.s, inc.s, jmp.s, ldc.s, ldm.s, mac.s,
        mova.s, movb.s, movw.s, movl.s, movmd.s, movsd.s, neg.s, nop.s,
        not.s, orb.s, orw.s, orl.s, rotl.s, rotr.s, rotxl.s, rotxr.s,
        shal.s, shar.s, shll.s, shlr.s, stc.s,	subb.s, subw.s, subl.s,
        xorb.s,	xorw.s, xorl.s: New files.
        * allinsn.exp: New file.
 2003-05-14 21:07:55 +00:00
Michael Snyder 105e800205 Remove for renaming with 8.3 dos-compatible names. 2003-05-14 20:58:21 +00:00
Michael Snyder ab12e95ba6 Remove, rename using dos-compatible 8.3 names. 2003-05-14 20:01:55 +00:00