This is a fix for PR gdb/21164. The problem started to happen after:
commit 34c41c681f
Author: Doug Evans <xdje42@gmail.com>
AuthorDate: Mon Dec 19 08:33:46 2016 -0800
New syntax for mt print symbols,msymbols,psymbols.
This change introduced new syntax for the mentioned commands, and
improved the parsing of arguments by using 'gdb_buildargv'. However,
it is necessary to check if the argv being built is not NULL, which
can happen if the user doesn't provide any arguments to these
commands.
gdb/ChangeLog:
2017-02-15 Sergio Durigan Junior <sergiodj@redhat.com>
PR gdb/21164
* psymtab.c (maintenance_print_psymbols): Verify if 'argv' is not
NULL before using it.
* symmisc.c (maintenance_print_symbols): Likewise.
(maintenance_print_msymbols): Likewise.
gdb/testsuite/ChangeLog:
gdb/ChangeLog:
2017-02-15 Sergio Durigan Junior <sergiodj@redhat.com>
PR gdb/21164
* gdb.base/maint.exp: Add testcases for when the commands do
not have arguments.
"lea foo@GOT, %reg" is OK in PIC since it only loads the GOT offset
into register, which can be used later with a GOT base register to
get the value in the GOT entry.
bfd/
PR ld/21168
* elf32-i386.c (elf_i386_relocate_section): Allow
"lea foo@GOT, %reg" in PIC.
ld/
PR ld/21168
* testsuite/ld-i386/i386.exp: Run pr21168.
* testsuite/ld-i386/pr21168a.c: New file.
* testsuite/ld-i386/pr21168b.S: Likewise.
bfd/
PR ld/20244
* elf32-i386.c (elf_i386_relocate_section): Properly get IFUNC
symbol name when reporting R_386_GOT32/R_386_GOT32X relocation
error against local IFUNC symbol without a base register for
PIC.
ld/
PR ld/20244
* testsuite/ld-i386/i386.exp: Run pr20244-4a, pr20244-4b and
pr20244-4c.
* testsuite/ld-i386/pr20244-4.s: New file.
* testsuite/ld-i386/pr20244-4a.d: Likewise.
* testsuite/ld-i386/pr20244-4b.d: Likewise.
* testsuite/ld-i386/pr20244-4c.d: Likewise.
This patch adds the SVE-specific system registers.
opcodes/
* aarch64-opc.c (aarch64_sys_regs): Add SVE registers.
(aarch64_sys_reg_supported_p): Handle them.
gas/
* testsuite/gas/aarch64/sve-sysreg.s,
testsuite/gas/aarch64/sve-sysreg.d,
testsuite/gas/aarch64/sve-sysreg-invalid.d,
testsuite/gas/aarch64/sve-sysreg-invalid.l: New tests.
The documentation entry for the SVE feature incorrectly said that
it was enabled by default for ARMv8-A or later. This patch fixes
that and also mentions that +sve implies +simd. (It also implies
+fp, but that follows by transitivity.)
gas/
* doc/c-aarch64.texi: Fix sve entry.
Remove an inconsistency in linker error message processing causing that
it depends on the ability to infer the name of the originating source
file whether or not the name of the offending function is repeated by
clever formatters for each issue reported within the function.
Taking the `ld/testsuite/ld-powerpc/tocopt7.s' test case source as an
example and the `powerpc-linux' target we have:
$ as -gdwarf2 -o tocopt.o -a64 tocopt.s
$ ld -o tocopt -melf64ppc tocopt.o
tocopt.o: In function `_start':
tocopt.s:35:(.text+0x14): toc optimization is not supported for 0x3fa00000 instruction.
tocopt.s:49:(.text+0x34): toc optimization is not supported for 0x3fa00000 instruction.
$
vs:
$ as -o tocopt.o -a64 tocopt.s
$ ld -o tocopt -melf64ppc tocopt.o
tocopt.o: In function `_start':
(.text+0x14): toc optimization is not supported for 0x3fa00000 instruction.
tocopt.o: In function `_start':
(.text+0x34): toc optimization is not supported for 0x3fa00000 instruction.
$
Similarly with the `mips-linux' target and this source:
$ cat jal-global-multi-overflow.s
.text
.set noreorder
.space 0x2000
.align 4
.globl foo
.ent foo
foo:
jal bar
nor $0, $0
jal bar
nor $0, $0
.end foo
.space 0x1ff0
.align 4
.globl bar
.ent bar
bar:
jal foo
nor $0, $0
jal foo
nor $0, $0
.end bar
$ as -o jal-global-multi-overflow.o jal-global-multi-overflow.s
$ ld -Ttext 0x1fffd000 -e foo -o jal-global-multi-overflow jal-global-multi-overflow.o
jal-global-multi-overflow.o: In function `foo':
(.text+0x2000): relocation truncated to fit: R_MIPS_26 against `bar'
jal-global-multi-overflow.o: In function `foo':
(.text+0x2008): relocation truncated to fit: R_MIPS_26 against `bar'
jal-global-multi-overflow.o: In function `bar':
(.text+0x4000): relocation truncated to fit: R_MIPS_26 against `foo'
jal-global-multi-overflow.o: In function `bar':
(.text+0x4008): relocation truncated to fit: R_MIPS_26 against `foo'
$
Not only this is inconsistent, but it causes output clutter as well with
redundant information.
The cause for this is a check in `vfinfo' the intent of which is to
print the function heading whenever (among others) the name of the
source file has changed, which however does not take into account a
situation where the name couldn't have been established both now and
previously.
Adjust the check then for this situation, yielding:
$ as -o tocopt.o -a64 tocopt.s
$ ld -o tocopt -melf64ppc tocopt.o
tocopt.o: In function `_start':
(.text+0x14): toc optimization is not supported for 0x3fa00000 instruction.
(.text+0x34): toc optimization is not supported for 0x3fa00000 instruction.
$
and:
$ as -o jal-global-multi-overflow.o jal-global-multi-overflow.s
$ ld -Ttext 0x1fffd000 -e foo -o jal-global-multi-overflow jal-global-multi-overflow.o
jal-global-multi-overflow.o: In function `foo':
(.text+0x2000): relocation truncated to fit: R_MIPS_26 against `bar'
(.text+0x2008): relocation truncated to fit: R_MIPS_26 against `bar'
jal-global-multi-overflow.o: In function `bar':
(.text+0x4000): relocation truncated to fit: R_MIPS_26 against `foo'
(.text+0x4008): relocation truncated to fit: R_MIPS_26 against `foo'
$
respectively instead. Adjust the test suite accordingly.
ld/
* ldmisc.c (vfinfo): Don't print the function name again either
if no source file name has been found both now and previously.
* testsuite/ld-cris/tls-err-20x.d: Adjust accordingly.
* testsuite/ld-mips-elf/mode-change-error-1.d: Likewise.
* testsuite/ld-mips-elf/unaligned-branch.d: Likewise.
* testsuite/ld-mips-elf/unaligned-branch-mips16.d: Likewise.
* testsuite/ld-mips-elf/unaligned-branch-micromips.d: Likewise.
* testsuite/ld-mips-elf/unaligned-branch-r6-1.d: Likewise.
* testsuite/ld-mips-elf/unaligned-branch-2.d: Likewise.
* testsuite/ld-mips-elf/unaligned-branch-r6-2.d: Likewise.
* testsuite/ld-mips-elf/unaligned-branch-ignore-2.d: Likewise.
* testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d:
Likewise.
* testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d:
Likewise.
* testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d:
Likewise.
* testsuite/ld-mips-elf/unaligned-jalx-addend-1.d: Likewise.
* testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d:
Likewise.
* testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d:
Likewise.
* testsuite/ld-mips-elf/unaligned-jalx-addend-3.d: Likewise.
* testsuite/ld-mips-elf/unaligned-jump.d: Likewise.
* testsuite/ld-mips-elf/unaligned-jump-mips16.d: Likewise.
* testsuite/ld-mips-elf/unaligned-jump-micromips.d: Likewise.
* testsuite/ld-mips-elf/unaligned-lwpc-1.d: Likewise.
* testsuite/ld-mips-elf/unaligned-ldpc-1.d: Likewise.
* testsuite/ld-powerpc/tocopt.out: Likewise.
* testsuite/ld-powerpc/tocopt7.out: Likewise.
Remove an inconsistency in BFD linker error messages across the PowerPC
backends, where in the presence of line information the `%P: %H:' format
sequence makes the first error message produced for any given function
different from subsequent ones.
Taking the `ld/testsuite/ld-powerpc/tocopt7.s' test case source as an
example and the `powerpc-linux' target we have:
$ as -gdwarf2 -o tocopt.o -a64 tocopt.s
$ ld -o tocopt -melf64ppc tocopt.o
ld: tocopt.o: In function `_start':
tocopt.s:35:(.text+0x14): toc optimization is not supported for 0x3fa00000 instruction.
ld: tocopt.s:49:(.text+0x34): toc optimization is not supported for 0x3fa00000 instruction.
$
where the first error message does not have the source file name
prefixed with the linker program executable's name, i.e. `ld:', whereas
the second error message does, as would any subsequent.
This is because with a multiple-line error message such as `%H' produces
`%P' only prints the program executable's name on the first line and not
any later ones. Also the PowerPC backend is the only part of BFD which
uses `%P' along with one of the clever `%C', `%D', `%G', `%H' format
specifiers. And last but not least this breaks a GNU Coding Standard's
requirement that error messages from compilers should look like this:
source-file-name:lineno: message
also quoted in `vfinfo' code handling these specifiers.
Convert `%P: %H:' to `%H:' in error messages across the PowerPC backends
then, yielding:
$ as -gdwarf2 -o tocopt.o -a64 tocopt.s
$ ld -o tocopt -melf64ppc tocopt.o
tocopt.o: In function `_start':
tocopt.s:35:(.text+0x14): toc optimization is not supported for 0x3fa00000 instruction.
tocopt.s:49:(.text+0x34): toc optimization is not supported for 0x3fa00000 instruction.
$
instead, making it consistent and matching the GNU Coding Standard's
requirement.
bfd/
* elf32-ppc.c (ppc_elf_check_relocs): Use `%H:' rather than
`%P: %H:' with `info->callbacks->einfo'.
(ppc_elf_relocate_section): Likewise.
* elf64-ppc.c (ppc64_elf_check_relocs): Likewise.
(ppc64_elf_edit_toc): Likewise.
(ppc64_elf_relocate_section): Likewise.
Remove static NULL initializers, moving the respective variables from
data to BSS and saving some storage space.
ld/
* ldmisc.c (vfinfo) <'H'>: Remove static NULL initializers.
3d7b173c29 made upper case commands now
illegal. However gdb.cp/chained-calls.exp still contains one test using
P to print an expression. This patch fixes the testcase to use p
instead.
2017-02-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
gdb/
* gdb.cp/chained-calls.exp: Use p instead of P.
2017-02-15 Vladimir Radosavljevic <Vladimir.Radosavljevic@imgtec.com>
PR gold/21111
* mips.cc (Mips_relocate_functions::relhigher): New method.
(Mips_relocate_functions::relhighest): Likewise.
(mips_get_size_for_reloc): Add support for relocs: R_MIPS_HIGHER and
R_MIPS_HIGHEST.
(Target_mips::Scan::local): Add support for relocs: R_MIPS_HIGHER,
R_MIPS_HIGHEST, R_MICROMIPS_HIGHER and R_MICROMIPS_HIGHEST.
(Target_mips::Scan::global): Likewise.
(Target_mips::Scan::get_reference_flags): Likewise.
(Target_mips::Relocate::relocate): Call static methods for resolving
HIGHER and HIGHEST relocations.
opcodes * arc-regs.h: Distinguish some of the registers different on
ARC700 and HS38 cpus.
gas * testsuite/gas/arc/st.d: Update for 0xe having a name now
gold/
* x86_64.cc (Target_x86_64::do_can_check_for_function_pointers):
Return true even when building pie binaries.
(Target_x86_64::possible_function_pointer_reloc): Check opcode
for R_X86_64_PC32 relocations.
(Target_x86_64::local_reloc_may_be_function_pointer): Pass
extra arguments to local_reloc_may_be_function_pointer.
(Target_x86_64::global_reloc_may_be_function_pointer): Likewise.
* gc.h (gc_process_relocs): Add check for STT_FUNC.
* testsuite/Makefile.am (icf_safe_pie_test): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/icf_safe_pie_test.sh: New shell script.
sim/aarch64/
* simulator.c (do_vec_bit): Change loop limits from 16 and 8 to 4 and
2. Move test_false if inside loop. Fix logic for computing result
stored to vd.
sim/testsuite/sim/aarch64
* bit.s: New.
sim/aarch64/
* simulator.c: (LDn_STn_SINGLE_LANE_AND_SIZE): New.
(do_vec_LDn_single, do_vec_STn_single): New.
(do_vec_LDnR): Add and set new nregs var. Replace switch on nregs with
loop over nregs using new var n. Add n times size to address in loop.
Add n to vd in loop.
(do_vec_load_store): Add comment for instruction bit 24. New var
single to hold instruction bit 24. Add new code to use single. Move
ldnr support inside single if statements. Fix ldnr register counts
inside post if statement. Change HALT_NYI calls to HALT_UNALLOC.
sim/testsuite/sim/aarch64/
* ldn_single.s: New.
* ldnr.s: New.
* stn_single.s: New.
This adds an event that is emitted just before GDB presents a prompt
to the user. This provides Python code a way to react to whatever
changes might have been made by the previous command. For example, in
my GUI I use this to track changes to the selected frame and reflect
them in the UI.
Built and regtested on x86-64 Fedora 23.
gdb/ChangeLog
2017-02-14 Tom Tromey <tom@tromey.com>
PR python/13598:
* python/python.c (gdbpy_before_prompt_hook): Emit before_prompt
event.
* python/py-evts.c (gdbpy_initialize_py_events): Add
before_prompt registry.
* python/py-events.h (events_object) <before_prompt>: New field.
gdb/doc/ChangeLog
2017-02-14 Tom Tromey <tom@tromey.com>
PR python/13598:
* python.texi (Events In Python): Document events.before_prompt.
gdb/testsuite/ChangeLog
2017-02-14 Tom Tromey <tom@tromey.com>
PR python/13598:
* gdb.python/py-events.exp: Add before_prompt event tests.
The test case implptrpiece.exp accesses the second byte of the short
integer number 1 and expects it to be zero. This is valid for
little-endian targets, but fails on big-endian targets.
This is fixed by distinguishing the expected value by endianness.
gdb/testsuite/ChangeLog:
* gdb.dwarf2/implptrpiece.exp: Fix check for big-endian targets.
PR binutils/21155
* readelf.c (IN_RANGE): New macro. Tests for an address + offset
being within a given range.
(target_specific_reloc_handling): Use macro to test for underflow
as well as overflow of reloc offset.
This stops powerpc gas blithely accepting such nonsense as
"addi %f4,%cr3,%r31".
PR 21118
gas/
* NEWS: Mention powerpc register checks.
* config/tc-ppc.c (struct pd_reg): Make value a short. Add flags.
(pre_defined_registers): Delete fpscr and pmr entries. Set
register type in flags.
(cr_names): Set type in flags.
(reg_name_search): Return pointer to struct pd_reg rather than value.
(register_name): Adjust to suit. Set X_md from flags.
(ppc_parse_name): Likewise.
(ppc_optimize_expr): New function.
(md_assemble): Verify expresion reg flags match operand.
* config/tc-ppc.h (md_optimize_expr): Define.
(ppc_optimize_expr): Declare.
include/
* opcode/ppc.h (PPC_OPERAND_*): Reassign values, regs first.
(PPC_OPERAND_SPR, PPC_OPERAND_GQR): Define.
opcodes/
* ppc-opc.c (powerpc_operands): Flag SPR, SPRG and TBR entries
with PPC_OPERAND_SPR. Flag PSQ and PSQM with PPC_OPERAND_GQR.
PR 21118 work exposed these errors in the testsuite.
* testsuite/gas/ppc/cell.s: Correct invalid registers.
* testsuite/gas/ppc/vle-simple-1.s: Likewise.
* testsuite/gas/ppc/vle-simple-2.s: Likewise.
This patch implements the gdb.Record Python object methods and fields for
record target btrace. Also, implement a stub for record target full.
Signed-off-by: Tim Wiederhake <tim.wiederhake@intel.com>
gdb/ChangeLog:
* Makefile.in (SUBDIR_PYTHON_OBS): Add py-record-btrace.o,
py-record-full.o.
(SUBDIR_PYTHON_SRCS): Add py-record-btrace.c, py-record-full.c.
* python/py-record-btrace.c, python/py-record-btrace.h,
python/py-record-full.c, python/py-record-full.h: New file.
* python/py-record.c: Add include for py-record-btrace.h and
py-record-full.h.
(recpy_method, recpy_format, recpy_goto, recpy_replay_position,
recpy_instruction_history, recpy_function_call_history, recpy_begin,
recpy_end): Use functions from py-record-btrace.c and py-record-full.c.
* python/python-internal.h (PyInt_FromSsize_t, PyInt_AsSsize_t):
New definition.
(gdbpy_initialize_btrace): New export.
* python/python.c (_initialize_python): Add gdbpy_initialize_btrace.
Change-Id: I8bd893672ffc7e619cc1386767897249e125973a
This patch adds three new functions to the gdb module in Python:
- start_recording
- stop_recording
- current_recording
start_recording and current_recording return an object of the new type
gdb.Record, which can be used to access the recorded data.
Signed-off-by: Tim Wiederhake <tim.wiederhake@intel.com>
gdb/ChangeLog
* Makefile.in (SUBDIR_PYTHON_OBS): Add python/py-record.o.
(SUBDIR_PYTHON_SRCS): Add python/py-record.c.
* python/py-record.c: New file.
* python/python-internal.h (gdbpy_start_recording,
gdbpy_current_recording, gdpy_stop_recording,
gdbpy_initialize_record): New export.
* python/python.c (_initialize_python): Add gdbpy_initialize_record.
(python_GdbMethods): Add gdbpy_start_recording,
gdbpy_current_recording and gdbpy_stop_recording.
Change-Id: I772aa9aa068621443f10a330b11dc7dc9a63face
Currently, btrace_find_insn_by_number will iterate over all function call
segments to find the one that contains the needed instruction. This linear
search is too slow for the upcoming Python bindings that will use this
function to access instructions. This patch introduces a vector in struct
btrace_thread_info that holds pointers to all recorded function segments and
allows to use binary search.
The proper solution is to turn the underlying tree into a vector of objects
and use indices for access. This requires more work. A patch set is
currently being worked on and will be published later.
Signed-off-by: Tim Wiederhake <tim.wiederhake@intel.com>
gdb/ChangeLog:
* btrace.c (btrace_fetch): Copy function call segments pointer
into a vector.
(btrace_clear): Clear the vector.
(btrace_find_insn_by_number): Use binary search to find the correct
function call segment.
* btrace.h (brace_fun_p): New typedef.
(struct btrace_thread_info) <functions>: New field.
Change-Id: I8a7f67e80bfe4ff62c4192f74a2153a70bf2a035
Signed-off-by: Tim Wiederhake <tim.wiederhake@intel.com>
gdb/ChangeLog:
* record-btrace.c (btrace_ui_out_decode_error): Move most of it ...
* btrace.c (btrace_decode_error): ... here. New function.
* btrace.h (btrace_decode_error): New export.
Change-Id: I2b4b43a55dbfd9f526a540d2ad52a6708f31feba
This gives all instructions, including gaps, a unique number. Add a function
to retrieve the error code if a btrace instruction iterator points to an
invalid instruction.
Signed-off-by: Tim Wiederhake <tim.wiederhake@intel.com>
gdb/ChangeLog:
* btrace.c (ftrace_call_num_insn, btrace_insn_get_error): New function.
(ftrace_new_function, btrace_insn_number, btrace_insn_cmp,
btrace_find_insn_by_number): Remove special case for gaps.
* btrace.h (btrace_insn_get_error): New export.
(btrace_insn_number, btrace_find_insn_by_number): Adjust comment.
* record-btrace.c (btrace_insn_history): Print number for gaps.
(record_btrace_info, record_btrace_goto): Handle gaps.
Change-Id: I8eb0e48a95f4278522fea74ea13526bfe6898ecc
On 64-bit FC25, the _dl_runtime_resolve function uses a conditional branch to
'call' a particular variant optimized for that system:
(gdb) disas _dl_runtime_resolve_avx_opt
Dump of assembler code for function _dl_runtime_resolve_avx_opt:
0x00007ffff7deeb60 <+0>: push %rax
0x00007ffff7deeb61 <+1>: push %rcx
0x00007ffff7deeb62 <+2>: push %rdx
0x00007ffff7deeb63 <+3>: mov $0x1,%ecx
0x00007ffff7deeb68 <+8>: xgetbv
0x00007ffff7deeb6b <+11>: mov %eax,%r11d
0x00007ffff7deeb6e <+14>: pop %rdx
0x00007ffff7deeb6f <+15>: pop %rcx
0x00007ffff7deeb70 <+16>: pop %rax
0x00007ffff7deeb71 <+17>: and $0x4,%r11d
0x00007ffff7deeb75 <+21>: bnd je 0x7ffff7def4a0 <_dl_runtime_resolve_sse_vex>
End of assembler dump.
When computing the function-level trace, btrace treats this as a switch from
_dl_runtime_resolve_avx_opt to _dl_runtime_resolve_sse_vex. We know that we
switched functions but we can't really say in which caller/callee relationship
those two functions are.
In addition to preserving the indentaion level, also preserve the caller
information. This is a heuristic since we don't really know. But at least in
this case, this seems to be the right thing to do.
This fixes a fail in gdb.btrace/rn-dl-bind.exp on 64-bit FC25.
gdb/
* btrace.c (ftrace_new_switch): Preserve up link and flags.
"_gp" could conflict with ABI-complient code. While it's probably OK
because MIPS uses this name, we figured it'd be good to clean this up
before a release with RISC-V in it.
ld/ChangeLog:
2017-02-13 Palmer Dabbelt <palmer@dabbelt.com>
* emulparams/elf32lriscv-defs.sh (SDATA_START_SYMBOLS): Change
_gp to __global_pointer$.
bfd/ChangeLog:
2017-02-13 Palmer Dabbelt <palmer@dabbelt.com>
* elfnn-riscv.c (riscv_global_pointer_value): Change _gp to
__global_pointer$.
2017-02-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (parse_ifimm_zero): Make prefix optional in unified
syntax.
* testsuite/gas/arm/vcmp-noprefix-imm.d: New file.
* testsuite/gas/arm/vcmp-noprefix-imm.s: New file.
Sergio Durigan Junior
GDB Administrator
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Vineet Gupta
Rahul Chaudhry
Tim Wiederhake
Jim Wilson
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