SVE can view Z registers as 128bit values using .q prefix.
Add this view to the SVE feature.
gdb/ChangeLog:
* features/aarch64-sve.c (create_feature_aarch64_sve): Add q view.
Pointer Authentication is a new feature in AArch64 v8.3-a. When enabled in
the compiler, function return addresses will be mangled by the kernel.
Add register description xml and wire up to aarch64_linux_read_description.
This description includes the two pauth user registers.
Nothing yet uses the feature - that is added in later patches.
gdb/ChangeLog:
* aarch64-linux-nat.c
(aarch64_linux_nat_target::read_description): Add pauth param.
* aarch64-linux-tdep.c
(aarch64_linux_core_read_description): Likewise.
* aarch64-tdep.c (struct target_desc): Add in pauth.
(aarch64_read_description): Add pauth param.
(aarch64_gdbarch_init): Likewise.
* aarch64-tdep.h (aarch64_read_description): Likewise.
* arch/aarch64.c (aarch64_create_target_description): Likewise.
* arch/aarch64.h (aarch64_create_target_description): Likewise.
* features/Makefile: Add new files.
* features/aarch64-pauth.c: New file.
* features/aarch64-pauth.xml: New file.
gdb/doc/ChangeLog:
* gdb.texinfo: Describe pauth feature.
gdb/gdbserver/ChangeLog:
* linux-aarch64-ipa.c (get_ipa_tdesc): Add pauth param.
(initialize_low_tracepoint): Likewise.
* linux-aarch64-low.c (aarch64_arch_setup): Likewise.
* linux-aarch64-tdesc-selftest.c (aarch64_tdesc_test): Likewise.
* linux-aarch64-tdesc.c (struct target_desc): Likewise.
(aarch64_linux_read_description): Likewise.
* linux-aarch64-tdesc.h (aarch64_linux_read_description): Likewise.
As on amd64, these registers hold the base address of the fs and gs
segments, respectively. For i386 these two registers are 32 bits.
gdb/ChangeLog:
* amd64-fbsd-nat.c (amd64_fbsd_nat_target::read_description):
Update calls to i386_target_description to add 'segments'
parameter.
* amd64-tdep.c (amd64_init_abi): Set tdep->fsbase_regnum. Don't
add segment base registers.
* arch/i386.c (i386_create_target_description): Add 'segments'
parameter to enable segment base registers.
* arch/i386.h (i386_create_target_description): Likewise.
* features/i386/32bit-segments.xml: New file.
* features/i386/32bit-segments.c: Generate.
* i386-fbsd-nat.c (i386_fbsd_nat_target::read_description): Update
call to i386_target_description to add 'segments' parameter.
* i386-fbsd-tdep.c (i386fbsd_core_read_description): Likewise.
* i386-go32-tdep.c (i386_go32_init_abi): Likewise.
* i386-linux-tdep.c (i386_linux_read_description): Likewise.
* i386-tdep.c (i386_validate_tdesc_p): Add segment base registers
if feature is present.
(i386_gdbarch_init): Pass I386_NUM_REGS to set_gdbarch_num_regs.
Add 'segments' parameter to call to i386_target_description.
(i386_target_description): Add 'segments' parameter to enable
segment base registers.
(_initialize_i386_tdep) [GDB_SELF_TEST]: Add 'segments' parameter
to call to i386_target_description.
* i386-tdep.h (struct gdbarch_tdep): Add 'fsbase_regnum'.
(enum i386_regnum): Add I386_FSBASE_REGNUM and I386_GSBASE_REGNUM.
Define I386_NUM_REGS.
(i386_target_description): Add 'segments' parameter to enable
segment base registers.
gdb/gdbserver/ChangeLog:
* linux-x86-tdesc.c (i386_linux_read_description): Update call to
i386_create_target_description for 'segments' parameter.
* lynx-i386-low.c (lynx_i386_arch_setup): Likewise.
* nto-x86-low.c (nto_x86_arch_setup): Likewise.
* win32-i386-low.c (i386_arch_setup): Likewise.
When the target description support was added to RISC-V, the register
numbers assigned to the fflags, frm, and fcsr control registers in the
default target descriptions didn't match the register numbers used by
GDB before the target description support was added.
What this means is that if a tools exists in the wild that is using
hard-coded register number, setup to match GDB's old numbering, then
this will have been broken (for fflags, frm, and fcsr) by the move to
target descriptions. QEMU is such a tool.
There are a couple of solutions that could be used to work around this
issue:
- The user can create their own xml description file with the
register numbers setup to match their old tool, then load this by
telling GDB 'set tdesc filename FILENAME'.
- Update their old tool to use the newer default numbering scheme, or
better yet add proper target description support to their tool.
- We could have RISC-V GDB change to maintain the old defaults.
This patch changes GDB back to using the old numbering scheme.
This change is only visible to remote targets that don't supply their
own xml description file and instead rely on GDB's default numbering.
Note that even though 32bit-cpu.xml and 64bit-cpu.xml have changed,
the corresponding .c file has not, this is because the numbering added
to the registers in the xml files is number 0, this doesn't result in
any new C code being generated .
gdb/ChangeLog:
* features/riscv/32bit-cpu.xml: Add register numbers.
* features/riscv/32bit-fpu.c: Regenerate.
* features/riscv/32bit-fpu.xml: Add register numbers.
* features/riscv/64bit-cpu.xml: Add register numbers.
* features/riscv/64bit-fpu.c: Regenerate.
* features/riscv/64bit-fpu.xml: Add register numbers.
This commit applies all changes made after running the gdb/copyright.py
script.
Note that one file was flagged by the script, due to an invalid
copyright header
(gdb/unittests/basic_string_view/element_access/char/empty.cc).
As the file was copied from GCC's libstdc++-v3 testsuite, this commit
leaves this file untouched for the time being; a patch to fix the header
was sent to gcc-patches first.
gdb/ChangeLog:
Update copyright year range in all GDB files.
This commit adds target description support for riscv.
I've used the split feature approach for specifying the architectural
features, and the CSR feature is auto-generated from the riscv-opc.h
header file.
If the target doesn't provide a suitable target description then GDB
will build one by looking at the bfd headers.
This commit does not implement target description creation for the
Linux or FreeBSD native targets, both of these will need to add
read_description methods into their respective target classes, which
probe the target features, and then call
riscv_create_target_description to build a suitable target
description. Until this is done Linux and FreeBSD will get the same
default target description based on the bfd that bare-metal targets
get.
I've only added feature descriptions for 32 and 64 bit registers, 128
bit registers (for RISC-V) are not supported in the reset of GDB yet.
This commit removes the special reading of the MISA register in order
to establish the target features, this was only used for figuring out
the f-register size, and even that wasn't done consistently. We now
rely on the target to tell us what size of registers it has (or look
in the BFD as a last resort). The result of this is that we should
now support RV64 targets with 32-bit float, though I have not
extensively tested this combination yet.
* Makefile.in (ALL_TARGET_OBS): Add arch/riscv.o.
(HFILES_NO_SRCDIR): Add arch/riscv.h.
* arch/riscv.c: New file.
* arch/riscv.h: New file.
* configure.tgt: Add cpu_obs list of riscv, move riscv-tdep.o into
this list, and add arch/riscv.o.
* features/Makefile: Add riscv features.
* features/riscv/32bit-cpu.c: New file.
* features/riscv/32bit-cpu.xml: New file.
* features/riscv/32bit-csr.c: New file.
* features/riscv/32bit-csr.xml: New file.
* features/riscv/32bit-fpu.c: New file.
* features/riscv/32bit-fpu.xml: New file.
* features/riscv/64bit-cpu.c: New file.
* features/riscv/64bit-cpu.xml: New file.
* features/riscv/64bit-csr.c: New file.
* features/riscv/64bit-csr.xml: New file.
* features/riscv/64bit-fpu.c: New file.
* features/riscv/64bit-fpu.xml: New file.
* features/riscv/rebuild-csr-xml.sh: New file.
* riscv-tdep.c: Add 'arch/riscv.h' include.
(riscv_gdb_reg_names): Delete.
(csr_reggroup): New global.
(struct riscv_register_alias): Delete.
(struct riscv_register_feature): New structure.
(riscv_register_aliases): Delete.
(riscv_xreg_feature): New global.
(riscv_freg_feature): New global.
(riscv_virtual_feature): New global.
(riscv_csr_feature): New global.
(riscv_create_csr_aliases): New function.
(riscv_read_misa_reg): Delete.
(riscv_has_feature): Delete.
(riscv_isa_xlen): Simplify, just return cached xlen.
(riscv_isa_flen): Simplify, just return cached flen.
(riscv_has_fp_abi): Update for changes in struct gdbarch_tdep.
(riscv_register_name): Update to make use of tdesc_register_name.
Look up xreg and freg names in the new globals riscv_xreg_feature
and riscv_freg_feature. Don't supply csr aliases here.
(riscv_fpreg_q_type): Delete.
(riscv_register_type): Use tdesc_register_type in almost all
cases, override the returned type in a few specific cases only.
(riscv_print_one_register_info): Handle errors reading registers.
(riscv_register_reggroup_p): Use tdesc_register_in_reggroup_p for
registers that are otherwise unknown to GDB. Also check the
csr_reggroup.
(riscv_print_registers_info): Remove assert about upper register
number, and use gdbarch_register_reggroup_p instead of
short-cutting.
(riscv_find_default_target_description): New function.
(riscv_check_tdesc_feature): New function.
(riscv_add_reggroups): New function.
(riscv_setup_register_aliases): New function.
(riscv_init_reggroups): New function.
(_initialize_riscv_tdep): Add calls to setup CSR aliases, and
setup register groups. Register new riscv debug variable.
* riscv-tdep.h: Add 'arch/riscv.h' include.
(struct gdbarch_tdep): Remove abi union, and add
riscv_gdbarch_features field. Remove cached quad floating point
type, and provide initialisation for double type field.
* target-descriptions.c (maint_print_c_tdesc_cmd): Add riscv to
the list of targets using the feature based target descriptions.
* NEWS: Mention target description support.
gdb/doc/ChangeLog:
* gdb.texinfo (Standard Target Features): Add RISC-V Features
sub-section.
This patch adds support for Hardware Transactional Memory registers
for the powerpc linux native and core file targets, and for the
pwoerpc linux server stub.
These registers include both the HTM special-purpose registers (TFHAR,
TEXASR and TFIAR) as well as the set of registers that are
checkpointed (saved) when a transaction is initiated, which the
processor restores in the event of a transaction failure.
The set of checkpointed general-purpose registers is returned by the
linux kernel in the same format as the regular general-purpose
registers, defined in struct pt_regs. However, the architecture
specifies that only some of the registers present in pt_regs are
checkpointed (GPRs 0-31, CR, XER, LR and CTR). The kernel fills the
slots for MSR and NIP with other info. The other fields usually don't
have meaningful values. GDB doesn't define registers that are not
checkpointed in the architecture, but when generating a core file, GDB
fills the slot for the checkpointed MSR with the regular MSR. These
are usually similar, although some bits might be different, and in
some cases the checkpointed MSR will have a value of 0 in a
kernel-generated core-file. The checkpointed NIP is filled with TFHAR
by GDB in the core-file, which is what the kernel does. The other
fields are set to 0 by GDB.
Core files generated by the kernel have a note section for
checkpointed GPRs with the same size for both 32-bit and 64-bit
threads, and the values for the registers of a 32-bit thread are
squeezed in the first half, with no useful data in the second half.
GDB generates a smaller note section for 32-bit threads, but can read
both sizes.
The checkpointed XER is required to be 32-bit in the target
description documentation, even though the more recent ISAs define it
as 64-bit wide, since the high-order 32-bits are reserved, and because
in Linux there is no way to get a 64-bit checkpointed XER for 32-bit
threads. If this changes in the future, the target description
feature requirement can be relaxed to allow for a 64-bit checkpointed
XER.
Access to the checkpointed CR (condition register) can be confusing.
The architecture only specifies that CR fields 1 to 7 (the 24 least
significant bits) are checkpointed, but the kernel provides all 8
fields (32 bits). The value of field 0 is not masked by ptrace, so it
will sometimes show the result of some kernel operation, probably
treclaim., which sets this field.
The checkpointed registers are marked not to be saved and restored.
Inferior function calls during an active transaction don't work well,
and it's unclear what should be done in this case. TEXASR and TFIAR
can be altered asynchronously, during transaction failure recording,
so they are also not saved and restored. For consistency neither is
TFHAR.
Record and replay also doesn't work well when transactions are
involved. This patch doesn't address this, so the values of the HTM
SPRs will sometimes be innacurate when the record/relay target is
enabled. For instance, executing a "tbegin." alters TFHAR and TEXASR,
but these changes are not currently recorded.
Because the checkpointed registers are only available when a
transaction is active (or suspended), ptrace can return ENODATA when
gdb tries to read these registers and the inferior is not in a
transactional state. The registers are set to the unavailable state
when this happens. When gbd tries to write to one of these registers,
and it is unavailable, an error is raised.
The "fill" functions for checkpointed register sets in the server stub
are not implemented for the same reason as for the EBB register set,
since ptrace can also return ENODATA for checkpointed regsets. The
same issues with 'G' packets apply here.
Just like for the EBB registers, tracepoints will not mark the
checkpointed registers as unavailable if the inferior was not in a
transaction, so their content will also show 0 instead of
<unavailable> when inspecting trace data.
The new tests record the values of the regular registers before
stepping the inferior through a "tbegin." instruction to start a
transaction, then the checkpointed registers are checked against the
recorded pre-transactional values. New values are written to the
checkpointed registers and recorded, the inferior continues until the
transaction aborts (which is usually immediately when it is resumed),
and the regular registers are checked against the recorded values,
because the abort should have reverted the registers to these values.
Like for the EBB registers, target_store_registers will ignore the
checkpointed registers when called with -1 as the regno
argument (store all registers in one go).
gdb/ChangeLog:
2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* arch/ppc-linux-tdesc.h (tdesc_powerpc_isa207_htm_vsx32l)
(tdesc_powerpc_isa207_htm_vsx64l): Declare.
* arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_TM_SPRREGSET)
(PPC32_LINUX_SIZEOF_CGPRREGSET, PPC64_LINUX_SIZEOF_CGPRREGSET)
(PPC_LINUX_SIZEOF_CFPRREGSET, PPC_LINUX_SIZEOF_CVMXREGSET)
(PPC_LINUX_SIZEOF_CVSXREGSET, PPC_LINUX_SIZEOF_CPPRREGSET)
(PPC_LINUX_SIZEOF_CDSCRREGSET, PPC_LINUX_SIZEOF_CTARREGSET):
Define.
(struct ppc_linux_features) <htm>: New field.
(ppc_linux_no_features): Add initializer for htm field.
* arch/ppc-linux-common.c (ppc_linux_match_description): Return
new tdescs.
* nat/ppc-linux.h (PPC_FEATURE2_HTM, NT_PPC_TM_CGPR)
(NT_PPC_TM_CFPR, NT_PPC_TM_CVMX, NT_PPC_TM_CVSX)
(NT_PPC_TM_SPR, NT_PPC_TM_CTAR, NT_PPC_TM_CPPR, NT_PPC_TM_CDSCR):
Define if not already defined.
* features/Makefile (WHICH): Add rs6000/powerpc-isa207-htm-vsx32l
and rs6000/powerpc-isa207-htm-vsx64l.
(XMLTOC): Add rs6000/powerpc-isa207-htm-vsx32l.xml and
rs6000/powerpc-isa207-htm-vsx64l.xml.
* features/rs6000/power-htm-spr.xml: New file.
* features/rs6000/power-htm-core.xml: New file.
* features/rs6000/power64-htm-core.xml: New file.
* features/rs6000/power-htm-fpu.xml: New file.
* features/rs6000/power-htm-altivec.xml: New file.
* features/rs6000/power-htm-vsx.xml: New file.
* features/rs6000/power-htm-ppr.xml: New file.
* features/rs6000/power-htm-dscr.xml: New file.
* features/rs6000/power-htm-tar.xml: New file.
* features/rs6000/powerpc-isa207-htm-vsx32l.xml: New file.
* features/rs6000/powerpc-isa207-htm-vsx64l.xml: New file.
* features/rs6000/powerpc-isa207-htm-vsx32l.c: Generate.
* features/rs6000/powerpc-isa207-htm-vsx64l.c: Generate.
* regformats/rs6000/powerpc-isa207-htm-vsx32l.dat: Generate.
* regformats/rs6000/powerpc-isa207-htm-vsx64l.dat: Generate.
* ppc-linux-nat.c (fetch_register, fetch_ppc_registers): Call
fetch_regset with HTM regsets.
(store_register, store_ppc_registers): Call store_regset with HTM
regsets.
(ppc_linux_nat_target::read_description): Set htm field in the
features struct if needed.
* ppc-linux-tdep.c: Include
features/rs6000/powerpc-isa207-htm-vsx32l.c and
features/rs6000/powerpc-isa207-htm-vsx64l.c.
(ppc32_regmap_tm_spr, ppc32_regmap_cgpr, ppc64_le_regmap_cgpr)
(ppc64_be_regmap_cgpr, ppc32_regmap_cfpr, ppc32_le_regmap_cvmx)
(ppc32_be_regmap_cvmx, ppc32_regmap_cvsx, ppc32_regmap_cppr)
(ppc32_regmap_cdscr, ppc32_regmap_ctar): New globals.
(ppc32_linux_tm_sprregset, ppc32_linux_cgprregset)
(ppc64_be_linux_cgprregset, ppc64_le_linux_cgprregset)
(ppc32_linux_cfprregset, ppc32_le_linux_cvmxregset)
(ppc32_be_linux_cvmxregset, ppc32_linux_cvsxregset)
(ppc32_linux_cpprregset, ppc32_linux_cdscrregset)
(ppc32_linux_ctarregset): New globals.
(ppc_linux_cgprregset, ppc_linux_cvmxregset): New functions.
(ppc_linux_collect_core_cpgrregset): New function.
(ppc_linux_iterate_over_regset_sections): Call back with the htm
regsets.
(ppc_linux_core_read_description): Check if the tm spr section is
present and set htm in the features struct.
(_initialize_ppc_linux_tdep): Call
initialize_tdesc_powerpc_isa207_htm_vsx32l and
initialize_tdesc_powerpc_isa207_htm_vsx64l.
* ppc-linux-tdep.h (ppc_linux_cgprregset, ppc_linux_cvmxregset):
Declare.
(ppc32_linux_tm_sprregset, ppc32_linux_cfprregset)
(ppc32_linux_cvsxregset, ppc32_linux_cpprregset)
(ppc32_linux_cdscrregset, ppc32_linux_ctarregset): Declare.
* ppc-tdep.h (struct gdbarch_tdep) <have_htm_spr, have_htm_core>:
New fields.
<have_htm_fpu, have_htm_altivec, have_htm_vsx>:
Likewise.
<ppc_cppr_regnum, ppc_cdscr_regnum, ppc_ctar_regnum>: Likewise.
<ppc_cdl0_regnum, ppc_cvsr0_regnum, ppc_cefpr0_regnum>: Likewise.
(enum) <PPC_TFHAR_REGNUM, PPC_TEXASR_REGNUM, PPC_TFIAR_REGNUM>:
New enum fields.
<PPC_CR0_REGNUM, PPC_CCR_REGNUM, PPC_CXER_REGNUM>: Likewise.
<PPC_CLR_REGNUM, PPC_CCTR_REGNUM, PPC_CF0_REGNUM>: Likewise.
<PPC_CFPSCR_REGNUM, PPC_CVR0_REGNUM, PPC_CVSCR_REGNUM>: Likewise.
<PPC_CVRSAVE_REGNUM, PPC_CVSR0_UPPER_REGNUM>: Likewise.
<PPC_CPPR_REGNUM, PPC_CDSCR_REGNUM>: Likewise.
<PPC_CTAR_REGNUM>: Likewise.
(PPC_IS_TMSPR_REGNUM, PPC_IS_CKPTGP_REGNUM, PPC_IS_CKPTFP_REGNUM)
(PPC_IS_CKPTVMX_REGNUM, PPC_IS_CKPTVSX_REGNUM): Define.
* rs6000-tdep.c (IS_CDFP_PSEUDOREG, IS_CVSX_PSEUDOREG)
(IS_CEFP_PSEUDOREG): Define.
(rs6000_register_name): Hide the upper halves of checkpointed VSX
registers. Return names for the checkpointed DFP, VSX, and EFP
pseudo registers.
(rs6000_pseudo_register_type): Remove initial assert and raise an
internal error in the else clause instead. Return types for the
checkpointed DFP, VSX, and EFP pseudo registers.
(dfp_pseudo_register_read, dfp_pseudo_register_write): Handle
checkpointed DFP pseudo registers.
(vsx_pseudo_register_read, vsx_pseudo_register_write): Handle
checkpointed VSX pseudo registers.
(efp_pseudo_register_read, efp_pseudo_register_write): Rename
from efpr_pseudo_register_read and
efpr_pseudo_register_write. Handle checkpointed EFP pseudo
registers.
(rs6000_pseudo_register_read, rs6000_pseudo_register_write):
Handle checkpointed DFP, VSX, and EFP registers.
(dfp_ax_pseudo_register_collect, vsx_ax_pseudo_register_collect)
(efp_ax_pseudo_register_collect): New functions.
(rs6000_ax_pseudo_register_collect): Move DFP, VSX and EFP pseudo
register logic to new functions. Handle checkpointed DFP, VSX,
and EFP pseudo registers.
(rs6000_gdbarch_init): Look for and validate the htm features.
Include checkpointed DFP, VSX and EFP pseudo-registers.
* NEWS: Mention access to PPR, DSCR, TAR, EBB/PMU registers and
HTM registers.
gdb/gdbserver/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* configure.srv (ipa_ppc_linux_regobj): Add
powerpc-isa207-htm-vsx32l-ipa.o and
powerpc-isa207-htm-vsx64l-ipa.o.
(powerpc*-*-linux*): Add powerpc-isa207-htm-vsx32l.o and
powerpc-isa207-htm-vsx64l.o to srv_regobj. Add
rs6000/power-htm-spr.xml, rs6000/power-htm-core.xml,
rs6000/power64-htm-core.xml, rs6000/power-htm-fpu.xml,
rs6000/power-htm-altivec.xml, rs6000/power-htm-vsx.xml,
rs6000/power-htm-ppr.xml, rs6000/power-htm-dscr.xml,
rs6000/power-htm-tar.xml, rs6000/powerpc-isa207-htm-vsx32l.xml,
and rs6000/powerpc-isa207-htm-vsx64l.xml to srv_xmlfiles.
* linux-ppc-tdesc-init.h (enum ppc_linux_tdesc)
<PPC_TDESC_ISA207_HTM_VSX>: New enum value.
(init_registers_powerpc_isa207_htm_vsx32l)
(init_registers_powerpc_isa207_htm_vsx64l): Declare.
* linux-ppc-low.c (ppc_fill_tm_sprregset, ppc_store_tm_sprregset)
(ppc_store_tm_cgprregset, ppc_store_tm_cfprregset)
(ppc_store_tm_cvrregset, ppc_store_tm_cvsxregset)
(ppc_store_tm_cpprregset, ppc_store_tm_cdscrregset)
(ppc_store_tm_ctarregset): New functions.
(ppc_regsets): Add entries for HTM regsets.
(ppc_arch_setup): Set htm in features struct when needed. Set
sizes for the HTM regsets.
(ppc_get_ipa_tdesc_idx): Return PPC_TDESC_ISA207_HTM_VSX.
(initialize_low_arch): Call
init_registers_powerpc_isa207_htm_vsx32l and
init_registers_powerpc_isa207_htm_vsx64l.
* linux-ppc-ipa.c (get_ipa_tdesc): Handle
PPC_TDESC_ISA207_HTM_VSX.
(initialize_low_tracepoint): Call
init_registers_powerpc_isa207_htm_vsx32l and
init_registers_powerpc_isa207_htm_vsx64l.
gdb/testsuite/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.arch/powerpc-htm-regs.c: New file.
* gdb.arch/powerpc-htm-regs.exp: New file.
gdb/doc/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.texinfo (PowerPC Features): Describe new features
"org.gnu.gdb.power.htm.spr", "org.gnu.gdb.power.htm.core",
"org.gnu.gdb.power.htm.fpu", "org.gnu.gdb.power.htm.altivec",
"org.gnu.gdb.power.htm.vsx", "org.gnu.gdb.power.htm.ppr",
"org.gnu.gdb.power.htm.dscr", "org.gnu.gdb.power.htm.tar".
This patch adds support for registers of the Event Based Branching and
Performance Monitoring Units for the powerpc linux native and core
file targets, and for the powerpc linux server stub.
All three EBB registers are accessible. Only a subset of the PMU
registers can be accessed through ptrace. Because of this, the PMU
registers are enumerated individually in gdbarch_tdep, as opposed to
having a single "have_pmu" flag. This is intended to make it easier
to add additional PMU registers in the future, since checking a
"have_pmu" flag elsewhere in the code would no longer be correct. The
tdesc feature is named org.gnu.gdb.power.linux.pmu because of this.
It's unclear if it makes sense to save and restore these registers
across function calls, since some of them can be modified
asynchronously. They are also not tracked in record-replay mode.
The kernel can return ENODATA when ptrace is used to get the EBB
registers, unless a linux performance event that uses EBB is open in
the inferior. For this reason, the "fill" functions in the server
stub for the ebb register sets is not implemented.
Since gdbserver writes all registers in one go before resuming the
inferior, this error would not be detected at the time the user tries
to write to one of the registers on the client side, and gdbserver
would print out warnings every time it resumes the inferior when no
ebb performance event is opened, so there is currently no
straightforward way to handle this case. This means the ebb registers
in the client-side regcache can become dirty when the user tries to
write to them, until the inferior is resumed and stopped again.
A related issue is that 'G' packets used to write to unrelated
registers will include bad data for the EBB registers if they are
unavailable, since no register status information is included in the
'G' packet. This data won't be written to the inferior by the
gdbserver stub because the "fill" functions are not implemented, and
currently the gdbserver stub doesn't change the status of the
registers in its own regcache in response to 'G' packets.
Another limitation for the ebb registers is that traceframes don't
record if registers are available or not, so if these registers are
collected when a tracepoint is hit and the inferior has no ebb event
opened, the user will see zero values for all of them, instead of the
usual <unavailable>.
Because these registers are often unavailable, trying to store them
with target_store_registers with -1 for the regno argument (all
registers) would almost always fail, so they are ignored in this case.
gdb/ChangeLog:
2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_EBBREGSET)
(PPC_LINUX_SIZEOF_PMUREGSET): Declare.
* nat/ppc-linux.h (PPC_FEATURE2_EBB, NT_PPC_EBB, NT_PPC_PMU):
Define if not already defined.
* features/rs6000/power-ebb.xml: New file.
* features/rs6000/power-linux-pmu.xml: New file.
* features/rs6000/powerpc-isa207-vsx32l.xml: Include ebb and pmu
features.
* features/rs6000/powerpc-isa207-vsx64l.xml: Likewise.
* features/rs6000/powerpc-isa207-vsx32l.c: Re-generate.
* features/rs6000/powerpc-isa207-vsx64l.c: Re-generate.
* regformats/rs6000/powerpc-isa207-vsx32l.dat: Re-generate.
* regformats/rs6000/powerpc-isa207-vsx64l.dat: Re-generate.
* ppc-linux-nat.c (fetch_register, fetch_ppc_registers): Call
fetch_regset with ebb and pmu regsets.
(store_register, store_ppc_registers): Call store_regset with ebb
and pmu regsets.
(ppc_linux_nat_target::read_description): Set isa207 field in the
features struct if ebb and pmu are avaiable.
* ppc-linux-tdep.c (ppc32_regmap_ebb, ppc32_regmap_pmu)
(ppc32_linux_ebbregset, ppc32_linux_pmuregset): New globals.
(ppc_linux_iterate_over_regset_sections): Call back with the ebb
and pmu regsets.
(ppc_linux_core_read_description): Check if the pmu section is
present and set isa207 in the features struct.
* ppc-linux-tdep.h (ppc32_linux_ebbregset)
(ppc32_linux_pmuregset): Declare.
* ppc-tdep.h (struct gdbarch_tdep) <ppc_mmcr0_regnum>: New field.
<ppc_mmcr2_regnum, ppc_siar_regnum, ppc_sdar_regnum>: New fields.
<ppc_sier_regnum>: New field.
(enum): <PPC_BESCR_REGNUM, PPC_EBBHR_REGNUM, PPC_EBBRR_REGNUM>:
New enum values.
<PPC_MMCR0_REGNUM, PPC_MMCR2_REGNUM, PPC_SIAR_REGNUM>: New enum
values.
<PPC_SDAR_REGNUM, PPC_SIER_REGNUM>: New enum values.
(PPC_IS_EBB_REGNUM, PPC_IS_PMU_REGNUM): Define.
* rs6000-tdep.c (rs6000_gdbarch_init): Look for and validate the
ebb and pmu features.
gdb/gdbserver/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* configure.srv (powerpc*-*-linux*): Add rs6000/power-ebb.xml and
rs6000/power-linux-pmu.xml to srv_xmlfiles.
* linux-ppc-low.c (ppc_store_ebbregset, ppc_fill_pmuregset)
(ppc_store_pmuregset): New functions.
(ppc_regsets): Add entries for ebb and pmu regsets.
(ppc_arch_setup): Set isa207 in features struct if the ebb and
pmu regsets are available. Set sizes for these regsets.
gdb/doc/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.texinfo (PowerPC Features): Describe new features
"org.gnu.gdb.power.ebb" and "org.gnu.gdb.power.linux.pmu".
This patch adds support for the Target Address Register for powerpc
linux native and core file targets, and in the powerpc linux server
stub.
gdb/ChangeLog:
2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* arch/ppc-linux-tdesc.h (tdesc_powerpc_isa207_vsx32l)
(tdesc_powerpc_isa207_vsx64l): Declare.
* arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_TARREGSET): Define.
(struct ppc_linux_features) <isa207>: New field.
(ppc_linux_no_features): Add initializer for isa207 field.
* arch/ppc-linux-common.c (ppc_linux_match_description): Return
new tdescs.
* nat/ppc-linux.h (PPC_FEATURE2_ARCH_2_07, PPC_FEATURE2_TAR)
(NT_PPC_TAR): Define if not already defined.
* features/Makefile (WHICH): Add rs6000/powerpc-isa207-vsx32l and
rs6000/powerpc-isa207-vsx64l.
(XMLTOC): Add rs6000/powerpc-isa207-vsx32l.xml and
rs6000/powerpc-isa207-vsx64l.xml.
* features/rs6000/power-tar.xml: New file.
* features/rs6000/powerpc-isa207-vsx32l.xml: New file.
* features/rs6000/powerpc-isa207-vsx64l.xml: New file.
* features/rs6000/powerpc-isa207-vsx32l.c: Generate.
* features/rs6000/powerpc-isa207-vsx64l.c: Generate.
* regformats/rs6000/powerpc-isa207-vsx32l.dat: Generate.
* regformats/rs6000/powerpc-isa207-vsx64l.dat: Generate.
* ppc-linux-nat.c (fetch_register, fetch_ppc_registers): Call
fetch_regset with the TAR regset.
(store_register, store_ppc_registers): Call store_regset with the
TAR regset.
(ppc_linux_nat_target::read_description): Set isa207 field in the
features struct if needed.
* ppc-linux-tdep.c: Include
features/rs6000/powerpc-isa207-vsx32l.c and
features/rs6000/powerpc-isa207-vsx64l.c.
(ppc32_regmap_tar, ppc32_linux_tarregset): New globals.
(ppc_linux_iterate_over_regset_sections): Call back with the tar
regset.
(ppc_linux_core_read_description): Check if the tar section is
present and set isa207 in the features struct.
(_initialize_ppc_linux_tdep): Call
initialize_tdesc_powerpc_isa207_vsx32l and
initialize_tdesc_powerpc_isa207_vsx64l.
* ppc-linux-tdep.h (ppc32_linux_tarregset): Declare.
* ppc-tdep.h (gdbarch_tdep) <ppc_tar_regnum>: New field.
(enum) <PPC_TAR_REGNUM>: New enum value.
* rs6000-tdep.c (rs6000_gdbarch_init): Look for and validate tar
feature.
(ppc_process_record_op31): Record changes to TAR.
gdb/gdbserver/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* configure.srv (ipa_ppc_linux_regobj): Add
powerpc-isa207-vsx64l-ipa.o and powerpc-isa207-vsx32l-ipa.o.
(powerpc*-*-linux*): Add powerpc-isa207-vsx32l.o and
powerpc-isa207-vsx64l.o to srv_regobj, add rs6000/power-tar.xml,
rs6000/powerpc-isa207-vsx32l.xml, and
rs6000/powerpc-isa207-vsx64l.xml to srv_xmlfiles.
* linux-ppc-tdesc-init.h (enum ppc_linux_tdesc)
<PPC_TDESC_ISA207_VSX>: New enum value.
(init_registers_powerpc_isa207_vsx32l): Declare.
(init_registers_powerpc_isa207_vsx64l): Declare.
* linux-ppc-low.c (ppc_fill_tarregset): New function.
(ppc_store_tarregset): New function.
(ppc_regsets): Add entry for the TAR regset.
(ppc_arch_setup): Set isa207 in features struct when needed. Set
size for the TAR regsets.
(ppc_get_ipa_tdesc_idx): Return PPC_TDESC_ISA207_VSX.
(initialize_low_arch): Call init_registers_powerpc_isa207_vsx32l
and init_registers_powerpc_isa207_vsx64l.
* linux-ppc-ipa.c (get_ipa_tdesc): Handle PPC_TDESC_ISA207_VSX.
(initialize_low_tracepoint): Call
init_registers_powerpc_isa207_vsx32l and
init_registers_powerpc_isa207_vsx64l.
gdb/testsuite/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.arch/powerpc-tar.c: New file.
* gdb.arch/powerpc-tar.exp: New file.
gdb/doc/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.texinfo (PowerPC Features): Describe new feature
"org.gnu.gdb.power.tar".
This patch adds gdb support for the Program Priorty Register and the
Data Stream Control Register, for the powerpc linux native and core
file targets, and for the powerpc linux server stub.
gdb/ChangeLog:
2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* arch/ppc-linux-tdesc.h (tdesc_powerpc_isa205_ppr_dscr_vsx32l)
(tdesc_powerpc_isa205_ppr_dscr_vsx64l): Declare.
* arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_PPRREGSET)
(PPC_LINUX_SIZEOF_DSCRREGSET): Define.
(struct ppc_linux_features) <ppr_dscr>: New field.
(ppc_linux_no_features): Add initializer for ppr_dscr field.
* arch/ppc-linux-common.c (ppc_linux_match_description): Return
new tdescs.
* nat/ppc-linux.h (PPC_FEATURE2_DSCR, NT_PPC_PPR, NT_PPC_DSCR):
Define if not already defined.
* features/Makefile (WHICH): Add
rs6000/powerpc-isa205-ppr-dscr-vsx32l and
rs6000/powerpc-isa205-ppr-dscr-vsx64l.
(XMLTOC): Add rs6000/powerpc-isa205-ppr-dscr-vsx32l.xml and
rs6000/powerpc-isa205-ppr-dscr-vsx64l.xml.
* features/rs6000/power-dscr.xml: New file.
* features/rs6000/power-ppr.xml: New file.
* features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.xml: New file.
* features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.xml: New file.
* features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.c: Generate.
* features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.c: Generate.
* regformats/rs6000/powerpc-isa205-ppr-dscr-vsx32l.dat: Generate.
* regformats/rs6000/powerpc-isa205-ppr-dscr-vsx64l.dat: Generate.
* ppc-linux-nat.c: Include <sys/uio.h>.
(fetch_regset, store_regset, check_regset): New functions.
(fetch_register, fetch_ppc_registers): Call fetch_regset with
DSCR and PPR regsets.
(store_register, store_ppc_registers): Call store_regset with
DSCR and PPR regsets.
(ppc_linux_get_hwcap2): New function.
(ppc_linux_nat_target::read_description): Call
ppc_linux_get_hwcap2 and check_regset, set ppr_dscr field in the
features struct if needed.
* ppc-linux-tdep.c: Include
features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.c and
features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.c.
(ppc32_regmap_ppr, ppc32_regmap_dscr, ppc32_linux_pprregset)
(ppc32_linux_dscrregset): New globals.
(ppc_linux_iterate_over_regset_sections): Call back with the ppr
and dscr regsets.
(ppc_linux_core_read_description): Check if the ppr and dscr
sections are present and set ppr_dscr in the features struct.
(_initialize_ppc_linux_tdep): Call
initialize_tdesc_powerpc_isa205_ppr_dscr_vsx32l and
initialize_tdesc_powerpc_isa205_ppr_dscr_vsx64l.
* ppc-linux-tdep.h (ppc32_linux_pprregset)
(ppc32_linux_dscrregset): Declare.
* ppc-tdep.h (struct gdbarch_tdep) <ppc_ppr_regnum>: New field.
<ppc_dscr_regnum>: New field.
(enum) <PPC_PPR_REGNUM, PPC_DSCR_REGNUM>: New enum values.
* rs6000-tdep.c (rs6000_gdbarch_init): Look for and validate ppr
and dscr features.
(ppc_process_record_op31): Record changes to PPR and DSCR.
gdb/gdbserver/ChangeLog:
2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* configure.srv (ipa_ppc_linux_regobj): Add
powerpc-isa205-ppr-dscr-vsx32l-ipa.o and
powerpc-isa205-ppr-dscr-vsx64l-ipa.o.
(powerpc*-*-linux*): Add powerpc-isa205-ppr-dscr-vsx32l.o and
powerpc-isa205-ppr-dscr-vsx64l.o to srv_regobj, add
rs6000/power-dscr.xml, rs6000/power-ppr.xml,
rs6000/powerpc-isa205-ppr-dscr-vsx32l.xml and
rs6000/powerpc-isa205-ppr-dscr-vsx64l.xml to srv_xmlfiles.
* linux-ppc-tdesc-init.h (enum ppc_linux_tdesc)
<PPC_TDESC_ISA205_PPR_DSCR_VSX>: New enum value.
(init_registers_powerpc_isa205_ppr_dscr_vsx32l)
(init_registers_powerpc_isa205_ppr_dscr_vsx64l): Declare.
* linux-ppc-low.c: Include "elf/common.h" and <sys/uio.h>.
(ppc_hwcap): Add comment.
(ppc_hwcap2): New global.
(ppc_check_regset, ppc_fill_pprregset, ppc_store_pprregset)
(ppc_fill_dscrregset, ppc_store_dscrregset): New functions.
(ppc_regsets): Add entries for the DSCR and PPR regsets.
(ppc_arch_setup): Get AT_HWCAP2. Set ppr_dscr in features struct
when needed. Set sizes for the the DSCR and PPR regsets.
(ppc_get_ipa_tdesc_idx): Return PPC_TDESC_ISA205_PPR_DSCR_VSX.
(initialize_low_arch): Call
init_registers_powerpc_isa205_ppr_dscr_vsx32l and
init_registers_powerpc_isa205_ppr_dscr_vsx64l.
* linux-ppc-ipa.c (get_ipa_tdesc): Handle
PPC_TDESC_ISA205_PPR_DSCR_VSX.
(initialize_low_tracepoint): Call
init_registers_powerpc_isa205_ppr_dscr_vsx32l and
init_registers_powerpc_isa205_ppr_dscr_vsx64l.
gdb/testsuite/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.arch/powerpc-ppr-dscr.c: New file.
* gdb.arch/powerpc-ppr-dscr.exp: New file.
gdb/doc/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.texinfo (PowerPC Features): Describe new features
"org.gnu.gdb.power.ppr" and "org.gnu.gdb.power.dscr".
Previously VQ was of type long. Using uint64_t ensures it always matches the
same type as the VG register.
Note that in the Linux kernel, VQ is 16bits. We cast it up to 64bits
immediately after reading to ensure we always use the same type throughout
the code.
gdb/
* aarch64-tdep.c (aarch64_read_description): Use uint64_t for VQ.
* aarch64-tdep.h (aarch64_read_description): Likewise.
* arch/aarch64.c (aarch64_create_target_description): Likewise.
* arch/aarch64.h (aarch64_create_target_description): Likewise.
* features/aarch64-sve.c (create_feature_aarch64_sve): Likewise.
* nat/aarch64-sve-linux-ptrace.c(aarch64_sve_get_vq): Likewise.
* nat/aarch64-sve-linux-ptrace.h (aarch64_sve_get_vq): Likewise.
While fiddling a bit with -Wunused-variable, Sergio noticed that "maint
print c-tdesc" was always generating code for the "tdesc_type
*field_type" variable, even when it wasn't used. This is caught by GCC
when using -Wunused-variable, of course.
This patch changes the print_c_tdesc class to only output the field
declaration when we actually need it.
It shouldn't be necessary to do the same with the other variable
declarations (type_with_fields and element_type), because they are
always if they are declared.
The C files in features/ are regenerated, some declarations of
field_type are removed, as expected, while some others move to where
they are used for the first time.
gdb/ChangeLog:
* target-descriptions.c (print_c_tdesc) <visit>: Don't output
field_type declaration, use printf_field_type_assignment
instead.
<printf_field_type_assignment>: New method.
* features/aarch64-core.c, features/aarch64-fpu.c
features/arc-arcompact.c, features/arc-v2.c,
features/arm/arm-with-iwmmxt.c, features/i386/32bit-core.c,
features/i386/32bit-mpx.c, features/i386/32bit-sse.c,
features/i386/64bit-avx512.c, features/i386/64bit-core.c,
features/i386/64bit-mpx.c, features/i386/64bit-sse.c,
features/i386/x32-core.c, features/or1k.c,
features/rs6000/powerpc-7400.c,
features/rs6000/powerpc-altivec32.c,
features/rs6000/powerpc-altivec32l.c,
features/rs6000/powerpc-altivec64.c,
features/rs6000/powerpc-altivec64l.c,
features/rs6000/powerpc-cell32l.c,
features/rs6000/powerpc-cell64l.c,
features/rs6000/powerpc-isa205-altivec32l.c,
features/rs6000/powerpc-isa205-altivec64l.c,
features/rs6000/powerpc-isa205-vsx32l.c,
features/rs6000/powerpc-isa205-vsx64l.c,
features/rs6000/powerpc-vsx32.c,
features/rs6000/powerpc-vsx32l.c,
features/rs6000/powerpc-vsx64.c,
features/rs6000/powerpc-vsx64l.c, features/s390-gs-linux64.c,
features/s390-tevx-linux64.c, features/s390-vx-linux64.c,
features/s390x-gs-linux64.c, features/s390x-tevx-linux64.c,
features/s390x-vx-linux64.c: Re-generate.
This patch prepares the current GDB port of the OpenRISC processor from
https://github.com/openrisc/binutils-gdb for upstream merging.
Testing has been done with a cgen sim provided in a separate patch. This
has been tested with 2 toolchains. GCC [1] 5.4.0 from the OpenRISC
project with Newlib [2] and GCC 5.4.0 with Musl [3] 1.1.4.
It supports or1knd (no delay slot target).
The default target is or1k (with delay slot).
You can change the target arch with:
(gdb) set architecture or1knd
The target architecture is assumed to be or1knd
[1] https://github.com/openrisc/or1k-gcc
[2] https://github.com/openrisc/newlib
[3] https://github.com/openrisc/musl-cross
gdb/doc/ChangeLog:
2017-12-12 Stafford Horne <shorne@gmail.com>
Stefan Wallentowitz <stefan@wallentowitz.de>
Franck Jullien <franck.jullien@gmail.com>
Jeremy Bennett <jeremy.bennett@embecosm.com>
* gdb.texinfo: Add OpenRISC documentation.
gdb/ChangeLog:
2017-12-12 Stafford Horne <shorne@gmail.com>
Stefan Wallentowitz <stefan@wallentowitz.de>
Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Franck Jullien <franck.jullien@gmail.com>
Jeremy Bennett <jeremy.bennett@embecosm.com>
* configure.tgt: Add targets for or1k and or1knd.
* or1k-tdep.c: New file.
* or1k-tdep.h: New file.
* features/Makefile: Add or1k.xml to build.
* features/or1k.xml: New file.
* features/or1k-core.xml: New file.
* features/or1k.c: Generated.
This patch makes tdesc_type an abstract base class and creates three
subclasses:
- tdesc_type_builtin, for builtin types
- tdesc_type_vector, for vector types
- tdesc_type_with_fields, for struct, union, flag and enum types
This allows getting rid of the union in tdesc_type and to not allow the
std::vector separately. I tried to go further and create separate
classes for struct, union, flag and enum, but it proved too difficult.
One problem is that from the point of the of the target description
code, the types tdesc_type_* are opaque (only forward-declared).
Therefore, it doesn't know about inheritance relationship between those
classes. This makes it impossible to make functions that accept a
pointer to a base class and pass a pointer to a derived class, for
example. I think this patch here is a good compromise, and if somebody
wants to improve things further, the door is open.
A make_gdb_type virtual pure method is added to tdesc_type, which
replaces the current tdesc_gdb_type function. Calling this method on a
tdesc_type returns the corresponding built gdb type.
gdb/ChangeLog:
* target-descriptions.c (struct tdesc_type): Use default
destructor.
<u>: Remove.
<accept>: Remove.
(struct tdesc_type_builtin): New.
(struct tdesc_type_vector): New.
(struct tdesc_type_with_fields): New.
(tdesc_predefined_types): Change type to tdesc_type_builtin[].
(tdesc_gdb_type): Remove.
(tdesc_register_type): Adjust.
(tdesc_create_vector): Create tdesc_type_vector.
(tdesc_create_struct): Create tdesc_type_with_fields.
(tdesc_set_struct_size): Change parameter type.
(tdesc_create_union): Create tdesc_type_with_fields.
(tdesc_create_flags): Likewise.
(tdesc_create_enum): Likewise.
(tdesc_add_field): Change parameter type.
(tdesc_add_typed_bitfield): Likewise.
(tdesc_add_bitfield): Likewise.
(tdesc_add_flag): Likewise.
(tdesc_add_enum_value): Likewise.
(print_c_tdesc) <visit>: Remove overload with tdesc_type
parameter, add overloads for tdesc_type_builtin,
tdesc_type_with_fields and tdesc_type_vector.
<m_printed_type>: Remove.
<m_printed_element_type, m_printed_type_with_fields>: Add.
* target-descriptions.h (tdesc_create_enum): Change return type.
(tdesc_add_typed_bitfield): Change parameter type.
(tdesc_add_enum_value): Change parameter type.
* xml-tdesc.c (struct tdesc_parsing_data) <current_type>: Change
type to tdesc_type_with_fields.
(tdesc_start_struct): Adjust.
(tdesc_start_flags): Adjust.
(tdesc_start_enum): Adjust.
(tdesc_start_field): Adjust.
* arch/tdesc.h (struct tdesc_type_builtin): Forward-declare.
(struct tdesc_type_vector): Forward-declare.
(struct tdesc_type_with_fields): Forward-declare.
(tdesc_create_struct): Change return type.
(tdesc_create_union): Likewise.
(tdesc_create_flags): Likewise.
(tdesc_add_field): Change parameter type.
(tdesc_set_struct_size): Likewise.
(tdesc_add_bitfield): Likewise.
(tdesc_add_flag): Likewise.
* features: Re-generate C files.
gdb/gdbserver/ChangeLog:
* tdesc.c (struct tdesc_type): Change return type.
(tdesc_add_flag): Change parameter type.
(tdesc_add_bitfield): Likewise.
(tdesc_add_field): Likewise.
(tdesc_set_struct_size): Likewise.
Make the name, group and type fields of tdesc_reg std::strings. This
way, we don't have to manually free them in ~tdesc_reg.
Doing so results in a small change in the generated tdesc. Instead of
passing an empty string for the group parameter of tdesc_create_reg, the
two modified tdesc now pass NULL. The end result should be the same.
gdb/ChangeLog:
* target-descriptions.c (struct tdesc_reg) <tdesc_reg>: Change
type of name_ parameter, adjust to std::string change.
<name, group, type>: Change type to std::string.
<~tdesc_reg>: Replace with default implementation.
<operator==>: Adjust.
(tdesc_find_register_early): Adjust.
(tdesc_register_name): Adjust.
(tdesc_register_type): Adjust.
(tdesc_register_in_reggroup_p): Adjust.
(class print_c_tdesc) <visit>: Adjust.
(class print_c_feature) <visit>: Adjust.
This patch changes tic6x target descriptions to be more flexible. Rebuild
tic6x-uclinux GDBserver with my x86 g++, and the unit test passes.
gdb:
2017-11-24 Yao Qi <yao.qi@linaro.org>
* arch/tic6x.c: New file.
* arch/tic6x.h: New file.
* features/Makefile (FEATURE_XMLFILES): Add tic6x-c6xp.xml,
tic6x-core.xml and tic6x-gp.xml.
* features/tic6x-c6xp.c: Generated.
* features/tic6x-core.c: Generated.
* features/tic6x-gp.c: Generated.
* target-descriptions.c (maint_print_c_tdesc_cmd): Match
"tic6x-".
gdb/gdbserver:
2017-11-24 Yao Qi <yao.qi@linaro.org>
* configure.srv: Set $srv_regobj for tic6x-linux.
* linux-tic6x-low.c: Include "arch/tic6x.h" and "tdesc.h".
(tic6x_read_description): Move some code to tic6x_arch_setup.
(tic6x_tdesc_test): New function.
(initialize_low_arch): Call selftests::register_test.
They are not used by GDB nor by GDBserver. This patch removes them.
gdb:
2017-11-16 Yao Qi <yao.qi@linaro.org>
* features/tic6x-c62x.xml: Remove.
* features/tic6x-c64x.xml: Remove.
* features/tic6x-c64xp.xml: Remove.
tdesc_nios2_linux is not used at all. Remove features/nios2-linux.c,
and don't generate it anymore.
gdb:
2017-11-15 Yao Qi <yao.qi@linaro.org>
* features/Makefile (XMLTOC): Remove nios2-linux.xml.
* features/nios2-linux.c: Remove.
* nios2-linux-tdep.c (_initialize_nios2_linux_tdep): Don't call
initialize_tdesc_nios2_linux.
features/*.c are generated from *.xml files, in order to get pre-defined
target descriptions, (for native debugging, for example). However, these
pre-generated tdesc_tic6x_* are not used in GDB at all. This patch removes
features/tic6x-*.c files.
gdb:
2017-10-16 Yao Qi <yao.qi@linaro.org>
* features/Makefile (XMLTOC): Remove tic6x-*.xml.
* features/tic6x-c62x.c: Remove.
* features/tic6x-c64x-linux.c: Remove.
* features/tic6x-c64x.c: Remove.
* features/tic6x-c64xp-linux.c: Remove.
* features/tic6x-c64xp.c: Remove.
* tic6x-linux-tdep.c (_initialize_tic6x_linux_tdep): Don't call
initialize_tdesc_tic6x_*_linux functions.
* tic6x-tdep.c (_initialize_tic6x_tdep): Don't call
initialize_tdesc_tic6x_* functions.
tic6x-uclinux GDBserver uses linux target descriptions, instead of these
non-linux target descriptions. So we can remove these *.dat files.
gdb:
2017-10-16 Yao Qi <yao.qi@linaro.org>
* features/Makefile (WHICH): Remove tic6x-c64xp, tic6x-c64x
tic6x-c62x.
* regformats/tic6x-c62x.dat: Remove.
* regformats/tic6x-c64x.dat: Remove.
* regformats/tic6x-c64xp.dat: Remove.
Nowadays, we have six tic6x expedite registers, which are duplicated.
tic6x-c64xp-expedite = A15,PC
tic6x-c64x-expedite = A15,PC
tic6x-c62x-expedite = A15,PC
tic6x-c64xp-linux-expedite = A15,PC
tic6x-c64x-linux-expedite = A15,PC
tic6x-c62x-linux-expedite = A15,PC
in features/Makefile, we have
echo "expedite:$(if $($*-expedite),$($*-expedite),$($(firstword $(subst -, ,$(notdir $*)))-expedite))" \
>> $(outdir)/$*.tmp
which means for a given bar/foo-baz.xml, we'll look for either
bar/foo-baz-expedite or foo-expedite. We can define only one generic
expedite register for all different ti6cx and s390x target descriptions.
Actually, we've done that for x86 target descriptions.
Re-run 'make GDB=/path/build/gdb all' to regenerate regformats/*.dat files,
and they are not changed.
gdb:
2017-10-13 Yao Qi <yao.qi@linaro.org>
* features/Makefile: Remove tic6x-*-expedite, add tic6x-expedite.
Remove s390x-*-expedite, add s390x-expedite.
Newer Linux kernel versions offer two new register sets in support of the
z/Architecture's guarded storage facility. This patch adds XML
descriptions and the respective autogenerated .c and .dat files for
s390/s390x targets with this feature.
gdb/ChangeLog:
* features/s390-gs-linux64.xml: New file.
* features/s390-gs.xml: New file.
* features/s390-gsbc.xml: New file.
* features/s390x-gs-linux64.xml: New file.
* features/Makefile (WHICH): Add s390-gs-linux64 and
s390x-gs-linux64.
(s390-gs-linux64-expedite, s390x-gs-linux64-expedite): New macros.
(XMLTOC): Add s390-gs-linux64.xml and s390x-linux64.xml.
* features/s390-gs-linux64.c: New generated file.
* features/s390x-gs-linux64.c: New file.
* regformats/s390-gs-linux64.dat: New file.
* regformats/s390x-gs-linux64.dat: New file.
In an old commit the backslash of was missing in the rule for creating the
i386-avx-mpx-avx512-pku.dat file. No need to regenerate the files, this
was done by another commit from Yao.
2017-09-20 Walfred Tedeschi <walfred.tedeschi@intel.com>
* features/Makefile (i386-avx-mpx-avx512-pku.dat): Add backslash.
GDBserver still uses pre-generated target descriptions in order to
reply to GDB's query on target description (see xml-builtin-generated.c
in GDBserver build directory). This patch teaches GDBserver to
create XML contents according to the target descriptions rather than
using pre-generated ones.
First, change target feature c files to pass the feature xml file
name to tdesc_create_feature, so that target description in GDBserver
can record them, and create XML contents from these features in
buffer, like
...
<xi:include href="$FEATURE1_XML_NAME"/>
<xi:include href="$FEATURE2_XML_NAME"/>
...
and send this buffer back to GDB.
Note that this patch reuses target_desc.xmltarget a little bit, which is
to hold the XML contents dynamically generated in tdesc_get_features_xml.
However, it is not xfree'ed in ~target_desc, because we can't tell it is
from xstrdup or a literal string. Since we don't delete target_desc,
there is no memory leak yet. After we change all target descriptions to
the new style, target_desc.xmltarget is from xstrdup, then, we can safely
xfree it in ~target_desc.
gdb:
2017-09-05 Yao Qi <yao.qi@linaro.org>
* arch/tdesc.h (tdesc_create_feature): Add an argument xml.
* target-descriptions.c (tdesc_create_feature): Likewise, and
adjust code.
* features/i386/32bit-avx.c: Re-generated.
* features/i386/32bit-avx512.c: Re-generated.
* features/i386/32bit-core.c: Re-generated.
* features/i386/32bit-linux.c: Re-generated.
* features/i386/32bit-mpx.c: Re-generated.
* features/i386/32bit-pkeys.c: Re-generated.
* features/i386/32bit-sse.c: Re-generated.
gdb/gdbserver:
2017-09-05 Yao Qi <yao.qi@linaro.org>
* linux-x86-tdesc.c: Don't include <inttypes.h>.
(i386_linux_read_description) [!IN_PROCESS_AGENT]: Call
set_tdesc_architecture and set_tdesc_osabi. Remove code setting
.xmltarget.
* server.c (get_features_xml): Call tdesc_get_features_xml.
* tdesc.c (set_tdesc_architecture): New function.
(set_tdesc_osabi): New function.
(tdesc_get_features_xml): New function.
(tdesc_create_feature): Add an argument.
* tdesc.h (struct target_desc) <features>: New field.
<arch, osabi>: New field.
(~target_desc): xfree features, arch, and osabi.
(target_desc::oerator==): Don't compare .xmltarget.
[!IN_PROCESS_AGENT] (set_tdesc_architecture): Declare.
(set_tdesc_osabi): Likewise.
(tdesc_get_features_xml): Likewise.
tdesc_i386_XXX_linux is used in many places in linux-x86-low.c and this
patch adds a new function i386_linux_read_description to return the right
tdesc according to xcr0. i386_linux_read_description is quite similar to
the counterpart in GDB, and the following patch will share the duplicated
code, so this patch adds arch/tdesc.h includes the declarations of various
tdesc apis which are used by the shared code. The generated c feature
files can include arch/tdesc.h only.
gdb/gdbserver:
2017-09-05 Yao Qi <yao.qi@linaro.org>
* configure.srv (srv_tgtobj): Append linux-x86-tdesc.o.
(ipa_obj): Likewise.
* linux-i386-ipa.c: Include common/x86-xstate.h
(get_ipa_tdesc): Call i386_linux_read_description.
(initialize_low_tracepoint): Don't call init_registers_XXX
functions, call initialize_low_tdesc instead.
* linux-x86-low.c (x86_linux_read_description): Call
i386_linux_read_description.
(initialize_low_arch): Don't call init_registers_i386_XXX
functions, call initialize_low_tdesc.
* linux-x86-tdesc.c: New file.
* linux-x86-tdesc.h (x86_linux_tdesc): New X86_TDESC_LAST.
(i386_get_ipa_tdesc_idx): Declare.
(i386_get_ipa_tdesc): Declare.
(initialize_low_tdesc): Declare.
gdb:
2017-09-05 Yao Qi <yao.qi@linaro.org>
* arch/tdesc.h: New file.
* regformats/regdat.sh: Generate code using tdesc_create_reg.
* target-descriptions.c: Update comments.
* target-descriptions.h: Include "arch/tdesc.h". Remove the
declarations.
* features/i386/32bit-avx.c: Re-generated.
* features/i386/32bit-avx512.c: Re-generated.
* features/i386/32bit-core.c: Re-generated.
* features/i386/32bit-linux.c: Re-generated.
* features/i386/32bit-mpx.c: Re-generated.
* features/i386/32bit-pkeys.c: Re-generated.
* features/i386/32bit-sse.c: Re-generated.
Instead of using pre-generated target descriptions, this patch
changes GDB to lazily and dynamically create target descriptions
according to the target hardware capability (xcr0 in i386).
This support any combination of target features.
Some reg in target description has "regnum" attribute, so its register
number is got from the attribute value instead from sequential allocation.
<reg name="xmm0" bitsize="128" type="vec128" regnum="32"/>
when target description is created, it should match the regnum, so this
patch adds a new field m_next_regnum to track it, if attribute number is
greater than the m_next_regnum, print the code to set register number
explicitly.
gdb:
2017-07-26 Yao Qi <yao.qi@linaro.org>
* i386-linux-tdep.c: Don't include features/i386/i386-*linux.c.
Include features/i386/32bit-*.c.
(i386_linux_read_description): Generate target description if it
doesn't exist.
(_initialize_i386_linux_tdep): Don't call _initialize_tdesc_i386
functions.
* features/i386/32bit-linux.c: Re-generated.
* features/i386/32bit-sse.c: Likewise.
* target-descriptions.c (print_c_feature::visit): Print code to
set register number if needed.
(print_c_feature) <m_next_regnum>: New field.
This patch changes Makefile and command "maint print c-files" so
that GDB can print c files for features instead target description.
Previously, we feed GDB a target description xml file, which generate
c files including multiple features.
With this patch, in Makefile, we wrap each feature xml file, and
create a temp target description which include only one feature.
Then, adjust the target description printer for them, and print
a c function for each given feature, so that we can use these
c functions later to create target description in a flexible way.
gdb:
2017-07-26 Yao Qi <yao.qi@linaro.org>
* features/Makefile (CFILES): Rename with TDESC_CFILES.
(FEATURE_XMLFILES): New.
(FEATURE_CFILES): New.
New rules.
(clean-cfiles): Remove generated c files.
* features/i386/32bit-avx.c: Generated.
* features/i386/32bit-avx512.c: Generated.
* features/i386/32bit-core.c: Generated.
* features/i386/32bit-linux.c: Generated.
* features/i386/32bit-mpx.c: Generated.
* features/i386/32bit-pkeys.c: Generated.
* features/i386/32bit-sse.c: Generated.
* target-descriptions.c: Include algorithm.
(tdesc_element_visitor): Add method visit_end.
(print_c_tdesc): Implement visit_end.
(print_c_tdesc:: m_filename_after_features): Move it to
protected.
(print_c_feature): New class.
(maint_print_c_tdesc_cmd): Use print_c_feature if XML file
name starts with "i386/32bit-".
Nowadays, we need two steps to print c files for xml target description,
that is, 1) read xml target description in, update the current tdesc,
2) visit the current tdesc, print the c file. It is unnecessary to
involve in current tdesc, and some validations in each gdbarch are
performed unnecessarily, which will reject some target descriptions if
they are missing some mandatory feature.
This patch adds an optional argument to "maint print c-tdesc", which
is an XML file target description, so that we can combine the two
steps above into one step, and don't have to involve in global current
tdesc.
gdb:
2017-07-26 Yao Qi <yao.qi@linaro.org>
* NEWS: Mention it.
* features/Makefile (%.c: %.xml): Pass the xml file name to
command "maint print c-tdesc".
* target-descriptions.c (maint_print_c_tdesc_cmd): Get file
name from 'arg'.
gdb/doc:
2017-07-26 Yao Qi <yao.qi@linaro.org>
* gdb.texinfo (Maintenance Commands): Document optional
argument of "maint print c-tdesc".
Exchange the order of 32bit-linux.xml and 32bit-sse.xml in
i386/i386-linux.xml, to align with other i386 linux .xml files.
gdb:
2017-06-20 Yao Qi <yao.qi@linaro.org>
* features/i386/i386-linux.xml: Exchange the order of including
32bit-linux.xml and 32bit-sse.xml.
* features/i386/i386-linux.c: Regenerated.
Alan Hayward
John Baldwin
Andrew Burgess
Joel Brobecker
Edjunior Barbosa Machado
Simon Marchi
Franck Jullien
Simon Marchi
Yao Qi
Andreas Arnez
Walfred Tedeschi
Michael Sturm