PR binutils/21649
* som.c (setup_sections): NUL terminate the space_strings buffer.
Check that the space.name field does not index beyond the end of
the space_strings buffer.
Use DWARF_VMA_FMT to report error to work for both 32-bit and 64-bit
builds.
* dwarf.c (READ_ULEB): Use DWARF_VMA_FMT to report error.
(READ_SLEB): Likewise.
This is the portion of gdb_test which performs the match against
the RE (regular expression) passed to it:
return [gdb_test_multiple $command $message {
-re "\[\r\n\]*($pattern)\[\r\n\]+$gdb_prompt $" {
if ![string match "" $message] then {
pass "$message"
}
}
In a test that I've been working on recently, I wanted to use
a backreference - that's the \1 in the the RE below:
gdb_test "info threads" \
{.*[\r\n]+\* +([0-9]+) +Thread[^\r\n]* do_something \(n=\1\) at.*}
Put into English, I wanted to make sure that the value of n passed to
do_something() is the same as the thread number shown in the "info
threads" Id column. (I've structured the test case so that this
*should* be the case.)
It didn't work though. It turned out that ($pattern) in the RE
noted above is capturing the attempted backreference. So, in this
case, the backreference does not refer to ([0-9]+) as intended, but
instead refers to ($pattern). This is wrong because it's not what I
intended, but is also wrong because, if allowed, it could only match a
string of infinite length.
This problem can be fixed by using parens for a "noncapturing
subpattern". The way that this is done, syntactically, is to use
(?:$pattern) instead of ($pattern).
My research shows that this feature has been present since tcl8.1 which
was released in 1999.
The current tcl version is 8.6 - at least that's what I have on my
machine. It appears to me that mingw uses some subversion of tcl8.4
which will also have this feature (since 8.4 > 8.1).
So it seems to me that any platform upon which we might wish to test
GDB will have a version of tcl which has this feature. That being the
case, my hope is that there won't be any objections to its use.
When I looked at the implementation of gdb_test, I wondered whether
the parens were needed at all. I've concluded that they are. In the
event that $pattern is an RE which uses alternation at the top level,
e.g. a|b, we need to make $pattern a subpattern (via parens) to limit
the extend of the alternation. I.e, we don't want the alternation to
extend to the other portions of the RE which gdb_test uses to match
potential blank lines at the beginning of the pattern or the gdb
prompt at the end.
gdb/testsuite/ChangeLog:
* gdb.exp (gdb_test): Using noncapturing parens for the $pattern
subpattern.
PR binutils/21648
* dwarf.c (LEB): Rename to SKIP_ULEB and READ_ULEB. Add check for
reading a value that is too big for the containing variable.
(SLEB): Rename to SKIP_SLEB and READ_SLEB. Add similar check.
Replace uses of LEB and SLEB with appropriate new macro.
(display_debug_frames): Use an unsigned int for the 'reg'
variable. Use a signed long for the 'l' variable.
=== Context ===
This patch is part of a patch series to add support for ARMv8-R
architecture. Its purpose is to rework the Tag_CPU_arch build attribute
value selection to (i) match architecture or CPU if specified by user
without any need for hack and (ii) match an architecture with all the
features used if in autodetection mode or return an error.
=== Motivation ===
Currently, Tag_CPU_arch build attribute value selection assumes that an
architecture is always a superset of architectures released earlier. As
such, the logic is to browse architectures in chronological order of
release and selecting the Tag_CPU_arch value of the last one to
contribute a feature used[1]/requested[2] not contributed by earlier
architectures.
[1] in case of autodetection mode
[2] otherwise, ie. in case of -mcpu/-march or associated directives
This logic fails the two objectives mentionned in the Context section.
First, due to the assumption it does an architecture can be selected
while not having all the features used/requested which fails the second
objective. Second, not doing an exact match when an architecture or CPU
is selected by the user means the wrong value is chosen when a later
architecture provides a subset of the feature bits of an earlier
architecture. This is the case for the implementation of ARMv8-R (see
later patch).
An added benefit of this patch is that it is possible to easily generate
more consistent build attribute by setting the feature bits from the
architecture matched in aeabi_set_public_attributes in autodetection
mode. This is better done as a separate patch because lots of testcase'
expected results must then be updated accordingly.
=== Patch description ===
The patch changes the main logic for Tag_CPU_arch and
Tag_CPU_arch_profile
values selection to:
- look for an exact match in case an architecture or CPU was specified
on the command line or in a directive
- select the first released architecture that provides a superset of the
feature used in the autodetection case
- select the most featureful architecture in case of -march=all
The array cpu_arch_ver is updated to include all architectures in order
to make the first point work.
Note that when looking for an exact match, the architecture with
selected extension is tried first and then only the architecture. This
is because some architectures are exactly equivalent to an earlier
architecture with its extensions selected. ARMv6S-M (= ARMv6-M + OS
extension) and ARMv6KZ (ARMv6K + security extension) are two such
examples.
Other adjustments are also necessary in aeabi_set_public_attributes to
make this change work.
1) The logic to set Tag_ARM_ISA_use and Tag_THUMB_ISA_use must check the
absence of feature bit used/requested to decide whether to give the
default value for empty files (see EABI attribute defaults test). It was
previously checking that arch == 0 which would only happen if no feature
bit could be matched by any architecture, ie there is no feature bit to
match.
2) A fallback to a superset match must exist when no_cpu_selected ()
returns true. This is because aeabi_set_public_attributes is called
again after relaxation and at this point selected_cpu is set from the
previous execution of that function. There is therefore no way to check
whether the user specified an architecture or CPU.
3) Tag_CPU_arch lines are removed from expected output when the
detected architecture should be pre-ARMv4, since 0 is the Tag_CPU_arch
value for pre-ARMv4 architectures and default value for an absent entry
is 0.
2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (fpu_any): Defined from FPU_ANY.
(cpu_arch_ver): Add all architectures and sort by release date.
(have_ext_for_needed_feat_p): New.
(get_aeabi_cpu_arch_from_fset): New.
(aeabi_set_public_attributes): Call above function to determine
Tag_CPU_arch and Tag_CPU_arch_profile values. Adapt Tag_ARM_ISA_use
and Tag_THUMB_ISA_use selection logic to check absence of feature bit
accordingly.
* testsuite/gas/arm/attr-march-armv1.d: Fix expected Tag_CPU_arch build
attribute value.
* testsuite/gas/arm/attr-march-armv2.d: Likewise.
* testsuite/gas/arm/attr-march-armv2a.d: Likewise.
* testsuite/gas/arm/attr-march-armv2s.d: Likewise.
* testsuite/gas/arm/attr-march-armv3.d: Likewise.
* testsuite/gas/arm/attr-march-armv3m.d: Likewise.
* testsuite/gas/arm/pr12198-2.d: Likewise.
include/
* opcode/arm.h (FPU_ANY): New macro.
Update x86 assembler and disassembler for CET v2.0:
https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
1. incsspd and incsspq are changed to take a register opeand with a
different opcode.
2. setssbsy is changed to take no opeand with a different opcode.
gas/
* testsuite/gas/i386/cet-intel.d: Updated.
* testsuite/gas/i386/cet.d: Likewise.
* testsuite/gas/i386/x86-64-cet-intel.d: Likewise.
* testsuite/gas/i386/x86-64-cet.d: Likewise.
* testsuite/gas/i386/cet.s: Update incsspd and setssbsy tests.
* testsuite/gas/i386/x86-64-cet.s: Likewise.
opcodes/
* i386-dis.c (RM_0FAE_REG_5): Removed.
(PREFIX_MOD_3_0F01_REG_5_RM_1): Likewise.
(PREFIX_MOD_3_0F01_REG_5_RM_0): New.
(PREFIX_MOD_3_0FAE_REG_5): Likewise.
(prefix_table): Remove PREFIX_MOD_3_0F01_REG_5_RM_1. Add
PREFIX_MOD_3_0F01_REG_5_RM_0.
(prefix_table): Update PREFIX_MOD_0_0FAE_REG_5. Add
PREFIX_MOD_3_0FAE_REG_5.
(mod_table): Update MOD_0FAE_REG_5.
(rm_table): Update RM_0F01_REG_5. Remove RM_0FAE_REG_5.
* i386-opc.tbl: Update incsspd, incsspq and setssbsy.
* i386-tbl.h: Regenerated.
PR binutils/21639
* vms-misc.c (_bfd_vms_save_sized_string): Use unsigned int as
type of the size parameter.
(_bfd_vms_save_counted_string): Add second parameter - the maximum
length of the counted string.
* vms.h (_bfd_vms_save_sized_string): Update prototype.
(_bfd_vms_save_counted_string): Likewise.
* vms-alpha.c (_bfd_vms_slurp_eisd): Update calls to
_bfd_vms_save_counted_string.
(_bfd_vms_slurp_ehdr): Likewise.
(_bfd_vms_slurp_egsd): Likewise.
(Parse_module): Likewise.
=== Context ===
This patch is part of a patch series to add support for ARMv8-R
architecture. Its purpose is to allow ARMv7 to be selected in automatic
architecture selection in presence of Thumb division instructions.
=== Motivation ===
any-idiv.d and automatic-sdiv.d testcases in GAS testsuite expect
autodetection code to select ARMv7 in presence of Thumb integer
division. However, the definition of ARM_AEXT_V7 and thus ARM_ARCH_V7 do
not contain these instructions and the idiv extension is only available
for ARMv7-A and ARMv7-R. Therefore, under the stricter automatic
detection code proposed in the subsequent patch of the series ARMv7 is
refused if a Thumb division instruction is present.
=== Patch description ===
This patch adds a new "idiv" extension after the existing one that is
available to all ARMv7 targets. This new entry is ignored by all current
code parsing arm_extensions such that it would be unavailable on the
command-line and remain a purely internal hack, easily removed in favor
of a better solution later. This is considered though by the subsequent
patch reworking automatic detection of build attributes such that ARMv7
is allowed to match in present of Thumb division instructions. For good
measure, comments are added in all instances of code browsing
arm_extensions to mention the expected behavior in case of duplicate
entries as well as a new testcase.
2017-06-20 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (arm_extensions): New duplicate idiv entry to enable
Thumb division for ARMv7 architecture.
(arm_parse_extension): Document expected behavior for duplicate
entries.
(s_arm_arch_extension): Likewise.
* testsuite/gas/arm/forbid-armv7-idiv-ext.d: New test.
* testsuite/gas/arm/forbid-armv7-idiv-ext.l: New expected output for
above test.
=== Context ===
This patch is part of a patch series to add support for ARMv8-R
architecture. Its purpose is to set the feature bits on which to decide
what the build attributes should be according to the mode
(autodetection, user specified architecture or CPU, or
-march/-mcpu=all).
=== Motivation ===
Currently, the flags variable which is used to determine the build
attribute is constructed from the instruction used (arm_arch_used and
thumb_arch_used) as well as the user specified architecture or CPU
(selected_cpu). This means when several .arch are specified the
resulting feature bits can be such that no architecture provide them
all and can thus result in incorrect Tag_CPU_arch. See for instance
what having both .arch armv8-a and .arch armv8-m.base would result in.
This is not caught by the testsuite because of further bugs in the
Tag_CPU_arch build attribute value selection logic (see next patch in
the series).
=== Patch description ===
As one would expect, this patch solves the problem by setting flags
from feature bits used if in autodetection mode [1] and from
selected_cpu otherwise. The logic to set arm_ext_v1, arm_ext_v4t and
arm_ext_os feature bits is also moved to only run in autodetection mode
since otherwise the architecture or CPU would have a consistent set of
feature bits already.
[1] No architecture or CPU was specified by the user
2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (aeabi_set_public_attributes): Populate flags from
feature bits used or selected_cpu depending on whether a CPU was
selected by the user.
I was lazy when adding indx_ to Plt_stub_ent. The field isn't part of
the key, so ought to be part of the mapped type. Make it so.
* powerpc.cc (Plt_stub_key): Rename from Plt_stub_ent. Remove indx_.
(Plt_stub_key_hash): Rename from Plt_stub_ent_hash.
(struct Plt_stub_ent): New.
(Plt_stub_entries): Map from Plt_stub_key to Plt_stub_ent. Adjust
use throughout file.
These don't need a following nop. Also, a localentry:0 plt call
marked with an R_PPC64_TOCSAVE reloc should ignore the tocsave.
There's no need to save r2 in the prologue for such calls.
* elf64-ppc.c (ppc64_elf_size_stubs): Test for localentry:0 plt
calls before tocsave calls.
(ppc64_elf_relocate_section): Allow localentry:0 plt calls without
following nop.
=== Context ===
This patch is part of a patch series to add support for ARMv8-R
architecture. Its purpose is to simplify the logic to decide whether to
set Tag_DSP_extension.
=== Motivation ===
To decide whether to set Tag_DSP_extension, the current code was
checking whether the flags had DSP instruction but the architecture
selected for Tag_CPU_arch did not have any. This was necessary because
extension feature bit were not available separately. This is no longer
necessary and can be simplified.
=== Patch description ===
The patch change the logic to set Tag_DSP_extension to check whether any
DSP feature bit is set in the extension feature bit, as per the
definition of that build attribute. The patch also removes all
definitions of arm_arch which is now unneeded.
2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (aeabi_set_public_attributes): Test *mcpu_ext_opt to
decide whether to set Tag_DSP_extension build attribute value. Remove
now useless arm_arch variable.
=== Context ===
This patch is part of a patch series to add support for ARMv8-R
architecture. Its purpose is to keep the distinction between
architecture feature bits and extension ones after parsing has occured.
=== Motivation ===
This distinction is necessary to allow the Tag_CPU_arch build attribute
value to be exactly as per the architecture of the selected CPU. With
mixed architecture and extension feature bit, it is impossible to find
an architecture with an exact match of feature bit and the build
attribute value logic must then select the closest match which might not
be the right architecture. The previous patch in the patch series makes
the distinction possible when parsing -mcpu and .cpu directives but the
distinction gets lost after. Similarly feature bits contributed by
extensions in -march or .arch_extensions directive are mixed together
with architecture extensions.
=== Patch description ===
The patch adds new feature bit pointer for extension feature bits.
Information from the parsing regarding extensions can then be kept
separate in those. This requires adapting arm_parse_extension to deal
with two feature bits, allowing the architecture bits to be marked as
const. It also requires extra care when setting cpu_variant and
selected_cpu because the extension bits are optional since there might
not be any extension in use.
Note that contrary to cpu feature bits, the extension feature bits are
made read/write and are always dynamically allocated. This allows to
unconditionally free them in arm_md_post_relax added for this occasion,
thereby fixing a longstanding memory leak when arm_parse_extension was
invoked (XNEW of ext_fset without corresponding XDELETE).
Introduction of arm_md_post_relax is necessary to only free the
extension feature bits after aeabi_set_attribute_string has been called
for the last time.
2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (dyn_mcpu_ext_opt): New static variable.
(dyn_march_ext_opt): Likewise.
(md_begin): Copy extension feature bits alongside architecture ones.
Merge extensions feature bits in selected_cpu and cpu_variant if there
is some.
(arm_parse_extension): Pass architecture and extension feature bits in
separate parameters, with architecture bits being read only. Update
**opt_p directly rather than *ext_set and initialize it if needed.
(arm_parse_cpu): Stop merging architecture and extension feature bits
and instead use mcpu_cpu_opt and dyn_mcpu_ext_opt to memorize them
respectively. Adapt to change in parameters of arm_parse_extension.
(arm_parse_arch): Adapt to change in parameters of arm_parse_extension.
(aeabi_set_attribute_string): Make function static.
(arm_md_post_relax): New function.
(s_arm_cpu): Stop merging architecture and extension feature bits and
instead use mcpu_cpu_opt and dyn_mcpu_ext_opt to memorize them
respectively. Merge extension feature bits in cpu_variant
if there is any.
(s_arm_arch): Reset extension feature bit. Set selected_cpu from
*mcpu_cpu_opt and cpu_variant from selected_cpu and *mfpu_opt for
consistency with s_arm_cpu.
(s_arm_arch_extension): Update *dyn_mcpu_ext_opt rather than
selected_cpu, allocating it before hand if needed. Set selected_cpu
from it and then cpu_variant.
(s_arm_fpu): Merge *mcpu_ext_opt feature bits if any in cpu_variant.
* config/tc-arm.h (md_post_relax_hook): Set to arm_md_post_relax.
(aeabi_set_public_attributes): Delete external declaration.
(arm_md_post_relax): Declare externally.
=== Context ===
This patch is part of a patch series to add support for ARMv8-R
architecture. Its purpose is to distinguish for a CPU the feature bits
coming from its architecture from the feature bits coming from
extension(s) available in this CPU.
=== Motivation ===
This distinction is necessary to allow the Tag_CPU_arch build attribute
value to be exactly as per the architecture of the selected CPU. With
mixed architecture and extension feature bit, it is impossible to find
an architecture with an exact match of feature bit and the build
attribute value logic must then select the closest match which might not
be the right architecture.
=== Patch description ===
The patch creates a new field in the arm_cpus table to hold the feature
set for the extensions available in each CPU. The existing architecture
feature set is then updated to remove those feature bit. The patch also
takes advantage of all the lines being changed to reindent the whole
table.
Note: This patch *adds* a memory leak due to mcpu_cpu_opt sometimes
pointing to dynamically allocated feature bits which is never freeed.
The subsequent patch in the series solves this issue as well as a
preexisting identical issue in arm_parse_extension. The patches are kept
separate for ease of review since they are both big enough already.
2017-06-21 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (struct arm_cpu_option_table): New ext field.
(ARM_CPU_OPT): Add parameter to set new ext field and reorder canonical
name field just after the name field.
(arm_cpus): Move extension feature bit from value field to ext field,
reorder parameter according to changes in ARM_CPU_OPT and reindent.
(arm_parse_cpu): Point mcpu_cpu_opt to a bitfield merging the value and
ext field from the selected arm_cpus entry.
(s_arm_cpu): Likewise.
The commit
d309493 target: consider addressable unit size when reading/writing memory
introduced the possibility of reading memory of targets with
non-8-bit-bytes (e.g. memories that store 16 bits at each address).
The documentation of target_read and target_write was updated
accordingly, but to_xfer_partial, which is very related, wasn't updated.
This commit fixes that.
gdb/ChangeLog:
* target.h (struct target_ops) <to_xfer_partial>: Update doc to
talk about addressable units instead of bytes.
PR binutils/21640
* elf.c (setup_group): Zero the group section pointer list after
allocation so that loops can be caught. Check for NULL pointers
when processing a group list.
* aarch64.cc (scan_reloc_for_stub): Use plt_address_for_global to
calculate the symbol value.
(scan_reloc_section_for_stubs): Allow stubs to be created for
section symbols.
(maybe_apply_stub): Handle creating stubs for weak symbols to
match the code in scan_reloc_for_stub.
Even though C++11 supports modifying containers using a const_iterator
(e.g., calling the 'erase' method of a std::vector), early versions of
libstdc++ did not implement that. Some of our buildslaves are using
these versions (e.g., the AArch64 buildslave uses gcc 4.8.8), and my
previous commit causes a breakage on them. The solution is simple:
just use a normal iterator, without const.
gdb/ChangeLog:
2017-06-20 Sergio Durigan Junior <sergiodj@redhat.com>
* common/environ.c (gdb_environ::unset): Use '::iterator' instead
of '::const_iterator'.
As part of the preparation necessary for my upcoming task, I'd like to
propose that we turn gdb_environ into a class. The approach taken
here is simple: the class gdb_environ contains everything that is
needed to manipulate the environment variables. These variables are
stored in an std::vector<char *>, which can be converted to a 'char
**' and passed as argument to functions that need it.
The usage has not changed much. As per Pedro's suggestion, this class
uses a static factory method initialization. This means that when an
instance is created, it is initially empty. When needed, it has to be
initialized using the static method 'from_host_environ'.
As mentioned before, this is a preparation for an upcoming work that I
will be posting in the next few weeks or so. For that work, I'll
probably create another data structure that will contain all the
environment variables that were set by the user using the 'set
environment' command, because I'll need access to them. This will be
much easier with the class-ification of gdb_environ.
As noted, this has been regression-tested with the new version of
environ.exp and no regressions were found.
gdb/ChangeLog:
2017-06-20 Sergio Durigan Junior <sergiodj@redhat.com>
* Makefile.in (SUBDIR_UNITTESTS_SRCS): Add
'unittests/environ-selftests.c'.
(SUBDIR_UNITTESTS_OBS): Add 'environ-selftests.o'.
* charset.c (find_charset_names): Declare object 'iconv_env'.
Update code to use 'iconv_env' object. Remove call to
'free_environ'.
* common/environ.c: Include <utility>.
(make_environ): Delete function.
(free_environ): Delete function.
(gdb_environ::clear): New function.
(gdb_environ::operator=): New function.
(gdb_environ::get): Likewise.
(environ_vector): Delete function.
(set_in_environ): Delete function.
(gdb_environ::set): New function.
(unset_in_environ): Delete function.
(gdb_environ::unset): New function.
(gdb_environ::envp): Likewise.
* common/environ.h: Include <vector>.
(struct gdb_environ): Delete; transform into...
(class gdb_environ): ... this class.
(free_environ): Delete prototype.
(init_environ, get_in_environ, set_in_environ, unset_in_environ,
environ_vector): Likewise.
* infcmd.c (run_command_1): Update code to call
'envp' from 'gdb_environ' class.
(environment_info): Update code to call methods from 'gdb_environ'
class.
(unset_environment_command): Likewise.
(path_info): Likewise.
(path_command): Likewise.
* inferior.c (inferior::~inferior): Delete call to 'free_environ'.
(inferior::inferior): Initialize 'environment' using the host's
information.
* inferior.h: Remove forward declaration of 'struct gdb_environ'.
Include "environ.h".
(class inferior) <environment>: Change type from 'struct
gdb_environ' to 'gdb_environ'.
* mi/mi-cmd-env.c (mi_cmd_env_path): Update code to call
methods from 'gdb_environ' class.
* solib.c (solib_find_1): Likewise
* unittests/environ-selftests.c: New file.
gdb/gdbserver/ChangeLog:
2017-06-20 Sergio Durigan Junior <sergiodj@redhat.com>
* linux-low.c (linux_create_inferior): Adjust code to access the
environment information via 'gdb_environ' class.
* lynx-low.c (lynx_create_inferior): Likewise.
* server.c (our_environ): Make it an instance of 'gdb_environ'.
(get_environ): Return a pointer to 'our_environ'.
(captured_main): Initialize 'our_environ'.
* server.h (get_environ): Adjust prototype.
* spu-low.c (spu_create_inferior): Adjust code to access the
environment information via 'gdb_environ' class.
Exchange the order of 32bit-linux.xml and 32bit-sse.xml in
i386/i386-linux.xml, to align with other i386 linux .xml files.
gdb:
2017-06-20 Yao Qi <yao.qi@linaro.org>
* features/i386/i386-linux.xml: Exchange the order of including
32bit-linux.xml and 32bit-sse.xml.
* features/i386/i386-linux.c: Regenerated.
If two objects are compiled with -fPIC or -fPIE and call the same
function, two different PLT entries are created, one for each object,
but the same stub symbol name is used for both.
* powerpc.cc (Stub_table::define_stub_syms): Always include object's
uniq_ value.
Since the BFD section count may not be cleared for shared objects during
linking, we should check the DYNAMIC bit for input shared objects.
bfd/
PR ld/21626
* elf-properties.c (_bfd_elf_link_setup_gnu_properties): Check
the DYNAMIC bit instead of bfd_count_sections.
ld/
PR ld/21626
* testsuite/ld-i386/i386.exp: Run ld/21626 tests.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
'info registers' for MIPS throws an error and when it first encounters
an unavailable register. This does not match other architectures
which annotate unavailable registers and continue to print out the
values of subsequent registers. Replace the error by displaying an
aligned "<unavailable>". This string is truncated to "<unavl>" when
displaying a 32-bit register.
gdb/ChangeLog:
* mips-tdep.c (print_gp_register_row): Don't error for unavailable
registers.
When I added the new lnia extended mnemonic for addpcis, I updated the
assembler/disassembler test cases, but overlooked the GDB test cases.
This patch fixes that oversight and associated test case failure.
* gdb.arch/powerpc-power9.exp: Update test case for new lnia
extended mnemonic.
* gdb.arch/powerpc-power9.s: Likewise.
PR binutils/21618
* vms-alpha.c (evax_bfd_print_emh): Check for insufficient record
length.
(evax_bfd_print_eeom): Likewise.
(evax_bfd_print_egsd): Check for an overlarge record length.
(evax_bfd_print_etir): Likewise.
PR binutils/21612
* libieee.h (struct common_header_type): Add end_p field.
* ieee.c (this_byte_and_next): Do not advance input_p beyond
end_p.
(read_id): Check for a length that exceeds the remaining bytes in
the input buffer.
(ieee_seek): Initialise end_p.
(ieee_archive_p): Likewise.
(ieee_object_p): Likewise.
