Commit Graph

2706 Commits

Author SHA1 Message Date
H.J. Lu fbf3f58457 gas/
2008-10-12  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (processor_type): Moved to tc-i386.h.
	(cpu_arch_tune): Make it global.
	(cpu_arch_isa): Likewise.
	(cpu_arch_isa_flags): Likewise.
	(i386_align_code): Check fragP->tc_frag_data.isa,
	fragP->tc_frag_data.isa_flags and cpu_arch_tune instead of
	cpu_arch_isa, cpu_arch_isa_flags and cpu_arch_tune,
	respectively.

	* config/tc-i386.h (processor_type): Moved from tc-i386.c.
	(cpu_arch_tune): New.
	(cpu_arch_isa): Likewise.
	(cpu_arch_isa_flags): Likewise.
	(i386_tc_frag_data): Likewise.
	(TC_FRAG_TYPE): Likewise.
	(TC_FRAG_INIT): Likewise.

gas/testsuite/

2008-10-12  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run nops-5, nops-5-i686, x86-64-nops-5 and
	x86-64-nops-5-k8.

	* gas/i386/nops-5.d: New.
	* gas/i386/nops-5.s: Likewise.
	* gas/i386/nops-5-i686.d: Likewise.
	* gas/i386/x86-64-nops-5.d: Likewise.
	* gas/i386/x86-64-nops-5-k8.d: Likewise.
2008-10-12 12:37:09 +00:00
Eric Botcazou ad5fec3b3a * dw2gencfi.c (cfi_finish): Deal with md_fix_up_eh_frame.
* config/tc-i386.h (md_fix_up_eh_frame): Define on Solaris.
	(i386_solaris_fix_up_eh_frame): Declare.
	* config/tc-i386.c (i386_solaris_fix_up_eh_frame): New function.
2008-10-09 17:31:43 +00:00
H.J. Lu 97c4f2d9c9 2008-10-07 H.J. Lu <hongjiu.lu@intel.com>
* read.c (pseudo_set): Don't allow global register symbol only
	if TC_GLOBAL_REGISTER_SYMBOL_OK is undefined.
	* symbols.c (S_SET_EXTERNAL): Likewise.

	* config/tc-mmix.h (TC_GLOBAL_REGISTER_SYMBOL_OK): Defined.

	* doc/internals.texi: Document TC_GLOBAL_REGISTER_SYMBOL_OK.
2008-10-07 14:21:59 +00:00
Hans-Peter Nilsson cc99daad35 * config/tc-cris.c: Update all comments regarding explicit relocations
to, besides PIC, also imply TLS or to say "relocation specifier" or
	similar.
	(RELOC_SUFFIX_CHAR): Rename from PIC_SUFFIX_CHAR.  Change all callers.
	(cris_get_reloc_suffix): Rename from cris_get_pic_suffix.  Change all
	callers.  Also handle TLS relocs.
	(cris_get_specified_reloc_size): Rename from cris_get_pic_reloc_size.
	Change all callers.  Also handle TLS relocs.
	(tls): New constant.
	(cris_process_instruction): Check for non-PIC TLS relocations and
	adjust message when emitting error message about relocation not
	fitting.
	(get_autoinc_prefix_or_indir_op): Also check for relocation suffix
	when tls is true.
	(get_3op_or_dip_prefix_op): Ditto.
	(cris_number_to_imm, tc_gen_reloc): Handle TLS relocs like PIC relocs.
2008-10-04 17:20:38 +00:00
Nick Clifton e144674af8 * coffgen.c (coff_write_symbols): Check to see if a symbol's flags
do not match it class and if necessary update the class.
       (null_error_handler): New function.  Suppresses the generation of
       bfd error messages.
     * coff64-rs6000.c (bfd_xcoff_backend_data): Update comment.
     * config/tc-tic4x.c (tic4x_globl): Call S_SET_EXTERNAL as well as
     S_SET_STORAGE_CLASS.
2008-09-30 10:50:03 +00:00
Eric Botcazou 2774199c31 * Makefile.am (TARG_ENV_HFILES): Add config/te-solaris.h.
* Makefile.in (TARG_ENV_HFILES): Likewise.
	* configure.tgt (Solaris targets): Set em=solaris.
	* config/te-solaris.h: New file.
2008-09-26 07:02:44 +00:00
Jie Zhang 37b3293520 * config/bfin-parse.y (asm_1): Fix reduce/reduce conflicts. 2008-09-26 04:49:17 +00:00
Alan Modra 5db484ff3d * write.c (TC_FORCE_RELOCATION_SUB_LOCAL): Heed md_register_arithmetic.
(TC_VALIDATE_FIX_SUB): Likewise.
	* config/tc-frv.h (TC_FORCE_RELOCATION_SUB_LOCAL): Likewise.
	* config/tc-hppa.h (TC_FORCE_RELOCATION_SUB_LOCAL): Likewise.
	* config/tc-mn10300.h (TC_VALIDATE_FIX_SUB): Likewise.
	* config/tc-sh.h (TC_VALIDATE_FIX_SUB): Likewise.
	(TC_FORCE_RELOCATION_SUB_LOCAL): Likewise.
	* config/tc-sh64.h (TC_VALIDATE_FIX_SUB): Likewise.
	* config/tc-xtensa.h (TC_VALIDATE_FIX_SUB): Likewise.
	* doc/internals.texi (TC_FORCE_RELOCATION_SUB_ABS,
	TC_FORCE_RELOCATION_SUB_LOCAL, TC_VALIDATE_FIX_SUB): Show new param.
2008-09-19 10:00:40 +00:00
Alan Modra 9a97a5d735 * write.c (md_register_arithmetic): Define.
(fixup_segment): Adjust TC_FORCE_RELOCATION_SUB_ABS invocation.
	Modify error message when registers involved.
	(TC_FORCE_RELOCATION_SUB_ABS): Heed md_register_arithmetic.
	* config/tc-sh.h (TC_FORCE_RELOCATION_SUB_ABS): Likewise.
2008-09-19 02:11:02 +00:00
Alan Modra 455bde508d * config/tc-frv.c (md_apply_fix): Use abs_section_sym for
relocs with no symbol.
	* config/tc-mmix.c (md_assemble): Mark fake symbol on
	BFD_RELOC_MMIX_BASE_PLUS_OFFSET as OK for use by relocs.
	(mmix_md_end): Likewise mark mmix reg contents section symbol.
2008-09-15 05:22:32 +00:00
Arnold Metselaar 2cf402d663 Fix Opcode generation of ld a,(bc) and ld a,(de) on target z80 2008-09-14 05:40:09 +00:00
Bob Wilson 51add5c3c0 2008-09-12 Sterling Augustine <sterling@tensilica.com>
* config/tc-xtensa.c (init_op_placement_info_table): Allow number of
	operands equal to MAX_INSN_ARGS.
2008-09-12 18:53:55 +00:00
Peter Bergner a08f0c7573 gas/
* config/tc-ppc.c (ppc_setup_opcodes): Simplify POWER4/NOPOWER4 test.
	Remove POWER5 and POWER6 tests.

gas/testsuite/
	* gas/ppc/common.s: New test.
	* gas/ppc/common.d: Likewise.
	* gas/ppc/power4_32.s: Likewise.
	* gas/ppc/power4_32.d: Likewise.
	* gas/ppc/power6.s: Add attn, mtcr, mtcrf, mfcr, dcbz.
	* gas/ppc/power6.d: Likewise.
	* gas/ppc/ppc.exp: Run power4_32 test.
2008-09-09 13:25:05 +00:00
Dave Anglin 2b48966149 * config/tc-hppa.c (hppa_regname_to_dw2regnum): Add register name to
number support for 32-bit targets.
2008-09-09 00:53:35 +00:00
Dave Anglin ded49c3ea3 * config/tc-hppa.h (DIFF_EXPR_OK): Define for SOM target. Revise
comment regarding use of difference expressions.
	(TC_FORCE_RELOCATION_SUB_LOCAL): Define to 1.
2008-09-08 00:54:26 +00:00
Dave Anglin 3dd243066b * dw2gencfi.c (CFI_DIFF_EXPR_OK): Define if not defined.
(dot_cfi_personality): Use CFI_DIFF_EXPR_OK instead of DIFF_EXPR_OK.
	(dot_cfi_lsda, output_cie, output_fde): Likewise.
	* config/tc-hppa.h (CFI_DIFF_EXPR_OK): Define.
2008-09-07 22:54:54 +00:00
Richard Sandiford a79558d912 gas/
* config/tc-mips.h (DWARF2_FDE_RELOC_SIZE): Define.

gas/testsuite/
	* gas/mips/cfi-n64-1.s, gas/mips/cfi-n64-1.d: New test.
	* gas/mips/mips.exp: Run it.
2008-09-06 08:47:00 +00:00
Nick Clifton 704209c00f Make new functions static.
Rearrange wording of documentation.
2008-09-03 15:44:33 +00:00
Nick Clifton a6c24e68b9 * config/tc-i386.c (pe_lcomm_internal): New function. Allows the
alignment field of the .lcomm directive to be optional.
  (pe_lcomm): New function.  Pass pe_lcomm_internal to
  s_comm_internal.
  (md_pseudo_table): Implement .lcomm directive for COFF based
  targets.
  * doc/c-i386.texi (i386-Directives): New node.  Used to document
  the .lcomm directive.
2008-09-03 14:02:30 +00:00
Dave Anglin 5ead15d96a * config/tc-hppa.h: Don't define DWARF2_EH_FRAME_READ_ONLY on Linux
and NetBSD.
2008-08-30 15:52:22 +00:00
Nick Clifton c879dfc576 * config/tc-avr.c (mcu_types): Add atmega16u4.
* doc/c-avr.texi: Likewise.
2008-08-29 16:58:02 +00:00
H.J. Lu 1ca35711f4 gas/
2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-ia64.c (CR_IIB0): New.
	(CR_IIB1): Likewise.
	(cr): Add cr.iib0 and cr.iib1.
	(specify_resource): Handle IA64_RS_CR_IIB and CR_IIB0/CR_IIB1.

gas/testsuite/

2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/ia64/dv-raw-err.s: Add tests for cr.iib0 and cr.iib1.
	* gas/ia64/dv-waw-err.s: Likewise.
	* gas/ia64/regs.s: Likewise.

	* gas/ia64/dv-raw-err.l: Updated.
	* gas/ia64/dv-waw-err.l: Likewise.
	* gas/ia64/regs.d: Likewise.

include/opcode/

2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB.  Update
	IA64_RS_CR.

opcodes/

2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
	* ia64-gen.c (lookup_specifier): Likewise.

	* ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
	* ia64-raw.tbl: Likewise.
	* ia64-waw.tbl: Likewise.
	* ia64-asmtab.c: Regenerated.
2008-08-28 14:07:50 +00:00
Jan Beulich fc0763e65a gas/
2008-08-28  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (md_assemble): Force number of displacement
	operands to zero when processing string instruction.
	(i386_index_check): Special-case string instruction operands. Don't
	fudge address prefix if there already was a memory operand. Fix
	error message to correctly reflect the addressing mode used.
	(i386_att_operand): Fix comment.
	(i386_intel_operand): Snapshot, clear, and restore base and index
	reg for each operand processed. Increment count of memory operands
	later.

gas/testsuite/
2008-08-28  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/string-bad.{l,s}, gas/i386/string-ok.{d,e,s}: New.
	* gas/i386/i386.exp: Run new tests.
2008-08-28 09:42:11 +00:00
Dave Anglin 6bba1048d6 * elf-hppa.h (elf_hppa_reloc_final_type): Handle R_PARISC_GPREL64,
R_PARISC_SEGREL32 and R_PARISC_SEGREL64.
	* som.c (som_fixup_formats): Add R_DATA_GPREL fixup.
	(som_hppa_howto_table): Likewise.
	(hppa_som_gen_reloc_type): In case R_HPPA_GOTOFF, detect R_DATA_GPREL
	final type.
	(som_write_fixups): Handle R_DATA_GPREL.

	* config/tc-hppa.c (is_SB_relative): New macro.
	(fix_new_hppa): Remove $segrel$ marker.
	(cons_fix_new_hppa): Set reloc type R_PARISC_SEGREL32 if expression is
	segment relative.
	* config/tc-hppa.h (tc_frob_symbol): Check for $segrel$.
2008-08-28 02:33:45 +00:00
Jan Beulich a87af0274f gas/
2008-08-27  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (check_string): Use register_prefix for error
	message.
	(process_operands): Likewise.
2008-08-27 16:24:32 +00:00
Jie Zhang 6429b08478 * config/bfin-parse.y (check_macfunc_option): Fix instruction
mode checking.
	(asm_1): Check mode for 16-bit multiply instructions.

	testsuite/
	* gas/bfin/arith_mode.d: New test.
	* gas/bfin/arith_mode.s: New test.
	* gas/bfin/invalid_arith_mode.l: New test.
	* gas/bfin/invalid_arith_mode.s: New test.
	* gas/bfin/bfin.exp: Add arith_mode and invalid_arith_mode.
2008-08-26 10:03:24 +00:00
Nick Clifton 34857dd609 * config/tc-mcore.c (md_assemble): Increase length of name array
to include terminating NUL.
2008-08-22 17:05:40 +00:00
Jie Zhang fec8276095 * config/bfin-lex.l (NUMBER): Protect special `.'.
testsuite/
	* gas/bfin/misc.s: New test.
	* gas/bfin/misc.d: New test.
	* gas/bfin/bfin.exp: Add misc test.
2008-08-22 07:21:49 +00:00
Alan Modra 4e3b43ed44 * config/tc-hppa.c (md_begin): Set BSF_KEEP for "dummy_symbol". 2008-08-22 00:41:37 +00:00
Richard Henderson 8c9b70b1a5 * dw2gencfi.c (DWARF2_FDE_RELOC_SIZE): New.
(output_cie, output_fde): Use it.
        (DWARF2_EH_FRAME_READ_ONLY): New.
        (cfi_finish): Use it.

        * config/tc-hppa.h (DWARF2_FDE_RELOC_SIZE): Set to 8 for 64-bit.
        (DWARF2_CIE_DATA_ALIGNMENT): Change sign.
        (DWARF2_EH_FRAME_READ_ONLY): New.
        * config/tc-hppa.c (tc_gen_reloc): Generate pc-relative relocations
        from the results of DIFF_EXPR_OK manipulation.
2008-08-21 19:49:22 +00:00
Bob Wilson c22a967f85 2008-08-21 Sterling Augustine <sterling@tensilica.com>
* config/xtensa-istack.h (MAX_INSN_ARGS): Increase to 64.
2008-08-21 17:10:24 +00:00
Bob Wilson 28dbbc0203 2008-08-20 Bob Wilson <bob.wilson@acm.org>
bfd/
        * elf-bfd.h (elf_object_id): Add XTENSA_ELF_TDATA.
        * elf32-xtensa.c (elf_howto_table): Add TLS relocations.
        (elf_xtensa_reloc_type_lookup): Likewise.
        (TCB_SIZE): Define.
        (elf_xtensa_link_hash_entry): New.
        (GOT_UNKNOWN, GOT_NORMAL, GOT_TLS_GD, GOT_TLS_IE, GOT_TLS_ANY): Define.
        (elf_xtensa_hash_entry): Define.
        (elf_xtensa_obj_tdata): New.
        (elf_xtensa_tdata): Define.
        (elf_xtensa_local_got_tls_type): Define.
        (elf_xtensa_local_tlsfunc_refcounts): Define.
        (is_xtensa_elf): Define.
        (elf_xtensa_mkobject): New.
        (elf_xtensa_link_hash_table): Add tlsbase field.
        (elf_xtensa_link_hash_newfunc): New.
        (elf_xtensa_link_hash_table_create): Use elf_xtensa_link_hash_newfunc.
        Create an entry for "_TLS_MODULE_BASE_" and save it in tlsbase field.
        (elf_xtensa_copy_indirect_symbol): New.
        (elf_xtensa_check_relocs): Rewrite to handle TLS relocations.
        (elf_xtensa_gc_sweep_hook): Likewise.
        (elf_xtensa_allocate_dynrelocs): Optimize away GOT entries for
        TLSDESC_FN relocations when an IE reference is seen.
        (elf_xtensa_allocate_local_got_size): Likewise.
        (elf_xtensa_always_size_sections): New.
        (dtpoff_base, tpoff): New.
        (elf_xtensa_do_reloc): Handle TLS relocations.
        (replace_tls_insn): New.
        (IS_XTENSA_TLS_RELOC): Define.
        (elf_xtensa_relocate_section): Handle TLS relocations.
        (get_indirect_call_dest_reg): New.
        (bfd_elf32_mkobject): Define.
        (elf_backend_always_size_sections): New.
        (elf_backend_copy_indirect_symbol): New.
        * reloc.c (BFD_RELOC_XTENSA_TLSDESC_FN, BFD_RELOC_XTENSA_TLSDESC_ARG)
        (BFD_RELOC_XTENSA_TLS_DTPOFF, BFD_RELOC_XTENSA_TLS_TPOFF)
        (BFD_RELOC_XTENSA_TLS_FUNC, BFD_RELOC_XTENSA_TLS_ARG)
        (BFD_RELOC_XTENSA_TLS_CALL): New.
        * bfd-in2.h: Regenerate.
        * libbfd.h: Regenerate.
gas/
        * config/tc-xtensa.c (O_tlsfunc, O_tlsarg, O_tlscall): Define.
        (O_tpoff, O_dtpoff): Define.
        (suffix_relocs): Add entries for TLS suffixes.
        (xtensa_elf_cons): Check for invalid use of TLS relocations.
        (map_operator_to_reloc): Add is_literal parameter and use it to
        control translating TLS instruction relocations to the corresponding
        literal relocations.
        (xg_valid_literal_expression): Allow TLS operators.
        (xg_build_to_insn): Copy TLS operators from pseudo-instruction
        operands to generated literals.
        (xg_assemble_literal): Handle TLS operators.  Update call to
        map_operator_to_reloc.
        (md_assemble): Handle CALLXn.TLS pseudo-instruction.
        (md_apply_fix): Handle TLS relocations.
        (emit_single_op): Handle TLS operators.
        (convert_frag_immed): Update call to map_operator_to_reloc.
        (vinsn_to_insnbuf): Emit relocations for TLS-related instructions.
        * config/xtensa-istack.h (tinsn_struct): Add tls_reloc field.
        * config/xtensa-relax.c (append_literal_op): Add src_op parameter
        to initialize the op_data field of the BuildOp.
        (build_transition): Use it here to record the source operand
        corresponding to a generated literal.
        * config/xtensa-relax.h (build_op): Comment op_data use for literals.
include/elf/
        * xtensa.h (R_XTENSA_TLSDESC_FN, R_XTENSA_TLSDESC_ARG)
        (R_XTENSA_TLS_DTPOFF, R_XTENSA_TLS_TPOFF, R_XTENSA_TLS_FUNC)
        (R_XTENSA_TLS_ARG, R_XTENSA_TLS_CALL): New.
ld/testsuite/
        * ld-xtensa/tlsbin.dd, ld-xtensa/tlsbin.rd, ld-xtensa/tlsbin.s,
        ld-xtensa/tlsbin.sd, ld-xtensa/tlsbin.td, ld-xtensa/tlslib.s,
        ld-xtensa/tlspic.dd, ld-xtensa/tlspic.rd, ld-xtensa/tlspic.sd,
        ld-xtensa/tlspic.td, ld-xtensa/tlspic1.s, ld-xtensa/tlspic2.s: New.
        * ld-xtensa/xtensa.exp: Run them.
2008-08-20 23:28:59 +00:00
H.J. Lu a5ff0eb22b gas/
2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (August, 2008)
	* config/tc-i386.c (CPU_FLAGS_AES_MATCH): New.
	(CPU_FLAGS_AVX_MATCH): Likewise.
	(CPU_FLAGS_32BIT_MATCH): Updated.
	(cpu_flags_match): Likewise.

gas/testsuite/

2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (August, 2008)
	* gas/i386/avx.s: Add AES + AVX tests.
	* gas/i386/arch-10.s: Likewise.
	* gas/i386/sse2avx.s: Likewise.
	* gas/i386/x86-64-arch-2.s: Likewise.
	* gas/i386/x86-64-avx.s: Likewise.
	* gas/i386/x86-64-sse2avx.s: Likewise.

	* gas/i386/arch-10.d: Updated.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/avx.d: Likewise.
	* gas/i386/avx-intel.d: Likewise.
	* gas/i386/sse2avx.d: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/x86-64-avx.d: Likewise.
	* gas/i386/x86-64-avx-intel.d: Likewise.
	* gas/i386/x86-64-sse2avx.d: Likewise.

	* gas/i386/i386.exp: Run arch-avx-1, arch-avx-1-1 and
	arch-avx-1-2.

	* gas/i386/arch-avx-1.d: New.
	* gas/i386/arch-avx-1.s: Likewise.
	* gas/i386/arch-avx-1-1.l: Likewise.
	* gas/i386/arch-avx-1-1.s: Likewise.
	* gas/i386/arch-avx-1-2.l: Likewise.
	* gas/i386/arch-avx-1-2.s: Likewise.

opcodes/

2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (August, 2008)
	* i386-dis.c (PREFIX_VEX_38DB): New.
	(PREFIX_VEX_38DC): Likewise.
	(PREFIX_VEX_38DD): Likewise.
	(PREFIX_VEX_38DE): Likewise.
	(PREFIX_VEX_38DF): Likewise.
	(PREFIX_VEX_3ADF): Likewise.
	(VEX_LEN_38DB_P_2): Likewise.
	(VEX_LEN_38DC_P_2): Likewise.
	(VEX_LEN_38DD_P_2): Likewise.
	(VEX_LEN_38DE_P_2): Likewise.
	(VEX_LEN_38DF_P_2): Likewise.
	(VEX_LEN_3ADF_P_2): Likewise.
	(PREFIX_VEX_3A04): Updated.
	(VEX_LEN_3A06_P_2): Likewise.
	(prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
	PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
	(x86_64_table): Likewise.
	(vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
	VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
	VEX_LEN_3ADF_P_2.

	* i386-opc.tbl: Add AES + AVX instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2008-08-20 18:38:40 +00:00
H.J. Lu e6a1410132 2008-08-18 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (i386_align_code): Fix a comment typo.
2008-08-18 18:21:15 +00:00
Alan Modra 4e96a12e09 * config/tc-tic4x.c (tic4x_operands_parse): Make static. 2008-08-14 14:54:40 +00:00
Alan Modra 5a49b8acf4 Banish PARAMS and PTR. Convert to ISO C.
Delete unnecessary forward declarations.
2008-08-12 23:39:31 +00:00
Alan Modra db0bc2846c * config/tc-arm.c (s_unreq): Adjust hash_delete call.
* config/tc-ia64.c (dot_rot): Likewise.
2008-08-12 09:58:34 +00:00
Alan Modra 818236e51d PR 6575
* hash.c: Expand PTR to void *.
	(hash_delete): Add "freeme" parameter.  Call obstack_free.
	* hash.h: Expand PTR to void *.
	(hash_delete): Update prototype.
	* macro.c (macro_expand_body): hash_delete LOCALs from formal_hash.
	* config/tc-tic54x.c (tic54x_remove_local_label): Update hash_delete
	call.
	(subsym_substitute): Likewise.
	* doc/internals.texi (hash_delete): Update.
2008-08-11 07:40:22 +00:00
Eric B. Weddington 7b21ac3f45 Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
bfd/
	* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
	bfd_mach_avr51): New.
	* bfd-in2.h: Regenerate.
	* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
	architectures. Change comments to match architecture comments in GCC.
	(compatible): Add test for new AVR architectures.
	* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
	bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
	(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
	E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.

gas/
	* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
	architectures. Reorganize list to put mcu types in correct architectures
	and to order list same as in GCC. Use new ISA definitions in
	include/opcode/avr.h.
	* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
	descriptions. Reorganize descriptions to put mcu types in correct
	architectures and to order lists same as in GCC.

include/
	* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
	E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
	(EF_AVR_MACH): Redefine to 0x7F.
	* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
	(AVR_ISA_AVR3): Redefine.
	(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
	AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
	AVR_ISA_AVR6): Define.

ld/
	* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
	and eavr51.o.
	Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
	* Makefile.in: Regenerate.
	* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
	and avr51.
	* emulparams/avr25.sh: New file.
	* emulparams/avr31.sh: New file.
	* emulparams/avr35.sh: New file.
	* emulparams/avr51.sh: New file.
2008-08-09 05:35:13 +00:00
Daniel Jacobowitz 861fb55ab5 2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz  <dan@codesourcery.com>
	    Catherine Moore  <clm@codesourcery.com>
	    Mark Shinwell  <shinwell@codesourcery.com>
	    Maxim Kuvyrkov  <maxim@codesourcery.com>

	* elf32-mips.c (mips_vxworks_copy_howto_rela): Replace with...
	(elf_mips_copy_howto): ...this howto.  Clear the size fields.
	(mips_vxworks_jump_slot_howto_rela): Replace with...
	(elf_mips_jump_slot_howto): ...this howto.
	(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
	and BFD_RELOC_MIPS_JUMP_SLOT.
	(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
	"R_MIPS_JUMP_SLOT".
	(mips_elf32_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
	(elf_backend_plt_readonly): Define.
	(elf_backend_plt_sym_val): Define for non-VxWorks targets.
	(mips_vxworks_bfd_reloc_type_lookup): Delete.
	(mips_vxworks_bfd_reloc_name_lookup): Likewise.
	(mips_vxworks_rtype_to_howto): Likewise.
	(elf_backend_want_dynbss): Don't define for VxWorks.
	(elf_backend_plt_readonly): Likewise.
	(bfd_elf32_bfd_reloc_type_lookup): Likewise.
	(bfd_elf32_bfd_reloc_name_lookup): Likewise.
	(elf_backend_mips_rtype_to_howto): Likewise.
	(elf_backend_adjust_dynamic_symbol): Likewise.
	(elf_backend_got_symbol_offset): Don't define.
	* elfn32-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
	(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
	and BFD_RELOC_MIPS_JUMP_SLOT.
	(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
	"R_MIPS_JUMP_SLOT".
	(mips_elf32_n32_rtype_to_howto): Handle R_MIPS_COPY and
	R_MIPS_JUMP_SLOT.
	(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
	(elf_backend_plt_sym_val): Define.
	* elf64-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
	(bfd_elf64_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
	and BFD_RELOC_MIPS_JUMP_SLOT.
	(bfd_elf64_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
	"R_MIPS_JUMP_SLOT".
	(mips_elf64_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
	(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
	(elf_backend_plt_sym_val): Define.
	* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Delete.
	(_bfd_mips_elf_use_plts_and_copy_relocs, _bfd_mips_elf_init_stubs)
	(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): Declare.
	* elfxx-mips.c (mips_elf_la25_stub): New structure.
	(LA25_LUI, LA25_J, LA25_ADDIU): New macros.
	(mips_elf_link_hash_entry): Add "la25_stubs", "has_static_relocs"
	and "has_nonpic_branches" fields.  Remove "is_relocation_target" and
	"is_branch_target".
	(mips_elf_link_hash_table): Add blank lines.  Add
	"use_plts_and_copy_relocs", "reserved_gotno", "strampoline",
	"la25_stubs" and "add_stub_section" fields.
	(mips_htab_traverse_info): New structure.
	(PIC_OBJECT_P, MIPS_ELF_LOAD_WORD): New macros.
	(MIPS_RESERVED_GOTNO): Delete.
	(mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry)
	(mips_n64_exec_plt0_entry, mips_exec_plt_entry): New tables.
	(mips_elf_link_hash_newfunc): Update after the changes to
	mips_elf_link_hash_entry.
	(mips_elf_check_mips16_stubs): Replace the DATA parameter with
	an INFO parameter.  Don't look through warnings symbols here;
	do it in mips_elf_check_symbols instead.
	(mips_elf_create_stub_symbol): New function.
	(mips_elf_la25_stub_hash, mips_elf_la25_stub_eq): New functions.
	(_bfd_mips_elf_init_stubs, mips_elf_local_pic_function_p): Likewise.
	(mips_elf_add_la25_intro, mips_elf_add_la25_trampoline): Likewise.
	(mips_elf_add_la25_stub, mips_elf_check_symbols): New functions.
	(mips_elf_gotplt_index): Check for VxWorks.
	(mips_elf_output_dynamic_relocation): Take the relocation index
	as an extra parameter.  Do not increment reloc_count here.
	(mips_elf_initialize_tls_slots): Update the calls to
	mips_elf_output_dynamic_relocation accordingly.
	(mips_elf_multi_got): Use htab->reserved_gotno instead of
	MIPS_RESERVED_GOTNO.
	(mips_elf_create_got_section): Don't allocate reserved GOT
	entries here.  Unconditionally create .got.plt, but don't
	set its alignment here.
	(mips_elf_relocation_needs_la25_stub): New function.
	(mips_elf_calculate_relocation): Redirect branches and jumps to
	a non-PIC stub if one exists.  Check !h->has_static_relocs instead
	of !htab->is_vxworks when deciding whether to create dynamic
	relocations for R_MIPS_32, R_MIPS_REL32 and R_MIPS_64.
	(_bfd_mips_elf_create_dynamic_sections): Unconditionally call
	_bfd_elf_create_dynamic_sections.  Unconditionally set up
	htab->splt and htab->sdynbss.  Set htab->srelplt to ".rel.plt"
	if !htab->is_vxworks.  Add non-VxWorks values of
	htab->plt_header_size and htab->plt_entry_size.
	(_bfd_mips_elf_check_relocs): Set pointer_equality_needed for
	non-branch static relocations.  Set has_nonpic_branches when an la25
	stub might be required.  Set can_make_dynamic_p to TRUE if R_MIPS_32,
	R_MIPS_REL32 and R_MIPS_64 relocations can be made dynamic,
	rather than duplicating the condition.  Do not make them dynamic
	for read-only sections in non-PIC executable objects.
	Do not protect this code with dynobj == NULL || htab->sgot == NULL;
	handle each group of cases separately.  Add a default case that
	sets has_static_relocs for non-GOT relocations that cannot be
	made dynamic.  Don't set is_relocation_target and is_branch_target.
	Reject non-PIC static relocations in shared objects.
	(_bfd_mips_vxworks_adjust_dynamic_symbol): Fold into...
	(_bfd_mips_elf_adjust_dynamic_symbol): ...here, using
	htab->use_plts_and_copy_relocs instead of htab->is_vxworks
	to select PLT and copy-reloc handling.  Set the alignment of
	.plt and .got.plt when allocating the first entry.  Generalize
	code to handle REL as well as RELA sections and 64-bit as well as
	32-bit GOT entries.  Complain if we find a static-only reloc
	against an externally-defined symbol and if we cannot create
	dynamic relocations for it.  Allocate copy relocs using
	mips_elf_allocate_dynamic_relocations on non-VxWorks targets.
	Set possibly_dynamic_relocs to 0 when using PLTs or copy relocs.
	Skip reserved .got.plt entries.
	(_bfd_mips_elf_always_size_sections): Use mips_elf_check_symbols
	instead of mips_elf_check_mips16_stubs to process each symbol.
	Do the traversal for relocatable objects too.
	(mips_elf_lay_out_got): Use htab->reserved_gotno instead of
	MIPS_RESERVED_GOTNO.
	(_bfd_mips_elf_size_dynamic_sections): Exclude sdynbss if it
	is empty.  Extend the DT_PLTREL, DT_JMPREL and DT_PLTRELSZ handling
	to non-VxWorks targets.  Only add DT_REL{,A}, DT_REL{,A}SZ and
	DT_REL{,A}ENT if .rel.dyn is nonempty.  Create a symbol for the
	PLT.  Allocate a nop at the end of the PLT.  Allocate DT_MIPS_PLTGOT.
	(mips_elf_create_la25_stub_info): New function.
	(_bfd_mips_elf_finish_dynamic_symbol): Write out PLT entries
	and copy relocs where necessary.  Check pointer_equality_needed.
	(mips_finish_exec_plt): New function.
	(_bfd_mips_elf_finish_dynamic_sections): Always set DT_PLTGOT
	to the beginning of htab->sgot.  Use htab->reserved_gotno instead
	of MIPS_RESERVED_GOTNO.  Assert htab->use_plts_and_copy_relocs
	instead of htab->is_vxworks for DT_PLTREL, DT_PLTRELSZ and DT_JMPREL.
	Set DT_PLTREL to DT_REL instead of DT_RELA on non-VxWorks targets.
	Use mips_finish_exec_plt to create non-VxWorks PLT headers.  Set
	DT_MIPS_PLTGOT.
	(_bfd_mips_elf_copy_indirect_symbol): Copy has_static_relocs
	from the indirect symbol to the direct symbol.  Also copy
	has_nonpic_branches for indirect symbols.
	(_bfd_mips_elf_get_target_dtag): Handle DT_MIPS_PLTGOT and
	DT_MIPS_RWPLT.
	(_bfd_mips_elf_link_hash_table_create): Initialize the new
	mips_elf_link_hash_table fields.
	(_bfd_mips_vxworks_link_hash_table_create): Set
	use_plts_and_copy_relocs to TRUE.  Use TRUE rather than 1
	when setting is_vxworks.
	(_bfd_mips_elf_use_plts_and_copy_relocs): New function.
	(_bfd_mips_elf_final_link): Call mips_elf_create_la25_stub for
	each la25_stub.
	(_bfd_mips_elf_merge_private_bfd_data): Treat dynamic objects
	as PIC.  Generalize message about linking PIC and non-PIC.
	(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): New
	functions.
	* reloc.c: Update comment near BFD_RELOC_MIPS_JUMP_SLOT.
	* bfd-in2.h: Regenerated.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>
	    Catherine Moore  <clm@codesourcery.com>
	    Mark Shinwell  <shinwell@codesourcery.com>

	* readelf.c (get_mips_symbol_other): Handle STO_MIPS_PLT and
	STO_MIPS_PIC.
	(slurp_rela_relocs, slurp_rel_relocs): Handle MIPS ELF64 here.
	(dump_relocations, debug_apply_relocations): Don't handle it here.
	(get_mips_dynamic_type): Handle DT_MIPS_PLTGOT and DT_MIPS_RWPLT.
	(print_mips_pltgot_entry): New function.
	(process_mips_specific): Dump the PLT GOT.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>

	* config/tc-mips.c (OPTION_CALL_NONPIC): New macro.
	(OPTION_NON_SHARED, OPTION_XGOT, OPTION_MABI, OPTION_32)
	(OPTION_N32, OPTION_64, OPTION_MDEBUG, OPTION_NO_MDEBUG)
	(OPTION_PDR, OPTION_NO_PDR, OPTION_MVXWORKS_PIC): Bump by 1.
	(md_longopts): Add -call_nonpic.
	(md_parse_option): Handle OPTION_CALL_NONPIC.
	(md_show_usage): Add -call_nonpic.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>

	* gas/mips/call-nonpic-1.s, gas/mips/call-nonpic-1.d: New test.
	* gas/mips/mips.exp: Run it.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>
	    Catherine Moore  <clm@codesourcery.com>
	    Mark Shinwell  <shinwell@codesourcery.com>

	* mips.h (STO_MIPS_PLT, ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT)
	(STO_MIPS_PIC, DT_MIPS_PLTGOT, DT_MIPS_RWPLT): New macros.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>

	* emulparams/elf32bmip.sh (GOT): Define, moving .got.plt to...
	(OTHER_RELRO_SECTIONS, OTHER_READWRITE_SECTIONS): ...one of these
	two variables.
	* emulparams/elf32bmipn32-defs.sh: Likewise.
	* emultempl/mipself.em: Include ldctor.h, elf/mips.h and elfxx-mips.h.
	(is_mips_elf): New macro.
	(stub_file, stub_bfd): New variables.
	(hook_stub_info): New structure.
	(hook_in_stub): New function.
	(mips_add_stub_section): Likewise.
	(mips_create_output_section_statements): Likewise.
	(mips_before_allocation): Likewise.
	(real_func): New variable.
	(mips_for_each_input_file_wrapper): New function.
	(mips_lang_for_each_input_file): Likewise.
	(lang_for_each_input_file): Define.
	(LDEMUL_BEFORE_ALLOCATION): Likewise.
	(LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Likewise.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>

	* ld-mips-elf/mips16-pic-3a.s,
	ld-mips-elf/mips16-pic-3b.s,
	ld-mips-elf/mips16-pic-3.dd,
	ld-mips-elf/mips16-pic-3.gd,
	ld-mips-elf/mips16-pic-3.rd,
	ld-mips-elf/mips16-pic-3.inc,
	ld-mips-elf/pic-and-nonpic-1a.s,
	ld-mips-elf/pic-and-nonpic-1b.s,
	ld-mips-elf/pic-and-nonpic-1.ld,
	ld-mips-elf/pic-and-nonpic-1.dd,
	ld-mips-elf/pic-and-nonpic-1.nd,
	ld-mips-elf/pic-and-nonpic-1-rel.dd,
	ld-mips-elf/pic-and-nonpic-1-rel.nd,
	ld-mips-elf/pic-and-nonpic-2a.s,
	ld-mips-elf/pic-and-nonpic-2b.s,
	ld-mips-elf/pic-and-nonpic-2.d,
	ld-mips-elf/pic-and-nonpic-3a.s,
	ld-mips-elf/pic-and-nonpic-3a.ld,
	ld-mips-elf/pic-and-nonpic-3a.dd,
	ld-mips-elf/pic-and-nonpic-3a.gd,
	ld-mips-elf/pic-and-nonpic-3a.sd,
	ld-mips-elf/pic-and-nonpic-3b.s,
	ld-mips-elf/pic-and-nonpic-3b.ld,
	ld-mips-elf/pic-and-nonpic-3b.ad,
	ld-mips-elf/pic-and-nonpic-3b.dd,
	ld-mips-elf/pic-and-nonpic-3b.gd,
	ld-mips-elf/pic-and-nonpic-3b.nd,
	ld-mips-elf/pic-and-nonpic-3b.pd,
	ld-mips-elf/pic-and-nonpic-3b.rd,
	ld-mips-elf/pic-and-nonpic-3b.sd,
	ld-mips-elf/pic-and-nonpic-3-error.d,
	ld-mips-elf/pic-and-nonpic-4a.s,
	ld-mips-elf/pic-and-nonpic-4b.s,
	ld-mips-elf/pic-and-nonpic-4b.ld,
	ld-mips-elf/pic-and-nonpic-4b.ad,
	ld-mips-elf/pic-and-nonpic-4b.dd,
	ld-mips-elf/pic-and-nonpic-4b.gd,
	ld-mips-elf/pic-and-nonpic-4b.nd,
	ld-mips-elf/pic-and-nonpic-4b.rd,
	ld-mips-elf/pic-and-nonpic-4b.sd,
	ld-mips-elf/pic-and-nonpic-4-error.d,
	ld-mips-elf/pic-and-nonpic-5a.s,
	ld-mips-elf/pic-and-nonpic-5b.s,
	ld-mips-elf/pic-and-nonpic-5b.ld,
	ld-mips-elf/pic-and-nonpic-5b.ad,
	ld-mips-elf/pic-and-nonpic-5b.dd,
	ld-mips-elf/pic-and-nonpic-5b.gd,
	ld-mips-elf/pic-and-nonpic-5b.nd,
	ld-mips-elf/pic-and-nonpic-5b.rd,
	ld-mips-elf/pic-and-nonpic-5b.sd,
	ld-mips-elf/pic-and-nonpic-5b.pd,
	ld-mips-elf/pic-and-nonpic-6.ld,
	ld-mips-elf/pic-and-nonpic-6-o32a.s,
	ld-mips-elf/pic-and-nonpic-6-o32b.s,
	ld-mips-elf/pic-and-nonpic-6-o32c.s,
	ld-mips-elf/pic-and-nonpic-6-o32.ad,
	ld-mips-elf/pic-and-nonpic-6-o32.dd,
	ld-mips-elf/pic-and-nonpic-6-o32.gd,
	ld-mips-elf/pic-and-nonpic-6-o32.nd,
	ld-mips-elf/pic-and-nonpic-6-o32.pd,
	ld-mips-elf/pic-and-nonpic-6-o32.rd,
	ld-mips-elf/pic-and-nonpic-6-o32.sd,
	ld-mips-elf/pic-and-nonpic-6-n32a.s,
	ld-mips-elf/pic-and-nonpic-6-n32b.s,
	ld-mips-elf/pic-and-nonpic-6-n32c.s,
	ld-mips-elf/pic-and-nonpic-6-n32.ad,
	ld-mips-elf/pic-and-nonpic-6-n32.dd,
	ld-mips-elf/pic-and-nonpic-6-n32.gd,
	ld-mips-elf/pic-and-nonpic-6-n32.nd,
	ld-mips-elf/pic-and-nonpic-6-n32.pd,
	ld-mips-elf/pic-and-nonpic-6-n32.rd,
	ld-mips-elf/pic-and-nonpic-6-n32.sd,
	ld-mips-elf/pic-and-nonpic-6-n64a.s,
	ld-mips-elf/pic-and-nonpic-6-n64b.s,
	ld-mips-elf/pic-and-nonpic-6-n64c.s,
	ld-mips-elf/pic-and-nonpic-6-n64.ad,
	ld-mips-elf/pic-and-nonpic-6-n64.dd,
	ld-mips-elf/pic-and-nonpic-6-n64.gd,
	ld-mips-elf/pic-and-nonpic-6-n64.nd,
	ld-mips-elf/pic-and-nonpic-6-n64.pd,
	ld-mips-elf/pic-and-nonpic-6-n64.rd,
	ld-mips-elf/pic-and-nonpic-6-n64.sd: New tests.
	* ld-mips-elf/mips-elf.exp: Run them.
2008-08-08 19:24:49 +00:00
Bob Wilson 532f93bd8e 2008-08-08 Sterling Augustine <sterling@tensilica.com>
* config/tc-xtensa.c (exclude_section_from_property_tables): New.
	(xtensa_create_property_segments): Use it.
	(xtensa_create_xproperty_segments): Likewise.
2008-08-08 18:21:26 +00:00
Richard Sandiford 738e53487d bfd/
* reloc.c (BFD_RELOC_MIPS16_GOT16, BFD_RELOC_MIPS16_CALL16): Declare.
	* libbfd.h, bfd-in2.h: Regenerate.
	* elf32-mips.c (elf_mips16_howto_table_rel): Fill in reserved
	R_MIPS16_GOT16 and R_MIPS16_CALL16 entries.
	(mips16_reloc_map): Add mappings.
	* elf64-mips.c (mips16_elf64_howto_table_rel): Fill in reserved
	R_MIPS16_GOT16 and R_MIPS16_CALL16 entries.
	(mips16_elf64_howto_table_rela): Likewise.
	(mips16_reloc_map): Add mappings.
	* elfn32-mips.c (elf_mips16_howto_table_rel): Fill in reserved
	R_MIPS16_GOT16 and R_MIPS16_CALL16 entries.
	(elf_mips16_howto_table_rela): Likewise.
	(mips16_reloc_map): Add mappings.
	* elfxx-mips.c (mips_elf_create_shadow_symbol): New function.
	(section_allows_mips16_refs_p): Likewise.
	(mips16_stub_symndx): Likewise.
	(mips_elf_check_mips16_stubs): Treat the data argument as a
	bfd_link_info.  Mark every dynamic symbol as needing MIPS16 stubs
	and create a "shadow" symbol for the original MIPS16 definition.
	(mips16_reloc_p, got16_reloc_p, call16_reloc_p, hi16_reloc_p)
	(lo16_reloc_p, mips16_call_reloc_p): New functions.
	(_bfd_mips16_elf_reloc_unshuffle): Use mips16_reloc_p to generalize
	relocation checks.
	(_bfd_mips16_elf_reloc_shuffle): Likewise.
	(_bfd_mips_elf_lo16_reloc): Handle R_MIPS16_GOT16.
	(mips_elf_got16_entry): Add comment.
	(mips_elf_calculate_relocation): Use hi16_reloc_p,
	lo16_reloc_p, mips16_call_reloc_p, call16_reloc_p and got16_reloc_p
	to generalize relocation checks.  Use section_allows_mips16_refs_p
	instead of mips16_stub_section_p.   Handle R_MIPS16_CALL16 and
	R_MIPS16_GOT16, allowing the former to refer directly to a
	MIPS16 function if its stub is not needed.
	(mips16_stub_section_p): Delete.
	(_bfd_mips_elf_symbol_processing): Convert odd-valued function
	symbols into even MIPS16 symbols.
	(mips_elf_add_lo16_rel_addend): Use mips16_reloc_p to generalize
	a relocation check.
	(_bfd_mips_elf_check_relocs): Calculate "bed" and "rel_end"
	earlier in the function.  Use mips16_stub_symndx to identify
	the target function.  Avoid out-of-bounds accesses when the
	stub has no relocations; report an error instead.  Use
	section_allows_mips16_refs_p instead of mips16_stub_section_p.
	Use mips16_call_reloc_p and got16_reloc_p to generalize relocation
	checks.  Handle R_MIPS16_CALL16 and R_MIPS16_GOT16.  Don't create
	dynamic relocations for absolute references to __gnu_local_gp.
	(_bfd_mips_elf_always_size_sections): Pass a bfd_link_info as
	the argument to mips_elf_check_mips16_stubs.  Generalize comment.
	(_bfd_mips_elf_relocate_section): Use hi16_reloc_p and got16_reloc_p
	to generalize relocation checks.
	(_bfd_mips_elf_finish_dynamic_symbol): If a dynamic MIPS16 function
	symbol has a non-MIPS16 stub, redirect the symbol to the stub.
	Fix an overly long line.  Don't give dynamic symbols type STO_MIPS16.
	(_bfd_mips_elf_gc_sweep_hook): Handle R_MIPS16_CALL16 and
	R_MIPS16_GOT16.

gas/
	* config/tc-mips.c (mips16_reloc_p, got16_reloc_p, hi16_reloc_p)
	(lo16_reloc_p): New functions.
	(reloc_needs_lo_p): Use hi16_reloc_p and got16_reloc_p to
	generalize relocation checks.
	(matching_lo_reloc): New function.
	(fixup_has_matching_lo_p): Use it.
	(mips16_mark_labels): Don't clobber a symbol's visibility.
	(append_insn): Use hi16_reloc_p and lo16_reloc_p.
	(mips16_ip): Handle BFD_RELOC_MIPS16_GOT16 and BFD_RELOC_MIPS16_CALL16.
	(md_apply_fix): Likewise.
	(mips16_percent_op): Add %got and %call16.
	(mips_frob_file): Use got16_reloc_p to generalize relocation checks.
	Use matching_lo_reloc.
	(mips_force_relocation): Use hi16_reloc_p and lo16_reloc_p to
	generalize relocation checks.
	(mips_fix_adjustable): Use lo16_reloc_p to generalize relocation
	checks.

gas/testsuite/
	* gas/mips/elf-rel8-mips16.d, gas/mips/elf-rel8-mips16.s,
	* gas/mips/elf-rel9-mips16.d, gas/mips/elf-rel9-mips16.s,
	* gas/mips/elf-rel13-mips16.d, gas/mips/elf-rel13-mips16.s: New tests.
	* gas/mips/mips.exp: Run them.

ld/testsuite/
	* ld-mips-elf/mips16-local-stubs-1.d: Remove stub_for_h3,
	which was only referenced by the .pdr section, and was not
	actually needed by code.
	* ld-mips-elf/mips16-intermix.d: Remove unused static function stubs.
	* ld-mips-elf/mips16-pic-1a.s,
	ld-mips-elf/mips16-pic-1b.s,
	ld-mips-elf/mips16-pic-1-dummy.s,
	ld-mips-elf/mips16-pic-1.dd,
	ld-mips-elf/mips16-pic-1.gd,
	ld-mips-elf/mips16-pic-1.inc,
	ld-mips-elf/mips16-pic-1.ld,
	ld-mips-elf/mips16-pic-2a.s,
	ld-mips-elf/mips16-pic-2b.s,
	ld-mips-elf/mips16-pic-2.ad,
	ld-mips-elf/mips16-pic-2.dd,
	ld-mips-elf/mips16-pic-2.gd,
	ld-mips-elf/mips16-pic-2.nd,
	ld-mips-elf/mips16-pic-2.rd: New tests.
	* ld-mips-elf/mips-elf.exp: Run them.
2008-08-06 19:44:47 +00:00
DJ Delorie 6fd4f6ccfe * NEWS: Mention these changes.
* config/tc-h8300.h (H_TICK_HEX): Define.
* config/tc-h8300.c (OPTION_H_TICK_HEX): New.
(md_longopts): Add "-h-tick-hex".
(md_parse_option): Support it.
* doc/c-h8300.texi (H8/300 Options): Document it.
* doc/as.texinfo (Overview): Likewise.

* config/tc-sh.h (H_TICK_HEX): Define.
* config/tc-sh.c (OPTION_H_TICK_HEX): New.
(md_longopts): Add "-h-tick-hex".
(md_parse_option): Support it.
* doc/c-sh.texi (SH Options): Document it.
* doc/c-sh64.texi (SH64 Options): Document it.
* doc/as.texinfo (Overview): Likewise.
2008-08-06 15:42:15 +00:00
Alan Modra 413a266c4f * dwarf2dbg.c: Remove superfluous forward function declarations.
(DWARF2_FORMAT): Add section arg.
	(out_header): New function, split out from..
	(out_debug_line): ..here.
	(out_debug_aranges): Use out_header.
	(out_debug_abbrev): Add info_seg and line_seg args.  Use
	DW_FORM_data8 (for DW_AT_stmt_list) if line_seg is 64-bit.
	(out_debug_info): Use out_header.  Output 8 byte DW_AT_stmt_list
	if line_seg is 64-bit.
	(dwarf2_finish): Adjust out_debug_abbrev call.
	* config/tc-mips.h (DWARF2_FORMAT, mips_dwarf2_format): Add sec arg.
	* config/tc-mips.c (mips_dwarf2_format): Likewise.
2008-08-04 10:55:48 +00:00
Peter Bergner 9b4e57660d gas/
* config/tc-ppc.c (parse_cpu): Rename altivec_or_spe to retain_flags.
	Handle -mvsx and -mpower7.
	(md_show_usage): Document -mpower7 and -mvsx.
	* doc/as.texinfo (Target PowerPC): Document -mvsx.
	* doc/c-ppc.texi (PowerPC-Opts): Document -mvsx and -mpower7.

gas/testsuite/
	* gas/ppc/power7.d: New.
	* gas/ppc/power7.s: Likewise.
	* gas/ppc/ppc.exp: Run power7 test.

include/opcode/
	* ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New.

opcodes/
	* ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
	(print_insn_powerpc): Prepend 'vs' when printing VSX registers.
	(print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
	* ppc-opc.c (insert_xt6): New static function.
	(extract_xt6): Likewise.
	(insert_xa6): Likewise.
	(extract_xa6: Likewise.
	(insert_xb6): Likewise.
	(extract_xb6): Likewise.
	(insert_xb6s): Likewise.
	(extract_xb6s): Likewise.
	(XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
	XX3DM_MASK, PPCVSX): New.
	(powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
	"stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
2008-08-02 04:38:51 +00:00
Peter Bergner 3823320924 gas/
* config/tc-ppc.c (parse_cpu) <power6>: Accept Altivec instructions.
	<cell>: Likewise.

gas/testsuite/
	* gas/ppc/cell.s: Add altivec instructions.
	* gas/ppc/cell.d: Update expected output.
	* gas/ppc/power6.d: New.
	* gas/ppc/power6.s: Likewise.
	* gas/ppc/ppc.exp (powerpc64*-*-*): Move cell from here to...
	(powerpc*-*-*): Here.  Run power6 test.
2008-08-01 02:44:12 +00:00
Alan Modra 081ba1b3c0 include/opcode/
* ppc.h (PPC_OPCODE_405): Define.
	(PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI): Define.
gas/
	* config/tc-ppc.c (parse_cpu): Separate handling of -m403/405.
	(md_show_usage): Likewise.
opcodes/
	* ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
	* ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
	(insert_sprg, PPC405): Use PPC_OPCODE_405.
	(powerpc_opcodes): Add Xilinx APU related opcodes.
2008-07-30 06:29:22 +00:00
Alan Modra 2cfe26b654 warning fix 2008-07-28 06:48:00 +00:00
Jie Zhang 81fd73edd1 * config/bfin-parse.y (asm_1): Error if plain symbol is used
as load/store offset.
2008-07-24 07:25:13 +00:00
Nick Clifton 570de99165 * config/tc-mips.c (mips_ip): Reset s to argsStart.
* gas/mips/tls-ill.l: Update error message.
        * gas/mips/octeon-ill.l: Likewise.
2008-07-22 10:44:51 +00:00