This patch merges the masks for matching the stwux and stdux
instructions in rs6000-tdep.c:skip_prologue into a single mask that
only matches these two instructions.
Commit 72dd273062 fixed the warning described in PR tdep/18295, this
patch addresses the comment in the same PR indicating that the mask
was too permissive.
gdb/Changelog:
PR tdep/18295
* rs6000-tdep.c (skip_prologue): Match both stwux and stdux
a single mask.
This patch extends rs6000-tdep.c:skip_prologue so that it can detect
when the Link Register is saved using the frame pointer (usually r31)
in adition to the stack pointer (r1).
The frame pointer offset from the frame base is tracked separately
from the stack pointer offset for cases when the frame pointer is not
in synch with the stack pointer at the moment of the LR save.
Previously, "stq" could also be detected as an instruction that saves
LR or CR. Because this was likely unintentional, this patch also
restricts the matches to stw/stwu/std/stdu.
gdb/ChangeLog:
* rs6000-tdep.c (store_insn_p): New function.
(skip_prologue): New variable alloca_reg_offset. Set lr_reg
and cr_reg to their unshifted values. Use store_insn_p to
match LR saves using either R1 or fdata->alloca_reg. Use
store_insn_p to match CR saves. Set alloca_reg_offset
when alloca_reg and framep are set. Remove lr_reg shift
when assigning to fdata->lr_register.
pseudo registers are either from raw registers or memory, so
gdbarch methods pseudo_register_read and pseudo_register_read_value
should have regcache object which only have read methods. In other
words, we should disallow writing to regcache in these two gdbarch
methods. In order to apply this restriction, this patch adds a new
class readable_regcache, derived from reg_buffer, and it only has
raw_read and cooked_read methods. regcache is derived from
readable_regcache. This patch also passes readable_regcache instead of
regcache to gdbarch methods pseudo_register_read and
pseudo_register_read_value.
This patch moves raw_read* and cooked_read* methods to readable_regcache,
which is straightforward. One thing not straightforward is that I split
regcache::xfer_part to readable_regcache::read_part and regcache::write_part,
because readable_regcache can only have methods to read.
readable_regcache is an abstract base class, and it has a pure virtual
function raw_update, because I don't want readable_regcache know where
these raw registers are from. They can be from either the target
(readwrite regcache) or the regcache itself (readonly regcache).
gdb:
2018-02-21 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (aarch64_pseudo_register_read_value): Change
parameter type to 'readable_regcache *'.
* amd64-tdep.c (amd64_pseudo_register_read_value): Likewise.
* arm-tdep.c (arm_neon_quad_read): Likewise.
(arm_pseudo_read): Likewise.
* avr-tdep.c (avr_pseudo_register_read): Likewise.
* bfin-tdep.c (bfin_pseudo_register_read): Likewise.
* frv-tdep.c (frv_pseudo_register_read): Likewise.
* gdbarch.c: Re-generated.
* gdbarch.h: Re-generated.
* gdbarch.sh (pseudo_register_read): Change parameter type to
'readable_regcache *'.
(pseudo_register_read_value): Likewise.
* h8300-tdep.c (pseudo_from_raw_register): Likewise.
(h8300_pseudo_register_read): Likewise.
* hppa-tdep.c (hppa_pseudo_register_read): Likewise.
* i386-tdep.c (i386_mmx_regnum_to_fp_regnum): Likewise.
(i386_pseudo_register_read_into_value): Likewise.
(i386_pseudo_register_read_value): Likewise.
* i386-tdep.h (i386_pseudo_register_read_into_value): Update
declaration.
* ia64-tdep.c (ia64_pseudo_register_read): Likewise.
* m32c-tdep.c (m32c_raw_read): Likewise.
(m32c_read_flg): Likewise.
(m32c_banked_register): Likewise.
(m32c_banked_read): Likewise.
(m32c_sb_read): Likewise.
(m32c_part_read): Likewise.
(m32c_cat_read): Likewise.
(m32c_r3r2r1r0_read): Likewise.
(m32c_pseudo_register_read): Likewise.
* m68hc11-tdep.c (m68hc11_pseudo_register_read): Likewise.
* mep-tdep.c (mep_pseudo_cr32_read): Likewise.
(mep_pseudo_cr64_read): Likewise.
(mep_pseudo_register_read): Likewise.
* mips-tdep.c (mips_pseudo_register_read): Likewise.
* msp430-tdep.c (msp430_pseudo_register_read): Likewise.
* nds32-tdep.c (nds32_pseudo_register_read): Likewise.
* regcache.c (regcache::raw_read): Move it to readable_regcache.
(regcache::cooked_read): Likewise.
(regcache::cooked_read_value): Likewise.
(regcache_cooked_read_signed):
(regcache::cooked_read): Likewise.
* regcache.h (readable_regcache): New class.
(regcache): Inherit readable_regcache. Move some methods to
readable_regcache.
* rl78-tdep.c (rl78_pseudo_register_read): Change
parameter type to 'readable_regcache *'.
* rs6000-tdep.c (do_regcache_raw_read): Remove.
(e500_pseudo_register_read): Change parameter type to
'readable_regcache *'.
(dfp_pseudo_register_read): Likewise.
(vsx_pseudo_register_read): Likewise.
(efpr_pseudo_register_read): Likewise.
* s390-tdep.c (s390_pseudo_register_read): Likewise.
* sh-tdep.c (sh_pseudo_register_read): Likewise.
* sh64-tdep.c (pseudo_register_read_portions): Likewise.
(sh64_pseudo_register_read): Likewise.
* sparc-tdep.c (sparc32_pseudo_register_read): Likewise.
* sparc64-tdep.c (sparc64_pseudo_register_read): Likewise.
* spu-tdep.c (spu_pseudo_register_read_spu): Likewise.
(spu_pseudo_register_read): Likewise.
* xtensa-tdep.c (xtensa_register_read_masked): Likewise.
(xtensa_pseudo_register_read): Likewise.
With gcc-8.0.1-0.9.fc28.x86_64 I get:
../../gdb/rs6000-tdep.c: In function 'CORE_ADDR skip_prologue(gdbarch*, CORE_ADDR, CORE_ADDR, rs6000_framedata*)':
../../gdb/rs6000-tdep.c:1911:34: error: bitwise comparison always evaluates to false [-Werror=tautological-compare]
else if ((op & 0xfc1f016a) == 0x7c01016e)
~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~
https://www.ibm.com/support/knowledgecenter/en/ssw_aix_72/com.ibm.aix.alangref/idalangref_stwux_stux_instrs.htm
says
bit 21 - 30 = 183
Those are bits 1..10 in normal bit order: 183<<1 = 0x16e
gdb/ChangeLog
2018-02-04 Jan Kratochvil <jan.kratochvil@redhat.com>
* rs6000-tdep.c (skip_prologue): Fix stwux encoding.
One of conditions in skip_prologue() was never visited if there was mflr
instruction that moves the link register to a register different than r0.
This condition expects non shifted value of `lr_reg`. Previously offset
of link register was never saved for registers different than r0.
gdb/ChangeLog:
2018-01-31 Nikola Prica <nikola.prica@rt-rk.com>
* rs6000-tdep.c (skip_prologue): Remove shifting for lr_reg and
assign shifted lr_reg to fdata->lr_register when lr_reg is set.
gdb/testsuite/ChangeLog:
2018-01-31 Nikola Prica <nikola.prica@rt-rk.com>
* gdb.arch/powerpc-prologue-frame.s: New file.
* gdb.arch/powerpc-prologue-frame.c: Likewise.
* gdb.arch/powerpc-prologue-frame.exp: Likewise.
This patch fixes a number of bugs in ppc32 plt stub matching code.
1) The 4-insn stubs for shared libs and PIEs weren't matched.
2) The executable stub miscalculated PLT entry address (by oring a
sign-extended quantity rather than adding).
3) Comments were not accurate.
In addition, the insn arrays are made const.
* ppc-linux-tdep.c (powerpc32_plt_stub): Make const.
(powerpc32_plt_stub_so_1): Rename from powerpc32_plt_stub_so.
Remove nop. Make const. Comment.
(powerpc32_plt_stub_so_2): New.
(POWERPC32_PLT_CHECK_LEN): Rename from POWERPC32_PLT_STUB_LEN.
Correct count. Update uses.
(ppc_skip_trampoline_code): Match powerpc32_plt_stub_so_2 too.
Move common code reading PLT entry word. Correct
powerpc32_plt_stub PLT address calculation.
* ppc64-tdep.c (ppc64_standard_linkage1): Make const.
(ppc64_standard_linkage2, ppc64_standard_linkage3): Likewise.
(ppc64_standard_linkage4, ppc64_standard_linkage5): Likewise.
(ppc64_standard_linkage6, ppc64_standard_linkage7): Likewise.
(ppc64_standard_linkage8): Likewise.
* rs6000-tdep.c (ppc_insns_match_pattern): Make pattern const.
Correct insns description.
* ppc-tdep.h (ppc_insns_match_pattern): Update prototype.
Reviewed-By: Yao Qi <qiyaoltc@gmail.com>
The patch later in this series will move regcache's raw_read and
cooked_read methods to a new class regcache_read, and regcache is
dervied from it. Also pass regcache_read instead of regcache to gdbarch
methods pseudo_register_read and pseudo_register_read_value. In order
to prepare for this change, this patch changes regcache_raw_read to
regcache->raw_read. On the other hand, since we are in C++, I prefer
using class method (regcache->raw_read).
gdb:
2018-01-22 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (aarch64_pseudo_read_value): Call regcache
method raw_read instead of regcache_raw_read.
* amd64-tdep.c (amd64_pseudo_register_read_value): Likewise.
* arm-tdep.c (arm_neon_quad_read): Likewise.
* avr-tdep.c (avr_pseudo_register_read): Likewise.
* bfin-tdep.c (bfin_pseudo_register_read): Likewise.
* frv-tdep.c (frv_pseudo_register_read): Likewise.
* h8300-tdep.c (h8300_pseudo_register_read): Likewise.
* i386-tdep.c (i386_mmx_regnum_to_fp_regnum): Likewise.
(i386_pseudo_register_read_into_value): Likewise.
* mep-tdep.c (mep_pseudo_cr32_read): Likewise.
* msp430-tdep.c (msp430_pseudo_register_read): Likewise.
* nds32-tdep.c (nds32_pseudo_register_read): Likewise.
* rl78-tdep.c (rl78_pseudo_register_read): Likewise.
* s390-linux-tdep.c (s390_pseudo_register_read): Likewise.
* sparc-tdep.c (sparc32_pseudo_register_read): Likewise.
* sparc64-tdep.c (sparc64_pseudo_register_read): Likewise.
* spu-tdep.c (spu_pseudo_register_read_spu): Likewise.
* xtensa-tdep.c (xtensa_pseudo_register_read): Likewise.
The result of this memory read is never used, so it can be removed.
gdb/ChangeLog:
* rs6000-tdep.c (ppc_deal_with_atomic_sequence): Remove
write-only assignment to "insn" variable.
Current versions of GCC support switching the format used for "long double"
to either IBM double double or IEEE-128. The resulting binary is marked
via different setting of the Tag_GNU_Power_ABI_FP GNU attribute.
This patch checks this attribute to detect the format of the default
"long double" type and sets GDB's notion of the format accordingly.
The patch also adds support for the "__ibm128" type, which always uses
IBM double double format independent of the format used for "long double".
A new test case verifies that all three types, "long double", "__float128",
and "__ibm128" are correctly detected in all three compiler settings,
the default setting, -mabi=ieeelongdouble, and -mabi=ibmlongdouble.
gdb/ChangeLog:
2017-11-21 Ulrich Weigand <uweigand@de.ibm.com>
* ppc-tdep.h (enum powerpc_long_double_abi): New data type.
(struct gdbarch_tdep): New member long_double_abi.
* rs6000-tdep.c (rs6000_gdbarch_init): Initialize long_double_abi
member of tdep struct based on Tag_GNU_Power_ABI_FP attribute.
* ppc-linux-tdep.c (ppc_linux_init_abi): Install long double data
format depending on long_double_abi tdep member.
(ppc_floatformat_for_type): Handle __ibm128 type.
gdb/testsuite/ChangeLog:
2017-11-21 Ulrich Weigand <uweigand@de.ibm.com>
* gdb.arch/ppc-longdouble.exp: New file.
* gdb.arch/ppc-longdouble.c: Likewise.
This patch mechanically replaces convert_typed_floating with the
equivalent target_float_convert throughout tdep files, to prepare
for the removal of doublest.{c,h}.
No functional change intended.
gdb/ChangeLog:
2017-11-06 Ulrich Weigand <uweigand@de.ibm.com>
* i386-tdep.c: Include "target-float.h". Do not include "doublest.h".
(i386_extract_return_value): Use target_float_convert.
(i386_store_return_value): Likewise.
* i387-tdep.c (i387_register_to_value): Use target_float_convert.
(i387_value_to_register): Likewise.
* ia64-tdep.c: Include "target-float.h". Do not include "doublest.h".
(ia64_register_to_value): Use target_float_convert.
(ia64_value_to_register): Likewise.
(ia64_extract_return_value): Likewise.
(ia64_store_return_value): Likewise.
(ia64_push_dummy_call): Likewise.
* m68k-tdep.c: Include "target-float.h".
(m68k_register_to_value): Use target_float_convert.
(m68k_value_to_register): Likewise.
(m68k_svr4_extract_return_value): Likewise.
(m68k_svr4_store_return_value): Likewise.
* ppc-sysv-tdep.c: Include "target-float.h".
(ppc_sysv_abi_push_dummy_call): Use target_float_convert.
(do_ppc_sysv_return_value): Likewise.
(ppc64_sysv_abi_push_freg): Likewise.
(ppc64_sysv_abi_return_value_base): Likewise.
* rs6000-aix-tdep.c: Include "target-float.h".
(rs6000_push_dummy_call): Use target_float_convert.
(rs6000_return_value): Likewise.
* rs6000-lynx178-tdep.c: Include "target-float.h".
(rs6000_lynx178_push_dummy_call): Use target_float_convert.
(rs6000_lynx178_return_value): Likewise.
* rs6000-tdep.c: Include "target-float.h". Do not include "doublest.h".
(rs6000_register_to_value): Use target_float_convert.
(rs6000_value_to_register): Likewise.
* arm-tdep.c: Include "target-float.h". Do not include "doublest.h".
(arm_extract_return_value): Use target_float_convert.
(arm_store_return_value): Likewise.
* sh-tdep.c: Include "target-float.h". Do not include "doublest.h".
(sh_register_convert_to_virtual): Use target_float_convert.
(sh_register_convert_to_raw): Likewise.
* sh64-tdep.c: Include "target-float.h".
(sh64_extract_return_value): Use target_float_convert.
(sh64_register_convert_to_virtual): Likewise.
(sh64_register_convert_to_raw): Likewise. Fix argument types.
displaced_step_closure is a type defined in multiple -tdep.c files.
Trying to xfree it from the common code (infrun.c) is a problem when we
try to poison xfree for non-POD types. Because there can be multiple of
these types in the same build, this patch makes a hierarchy of classes
with a virtual destructor. When the common code deletes the object
through a displaced_step_closure pointer, it will invoke the right
destructor.
The amd64 used a last-member array with a variable size. That doesn't
work with new, so I changed it for an std::vector. Other architectures
which used a simple byte buffer as a closure now use a shared
buf_displaced_step_closure, a closure type that only contains a
gdb::byte_vector.
Reg-tested on the buildbot.
gdb/ChangeLog:
* infrun.h: Include common/byte-vector.h.
(struct displaced_step_closure): New struct.
(struct buf_displaced_step_closure): New struct.
* infrun.c (displaced_step_closure::~displaced_step_closure):
Provide default implementation.
(displaced_step_clear): Deallocate step closure with delete.
* aarch64-tdep.c (displaced_step_closure): Rename to ...
(aarch64_displaced_step_closure): ... this, extend
displaced_step_closure.
(aarch64_displaced_step_data) <dsc>: Change type to
aarch64_displaced_step_closure.
(aarch64_displaced_step_copy_insn): Adjust to type change, use
unique_ptr.
(aarch64_displaced_step_fixup): Add cast for displaced step
closure.
* amd64-tdep.c (displaced_step_closure): Rename to ...
(amd64_displaced_step_closure): ... this, extend
displaced_step_closure.
<insn_buf>: Change type to std::vector<gdb_byte>.
<max_len>: Remove.
(fixup_riprel): Change type of DSC parameter, adjust to type
change of insn_buf.
(fixup_displaced_copy): Change type of DSC parameter.
(amd64_displaced_step_copy_insn): Instantiate
amd64_displaced_step_closure.
(amd64_displaced_step_fixup): Add cast for closure type, adjust
to type change of insn_buf.
* arm-linux-tdep.c (arm_linux_cleanup_svc): Change type of
parameter DSC.
(arm_linux_copy_svc): Likewise.
(cleanup_kernel_helper_return): Likewise.
(arm_catch_kernel_helper_return): Likewise.
(arm_linux_displaced_step_copy_insn): Instantiate
arm_displaced_step_closure.
* arm-tdep.c (arm_pc_is_thumb): Add cast for closure.
(displaced_read_reg): Change type of parameter DSC.
(branch_write_pc): Likewise.
(load_write_pc): Likewise.
(alu_write_pc): Likewise.
(displaced_write_reg): Likewise.
(arm_copy_unmodified): Likewise.
(thumb_copy_unmodified_32bit): Likewise.
(thumb_copy_unmodified_16bit): Likewise.
(cleanup_preload): Likewise.
(install_preload): Likewise.
(arm_copy_preload): Likewise.
(thumb2_copy_preload): Likewise.
(install_preload_reg): Likewise.
(arm_copy_preload_reg): Likewise.
(cleanup_copro_load_store): Likewise.
(install_copro_load_store): Likewise.
(arm_copy_copro_load_store) Likewise.
(thumb2_copy_copro_load_store): Likewise.
(cleanup_branch): Likewise.
(install_b_bl_blx): Likewise.
(arm_copy_b_bl_blx): Likewise.
(thumb2_copy_b_bl_blx): Likewise.
(thumb_copy_b): Likewise.
(install_bx_blx_reg): Likewise.
(arm_copy_bx_blx_reg): Likewise.
(thumb_copy_bx_blx_reg): Likewise.
(cleanup_alu_imm): Likewise.
(arm_copy_alu_imm): Likewise.
(thumb2_copy_alu_imm): Likewise.
(cleanup_alu_reg): Likewise.
(install_alu_reg): Likewise.
(arm_copy_alu_reg): Likewise.
(thumb_copy_alu_reg): Likewise.
(cleanup_alu_shifted_reg): Likewise.
(install_alu_shifted_reg): Likewise.
(arm_copy_alu_shifted_reg): Likewise.
(cleanup_load): Likewise.
(cleanup_store): Likewise.
(arm_copy_extra_ld_st): Likewise.
(install_load_store): Likewise.
(thumb2_copy_load_literal): Likewise.
(thumb2_copy_load_reg_imm): Likewise.
(arm_copy_ldr_str_ldrb_strb): Likewise.
(cleanup_block_load_all): Likewise.
(cleanup_block_store_pc): Likewise.
(cleanup_block_load_pc): Likewise.
(arm_copy_block_xfer): Likewise.
(thumb2_copy_block_xfer): Likewise.
(cleanup_svc): Likewise.
(install_svc): Likewise.
(arm_copy_svc): Likewise.
(thumb_copy_svc): Likewise.
(arm_copy_undef): Likewise.
(thumb_32bit_copy_undef): Likewise.
(arm_copy_unpred): Likewise.
(arm_decode_misc_memhint_neon): Likewise.
(arm_decode_unconditional): Likewise.
(arm_decode_miscellaneous): Likewise.
(arm_decode_dp_misc): Likewise.
(arm_decode_ld_st_word_ubyte): Likewise.
(arm_decode_media): Likewise.
(arm_decode_b_bl_ldmstm): Likewise.
(arm_decode_ext_reg_ld_st): Likewise.
(thumb2_decode_dp_shift_reg): Likewise.
(thumb2_decode_ext_reg_ld_st): Likewise.
(arm_decode_svc_copro): Likewise.
(thumb2_decode_svc_copro): Likewise.
(install_pc_relative): Likewise.
(thumb_copy_pc_relative_16bit): Likewise.
(thumb_decode_pc_relative_16bit): Likewise.
(thumb_copy_pc_relative_32bit): Likewise.
(thumb_copy_16bit_ldr_literal): Likewise.
(thumb_copy_cbnz_cbz): Likewise.
(thumb2_copy_table_branch): Likewise.
(cleanup_pop_pc_16bit_all): Likewise.
(thumb_copy_pop_pc_16bit): Likewise.
(thumb_process_displaced_16bit_insn): Likewise.
(decode_thumb_32bit_ld_mem_hints): Likewise.
(thumb_process_displaced_32bit_insn): Likewise.
(thumb_process_displaced_insn): Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(arm_displaced_step_fixup): Add cast for closure.
* arm-tdep.h: Include infrun.h.
(displaced_step_closure): Rename to ...
(arm_displaced_step_closure): ... this, extend
displaced_step_closure.
<u::svc::copy_svc_os>: Change type of parameter DSC.
<cleanup>: Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(displaced_read_reg): Likewise.
(displaced_write_reg): Likewise.
* i386-linux-tdep.c (i386_linux_displaced_step_copy_insn):
Adjust.
* i386-tdep.h: Include infrun.h.
(i386_displaced_step_closure): New typedef.
* i386-tdep.c (i386_displaced_step_copy_insn): Use
i386_displaced_step_closure.
(i386_displaced_step_fixup): Adjust.
* rs6000-tdep.c (ppc_displaced_step_closure): New typedef.
(ppc_displaced_step_copy_insn): Use ppc_displaced_step_closure
and unique_ptr.
(ppc_displaced_step_fixup): Adjust.
* s390-linux-tdep.c (s390_displaced_step_closure): New typedef.
(s390_displaced_step_copy_insn): Use s390_displaced_step_closure
and unique_ptr.
(s390_displaced_step_fixup): Adjust.
As an update to commit ede5f15146 ("gdbarch.h: Change
gdbarch_info::tdep_info's type to void *") replace the definition of the
`tdep_info' member in `struct gdbarch_info' with an anonymous union,
comprising the original member, with its type reverted to `struct
gdbarch_tdep_info *', a `tdesc_data' member of a `struct tdesc_arch_data
*' type and an `id' member of an `int *' type. Remove now unnecessary
casts throughout use places then, making code easier to read an less
prone to errors, which may happen with casting.
gdb/
* gdbarch.sh (gdbarch_info): Replace the `tdep_info' member with
a union of `tdep_info', `tdesc_data' and `id'.
* aarch64-tdep.c (aarch64_gdbarch_init): Use `info.tdesc_data'
rather than `info.tdep_info'.
* amd64-linux-tdep.c (amd64_linux_init_abi): Likewise.
* i386-linux-tdep.c (i386_linux_init_abi): Likewise.
* i386-tdep.c (i386_gdbarch_init): Likewise.
* mips-linux-tdep.c (mips_linux_init_abi): Likewise.
* mips-tdep.c (mips_gdbarch_init): Likewise.
* nds32-tdep.c (nds32_gdbarch_init): Likewise.
* rs6000-tdep.c (rs6000_gdbarch_init): Likewise.
* ppc-linux-tdep.c (ppu2spu_sniffer): Use `info.id' rather than
`info.tdep_info'.
(ppc_linux_init_abi): Use `info.tdesc_data' rather than
`info.tdep_info'.
* sparc-tdep.c (sparc32_gdbarch_init): Likewise.
* spu-multiarch.c (spu_gdbarch): Use `info.id' rather than
`info.tdep_info'.
* spu-tdep.c (spu_gdbarch_init): Likewise.
* gdbarch.h: Regenerate.
The displaced_step_free_closure gdbarch hook allows architectures to
free data they might have allocated to complete a displaced step.
However, all architectures using that hook use the
simple_displaced_step_free_closure provided in arch-utils.{c,h}, which
does a simple xfree. We can remove it and do an xfree directly instead
of calling the hook.
gdb/ChangeLog:
* gdbarch.sh (displaced_step_free_closure): Remove.
* gdbarch.h, gdbarch.c: Re-generate.
* aarch64-linux-tdep.c (aarch64_linux_init_abi): Don't set
displaced_step_free_closure.
* amd64-linux-tdep.c (amd64_linux_init_abi_common): Likewise.
* arm-linux-tdep.c (arm_linux_init_abi): Likewise.
* i386-linux-tdep.c (i386_linux_init_abi): Likewise.
* rs6000-aix-tdep.c (rs6000_aix_init_osabi): Likewise.
* rs6000-tdep.c (rs6000_gdbarch_init): Likewise.
* s390-linux-tdep.c (s390_gdbarch_init): Likewise.
* arch-utils.h (simple_displaced_step_free_closure): Remove.
* arch-utils.c (simple_displaced_step_free_closure): Remove.
* infrun.c (displaced_step_clear): Call xfree instead of
gdbarch_displaced_step_free_closure.
Nowadays, rs6000 disassembler is selected in different ways in
opcodes and gdb,
opcodes:
case bfd_arch_rs6000:
if (mach == bfd_mach_ppc_620)
disassemble = print_insn_big_powerpc;
else
disassemble = print_insn_rs6000;
break;
gdb:
if (arch == bfd_arch_rs6000)
set_gdbarch_print_insn (gdbarch, print_insn_rs6000);
else
set_gdbarch_print_insn (gdbarch, gdb_print_insn_powerpc);
I am not sure which one is the right one. However, such selection
should be done in one place instead of two.
gdb:
2017-05-24 Yao Qi <yao.qi@linaro.org>
* rs6000-tdep.c (gdb_print_insn_powerpc): Remove.
(rs6000_gdbarch_init): Don't call set_gdbarch_print_insn.
This commit adds support to GDB so that it can modify the disassembler-options
value that is passed to the disassembler, similar to objdump's -M option.
Currently, the only supported targets are ARM, PowerPC and S/390, but
adding support for a new target(s) is not difficult.
include/
* dis-asm.h (disasm_options_t): New typedef.
(parse_arm_disassembler_option): Remove prototype.
(set_arm_regname_option): Likewise.
(get_arm_regnames): Likewise.
(get_arm_regname_num_options): Likewise.
(disassemble_init_s390): New prototype.
(disassembler_options_powerpc): Likewise.
(disassembler_options_arm): Likewise.
(disassembler_options_s390): Likewise.
(remove_whitespace_and_extra_commas): Likewise.
(disassembler_options_cmp): Likewise.
(next_disassembler_option): New inline function.
(FOR_EACH_DISASSEMBLER_OPTION): New macro.
opcodes/
* disassemble.c Include "safe-ctype.h".
(disassemble_init_for_target): Handle s390 init.
(remove_whitespace_and_extra_commas): New function.
(disassembler_options_cmp): Likewise.
* arm-dis.c: Include "libiberty.h".
(NUM_ELEM): Delete.
(regnames): Use long disassembler style names.
Add force-thumb and no-force-thumb options.
(NUM_ARM_REGNAMES): Rename from this...
(NUM_ARM_OPTIONS): ...to this. Use ARRAY_SIZE.
(get_arm_regname_num_options): Delete.
(set_arm_regname_option): Likewise.
(get_arm_regnames): Likewise.
(parse_disassembler_options): Likewise.
(parse_arm_disassembler_option): Rename from this...
(parse_arm_disassembler_options): ...to this. Make static.
Use new FOR_EACH_DISASSEMBLER_OPTION macro to scan over options.
(print_insn): Use parse_arm_disassembler_options.
(disassembler_options_arm): New function.
(print_arm_disassembler_options): Handle updated regnames.
* ppc-dis.c: Include "libiberty.h".
(ppc_opts): Add "32" and "64" entries.
(ppc_parse_cpu): Use ARRAY_SIZE and disassembler_options_cmp.
(powerpc_init_dialect): Add break to switch statement.
Use new FOR_EACH_DISASSEMBLER_OPTION macro.
(disassembler_options_powerpc): New function.
(print_ppc_disassembler_options): Use ARRAY_SIZE.
Remove printing of "32" and "64".
* s390-dis.c: Include "libiberty.h".
(init_flag): Remove unneeded variable.
(struct s390_options_t): New structure type.
(options): New structure.
(init_disasm): Rename from this...
(disassemble_init_s390): ...to this. Add initializations for
current_arch_mask and option_use_insn_len_bits_p. Remove init_flag.
(print_insn_s390): Delete call to init_disasm.
(disassembler_options_s390): New function.
(print_s390_disassembler_options): Print using information from
struct 'options'.
* po/opcodes.pot: Regenerate.
binutils/
* objdump.c (main): Use remove_whitespace_and_extra_commas.
gdb/
* NEWS: Mention new set/show disassembler-options commands.
* doc/gdb.texinfo: Document new set/show disassembler-options commands.
* disasm.c: Include "arch-utils.h", "gdbcmd.h" and "safe-ctype.h".
(prospective_options): New static variable.
(gdb_disassembler::gdb_disassembler): Initialize
m_di.disassembler_options.
(gdb_buffered_insn_length_init_dis): Initilize di->disassembler_options.
(get_disassembler_options): New function.
(set_disassembler_options): Likewise.
(set_disassembler_options_sfunc): Likewise.
(show_disassembler_options_sfunc): Likewise.
(disassembler_options_completer): Likewise.
(_initialize_disasm): Likewise.
* disasm.h (get_disassembler_options): New prototype.
(set_disassembler_options): Likewise.
* gdbarch.sh (gdbarch_disassembler_options): New variable.
(gdbarch_verify_disassembler_options): Likewise.
* gdbarch.c: Regenerate.
* gdbarch.h: Likewise.
* arm-tdep.c (num_disassembly_options): Delete.
(set_disassembly_style): Likewise.
(arm_disassembler_options): New static variable.
(set_disassembly_style_sfunc): Convert short style name into long
option name. Call set_disassembler_options.
(show_disassembly_style_sfunc): New function.
(arm_gdbarch_init): Call set_gdbarch_disassembler_options and
set_gdbarch_verify_disassembler_options.
(_initialize_arm_tdep): Delete regnames variable and update callers.
(arm_disassembler_options): Initialize.
(disasm_options): New variable.
(num_disassembly_options): Rename from this...
(num_disassembly_styles): ...to this. Compute by scanning through
disasm_options.
(valid_disassembly_styles): Initialize using disasm_options.
Remove calls to parse_arm_disassembler_option, get_arm_regnames and
set_arm_regname_option.
Pass show_disassembly_style_sfunc to the "disassembler" setshow command.
* rs6000-tdep.c (powerpc_disassembler_options): New static variable.
(rs6000_gdbarch_init): Call set_gdbarch_disassembler_options and
set_gdbarch_verify_disassembler_options.
* s390-tdep.c (s390_disassembler_options): New static variable.
(s390_gdbarch_init):all set_gdbarch_disassembler_options and
set_gdbarch_verify_disassembler_options.
gdb/testsuite/
* gdb.arch/powerpc-power.exp: Delete test.
* gdb.arch/powerpc-power.s: Likewise.
* gdb.disasm/disassembler-options.exp: New test.
* gdb.arch/powerpc-altivec.exp: Likewise.
* gdb.arch/powerpc-altivec.s: Likewise.
* gdb.arch/powerpc-altivec2.exp: Likewise.
* gdb.arch/powerpc-altivec2.s: Likewise.
* gdb.arch/powerpc-altivec3.exp: Likewise.
* gdb.arch/powerpc-altivec3.s: Likewise.
* gdb.arch/powerpc-power7.exp: Likewise.
* gdb.arch/powerpc-power7.s: Likewise.
* gdb.arch/powerpc-power8.exp: Likewise.
* gdb.arch/powerpc-power8.s: Likewise.
* gdb.arch/powerpc-power9.exp: Likewise.
* gdb.arch/powerpc-power9.s: Likewise.
* gdb.arch/powerpc-vsx.exp: Likewise.
* gdb.arch/powerpc-vsx.s: Likewise.
* gdb.arch/powerpc-vsx2.exp: Likewise.
* gdb.arch/powerpc-vsx2.s: Likewise.
* gdb.arch/powerpc-vsx3.exp: Likewise.
* gdb.arch/powerpc-vsx3.s: Likewise.
* gdb.arch/arm-disassembler-options.exp: Likewise.
* gdb.arch/powerpc-disassembler-options.exp: Likewise.
* gdb.arch/s390-disassembler-options.exp: Likewise.
gdb/
2017-02-21 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
* rs6000-tdep.c (LOAD_AND_RESERVE_MASK): Rename from LWARX_MASK.
(STORE_CONDITIONAL_MASK): Rename from STWCX_MASK.
(LBARX_INSTRUCTION, LHARX_INSTRUCTION, LQARX_INSTRUCTION,
STBCX_INSTRUCTION, STHCX_INSTRUCTION, STQCX_INSTRUCTION): New defines.
(IS_LOAD_AND_RESERVE_INSN, IS_STORE_CONDITIONAL_INSN): New macros.
(ppc_displaced_step_copy_insn): Use IS_LOAD_AND_RESERVE_INSN.
(ppc_deal_with_atomic_sequence): Use IS_LOAD_AND_RESERVE_INSN and
IS_STORE_CONDITIONAL_INSN.
gdb/testsuite/
2017-02-21 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
* gdb.arch/ppc64-isa207-atomic-inst.exp: New testcase based on
gdb.arch/ppc64-atomic-inst.exp. Add tests for lbarx/stbcx, lharx/sthcx
and lqarx/stqcx.
* gdb.arch/ppc64-isa207-atomic-inst.S: New file.
* gdb.arch/ppc64-isa207-atomic-inst.c: Likewise.
This applies the second part of GDB's End of Year Procedure, which
updates the copyright year range in all of GDB's files.
gdb/ChangeLog:
Update copyright year range in all GDB files.
Both of them are used in conversion. We can remove them since the
conversion is done.
There are many architectures only have one breakpoint instruction,
so their gdbarch methods breakpoint_kind_from_pc and
sw_breakpoint_from_kind look very similar. Instead of macro, we
use template "template <size_t, const gdb_byte *> struct bp_manipulation"
for these architectures. In order to use template, I also change
breakpoint instruction of type "static const gdb_byte[]" to
"constexpr gdb_byte[]", and rename them to ARCH_break_insn.
gdb:
2016-11-03 Yao Qi <yao.qi@linaro.org>
Pedro Alves <palves@redhat.com>
* aarch64-tdep.c (aarch64_default_breakpoint): Change it to
constexpr. Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(aarch64_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* alpha-tdep.c (break_insn): Rename to alpha_break_insn.
Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(alpha_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* arc-tdep.c (arc_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* arch-utils.h (GDBARCH_BREAKPOINT_MANIPULATION): Remove.
(struct bp_manipulation): New.
(SET_GDBARCH_BREAKPOINT_MANIPULATION): Remove.
(struct bp_manipulation_endian): New.
(BP_MANIPULATION): New.
(BP_MANIPULATION_ENDIAN): New.
* arm-tdep.c (arm_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* avr-tdep.c (avr_break_insn): Change it constexpr.
(avr_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* bfin-tdep.c (bfin_gdbarch_init): Likewise.
* cris-tdep.c (cris_gdbarch_init): Likewise.
* frv-tdep.c (breakpoint): Rename it to frv_break_insn, and
change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(frv_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* ft32-tdep.c (breakpoint): Rename it to ft32_break_insn and
change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(ft32_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* h8300-tdep.c (breakpoint): Rename it to h8300_break_insn.
Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(h8300_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* hppa-tdep.c (breakpoint): Rename it to h8300_break_insn.
Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(hppa_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* i386-tdep.c (break_insn): Rename it to i386_break_insn.
Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(i386_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* iq2000-tdep.c (iq2000_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* lm32-tdep.c (breakpoint): Rename it to lm32_break_insn and
change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(lm32_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* m32c-tdep.c (break_insn): Rename it to m32c_break_insn and change
its type to constexpr. Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(m32c_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* m32r-tdep.c (m32r_gdbarch_init): Likewise.
* m68hc11-tdep.c (breakpoint): Rename it to m68hc11_break_insn and
change its type to constexpr. Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(m68hc11_gdbarch_init): Don't use SET_GDBARCH_BREAKPOINT_MANIPULATION.
* m68k-tdep.c (break_insn): Rename it to m68k_break_insn and change
its type to constexpr. Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(m68k_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* m88k-tdep.c (break_insn): Rename it to m88k_break_insn and change
its type to constexpr. Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(m88k_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* mep-tdep.c (breakpoint): Rename it to mep_break_insn and change
its type to constexpr. Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(mep_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* microblaze-tdep.c (break_insn): Rename it to
microblaze_break_insn and change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(microblaze_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* mips-tdep.c (mips_gdbarch_init): Likewise.
* mn10300-tdep.c (breakpoint): Rename it to mn10300_break_insn and
change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(mn10300_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* moxie-tdep.c (breakpoint): Rename it to moxie_break_insn and
change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(moxie_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* msp430-tdep.c (breakpoint): Rename it to msp430_break_insn
and change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(msp430_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* mt-tdep.c (mt_gdbarch_init): Likewise.
* nds32-tdep.c (break_insn): Rename it to nds32_break_insn
and change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(nds32_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* nios2-tdep.c (nios2_gdbarch_init): Likewise.
* rl78-tdep.c (breakpoint): Rename it to rl78_break_ins
and change its type to rl78_break_insn. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(rl78_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* rs6000-tdep.c (big_breakpoint): Change its type to
constexpr.
(little_breakpoint): Likewise.
Don't use GDBARCH_BREAKPOINT_MANIPULATION_ENDIAN.
(rs6000_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* rx-tdep.c (breakpoint): Rename it to rx_break_insn and
change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(rx_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* s390-linux-tdep.c (breakpoint): Rename it to s390_break_insn
and change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION
(s390_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* score-tdep.c (score_gdbarch_init): Likewise.
* sh-tdep.c (sh_gdbarch_init): Likewise.
* sh64-tdep.c (sh64_gdbarch_init): Likewise.
* sparc-tdep.c (break_insn): Rename it to sparc_break_insn
and change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(sparc32_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* spu-tdep.c (breakpoint): Rename it to spu_break_insn and change
its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(spu_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* tic6x-tdep.c (tic6x_gdbarch_init): Likewise.
* tilegx-tdep.c (breakpoint): Rename it to tilegx_break_insn
and change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(tilegx_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* v850-tdep.c (v850_gdbarch_init): Likewise.
* vax-tdep.c (break_insn): Rename it to vax_break_insn and
change its type to constexpr.
Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(vax_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* xstormy16-tdep.c (breakpoint): Rename it to
xstormy16_break_insn and change its type to constexpr.
Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(xstormy16_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* xtensa-tdep.c (xtensa_gdbarch_init): Likewise.
I was notified by buildbot that my patch (commit 6ec2b2) has broken the build
on x86_64:
../../binutils-gdb/gdb/rs6000-tdep.c: In function int ppc_process_record_op31(gdbarch*, regcache*, CORE_ADDR, uint32_t):
../../binutils-gdb/gdb/rs6000-tdep.c:4705:50: error: cannot convert CORE_ADDR* {aka long unsigned int*} to ULONGEST* {aka long long unsigned int*} for argument 3 to register_status regcache_raw_read_unsigned(regcache*, int, ULONGEST*)
tdep->ppc_gp0_regnum + PPC_RA (insn), &ea);
^
../../binutils-gdb/gdb/rs6000-tdep.c:4718:50: error: cannot convert CORE_ADDR* {aka long unsigned int*} to ULONGEST* {aka long long unsigned int*} for argument 3 to register_status regcache_raw_read_unsigned(regcache*, int, ULONGEST*)
tdep->ppc_gp0_regnum + PPC_RA (insn), &ea);
^
The patch below should fix it.
gdb/ChangeLog:
2016-09-22 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
* rs6000-tdep.c (ppc_process_record_op31): Fix
regcache_raw_read_unsigned call using the correct parameter type.
some instruction handlers in ppc_process_record_op63() seem to be missing
return or incorrectly using break. This patch aims to fix that.
gdb/ChangeLog:
2016-09-21 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
* rs6000-tdep.c (ppc_process_record_op63): Fix return of instruction
handlers.
gdb/ChangeLog
2016-09-20 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
* rs6000-tdep.c (ppc_process_record_op31): Fix record of Store String
Word instructions.
It is my understanding that GDB used to require each architecture to
define a Frame Pointer (fp). However, this functionality was deprecated
some time ago so the call to setup the fp_reg was changed to deprecated
(set_gdbarch_deprecated_fp_regnum). It should have been removed from the
Power code.
That said, the code "set_gdbarch_deprecated_fp_regnum
(gdbarch, PPC_R0_REGNUM + 1);" sets up register r1 as the frame pointer.
Register r1 is no longer used to hold the frame pointer on Power. By
removing the fp definition for Power in GDB, it causes GDB to fall back
to the call get_frame_base_address (frame) which returns the correct value
depending on the specific senario but most of the time is the DWARF
canonical frame address.
gdb/ChangeLog
2016-08-24 Carl Love <cel@us.ibm.com>
* rs6000-tdep.c (rs6000_gdbarch_init): Remove call
set_gdbarch_deprecated_fp_regnum() from initialization function.
The patch fixes the record support of Hardware Transactional Memory
instructions on Power. It also solves a large number of unexpected failures
from gdb.reverse testcases sigall-precsave.exp and sigall-reverse.exp that
occur on distros which glibc uses HTM instructions.
gdb/ChangeLog
2016-08-18 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
* rs6000-tdep.c (ppc_process_record_op31): Handle HTM instructions.
The major reason this header was needed, bfd_default_set_arch_mach,
has now moved to bfd.h.
gdb/
* amd64-darwin-tdep.c: Don't include libbfd.h.
* i386-darwin-tdep.c: Likewise.
* rs6000-nat.c: Likewise.
* rs6000-tdep.c: Likewise.
sim/aarch64/
* memory.c: Don't include libbfd.h.
sim/rl78/
* load.c: Don't include libbfd.h.
(rl78_load): Don't use private iovec seek or read.
sim/rx/
* load.c: Don't include libbfd.h.
(rx_load): Don't use private iovec seek or read.
If the instruction in this case does not include an RA field, then 'ra'
is used uninitialized. Use the same idiom used elsewhere in this file of
initializing ra to zero before check for an RA field.
gdb/ChangeLog:
* rs6000-tdep.c (ppc_process_record_op31): Initialize ra.
Previously, backchain was read as a signed quantity, resulting in
addresses like 0xfffffffffffeded0 instead of 0xfffeded0 returned by
unwinder on 32-bit powerpc. While normally such addresses are masked
off, this causes problems for tracepoints, since 0xfffffffffffeded0
is considered unavailable.
Fixes a test failure in gdb.trace/entry-values.exp.
gdb/ChangeLog:
* corefile.c (safe_read_memory_unsigned_integer): New function.
* gdbcore.h (safe_read_memory_unsigned_integer): New prototype.
* rs6000-tdep.c (rs6000_frame_cache): Read backchain as unsigned.
gdb/ChangeLog:
* rs6000-tdep.c: Add "ax.h" and "ax-gdb.h" includes.
(rs6000_gen_return_address): New function.
(rs6000_gdbarch_init): Wire in the above.
This is an obvious patch to fix the following build error seen with
--enable-build-with-cxx:
../../src/gdb/rs6000-tdep.c: In function ‘rs6000_frame_cache* rs6000_frame_cache(frame_info*, void**)’:
../../src/gdb/rs6000-tdep.c:3242:15: error: invalid conversion from ‘void*’ to ‘rs6000_frame_cache*’ [-fpermissive]
return (*this_cache);
~^~~~~~~~~~~~
gdb/ChangeLog
* rs6000-tdep.c (rs6000_frame_cache): Explicitly cast return result
to avoid invalid conversion from void *.
Multitarget builds currently fail when:
(1) simulator support is enabled (the main --target supports target sim)
(2) powerpc is included in the --enable-targets list
(3) powerpc is not the main/default target (--target)
This is because the powerpc sim provides a non-standard API function
sim_spr_register_name which gdb/rs6000-tdep.c utilizes. Since the sim
does not yet support multitarget, only the sim (if one exists) for the
main target is built. When that target isn't powerpc, this function
is not available leading to linking errors:
rs6000-tdep.c:(.text+0x1e34d): undefined reference to
`sim_spr_register_name'
Fix this by only using that API if the sim linked in is the powerpc
sim.
gdb/ChangeLog:
2016-01-05 Pedro Alves <palves@redhat.com>
PR sim/13418
* configure.ac: Define WITH_PPC_SIM when linking in the sim and
the target is powerpc*.
* configure: Regenerate.
* config.in: Regenerate.
Pedro Franco de Carvalho