Commit Graph

477 Commits

Author SHA1 Message Date
H.J. Lu
6713542fbc 2002-05-21 H.J. Lu (hjl@gnu.org)
* bfdlink.h (bfd_link_info): Add allow_multiple_definition.
2002-05-22 05:07:20 +00:00
Thiemo Seufer
771c7ce4bc ? gas/testsuite/gas/mips/rol64.d
? gas/testsuite/gas/mips/rol64.s
Index: gas/ChangeLog
===================================================================
RCS file: /cvs/src/src/gas/ChangeLog,v
retrieving revision 1.1334
diff -u -p -r1.1334 ChangeLog
--- gas/ChangeLog	21 May 2002 20:01:51 -0000	1.1334
+++ gas/ChangeLog	21 May 2002 23:32:51 -0000
@@ -1,3 +1,8 @@
+2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+	* config/tc-mips.c (macro2): Add 64 bit drol, dror macros.
+	Optimize the rotate by zero case.
+
 2002-05-21  Nick Clifton  <nickc@cambridge.redhat.com>

 	* configure.in: Remove accidental enabling of bfd_gas=yes for
Index: gas/config/tc-mips.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-mips.c,v
retrieving revision 1.123
diff -u -p -r1.123 tc-mips.c
--- gas/config/tc-mips.c	14 May 2002 23:35:59 -0000	1.123
+++ gas/config/tc-mips.c	21 May 2002 23:32:52 -0000
@@ -6686,6 +6686,17 @@ macro2 (ip)
       --mips_opts.noreorder;
       break;

+    case M_DROL:
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu",
+		   "d,v,t", AT, 0, treg);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv",
+		   "d,t,s", AT, sreg, AT);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv",
+		   "d,t,s", dreg, sreg, treg);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		   "d,v,t", dreg, dreg, AT);
+      break;
+
     case M_ROL:
       macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "subu",
 		   "d,v,t", AT, 0, treg);
@@ -6697,15 +6708,55 @@ macro2 (ip)
 		   "d,v,t", dreg, dreg, AT);
       break;

+    case M_DROL_I:
+      {
+	unsigned int rot;
+	char *l, *r;
+
+	if (imm_expr.X_op != O_constant)
+	  as_bad (_("rotate count too large"));
+	rot = imm_expr.X_add_number & 0x3f;
+	if (! rot)
+	  break;
+	l = (rot < 0x20) ? "dsll" : "dsll32";
+	r = ((0x40 - rot) < 0x20) ? "dsrl" : "dsrl32";
+	rot &= 0x1f;
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l,
+		     "d,w,<", AT, sreg, rot);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r,
+		     "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		     "d,v,t", dreg, dreg, AT);
+      }
+      break;
+
     case M_ROL_I:
-      if (imm_expr.X_op != O_constant)
-	as_bad (_("rotate count too large"));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<",
-		   AT, sreg, (int) (imm_expr.X_add_number & 0x1f));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<",
-		   dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t",
-		   dreg, dreg, AT);
+      {
+	unsigned int rot;
+
+	if (imm_expr.X_op != O_constant)
+	  as_bad (_("rotate count too large"));
+	rot = imm_expr.X_add_number & 0x1f;
+	if (! rot)
+	  break;
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll",
+		     "d,w,<", AT, sreg, rot);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl",
+		     "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		     "d,v,t", dreg, dreg, AT);
+      }
+      break;
+
+    case M_DROR:
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu",
+		   "d,v,t", AT, 0, treg);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv",
+		   "d,t,s", AT, sreg, AT);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv",
+		   "d,t,s", dreg, sreg, treg);
+      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		   "d,v,t", dreg, dreg, AT);
       break;

     case M_ROR:
@@ -6719,15 +6770,44 @@ macro2 (ip)
 		   "d,v,t", dreg, dreg, AT);
       break;

+    case M_DROR_I:
+      {
+	unsigned int rot;
+	char *l, *r;
+
+	if (imm_expr.X_op != O_constant)
+	  as_bad (_("rotate count too large"));
+	rot = imm_expr.X_add_number & 0x3f;
+	if (! rot)
+	  break;
+	r = (rot < 0x20) ? "dsrl" : "dsrl32";
+	l = ((0x40 - rot) < 0x20) ? "dsll" : "dsll32";
+	rot &= 0x1f;
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r,
+		     "d,w,<", AT, sreg, rot);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l,
+		     "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		     "d,v,t", dreg, dreg, AT);
+      }
+      break;
+
     case M_ROR_I:
-      if (imm_expr.X_op != O_constant)
-	as_bad (_("rotate count too large"));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<",
-		   AT, sreg, (int) (imm_expr.X_add_number & 0x1f));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<",
-		   dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f));
-      macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t",
-		   dreg, dreg, AT);
+      {
+	unsigned int rot;
+
+	if (imm_expr.X_op != O_constant)
+	  as_bad (_("rotate count too large"));
+	rot = imm_expr.X_add_number & 0x1f;
+	if (! rot)
+	  break;
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl",
+		     "d,w,<", AT, sreg, rot);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll",
+		     "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+	macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+		     "d,v,t", dreg, dreg, AT);
+      }
       break;

     case M_S_DOB:
Index: gas/testsuite/ChangeLog
===================================================================
RCS file: /cvs/src/src/gas/testsuite/ChangeLog,v
retrieving revision 1.315
diff -u -p -r1.315 ChangeLog
--- gas/testsuite/ChangeLog	20 May 2002 17:05:34 -0000	1.315
+++ gas/testsuite/ChangeLog	21 May 2002 23:32:54 -0000
@@ -1,3 +1,9 @@
+2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+	* gas/mips/rol64.s: New file, test of drol, dror macros.
+	* gas/mips/rol64.d: Likewise.
+	* gas/mips/mips.exp: Add new test.
+
 2002-05-20  Nick Clifton  <nickc@cambridge.redhat.com>

 	* gas/arm/arm.exp: Replace deprecated command line switches
Index: gas/testsuite/gas/mips/mips.exp
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/mips.exp,v
retrieving revision 1.32
diff -u -p -r1.32 mips.exp
--- gas/testsuite/gas/mips/mips.exp	4 Apr 2002 08:23:30 -0000	1.32
+++ gas/testsuite/gas/mips/mips.exp	21 May 2002 23:32:54 -0000
@@ -122,6 +122,7 @@ if { [istarget mips*-*-*] } then {
 	run_dump_test "mul"
     }
     run_dump_test "rol"
+    run_dump_test "rol64"
     if !$aout { run_dump_test "sb" }
     run_dump_test "trunc"
     if !$aout { run_dump_test "ulh" }
Index: include/opcode/ChangeLog
===================================================================
RCS file: /cvs/src/src/include/opcode/ChangeLog,v
retrieving revision 1.167
diff -u -p -r1.167 ChangeLog
--- include/opcode/ChangeLog	17 May 2002 19:01:03 -0000	1.167
+++ include/opcode/ChangeLog	21 May 2002 23:32:57 -0000
@@ -1,3 +1,7 @@
+2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+	* mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
+
 2002-05-17  Andrey Volkov  <avolkov@sources.redhat.com>

         * h8300.h: Corrected defs of all control regs
Index: include/opcode/mips.h
===================================================================
RCS file: /cvs/src/src/include/opcode/mips.h,v
retrieving revision 1.24
diff -u -p -r1.24 mips.h
--- include/opcode/mips.h	16 Mar 2002 03:09:18 -0000	1.24
+++ include/opcode/mips.h	21 May 2002 23:32:57 -0000
@@ -526,9 +526,13 @@ enum
   M_REM_3I,
   M_REMU_3,
   M_REMU_3I,
+  M_DROL,
   M_ROL,
+  M_DROL_I,
   M_ROL_I,
+  M_DROR,
   M_ROR,
+  M_DROR_I,
   M_ROR_I,
   M_S_DA,
   M_S_DOB,
Index: opcodes/ChangeLog
===================================================================
RCS file: /cvs/src/src/opcodes/ChangeLog,v
retrieving revision 1.447
diff -u -p -r1.447 ChangeLog
--- opcodes/ChangeLog	17 May 2002 14:36:45 -0000	1.447
+++ opcodes/ChangeLog	21 May 2002 23:33:00 -0000
@@ -1,3 +1,7 @@
+2002-05-22  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+	* mips-opc.c (mips_builtin_opcodes): Add drol, dror macros.
+
 Fri May 17 14:26:44 2002  J"orn Rennecke <joern.rennecke@superh.com>

 	* disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
Index: opcodes/mips-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/mips-opc.c,v
retrieving revision 1.32
diff -u -p -r1.32 mips-opc.c
--- opcodes/mips-opc.c	17 Mar 2002 02:42:25 -0000	1.32
+++ opcodes/mips-opc.c	21 May 2002 23:33:00 -0000
@@ -492,6 +492,10 @@ const struct mips_opcode mips_builtin_op
 {"dremu",   "z,s,t",    0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO,      I3      },
 {"dremu",   "d,v,t",	3,    (int) M_DREMU_3,	INSN_MACRO,		I3	},
 {"dremu",   "d,v,I",	3,    (int) M_DREMU_3I,	INSN_MACRO,		I3	},
+{"drol",    "d,v,t",	0,    (int) M_DROL,	INSN_MACRO,		I3	},
+{"drol",    "d,v,I",	0,    (int) M_DROL_I,	INSN_MACRO,		I3	},
+{"dror",    "d,v,t",	0,    (int) M_DROR,	INSN_MACRO,		I3	},
+{"dror",    "d,v,I",	0,    (int) M_DROR_I,	INSN_MACRO,		I3	},
 {"dsllv",   "d,t,s",	0x00000014, 0xfc0007ff,	WR_d|RD_t|RD_s,		I3	},
 {"dsll32",  "d,w,<",	0x0000003c, 0xffe0003f, WR_d|RD_t,		I3	},
 {"dsll",    "d,w,s",	0x00000014, 0xfc0007ff,	WR_d|RD_t|RD_s,		I3	}, /* dsllv */
2002-05-21 23:54:48 +00:00
Andrey Volkov
b9c9142c40 * h8300.h: Corrected defs of all control regs and eepmov instr. 2002-05-17 19:01:03 +00:00
Joern Rennecke
1c509ca821 print_insn_sh cleanup:
include:
	* dis-asm.h (print_insn_shl, print_insn_sh64l): Remove prototype.
gdb:
	* sh-tdep.c (gdb_print_insn_sh64): Delete.
	(gdb_print_insn_sh): Just set info->endian and use print_insn_sh.
	(sh_gdbarch_init): Always use gdb_print_insn_sh.
opcodes:
	* disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
	* sh-dis.c (LITTLE_BIT): Delete.
	(print_insn_sh, print_insn_shl): Deleted.
	(print_insn_shx): Renamed to
	(print_insn_sh).  No longer static.  Handle SHmedia instructions.
	Use info->endian to determine endianness.
	* sh64-dis.c (print_insn_sh64, print_insn_sh64l): Delete.
	(print_insn_sh64x): No longer static.  Renamed to
	(print_insn_sh64).  Removed pfun_compact and endian arguments.
	If we got an uneven address to indicate SHmedia, adjust it.
	Return -2 for SHcompact instructions.
sim/sh64:
	* sim-if.c (sh64_disassemble_insn): Use  print_insn_sh instead of
	print_insn_shl.
2002-05-17 14:36:46 +00:00
Elena Zannoni
6093d3a5f7 2002-05-10 Elena Zannoni <ezannoni@redhat.com>
* sim-sh.h: New file, for sh gdb<->sim interface.
2002-05-10 22:53:56 +00:00
Daniel Jacobowitz
1a79372daa 2002-05-09 Daniel Jacobowitz <drow@mvista.com>
* signals.h: Update comments.
        (enum target_signal): Remove conditional compilation around
        Mach-specific signals.  Move them to after TARGET_SIGNAL_DEFAULT.
2002-05-09 22:19:48 +00:00
Jason Thorpe
e3029acb8b * common.h (NT_GNU_ABI_TAG): Define.
(GNU_ABI_TAG_LINUX): Define.
(GNU_ABI_TAG_HURD): Define.
(GNU_ABI_TAG_SOLARIS): Define.
(NT_NETBSD_IDENT): Define.
(NT_FREEBSD_ABI_TAG): Define.
2002-05-08 14:28:37 +00:00
Elena Zannoni
a41e566586 2002-04-24 Elena Zannoni <ezannoni@redhat.com>
* dwarf2.h: Add DW_AT_GNU_vector.
2002-04-25 12:46:16 +00:00
DJ Delorie
38b581ae41 merge from gcc 2002-04-17 01:03:04 +00:00
Alan Modra
b9612d142d reorder cmpsd, movsd 2002-04-11 11:58:30 +00:00
Alan Modra
cd47f4f16f * i386.h: Add intel mode cmpsd and movsd. 2002-04-11 10:21:58 +00:00
DJ Delorie
0c4460bb3c merge from gcc 2002-04-01 22:01:20 +00:00
Nick Clifton
eb1e0e807a Add AIX 64 shared library support and emulation layer for binutils 2002-03-18 12:46:27 +00:00
Chris Demetriou
1f25f5d300 [ gas/ChangeLog ]
2002-03-15  Chris G. Demetriou  <cgd@broadcom.com>

	* config/tc-mips.c (mips_set_options): New "ase_mips3d" member.
	(mips_opts): Initialize "ase_mips3d" member.
	(file_ase_mips3d): New variable.
	(CPU_HAS_MIPS3D): New macro.
	(md_begin): Initialize mips_opts.ase_mips3d and file_ase_mips3d
	based on command line options and configuration defaults.
	(macro_build, mips_ip): Accept MIPS-3D instructions if
	mips_opts.ase_mips3d is set.
	(OPTION_MIPS3D, OPTION_NO_MIPS3D, md_longopts, md_parse_option):
	Add support for "-mips3d" and "-no-mips3d" options.
	(OPTION_ELF_BASE): Move to accomodate new options.
	(s_mipsset): Support ".set mips3d" and ".set nomips3d".
	(mips_elf_final_processing): Add a comment indicating that a
	MIPS-3D ASE ELF header flag should be set, when one exists.
	* doc/as.texinfo: Document -mips3d and -no-mips3d options.
	* doc/c-mips.texi: Likewise, and document ".set mips3d" and ".set
	nomips3d" directives.

[ gas/testsuite/ChangeLog ]
2002-03-15  Chris G. Demetriou  <cgd@broadcom.com>

	* gas/mips/mips64-mips3d.s: New file.
	* gas/mips/mips64-mips3d.d: Likewise.
	* gas/mips/mips.exp: Run new "mips64-mips3d" test.

[ include/opcode/ChangeLog ]
2002-03-15  Chris G. Demetriou  <cgd@broadcom.com>

	* mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
	instructions.
	(OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
	may be passed along with the ISA bitmask.

[ opcodes/ChangeLog ]
2002-03-15  Chris G. Demetriou  <cgd@broadcom.com>

	* mips-dis.c (mips_isa_type): Add MIPS3D instructions to the ISA
	bit masks for bfd_mach_mips_sb1 and bfd_mach_mipsisa64.  Add
	comments for bfd_mach_mipsisa32 and bfd_mach_mipsisa64 that
	indicate that they should dissassemble all applicable
	MIPS-specified ASEs.
	* mips-opc.c: Add support for MIPS-3D instructions.
	(M3D): New definition.

	* mips-opc.c: Update copyright years.
2002-03-16 03:09:19 +00:00
Daniel Jacobowitz
dd7bf85ea9 gdb/:
2002-03-10  Daniel Jacobowitz  <drow@mvista.com>

        * Makefile.in (defs_h): Add $(INCLUDE_DIR)/gdb/signals.h.
        * defs.h: Include "gdb/signals.h".
        (enum target_signal): Move to $(INCLUDE_DIR)/gdb/signals.h.

include/gdb:
2002-03-10  Daniel Jacobowitz  <drow@mvista.com>

        * signals.h: New file, split from gdb/defs.h.
2002-03-11 00:01:11 +00:00
Andrew Cagney
efdab8079f Remove floatformat_arm_ext. 2002-03-06 06:29:42 +00:00
Alan Modra
e4b29ec6bd * pdp11.h: Add format codes for float instruction formats. 2002-03-05 03:09:01 +00:00
Alan Modra
eea5c83f2f missdit 2002-02-25 04:13:42 +00:00
Alan Modra
fc1e712166 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define. 2002-02-25 03:42:59 +00:00
Jim Blandy
2bbcdae974 include:
Allow the user to specify functions for allocating memory for
splay tree roots and nodes.
* splay-tree.h (splay_tree_allocate_fn, splay_tree_deallocate_fn):
New types.
(splay_tree): New fields: `allocate', `deallocate', and
`allocate_data'.
(splay_tree_new_with_allocator): New function declaration.

libiberty:

* splay-tree.c (splay_tree_xmalloc_allocate,
splay_tree_xmalloc_deallocate): New functions.
(splay_tree_new): Call splay_tree_new_with_allocator, passing the
above functions and a dummy data pointer.
(splay_tree_new_with_allocator): New function.
(splay_tree_delete_helper, splay_tree_delete, splay_tree_insert,
splay_tree_remove): Use the splay tree's allocation and
deallocation functions.
2002-02-21 22:19:14 +00:00
Jan Hubicka
5a8b245cb6 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands. 2002-02-18 16:32:25 +00:00
Alan Modra
9a1b9f826d Support arbitrary length fill patterns.
* bfdlink.h (enum bfd_link_order_type): Remove bfd_fill_link_order.
	(struct bfd_link_order): Remove fill.  Add data.size.
2002-02-15 02:10:03 +00:00
Jason Thorpe
76f57f3aaa bfd:
2002-02-13  Matt Fredette  <fredette@netbsd.org>

* elf32-m68k.c (elf32_m68k_print_private_bfd_data): Recognize
EF_M68000.


bintuls:
2002-02-13  Matt Fredette  <fredette@netbsd.org>

* readelf.c (get_machine_flags): Recognize EF_M68000.


gas:
2002-02-13  Matt Fredette  <fredette@netbsd.org>

* config/tc-m68k.c (md_show_usage): No longer display a
hard-coded "68020" for the default CPU, instead display the
canonical name of the true, configured default CPU.
(m68k_elf_final_processing): Mark objects for sub-68020
CPUs with the new EF_M68000 flag.


include/elf:
2002-02-13  Matt Fredette  <fredette@netbsd.org>

* m68k.h (EF_M68000): Define.
2002-02-13 18:14:48 +00:00
Alan Modra
1939742290 Add DT_PPC64_OPD and DT_PPC64_OPDSZ dynamic tags 2002-02-12 06:31:29 +00:00
Jan Hubicka
85a33fe281 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
(xchg): Fix.
	(in, out): Disable 64bit operands.
	(call, jmp): Avoid REX prefixes.
	(jcxz): Prohibit in 64bit mode
	(jrcxz, loop): Add 64bit variants.
	(movq): Fix patterns.
	(movmskps, pextrw, pinstrw): Add 64bit variants.
2002-02-11 11:56:20 +00:00
Richard Henderson
77dd1030de * alpha.h (R_ALPHA_BRSGP): New. 2002-02-09 22:54:16 +00:00
Alexandre Oliva
61e31d88f0 Contribute sh64-elf.
2002-01-23  Alexandre Oliva  <aoliva@redhat.com>
* sh.h (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16,
R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16,
R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16,
R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16,
R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16,
R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16,
R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16,
R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8,
R_SH_GOTPLT10BY8, R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64,
R_SH_RELATIVE64): New relocs.
(R_SH_FIRST_INVALID_RELOC_4): Adjust.
2001-05-16  Alexandre Oliva  <aoliva@redhat.com>
* sh.h: Renumbered and renamed some SH5 relocations to match
official numbers and names; moved unmaching ones to the range
0xf2-0xff.
2001-01-06  Hans-Peter Nilsson  <hpn@cygnus.com>
* sh.h (sh64_get_contents_type): Declare.
(sh64_address_is_shmedia): Likewise.
2000-12-30  Hans-Peter Nilsson  <hpn@cygnus.com>
* sh.h (sh64_elf_crange): New type.
(struct sh64_section_data): New.
(sh64_elf_section_data): New macro.
(EF_SH5): Rename back from EF_SH64.
2000-12-18  Hans-Peter Nilsson  <hpn@cygnus.com>
* sh.h (SHF_SH5_ISA32_MIXED, SHT_SH5_CR_SORTED,
SH64_CRANGES_SECTION_NAME, SH64_CRANGE_SIZE,
SH64_CRANGE_CR_ADDR_OFFSET, SH64_CRANGE_CR_SIZE_OFFSET,
SH64_CRANGE_CR_TYPE_OFFSET): New macros.
2000-12-12  Hans-Peter Nilsson  <hpn@cygnus.com>
* sh.h (EF_SH64): Don't define EF_SH64_ABI64.
2000-11-27  Hans-Peter Nilsson  <hpn@cygnus.com>
* sh.h (EF_SH64_32BIT_ABI, EF_SH64_64BIT_ABI): Delete.
(EF_SH64_ABI64): New.
2000-11-23  Hans-Peter Nilsson  <hpn@cygnus.com>
* sh.h (EF_SH64): Rename from EF_SH5.
(EF_SH64_32BIT_ABI): New.
(EF_SH64_64BIT_ABI): New.
(R_SH_PT_16, R_SH_SHMEDIA_CODE
R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2,
R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16,
R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16,
R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL,
R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL): New
relocs.
2000-09-01  Ben Elliston  <bje@redhat.com>
* sh.h (EF_SH5): Define.
2002-02-08 05:05:58 +00:00
Alexandre Oliva
73dbc2cfb8 Contribute sh64-elf.
2000-11-25  Hans-Peter Nilsson  <hpn@cygnus.com>
* dis-asm.h (print_insn_sh64): New prototype.
(print_insn_sh64l): New prototype.
(print_insn_sh64x_media): New prototype.
2002-02-08 05:01:25 +00:00
Frank Ch. Eigler
cadaa5224a * opcodes disassembler extension
[includes]
2002-02-04  Frank Ch. Eigler  <fche@redhat.com>

	* dis-asm.h (disassemble_info): New field `insn_sets'.
	(INIT_DISASSEMBLE_INFO): Clear it.

[opcodes]
2002-02-04  Frank Ch. Eigler  <fche@redhat.com>

	* cgen-dis.in (print_insn_@arch@): Support disassemble_info.insn_sets.
2002-02-05 19:40:45 +00:00
DJ Delorie
44354ae183 merge from gcc 2002-02-05 17:53:17 +00:00
DJ Delorie
0fc6163719 Remove redundant entry. 2002-02-03 13:16:18 +00:00
DJ Delorie
42da15d6b3 merge from gcc 2002-02-03 13:12:45 +00:00
Andrew Cagney
b78bd0bd68 Revert sh64 changes. Accidently committed. 2002-02-02 04:48:32 +00:00
Nick Clifton
6350bf4f6a Synchronize dates with FSF version of the ChangeLog. Remove spurious entry. 2002-02-01 12:27:55 +00:00
Ben Elliston
ff750edfb3 * sim-sh64.h: New file. 2002-02-01 12:04:27 +00:00
Hans-Peter Nilsson
b52a8679a5 * mmix.h: Tweak comments.
(MMIX_LD_ALLOCATED_REG_CONTENTS_SECTION_NAME): New.
	[BFD_ARCH_SIZE] (_bfd_mmix_prepare_linker_allocated_gregs,
	_bfd_mmix_finalize_linker_allocated_gregs,
	_bfd_mmix_check_all_relocs): Provide prototypes.
2002-02-01 08:05:13 +00:00
Tom Rix
3e36d993a9 Support small archive for pre AIX 4.3 2002-02-01 05:47:14 +00:00
DJ Delorie
bef8b55d39 merge from gcc 2002-01-31 19:01:15 +00:00
Nick Clifton
3b16e843f2 Add support for OpenRISC 32-bit embedded processor 2002-01-31 17:33:08 +00:00
Jason Merrill
dc9ebeffca elf/dwarf2.h: Sync with gcc version. 2002-01-28 23:26:53 +00:00
DJ Delorie
1d619e590d merge from gcc 2002-01-28 22:03:14 +00:00
David O'Brien
569719c11a 2002-01-27 David O'Brien <obrien@FreeBSD.org>
* cgen.h (BFD_VERSION): Use BFD_VERSION_DATE instead.

Approved by:  Nick Clifton <nickc@cambridge.redhat.com>
              <m3k7u2g5uc.fsf@north-pole.nickc.cambridge.redhat.com>
2002-01-28 19:15:46 +00:00
Graydon Hoare
9a2e995d8a [ include/opcode/ChangeLog ]
2002-01-22  Graydon Hoare  <graydon@redhat.com>

	* cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
	(CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.

[ opcodes/ChangeLog ]

2002-01-22  Graydon Hoare  <graydon@redhat.com>

	* fr30-asm.c: Regenerate.
	* fr30-desc.c: Likewise.
	* fr30-desc.h: Likewise.
	* fr30-dis.c: Likewise.
	* fr30-ibld.c: Likewise.
	* fr30-opc.c: Likewise.
	* fr30-opc.h: Likewise.
	* m32r-asm.c: Likewise.
	* m32r-desc.c: Likewise.
	* m32r-desc.h: Likewise.
	* m32r-dis.c: Likewise.
	* m32r-ibld.c: Likewise.
	* m32r-opc.c: Likewise.
	* m32r-opc.h: Likewise.
	* m32r-opinst.c: Likewise.
	* openrisc-asm.c: Likewise.
	* openrisc-desc.c: Likewise.
	* openrisc-desc.h: Likewise.
	* openrisc-dis.c: Likewise.
	* openrisc-ibld.c: Likewise.
	* openrisc-opc.c: Likewise.
	* openrisc-opc.h: Likewise.
	* xstormy16-desc.c: Likewise.

[ cgen/ChangeLog ]

2002-01-22  Graydon Hoare  <graydon@redhat.com>

	* desc-cpu.scm (ifld-number-cache): Add.
	(ifld-number): Add.
	(gen-maybe-multi-ifld-of-op): Add.
	(gen-maybe-multi-ifld): Add.
	(gen-multi-ifield-nodes): Add.
	(cgen-desc.c): Add call to gen-multi-ifield-nodes.
2002-01-22 21:45:36 +00:00
Alan Modra
7b45c6e1da comment typo fixes 2002-01-21 14:03:27 +00:00
Richard Earnshaw
ca4ebd1e04 * coff/arm.h (F_VFP_FLOAT): Define.
* elf/arm.h (F_VFP_FLOAT, EF_ARM_VFP_FLOAT): Define.
2002-01-16 11:35:18 +00:00
Alan Modra
b84da006ed * ppc.h (DT_PPC64_GLINK): Define. 2002-01-16 05:48:56 +00:00
Jason Thorpe
b4db1224b7 include/elf:
* common.h: Update copyright years.
(NT_NETBSDCORE_PROCINFO): Define.
(NT_NETBSDCORE_FIRSTMACH): Define.

bfd:
* elf.c: Update copyright years.
(elfcore_grok_netbsd_note): Use NT_NETBSDCORE_PROCINFO
and NT_NETBSDCORE_FIRSTMACH.  Improve a comment.

bintuils:
* readelf.c (get_netbsd_elfcore_note_type): Use
NT_NETBSDCORE_PROCINFO and NT_NETBSDCORE_FIRSTMACH.
2002-01-09 18:59:11 +00:00
Alan Modra
8661be6aa6 * ia64.h (ELF_STRING_ia64_unwind_hdr): New Macro for HP-UX.
(SHT_IA_64_HP_OPT_ANOT): Ditto
	(PT_IA_64_HP_OPT_ANOT): Ditto
	(PT_IA_64_HP_HSL_ANOT): Ditto
	(PT_IA_64_HP_STACK): Ditto
	(SHN_IA_64_ANSI_COMMON): Ditto
2002-01-06 11:12:39 +00:00
Matthew Green
a09cf9bd77 [gas/ChangeLog]
* config/tc-ppc.c (md_parse_option): BookE is not Motorola specific.

[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
(PPC_OPCODE_BOOKE64): Likewise.
2002-01-03 02:07:19 +00:00
Jeff Law
1befefea7e * hppa.h (call, ret): Move to end of table.
(addb, addib): PA2.0 variants should have been PA2.0W.
        (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
        happy.
        (fldw, fldd, fstw, fstd, bb): Likewise.
        (short loads/stores): Tweak format specifier slightly to keep
        disassembler happy.
        (indexed loads/stores): Likewise.
        (absolute loads/stores): Likewise.
2001-12-31 23:43:03 +00:00