This patch allows examination of the registers FS_BASE and GS_BASE
for Linux Systems running on 64bit. Tests for simple read and write
of the new registers is also added with this patch.
2017-01-27 Walfred Tedeschi <walfred.tedeschi@intel.com>
Richard Henderson <rth@redhat.com>
gdb/ChangeLog:
* amd64-linux-nat.c (PTRACE_ARCH_PRCTL): New define.
(amd64_linux_fetch_inferior_registers): Add case to fetch FS_BASE
GS_BASE for older kernels.
(amd64_linux_store_inferior_registers): Add case to store FS_BASE
GS_BASE for older kernels.
* amd64-linux-tdep.c (amd64_linux_gregset_reg_offset): Add FS_BASE
and GS_BASE to the offset table.
(amd64_linux_register_reggroup_p): Add FS_BASE and GS_BASE to the
system register group.
* amd64-nat.c (amd64_native_gregset_reg_offset): Implements case
for older kernels.
* amd64-tdep.c (amd64_init_abi): Add segment registers for the
amd64 ABI.
* amd64-tdep.h (amd64_regnum): Add AMD64_FSBASE_REGNUM and
AMD64_GSBASE_REGNUM.
(AMD64_NUM_REGS): Set to AMD64_GSBASE_REGNUM + 1.
* features/Makefile (amd64-linux.dat, amd64-avx-linux.dat)
(amd64-mpx-linux.dat, amd64-avx512-linux.dat, x32-linux.dat)
(x32-avx-linux.dat, x32-avx512-linux.dat): Add
i386/64bit-segments.xml in those rules.
* features/i386/64bit-segments.xml: New file.
* features/i386/amd64-avx-mpx-linux.xml: Add 64bit-segments.xml.
* features/i386/amd64-avx-linux.xml: Add 64bit-segments.xml.
* features/i386/amd64-avx512-linux.xml: Add 64bit-segments.xml.
* features/i386/amd64-mpx-linux.xml: Add 64bit-segments.xml.
* features/i386/x32-avx512-linux.xml: Add 64bit-segments.xml.
* features/i386/x32-avx-linux.xml: Add 64bit-segments.xml.
* features/i386/amd64-linux.xml: Add 64bit-segments.xml.
* features/i386/amd64-avx-linux.c: Regenerated.
* features/i386/amd64-avx-mpx-linux.c: Regenerated.
* features/i386/amd64-avx-mpx.c: Regenerated.
* features/i386/amd64-avx512-linux.c: Regenerated.
* features/i386/amd64-linux.c: Regenerated.
* features/i386/amd64-mpx-linux.c: Regenerated.
* features/i386/i386-avx-mpx-linux.c: Regenerated.
* features/i386/i386-avx-mpx.c: Regenerated.
* features/i386/x32-avx-linux.c: Regenerated.
* features/i386/x32-avx512-linux.c: Regenerated.
* regformats/i386/amd64-avx-linux.dat: Regenerated.
* regformats/i386/amd64-avx-mpx-linux.dat: Regenerated.
* regformats/i386/amd64-avx512-linux.dat: Regenerated.
* regformats/i386/amd64-linux.dat: Regenerated.
* regformats/i386/amd64-mpx-linux.dat: Regenerated.
* regformats/i386/x32-avx-linux.dat: Regenerated.
* regformats/i386/x32-avx512-linux.dat: Regenerated.
* regformats/i386/x32-linux.dat: Regenerated.
gdb/doc/ChangeLog:
* gdb.texinfo (i386 Features): Add system segment registers
as feature.
gdb/gdbserver/ChangeLog:
* linux-x86-low.c (x86_64_regmap): Add fs_base and gs_base
to the register table.
(x86_fill_gregset): Add support for old kernels for the
fs_base and gs_base system registers.
(x86_store_gregset): Likewise.
* configure.srv (srv_i386_64bit_xmlfiles): Add 64bit-segments.xml.
gdb/testsuite/ChangeLog:
* gdb.arch/amd64-gs_base.c: New file.
* gdb.arch/amd64-gs_base.exp: New file.
Change-Id: I2e0eeb93058a2320d4d3b045082643cfe4aff963
Signed-off-by: Walfred Tedeschi <walfred.tedeschi@intel.com>
The purpose of this patch is only simplify the addition of new registers.
ORIG_RAX is kept as last register and any addition is done right before it.
2017-01-27 Walfred Tedeschi <walfred.tedeschi@intel.com>
* amd64-linux-tdep.h (AMD64_LINUX_ORIG_RAX_REGNUM):
Set to AMD64_NUM_REGS.
Second part of the && is already guaranteed in the "regnum < num_regs"
due to comparison above.
2017-01-27 Walfred Tedeschi <walfred.tedeschi@intel.com>
* amd64-nat.c (amd64_native_gregset_reg_offset): Simplify logic
that checks validity of a register number.
The macros mentioned in the title were set only for GDB. In gdbserver they
were not set until now. To align the code in GDB and gdbserver these macros
are also added into gdbserver, enabling read and write of gs_base and fs_base
registers from the system in new and old kernels.
2017-01-27 Walfred Tedeschi <walfred.tedeschi@intel.com>
gdb/gdbserver/ChangeLog:
* configure.ac: Check if the fs_base and gs_base members of
`struct user_regs_struct' exist.
* config.in: Regenerated.
* configure: Likewise.
PR 20343
ld * ld.texinfo (Options): Extend documentation of the --plugin
option. Include a description of where the plugins should be
located.
binutils* doc/binutils.texi (ar): Extend documentation of the --plugin
option. Include a description of where the plugins should be
located.
(nm): Likewise.
PR 21056
opcodes * tic6x-dis.c (print_insn_tic6x): Correct displaying of parallel
instructions when the previous fetch packet ends with a 32-bit
instruction.
gas * testsuite/gas/tic6x/insns16-parallel.s: New test case.
* testsuite/gas/tic6x/insns16-parallel.d: New test driver.
When running a 32-bit ARM inferior with a 32-bit ARM GDB on a 64-bit
AArch64 host, only VFP registers (NT_ARM_VFP) are available. The FPA
registers (NT_PRFPREG) are not available so GDB must not request them, as
this will fail with -EINVAL. This is most noticeably exposed when running
"generate-core-file":
(gdb) generate-core-file myprog.core
Unable to fetch the floating point registers.: Invalid argument.
ptrace(PTRACE_GETREGSET, 27642, NT_FPREGSET, 0xffcc67f0) = -1 EINVAL (Invalid argument)
gdb/ChangeLog:
2017-01-27 Kees Cook <keescook@google.com>
* gdb/arm-linux-nat.c (arm_linux_fetch_inferior_registers): Call
fetch_fpregs if target has fpa registers.
(arm_linux_store_inferior_registers): Call store_fpregs if target
has fpa registers.
PR ld/20995
* elf32-cris.c (elf_cris_size_dynamic_sections): Handle sdynrelro.
(elf_cris_adjust_dynamic_symbol): Place variables copied into the
executable from read-only sections into sdynrelro.
(elf_cris_finish_dynamic_symbol): Select sreldynrelro for
dynamic relocs in sdynrelro.
(elf_backend_want_dynrelro): Define.
With my debug build of Python (--with-pydebug), many tests fails because
of the same issue. Python scripts are loaded by the tests using this
pattern:
(gdb) python exec (open ('file.py').read ())
This causes Python to output this warning:
__main__:1: ResourceWarning: unclosed file <_io.TextIOWrapper name='file.py' mode='r' encoding='ANSI_X3.4-1968'>
and the test to fail because of that extra output. Instead of using the
open + read + exec trick which leaks the file and causes the warning,
why not just source the files?
(gdb) source file.py
This patch changes this, and standardizes the test names of the tests I
touched to "load python file" (some of them were empty, others were
overly complicated).
gdb/testsuite/ChangeLog:
* gdb.python/py-bad-printers.exp: Load python file using "source".
* gdb.python/py-events.exp: Likewise.
* gdb.python/py-evsignal.exp: Likewise.
* gdb.python/py-evthreads.exp: Likewise.
* gdb.python/py-frame-args.exp: Likewise.
* gdb.python/py-framefilter-invalidarg.exp: Likewise.
* gdb.python/py-framefilter-mi.exp: Likewise.
* gdb.python/py-framefilter.exp: Likewise.
* gdb.python/py-mi.exp: Likewise.
* gdb.python/py-pp-maint.exp: Likewise.
* gdb.python/py-pp-registration.exp: Likewise.
* gdb.python/py-prettyprint.exp: Likewise.
(run_lang_tests): Likewise.
* gdb.python/py-typeprint.exp: Likewise.
Exercising aarch64-elf with a custom debug stub i noticed a few failures in
both gdb.base/breakpoint-in-ro-region.exp and gdb.base/memattr.exp:
FAIL: gdb.base/breakpoint-in-ro-region.exp: create read-only mem region covering main
FAIL: gdb.base/breakpoint-in-ro-region.exp: writing to read-only memory fails
FAIL: gdb.base/breakpoint-in-ro-region.exp: inserting software breakpoint in read-only memory fails
FAIL: gdb.base/memattr.exp: create mem region 1
FAIL: gdb.base/memattr.exp: create mem region 2
FAIL: gdb.base/memattr.exp: create mem region 3
FAIL: gdb.base/memattr.exp: create mem region 4
FAIL: gdb.base/memattr.exp: create mem region 5
FAIL: gdb.base/memattr.exp: info mem (1)
FAIL: gdb.base/memattr.exp: mem1 cannot be read
FAIL: gdb.base/memattr.exp: mem2 cannot be written
FAIL: gdb.base/memattr.exp: mem2 can be read
FAIL: gdb.base/memattr.exp: disable mem 1
FAIL: gdb.base/memattr.exp: mem 1 was disabled
FAIL: gdb.base/memattr.exp: enable mem 1
FAIL: gdb.base/memattr.exp: mem 1 was enabled
FAIL: gdb.base/memattr.exp: disable mem 2 4
FAIL: gdb.base/memattr.exp: mem 2 and 4 were disabled
FAIL: gdb.base/memattr.exp: enable mem 2-4
FAIL: gdb.base/memattr.exp: mem 2-4 were enabled
FAIL: gdb.base/memattr.exp: mem 1 to 5 were disabled
FAIL: gdb.base/memattr.exp: mem 1 to 5 were enabled
FAIL: gdb.base/memattr.exp: delete mem 1
FAIL: gdb.base/memattr.exp: mem 1 was deleted
FAIL: gdb.base/memattr.exp: delete mem 2 4
FAIL: gdb.base/memattr.exp: mem 2 and 4 were deleted
FAIL: gdb.base/memattr.exp: mem 2-4 were deleted
These failures don't show up with gdbserver or native gdb on Linux because
they don't export any memory maps, therefore the vector of memory regions is
empty.
Outside of that scenario, we can't guarantee the absence of memory regions
reported by the target upon a connection. In our particular target, we
provide a memory map and the memory regions vector ceases to be empty.
With a non-empty memory regions vector, manipulating memory regions will cause
gdb to be more verbose and output text. For example:
memattr.c:require_user_regions
/* Otherwise, let the user know how to get back. */
if (from_tty)
warning (_("Switching to manual control of memory regions; use "
"\"mem auto\" to fetch regions from the target again."));
memattr.c:create_mem_region
if ((lo >= n->lo && (lo < n->hi || n->hi == 0))
|| (hi > n->lo && (hi <= n->hi || n->hi == 0))
|| (lo <= n->lo && ((hi >= n->hi && n->hi != 0) || hi == 0)))
{
printf_unfiltered (_("overlapping memory region\n"));
return;
}
In my particular case i got both of the above messages.
In order to fix this, i've moved the delete_memory proc from
gdb.base/memattr.exp to a new file lib/memory.exp and made lib/gdb.exp
load that file.
For both gdb.base/breakpoint-in-ro-region.exp and gdb.base/memattr.exp the
patch clears all existing memory regions after running to main. That way we
are guaranteed to have a clean state for memory regions so the tests can
exercise whatever they want and have an expected output pattern.
Regression checked on x86-64/Ubuntu 16.04.
gdb/testsuite/ChangeLog:
2017-01-26 Luis Machado <lgustavo@codesourcery.com>
* lib/memory.exp: New file.
* lib/gdb.exp: Load memory.exp.
* gdb.base/memattr.exp (delete_memory): Move proc to
lib/memory.exp and rename to delete_memory_regions.
Replace delete_memory with delete_memory_regions.
Cleanup memory regions before tests.
* gdb.base/breakpoint-in-ro-region.exp: Cleanup memory regions
before tests.
The all-architectures-1.exp test case currently yields 66 FAILs on s390x,
because the "set architecture" command fails each time when attempting to
switch to "cris", "crisv32", or "cris:common_v10_v32". Actually, the
command would succeed if the endianness had been set to "little" before.
Instead, the test case sets the endianness to "auto", which results in
"big" on s390x.
So on x86_64:
(gdb) set endian auto
The target endianness is set automatically (currently little endian)
(gdb) set architecture cris
warning: A handler for the OS ABI "AIX" is not built into this configuration
of GDB. Attempting to continue with the default cris settings.
The target architecture is assumed to be cris
But on s390x:
(gdb) set endian auto
The target endianness is set automatically (currently big endian)
(gdb) set architecture cris
Architecture `cris' not recognized.
See also the test results for s390x and ppc64be:
https://sourceware.org/ml/gdb-testers/2016-q4/msg05150.htmlhttps://sourceware.org/ml/gdb-testers/2016-q4/msg05713.html
Indeed, cris_gdbarch_init in cris-tdep.c returns a failure unless the
user-specified endianness is "little". Other architectures usually ignore
the user-specified endianness and return a valid gdbarch anyhow, even if
they can not really cope with the given endianness.
This patch removes the check in cris-tdep.c and forces little-endian byte
order instead.
gdb/ChangeLog:
* cris-tdep.c (cris_gdbarch_init): Remove check for
info.byte_order and force it to BFD_ENDIAN_LITTLE.
Changes in v2:
- Renamed arch-specific files to insn-reverse-<arch>.c.
- Adjusted according to reviews.
This patch prepares things for an upcoming testcase for record/replay support
on x86. As is, gdb.reverse/insn-reverse.c is divided into sections guarded by
a few #if blocks, and right now it only handles arm/aarch64.
If we move forward with requiring more tests for record/replay on different
architectures, i think this has the potential to become cluttered with a lot
of differing arch-specific code in the same file.
I've broken up the main file into other files with arch-specific bits
(insn-reverse-<arch>.c). The main file will hold the generic pieces that will
take care of calling the tests.
The arch-specific c files are then included at the top of the generic c file.
I've also added a generic initialize function since we need to run pre-test
checks on x86 to make sure the rdrand/rdseed instructions are supported,
otherwise we will run into a SIGILL.
The arch-specific files will implement their own initialize function with
whatever makes sense. Right now the aarch64 and arm files have an empty
initialization function.
Does this look reasonable?
gdb/testsuite/ChangeLog:
2017-01-26 Luis Machado <lgustavo@codesourcery.com>
* gdb.reverse/insn-reverse.c: Move arm and aarch64 code to their own
files.
(initialize): New function conditionally defined.
(testcases): Move within conditional block.
(main): Call initialize.
* gdb.reverse/insn-reverse-aarch64.c: New file, based on aarch64 bits
of gdb.reverse/insn-reverse.c.
* gdb.reverse/insn-reverse-arm.c: New file, based on arm bits of
gdb.reverse/insn-reverse.c.
When loading a core without an executable like so:
$ gdb --core core
for example often the gdbarch won't contain the
iterate_over_regset_sections method. For example on ARM.
This will generate a call to get_core_register_section with a NULL regset
like at corelow.c:628
get_core_register_section (regcache, NULL, ".reg", 0, 0, "general-purpose", 1);
However a check for REGSET_VARIABLE_SIZE in get_core_register_section
assumes that regset is != NULL thus leading to a crash with this backtrace:
(gdb) bt
#0 0x000000000065907b in get_core_register_section
(regcache=regcache@entry=0x2c26260, regset=regset@entry=0x0,
name=name@entry=0xdbf7b2 ".reg", min_size=min_size@entry=0,
which=which@entry=0, human_name=human_name@entry=0xdbac28
"general-purpose", required=1)
at ../../gdb/corelow.c:542
#1 0x0000000000659b70 in get_core_registers (ops=<optimized out>,
regcache=0x2c26260, regno=<optimized out>) at ../../gdb/corelow.c:628
#2 0x000000000076e5fb in target_fetch_registers
(regcache=regcache@entry=0x2c26260, regno=regno@entry=15)
at ../../gdb/target.c:3590
Note that commit: f962539ad2 ("Warn if core file register
section is larger than expected") introduced this issue.
Thus releases > 7.8.2 are affected.
Also, this would have been caught by gdb.base/corefile.exp but the
problem is that this triggers only if the core dump is missing some data
so that it's not recognized as a linux core dump, or it's not a linux core
dump and the core file register section is larger than expected.
So if you just create a core and read it on linux with ARM the osabi is
detected properly and iterate_over_regset_sections is present and so the
problem is not triggered.
Thus creating a linux test for this with a crafted core that meets the
problem requirements is non-trivial.
This patch fixes this crash by adding a check for regset existence before
running the condition.
gdb/ChangeLog:
* corelow.c (get_core_register_section): Check for regset
existence before checking for REGSET_VARIABLE_SIZE.
Hi,
GDB calls some APIs from opcodes to do disassembly and provide some
call backs. This model makes troubles on C++ exception unwinding,
because GDB is a C++ program, and opcodes is still compiled as C.
As we can see, frame #10 and #12 are C++, while #frame 11 is C,
#10 0x0000000000544228 in memory_error (err=TARGET_XFER_E_IO, memaddr=<optimized out>) at ../../binutils-gdb/gdb/corefile.c:237
#11 0x00000000006b0a54 in print_insn_aarch64 (pc=0, info=0xffffffffeeb0) at ../../binutils-gdb/opcodes/aarch64-dis.c:3185
#12 0x0000000000553590 in gdb_pretty_print_insn (gdbarch=gdbarch@entry=0xbbceb0, uiout=uiout@entry=0xbc73d0, di=di@entry=0xffffffffeeb0,
insn=0xffffffffed40, insn@entry=0xffffffffed90, flags=flags@entry=0,
C++ exception unwinder can't go across frame #11 unless it has
unwind table. However, C program on many architectures doesn't
have it in default. As a result, GDB aborts, which is described
in PR 20939.
This is not the first time we see this kind of problem. We've
had a commit 89525768cd
"Propagate GDB/C++ exceptions across readline using sj/lj-based TRY/CATCH".
We can fix the disassembly bug in a similar way, this is the option one.
Since opcodes is built with gdb, we fix this problem in a different
way as we did for the same issue with readline. Instead of throwing
exception in dis_asm_memory_error, we record the failed memory
address, and throw exception when GDB returns from opcodes disassemblers.
gdb:
2017-01-26 Yao Qi <yao.qi@linaro.org>
Pedro Alves <palves@redhat.com>
PR gdb/20939
* disasm.c (gdb_disassembler::dis_asm_memory_error): Don't
call memory_error, save memaddr instead.
(gdb_disassembler::print_insn): If gdbarch_print_insn returns
negative, cal memory_error.
* disasm.h (gdb_disassembler) <m_err_memaddr>: New field.
gdb/testsuite:
2017-01-26 Yao Qi <yao.qi@linaro.org>
* gdb.base/all-architectures.exp.in (do_arch_tests): Test
disassemble on address 0.
This patch adds a unit test about memory error occurs on reading
memory, and check MEMORY_ERROR exception is always thrown.
gdb:
2017-01-26 Yao Qi <yao.qi@linaro.org>
* disasm-selftests.c (memory_error_test): New function.
(_initialize_disasm_selftests): Register memory_error_test.
This patch adds one unit test, which disassemble one instruction for
every gdbarch if available. The test needs one valid instruction of
each gdbarch, and most of them are got from breakpoint instruction.
For the rest gdbarch whose breakpoint instruction isn't a valid
instruction, I copy one instruction from the gas/testsuite/gas/
directory.
I get the valid instruction of most gdbarch except ia64, mep, mips,
tic6x, and xtensa. People familiar with these arch should be easy
to extend the test.
In order to achieve "do the unit test for every gdbarch", I add
selftest-arch.[c,h], so that we can register a function pointer,
which has one argument gdbarch. selftest.c will iterate over all
gdbarches to call the registered function pointer.
gdb:
2017-01-26 Yao Qi <yao.qi@linaro.org>
* Makefile.in (SFILES): Add disasm-selftests.c and
selftest-arch.c.
(COMMON_OBS): Add disasm-selftests.o and selftest-arch.o.
* disasm-selftests.c: New file.
* selftest-arch.c: New file.
* selftest-arch.h: New file.
opcodes/mep-dis.c:mep_print_insn has already had the code to
handle the case when info->section is NULL,
/* Picking the right ISA bitmask for the current context is tricky. */
if (info->section)
{
}
else /* sid or gdb */
{
}
so that we can still cal print_insn_mep even section can't be found.
On the other hand, user can disassemble an arbitrary address which
doesn't map to any section at all.
gdb:
2017-01-26 Yao Qi <yao.qi@linaro.org>
* mep-tdep.c (mep_gdb_print_insn): Set info->arch
to bfd_arch_mep. Don't return 0 if section is not
found. Call print_insn_mep.
This patch addes class gdb_disassembler, and refactor
code to use it. The gdb_disassembler object is saved
in disassember_info.application_data. However,
disassember_info.application_data is already used by
gdb for arm, mips spu, and scm-disasm. In arm and mips,
.application_data is gdbarch, but we can still get gdbarch
from gdb_disassember.
The use of application_data in spu is a little bit
complicated. It creates its own disassemble_info, and
save spu_dis_asm_data in .application_data. This will
overwrite the pointer to gdb_disassembler, so we need
to find another place to save spu_dis_asm_data. I
extend disassemble_info, and put "id" there.
gdb:
2017-01-26 Pedro Alves <palves@redhat.com>
Yao Qi <yao.qi@linaro.org>
* arm-tdep.c: Include "disasm.h".
(gdb_print_insn_arm): Update code to get gdbarch.
* disasm.c (dis_asm_read_memory): Change it to
gdb_disassembler::dis_asm_read_memory.
(dis_asm_memory_error): Likewise.
(dis_asm_print_address): Likewise.
(gdb_pretty_print_insn): Change it to
gdb_disassembler::pretty_print_insn.
(dump_insns): Add one argument gdb_disassemlber. All
callers updated.
(do_mixed_source_and_assembly_deprecated): Likewise.
(do_mixed_source_and_assembly): Likewise.
(do_assembly_only): Likewise.
(gdb_disassembler::gdb_disassembler): New.
(gdb_disassembler::print_insn): New.
* disasm.h (class gdb_disassembler): New.
(gdb_pretty_print_insn): Remove declaration.
(gdb_disassemble_info): Likewise.
* guile/scm-disasm.c (class gdbscm_disassembler): New.
(gdbscm_disasm_read_memory_worker): Update.
(gdbscm_disasm_read_memory): Update.
(gdbscm_disasm_memory_error): Remove.
(gdbscm_disasm_print_address): Remove.
(gdbscm_disassembler::gdbscm_disassembler): New.
(gdbscm_print_insn_from_port): Update.
* mips-tdep.c: Include disasm.h.
(gdb_print_insn_mips): Update code to get gdbarch.
* record-btrace.c (btrace_insn_history): Update.
* spu-tdep.c: Include disasm.h.
(struct spu_dis_asm_data): Remove.
(struct spu_dis_asm_info): New.
(spu_dis_asm_print_address): Use spu_dis_asm_info to get
SPU id.
(gdb_print_insn_spu): Cast disassemble_info to
spu_dis_asm_info.
This patch adds a new function null_stream, which returns a null
stream. The null stream can be used in multiple places. It is
used in gdb_insn_length, and the following patches will use it too.
gdb:
2017-01-26 Yao Qi <yao.qi@linaro.org>
* disasm.c (do_ui_file_delete): Delete.
(gdb_insn_length): Move code creating stream to ...
* utils.c (null_stream): ... here. New function.
* utils.h (null_stream): Declare.
This patch adds a DW_OP_implicit_value in dwarf assembler, and uses
dwarf assembler in implptr-64bit.exp. Using dwarf assembler in
implptr-64bit.exp exposes some limitations in dwarf assembler,
- some variables are not evaluated in the caller's context, so we
can not pass variable to assembler, like this
Dwarf::assemble $asm_file {
cu {
version $dwarf_version
addr_size $addr_size
is_64 $is_64
} {
}
and
{DW_AT_type :$struct_label "DW_FORM_ref$ref_addr_size"}
this limitation is fixed by adding "uplevel" and "subst".
- dwarf assembler doesn't emit DW_FORM_ref_addr for label referencing.
this limitation is fixed by adding a new character "%",
{ type %$int_label }
this means we want to emit DW_FORM_ref_addr for label referencing.
- we can't set the form of label referencing offset in dwarf assembler.
Nowadays, dwarf assembler guesses the form of labels, which is
DW_FORM_ref4. However, in implptr-64bit.exp, both DW_FORM_ref4
and DW_FORM_ref8 is used (see REF_ADDR in implptr-64bit.S). This
patch adds the flexibility of setting the form of label reference.
Both of them below are valid,
{DW_AT_type :$struct_label}
{DW_AT_type :$struct_label DW_FORM_ref8}
the former form is the default DW_FORM_ref4.
I compared the .debug_info of objects without and with this patch
applied. There is no changes except abbrev numbers.
gdb/testsuite:
2017-01-25 Andreas Arnez <arnez@linux.vnet.ibm.com>
Yao Qi <yao.qi@linaro.org>
* gdb.dwarf2/implptr-64bit.exp: Use dwarf assembler.
* gdb.dwarf2/implptr-64bit.S: Remove.
* lib/dwarf.exp (Dwarf): Handle character "%". Evaluate some
variables in caller's context. Add DW_OP_implicit_value.
DW_OP_GNU_implicit_pointer refers to a DIE with an offset of different
sizes in different dwarf versions. In v2, the size is the pointer size,
while in v3 and above, it is the ref_addr size. This patch fixes
dwarf assembler to emit the correct size of offset. We've already fixed
this size issue in gdb,
https://sourceware.org/ml/gdb-patches/2011-09/msg00451.html
gdb/testsuite:
2017-01-25 Yao Qi <yao.qi@linaro.org>
* lib/dwarf.exp (Dwarf::_location): Handle
DW_OP_GNU_implicit_pointer with proper size.
bfd/
* config.bfd (powerpcle-*-rtems*): Do not mark as removed.
(arm-*-rtems*): Move to (arm*-*-eabi*).
(i[3-7]86-*-rtems*): Move to (i[3-7]86-*-elf*).
(m68-*-rtems*): Move to (m68*-*-elf*).
ld/
* configure.tgt (arm-*-rtems*): Move to (arm*-*-eabi*).
(bfin-*-rtems*): Move to (bfin*-*-elf*).
(i[3-7]86-*-rtems*): Move to (i[3-7]86*-*-elf*).
(m68*-*-rtems*): Move to (m68*-*-elf*).
(mips*-*-rtems*): Move to (mips*-*-elf*).
(or1k*-*-rtems*): Move to (or1k*-*-elf*).
(powerpc*-*-rtems*): Move to (powerpc*-*-elf*).
(sparc*-*-rtems*): Move to (sparc*-*-elf*).
(sparc64*-*-rtems*): Move to (sparc64*-*-elf*).
The use of te-linux.h is unnecessary since the TE_LINUX define is unused
and LOCAL_LABELS_FB is defined to 1 in tc-riscv.h as well.
gas/
* configure.tgt (riscv*-*-*): Remove em=linux.
Complement commit 81ff47b3a5 ("PR ld/20828: Fix linker script symbols
wrongly forced local with section GC") and move the symbol sweep stage
of section GC from `elf_gc_sweep' to `bfd_elf_size_dynamic_sections',
avoiding the need to clear the `forced_local' marker, problematic for
targets that have special processing in their `elf_backend_hide_symbol'
handler. Set `mark' instead in `bfd_elf_record_link_assignment' and,
matching changes from commit 3bd43ebcb6 ("ld --gc-sections fail with
__tls_get_addr_opt"), also in PowerPC `__tls_get_addr_opt' handling
code, removing a:
FAIL: PR ld/20828 dynamic symbols with section GC (version script)
test suite failure with the `score-elf' target.
The rationale is it is enough if symbols are swept at the beginning of
`bfd_elf_size_dynamic_sections' as it is only in this function that the
size of the GOT, the dynamic symbol table and other dynamic sections is
determined, which will depend on the number of symbols making it to the
dynamic symbol table. It is also appropriate to do the sweep at this
point as it is already after any changes have been made to symbols with
`bfd_elf_record_link_assignment', and not possible any earlier as calls
to that function are only made just beforehand -- barring audit entry
processing -- via `gld${EMULATION_NAME}_find_statement_assignment'
invoked from `gld${EMULATION_NAME}_before_allocation' which is the ELF
handler for `ldemul_before_allocation'.
bfd/
PR ld/20828
* elflink.c (bfd_elf_record_link_assignment): Revert last
change and don't ever clear `forced_local'. Set `mark'
unconditionally.
(elf_gc_sweep_symbol_info, elf_gc_sweep_symbol): Reorder within
file.
(elf_gc_sweep): Move the call to `elf_gc_sweep_symbol'...
(bfd_elf_size_dynamic_sections): ... here.
* elf32-ppc.c (ppc_elf_tls_setup): Don't clear `forced_local'
and set `mark' instead in `__tls_get_addr_opt' processing.
* elf64-ppc.c (ppc64_elf_tls_setup): Likewise.
Correct a bug in Solaris 2 linker emulation code triggered by a test
introduced with commit 81ff47b3a5 ("PR ld/20828: Fix linker script
symbols wrongly forced local with section GC") and only create implicit
version nodes if versioning is actually introduced with a version script
(or VERSION command) rather than only global vs local symbol visibility
selected, fixing an:
ld: anonymous version tag cannot be combined with other version tags
linker error produced whenever a version script (or VERSION command) is
used that does not assign symbol versions, such as:
{ global: foo; bar; local: *; };
and consequently removing a:
FAIL: PR ld/20828 dynamic symbols with section GC (version script)
test suite failure with the `x86_64-solaris2' target.
ld/
* emultempl/solaris2.em (elf_solaris2_before_allocation): Do not
add implicit version nodes if an anonymous version tag is being
used.
This patch fixes a number of issues with powerpc dynamic relocations.
1) Both ppc and ppc64 were emitting more dynamic symbols and
relocations than necessary, due to not supporting static linker
resolution of tls_index entries for __tls_get_addr_opt. This meant
that any @got@tlsgd or @got@tlsld reloc needed to make their symbols
dynamic and generate dptmod and dtprel relocs for the dynamic linker.
That would have been passable, but what happened was that practically
all @got relocations resulted in their symbols being made dynamic and
dynamic relocations emitted against the GOT entries. (Mostly visible
on ppc32 executables since ppc64 gcc really only uses @got style
relocs for TLS.)
2) The PowerOpen syntax was not supported with __tls_get_addr_opt.
DTPMOD/DTPREL relocs on tls_index TOC entries did not use the trick of
forcing dynamic symbols and relocations so those entries always
resulted in the full __tls_get_addr processing. gcc doesn't use the
PowerOpen syntax for TLS, and normally such code would be optimized to
TLS IE or LE so the impact of missing this support was minimal.
3) In an executable, relocations against GNU indirect functions always
used the value of their PLT stub. While this is correct, it is
better in some cases to use a dynamic relocation. An extra dynamic
relocation can mean that calls via function pointers need not bounce
through the PLT stub at runtime.
The patch also tidies the PLT handling code in ppc32
allocate_dynrelocs. Allocating PLT entries after other dynamic relocs
allows the PLT loop to omit special handling for undefined weak
symbols, and that in turn allows the loop to be simplified.
bfd/
* elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Merge two cases
where dynamic relocs are preferable. Allow ifunc too.
(ensure_undefweak_dynamic): New function.
(allocate_dynrelocs): Use it here. Move plt handling last and
don't make symbols dynamic, simplifying loop. Only make undef
weak symbols with GOT entries dynamic. Correct condition
for GOT relocs. Handle dynamic relocs on ifuncs. Correct
comments. Remove goto.
(ppc_elf_relocate_section): Correct test for using dynamic
symbol on GOT relocs. Rearrange test for emitting GOT relocs
to suit. Set up explicit tls_index entries and implicit GOT
tls_index entries resolvable at link time for
__tls_get_addr_opt. Simplify test to clear mem for prelink.
* elf64-ppc.c (allocate_got): Correct condition for GOT relocs.
(ensure_undefweak_dynamic): New function.
(allocate_dynrelocs): Use it here. Only make undef weak symbols
with GOT entries dynamic. Remove unnecessary test of
WILL_CALL_FINISH_DYNAMIC_SYMBOL in PLT handling.
(ppc64_elf_relocate_section): Correct test for using dynamic
symbol on GOT relocs. Rearrange test for emitting GOT relocs
to suit. Set up explicit tls_index entries and implicit GOT
tls_index entries resolvable at link time for __tls_get_addr_opt.
Simplify expression to clear mem for prelink.
ld/
* testsuite/ld-powerpc/tlsexe.r: Update for fewer dynamic relocs
and symbols.
* testsuite/ld-powerpc/tlsexe.d: Likewise.
* testsuite/ld-powerpc/tlsexe.g: Likewise.
gold/
* mips.cc (Mips_output_data_plt::rel_plt): Remove const from return
type.
(Target_mips::make_plt_entry): Make the sh_info field of .rel.plt
point to .plt.
