* elflink.h (elf_link_add_object_symbols): Reset dynindx for
hidden and internal symbols.
(elf_fix_symbol_flags): Clear NEEDS_PLT for symbols with
visibility.
* elflink.c (_bfd_elf_link_record_dynamic_symbol): Do not
assign a PLT or GOT entry to symbols with hidden and
internal visibility.
coffdu-rs6000.{lo,c}.
(coff-pmac.lo, coff-rs6000.lo, coff64-rs6000.lo): Add dependency
on xcoff.h
* Makefile.in: Regenerate.
* xcoff.h: New file.
* coff-pmac.c: Use xcoff.h instead of coff-rs6000.c.
* coff-rs6000.c: Move all declarations and defines that are
common to the xcoff backends into xcoff.h
* coff64-rs6000.c: Ditto,
bfd:
* Makefile.am (coff64-rs6000.lo): New rule.
* Makefile.in: Regenerate.
* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
xcoff_is_local_label_name, xcoff_rtype2howto,
xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
(NO_COFF_SYMBOLS): Define.
(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
internally.
(MINUS_ONE): New macro.
(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
relocation.
(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
coff_SWAP_aux_out): Map to the new functions.
* coff64-rs6000.c: New file.
* libcoff.h (bfd_coff_backend_data): Add new fields
_bfd_coff_force_symnames_in_strings and
_bfd_coff_debug_string_prefix_length.
(bfd_coff_force_symnames_in_strings,
bfd_coff_debug_string_prefix_length): New macros for above fields.
* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead
of using coff_swap_sym_in directly.
(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
(coff_set_flags) Set magic for XCOFF64.
(coff_compute_section_file_positions): Add symbol name length to
string section length if bfd_coff_debug_string_prefix_length is
true.
(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
using coff_swap_lineno_in directly.
(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
and _bfd_coff_debug_string_prefix_length fields.
* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
symbol names into strings table when
bfd_coff_force_symnames_in_strings is true.
* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
SET_RELOC_VADDR): New macros.
(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
code.
(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
changes within RS6000COFF_C specific code.
(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
* reloc.c (bfd_perform_relocation, bfd_install_relocation):
Extend existing hack on target name.
* xcofflink.c (XCOFF_XVECP): Extend existing hack on
target name.
* coff-tic54x.c (ticof): Keep up to date with new fields
in bfd_coff_backend_data.
* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
targ_selvecs to include rs6000coff64_vec for rs6000.
* configure.in: Add rs6000coff64_vec case.
* cpu-powerpc.c: New bfd_arch_info_type.
gas:
* as.c (parse_args): Allow md_parse_option to override -a listing
option.
* config/obj-coff.c (add_lineno): Change type of offset parameter
from "int" to "bfd_vma."
* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
(ppc_mach, ppc_subseg_align, ppc_target_format): New.
(ppc_change_csect): Align correctly for XCOFF64.
(ppc_machine): New function, which discards "ppc_machine" line.
(ppc_tc): Cons for 8 when code is 64 bit.
(md_apply_fix3): Don't check operand->insert. Handle 64 bit
relocations.
(md_parse_option): Handle -a64 and -a32.
(ppc_xcoff64): New.
* config/tc-ppc.h (TARGET_MACH): Define.
(TARGET_FORMAT): Move to function.
(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.
include:
* include/coff/rs6k64.h: New file.
opcodes:
* configure.in: Add bfd_powerpc_64_arch.
* disassemble.c (disassembler): Use print_insn_big_powerpc for
64 bit code.
bfd_elf32_slurp_reloc_table, bfd_elf64_write_relocs, and
bfd_elf64_slurp_reloc_table.
* elfcode.h (elf_write_relocs, elf_slurp_reloc_table): New
definitions to get external names.
(elf_write_relocs): Renamed from write_relocs and make global.
(elf_slurp_reloc_table): Make global.
(_bfd_elf,size_info): Use elf_write_relocs instead of write_relocs.
(bfd_ar_hdr_from_filesystem): Use it if HPUX_LARGE_AR_IDS is
defined and the ID is greater than 99999.
(bfd_generic_stat_arch_elt): If HPUX_LARGE_AR_IDS is defined decode
special uid/gid fields into 32 bit values.
Add ``-W -Wall'' to sub-directories bfd, binutils, gas gprof, ld and
opcodes by the addition of WARN_CFLAGS to Makefile.am and configury to
set it. Add configure option --enable-build-warnings.
Re-generate all and sundry using auto*-000227.
* dwarf2.c (struct dwarf2_debug): New field dwarf_line_size.
(decode_line_info): Set it. Report error if unit->line_offset is
equal to or larger than it.
opcodes:
* sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4.
Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
(sh_arg_type): Add A_PC.
(sh_table): Update entries using immediates. Add repeat.
* sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4.
Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
gas:
* config/tc-sh.c (immediate): Delete.
(sh_operand_info): Add immediate member.
(parse_reg): Use A_PC for pc.
(parse_exp): Add second argument 'op'. All callers changed.
(parse_at): Expect pc to be coded as A_PC.
Use immediate field in *op.
(insert): Add fourth argument 'op'. All callers changed.
(build_relax): Add second argument 'op'. All callers changed.
(insert_loop_bounds): New function.
(build_Mytes): Remove DISP_4.
Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
(assemble_ppi): Use immediate field in *operand.
(sh_force_relocation): Handle BFD_RELOC_SH_LOOP_{START,END}.
(md_apply_fix): Likewise.
(tc_gen_reloc): Likewise. Check for a pcrel BFD_RELOC_SH_LABEL.
include/coff:
* sh.h (R_SH_LOOP_START, R_SH_LOOP_END): Define.
include/elf:
* sh.h (R_SH_LOOP_START, R_SH_LOOP_END): New RELOC_NUMBERs.
bfd:
* reloc.c (_bfd_relocate_contents): Add BFD_RELOC_SH_LOOP_START and
BFD_RELOC_SH_LOOP_END.
* elf32-sh.c (sh_elf_howto_tab): Change special_func to
sh_elf_ignore_reloc for all entries that sh_elf_reloc used to ignore.
Add entries for R_SH_LOOP_START and R_SH_LOOP_END.
(sh_elf_reloc_loop): New function.
(sh_elf_reloc): No need to test for always-to-be-ignored relocs
any more.
(sh_rel): Add entries for BFD_RELOC_SH_LOOP_{START,END}.
(sh_elf_relocate_section): Handle BFD_RELOC_SH_LOOP_{START,END}.
* bfd-in2.h, libbfd.h: Regenerate.
BFD_RELOC_16 to switch for extended relocs.
(MY_swap_ext_reloc_in): New.
(MY_swap_ext_reloc_out): New.
(NAME(aout,slurp_reloc_table)): Use MY_swap_ext_reloc_in rather
than NAME(aout,swap_ext_reloc_in) for extended relocs.
(NAME(aout,squirt_out_relocs)): Similarly use
MY_swap_ext_reloc_out.
(aout_link_reloc_link_order): Use MY_put_ext_reloc if defined.
HOWTO references to bfd_elf_generic_reloc, that have
partial_inplace == true, now use the new function. The function
is based on the recent rewrite of m32r_elf_lo16_reloc(), and
extends its fixes to the R_M32R_{16,24,32} relocs.
The new logic in m32r_elf_lo16_reloc() has been removed, and
it instead calls the new routine to obtain that functionality.
complain_overflow_bitfield doesn't complain) from -2**(n-1)..2**n-1 to
-2**n..2**n. This might mean that some reloc overflows are no longer
caught, but it solves the address wrap problem for 16-bit relocs
nicely. In any case, ports that rely on complain_overflow_bitfield
for reloc overflow checking were not getting a very good check
previously. A bitfield range in a machine instruction is typically
either the signed or unsigned n bit numbers, not the overlap of these
two ranges.
* elf32-mips.c (mips_elf_next_relocation): Rename from
mips_elf_next_lo16_relocation, and generalize to look
for any relocation type.
(elf_mips_howto_table): Make R_MIPS_PC16 pcrel_offset.
(elf_mips_gnu_rel_hi16): Howto for R_MIPS_GNU_REL_HI16.
(elf_mips_gnu_rel_lo16): Howto for R_MIPS_GNU_REL_LO16.
(elf_mips_gnu_rel16_s2): Howto for R_MIPS_GNU_REL16_S2.
(elf_mips_gnu_pcrel64): Howto for R_MIPS_PC64.
(elf_mips_gnu_pcrel32): Howto for R_MIPS_PC32.
(bfd_elf32_bfd_reloc_type_lookup): Add new relocs.
(mips_rtype_to_howto): Likewise.
(mips_elf_calculate_relocation): Handle new relocs.
(_bfd_mips_elf_relocate_section): REL_HI16/REL_LO16 relocs
are paired. The addend for R_MIPS_GNU_REL16_S2
is shifted right two bits.
In gas/:
* config/tc-mips.c (mips_ip): Don't put stuff in .rodata
when embedded-pic.
* config/tc-mips.c (SWITCH_TABLE): The ELF embedded-pic
implementation doesn't have special handling for switch
statements.
(macro_build): Allow for code in sections other than .text.
(macro): Likewise.
(mips_ip): Likewise.
(md_apply_fix): Do pc-relative relocation madness for MIPS ELF.
Don't perform relocs if we will be outputting them.
(tc_gen_reloc): For ELF, just use fx_addnumber for pc-relative
relocations. Allow BFD_RELOC_16_PCREL_S2 relocs when
embedded-pic.
In gas/testsuite/:
* gas/mips/empic.d: New file.
* gas/mips/empic.s: New file.
* gas/mips/mips16-e.d: New file.
* gas/mips/mips16-e.s: New file.
* gas/mips/mips16-f.d: New file.
* gas/mips/mips16-f.s: New file.
* gas/mips/mips.exp: Add empic, mips16-e. Add mips16-f as an
expected failure.
In include/elf:
* mips.h: Add R_MIPS_GNU_REL_HI16, R_MIPS_GNU_REL_LO16,
R_MIPS_GNU_REL16_S2, R_MIPS_PC64 and R_MIPS_PC32 relocation
numbers.
* elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Don't bump
architecture if the object causing the bump is dynamic.
* elf64-sparc.c (sparc64_elf_merge_private_bfd_data): Likewise,
and also don't it for memory ordering.
(sparc64_elf_write_relocs): Take src_rela out of the loop.
secondary_def.
(som_bfd_derive_misc_symbol_info): Initialize
secondary_def.
(som_build_and_write_symbol_table): Keep track
of secondary_def field.
(som_slurp_symbol_table): Set BSF_WEAK symbol flag
if secondary_def field is set.
(som_bfd_ar_write_symbol_stuff): Initialize
secondary_def.
* elflink.h (elf_bfd_final_link): Call output_extsym for global
symbols converted to local symbols even when stripping all
symbols.
(elf_link_output_extsym): Process global symbols converted to
local symbols even if they are being stripped.
Reinstate bits of sh4 support that got accidentally deleted.
Add sh-dsp support.
bfd:
* archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros.
(bfd_mach_sh3_dsp): Likewise.
(bfd_mach_sh4): Reinstate.
(bfd_default_scan): Recognize 7410, 7708, 7729 and 7750.
* bfd-in2.h: Regenerate.
* coff-sh.c (struct sh_opcode): flags is no longer short.
(USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros.
(sh_opcode41, sh_opcode42): Integrate as sh_opcode41.
(sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes.
(sh_opcode41, sh_opcode4, sh_opcode80): Likewise.
(sh_opcodes): No longer const.
(sh_dsp_opcodef0, sh_dsp_opcodef): New arrays.
(sh_insn_uses_reg): Check for USESAS and USESR8.
(sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS.
(_bfd_sh_align_load_span): Return early for SH4.
Modify sh_opcodes lookup table for sh-dsp / sh3-dsp.
Take into account that field b of a parallel processing insn
could be mistaken for a separate insn.
* cpu-sh.c (arch_info_struct): New array elements for
sh2, sh-dsp and sh3-dsp.
Reinstate element for sh4.
(SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros.
(SH4_NEXT): Reinstate.
(SH3_NEXT, SH3E_NEXT): Adjust.
* elf-bfd.h (_sh_elf_set_mach_from_flags): Declare.
* elf32-sh.c (sh_elf_set_private_flags): New function.
(sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise.
(sh_elf_merge_private_data): New function.
(elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define.
(bfd_elf32_bfd_copy_private_bfd_data): Define.
(bfd_elf32_bfd_merge_private_bfd_data): Change to
sh_elf_merge_private_data.
gas:
* config/tc-sh.c ("elf/sh.h"): Include.
(sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables.
(md.begin): Initialize target_arch.
Only include opcodes in has table that match selected architecture.
(parse_reg): Recognize register names for sh-dsp.
(parse_at): Recognize post-modify addressing.
(get_operands): The leading space is now optional.
(get_specific): Remove FDREG_N support. Add support for sh-dsp
arguments. Update valid_arch.
(build_Mytes): Add support for SDT_REG_N.
(find_cooked_opcode): New function, broken out of md_assemble.
(assemble_ppi, sh_elf_final_processing): New functions.
(md_assemble): Use find_cooked_opcode and assemble_ppi.
(md_longopts, md_parse_option): New option: -dsp.
* config/tc-sh.h (elf_tc_final_processing): Define.
(sh_elf_final_processing): Declare.
include/elf:
* sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros.
(EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise.
(EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise.
opcodes:
* sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
(print_insn_ppi): Likewise.
(print_insn_shx): Use info->mach to select appropriate insn set.
Add support for sh-dsp. Remove FD_REG_N support.
* sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
(sh_arg_type): Likewise. Remove FD_REG_N.
(sh_dsp_reg_nums): New enum.
(arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
(arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
(arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
(arch_sh3_dsp_up): Likewise.
(sh_opcode_info): New field: arch.
(sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
D_REG_N. Fill in arch field. Add sh-dsp insns.
hide_symbol members.
(elf_link_hash_copy_indirect): New.
(elf_link_hash_hide_symbol): New.
* elflink.h (elf_link_add_object_symbols): Break out copy from
indirect new new symbol to elf.c.
(elf_link_assign_sym_version): Break out privatization of
non-exported symbol to elf.c.
* elf.c (_bfd_elf_link_hash_copy_indirect): New.
(_bfd_elf_link_hash_hide_symbol): New.
(_bfd_elf_link_hash_table_init): Init copy_indirect and hide_symbol.
If it passed as non-NULL, use it to check whether any input BFD
has an input section which uses this output section. Change all
callers.
* bfd-in2.h: Rebuild.
* bfd-in.h: Move declarations of bfd_get_elf_phdr_upper_bound and
bfd_get_elf_phdrs in from bfd-in2.h, correcting patch of
1999-11-29.
* bfd-in2.h: Rebuild.
same register:
* coff-sh.c (USES1_REG, USES2_REG, SETS1_REG, SETS2_REG,
USESF1_REG, USESF2_REG, SETSF1_REG, SETSF2_REG): New macros.
* (sh_insn_sets_reg, sh_insn_sets_freg): New prototypes.
* (sh_insn_sets_reg, sh_insn_uses_or_sets_reg, sh_insns_sets_freg,
sh_insns_uses_or_sets_freg): New functions.
* (sh_insn_uses_reg, sh_insn_uses_freg): Use new macros.
* (sh_insns_conflict): Use new functions and new macros to
detect conflicts when two instructions both set same integer registers,
both set same fp register, and both set special register.
Change LD for ELF so that archive elements whoes archive map contains a
reference to a common symbol will get linkled in.
Add new field to bfd_target structure and initialise it for all bfd targets.
* elf.c (elfcore_make_note_pseudosection): New function.
(elfcore_grok_prfpreg): Use it.
(elfcore_grok_prxfpreg): New function.
(elfcore_grok_note): Recognize Linux NT_PRXFPREG notes.
relocs also need the GP value.
(_bfd_mips_elf_relocate_section): Handle unpaired LO16 relocs
properly. Handle sign-extension for R_MIPS_64 correctly. Correct
the GP value for R_MIPS_LITERAL relocs too. Handle
R_MIPS_64 relocs properly on big-endian MIPS.
(mips_elf_sign_extend): Behave properly with 'long long'.
(mips_elf_highest): Correct typo.
* targets.c (cisco_core_vec): Replaced with two new vecs ...
(cisco_core_big_vec): Add new bigendian vec.
(cisco_core_little_vec): Add new little endian vec.
* cisco-core.c (CRASH_INFO): Fixed offset replaced with ...
(crash_info_locs): Add array of possible offsets.
(MASK_ADDR): Mask to apply to crash info offset.
(crashinfo_external): Add textbase, database, bssbase and
turn into a typedef.
(cisco_core_file_validate): Renamed from cisco_core_file_p.
Many small changes to account for additional hardware versions.
Pick a reasonable size for ".reg" section. Add a ".crash"
section to allow access to crashinfo_external struct.
(cisco_core_file_p): New version of this function that
iterates over crash_info_locs, calling cisco_core_file_validate.
(cisco_core_vec): Old big endian only vec replaced with ...
(cisco_core_big_vec): Add big endian version.
(cisco_core_little_vec): Add little endian version.
* configure.in (cisco_core_vec): Split to two new vectors ...
(cisco_core_big_vec): New target vector.
(cisco_core_little_vec): New target vector.
* configure: Regenerate.
* config.bfd (targ): For m68*-*-aout* targ, change cisco_core_vec
to cisco_core_big_vec in targ_selvecs.
* elf.c (bfd_section_from_phdr): Add typename variable. Use p_type
to initialize it to something meaningful. Then use it to generate
more useful segment names.
R_SHORT_PCREL_MODE.
(hppa_som_gen_reloc_type): Handle both short and long pcrel branches.
(som_write_fixups): Eliminate redundant pcrel mode relocs. Handle
R_LONG_PCREL_MODE and R_SHORT_PCREL_MODE
* libhppa.h (dis_assemble_22): New function.
(bfd_hppa_insn2fmt): Handle long branch.
* libhppa.h (bfd_hppa_insn2fmt): Decode and handle formats found
in PA2.0.
previously disabled for lack of such support. For *-*-linux*libc1 targets,
XFAIL a ld testsuite that fails due to a bug in the dynamic linker prior to
glibc-2.1.
* libpei.h (_bfd_pei_final_link_postscript): Declare.
(coff_final_link_postscript): Define.
* peigen.c (_bfd_pei_swap_aouthdr_out): Don't set value for data
directory entries here.
(_bfd_pei_final_link_postscript): New function.
* peicode.h (coff_swap_scnhdr_in): If COFF_IMAGE_WITH_PE, the
get the overflow of the s_nlnno field from the s_nreloc field.
* peigen.c (_bfd_pei_swap_scnhdr_out): If doing a final link, swap
the s_nlnno overflow of the .text section into the s_nreloc
field.