Commit Graph

31 Commits

Author SHA1 Message Date
Andrew Burgess a143b0045c opcodes/cgen: Rework calculation of shift when inserting fields
The calculation of the shift amount, used to insert fields into the
instruction buffer, is not correct when the following conditions are all
true:
  - CGEN_INT_INSN_P is defined, and true.
  - CGEN_INSN_LSB0_P is true
  - Total instruction length is greater than the length of a single
    instruction word (the instruction is made of multiple words)
  - The word offset is non-zero (the field is outside the first word)

When the above conditions are all true, the calculated shift fails to
take account of the total instruction length.

After this commit the calculation of the shift amount is split into two
parts, first we calculate the shift required to get to BIT0 of the word
in which the field lives, then we calculate the shift required to place
the field within the instruction word.

The change in this commit only effects the CGEN_INT_INSN_P defined true
case, but changes the code for both CGEN_INSN_LSB0_P true, and false.

In the case of CGEN_INSN_LSB0_P being false, the code used to say:

	shift = total_length - (word_offset + start + length);

Now it says:

	shift_to_word = total_length - (word_offset + word_length);
	shift_within_word = word_length - start - length;
	shift = shift_to_word + shift_within_word;

From which we can see that in all cases the computed shift value should
be unchanged.

In the case of CGEN_INSN_LSB0_P being true, the code used to say:

	shift = (word_offset + start + 1) - length;

Now it says:

	shift_to_word = total_length - (word_offset + word_length);
	shift_within_word = start + 1 - length;
	shift = shift_to_word + shift_within_word;

In the case where 'total_length == word_length' AND 'word_offset ==
0' (which indicates an instruction of a single word), we see that the
computed shift value will be unchanged.  However, when the total_length
and word_length are different, and the word_offset is non-zero then the
computed shift value will be different (and correct).

opcodes/ChangeLog:

	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	* epiphany-ibld.c: Regenerate.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mt-ibld.c: Regenerate.
	* or1k-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.
2016-02-02 11:09:17 +00:00
Alan Modra 6f2750feaf Copyright update for binutils 2016-01-01 23:00:01 +10:30
H.J. Lu 43e65147c0 Remove trailing spaces in opcodes 2015-08-12 04:45:07 -07:00
Alan Modra b90efa5b79 ChangeLog rotatation and copyright year update 2015-01-02 00:53:45 +10:30
Alan Modra 4b95cf5c0c Update copyright years 2014-03-05 22:16:15 +10:30
Doug Evans b7cd1872af * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	* xstormy16-ibld.c: Regenerate.
2010-01-07 18:05:45 +00:00
Doug Evans fe8afbc48f cpu/
* m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
	(f-dsp-40-u20, f-dsp-40-u24): Ditto.
	opcodes/
	* cgen-ibld.in: #include "cgen/basic-modes.h".
	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	* xstormy16-ibld.c: Regenerate.
2010-01-06 05:30:19 +00:00
Doug Evans 05994f45db * cgen-asm.in: Update copyright year.
* cgen-dis.in: Update copyright year.
	* cgen-ibld.in: Update copyright year.
	* fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
	* fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
	* frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
	* ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
	* ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
	* iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
	* iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
	* lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
	* lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
	* m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
	* m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
	* m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
	* mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
	* mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
	* mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
	* openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
	* openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
	* xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
	* xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
	* xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
	* xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
2010-01-02 18:50:59 +00:00
Alan Modra 6f3b91a621 Regenerate for copyright date update. 2009-01-20 07:22:30 +00:00
Nick Clifton 9b201bb5e5 Change source files over to GPLv3. 2007-07-05 09:49:03 +00:00
Nick Clifton ed963e2de8 * cgen-ibld.in (insert_normal): Cope with attempts to insert a signed 32-bit
value into an unsigned 32-bit field when the host is a 64-bit machine.
2006-03-05 08:38:53 +00:00
Nick Clifton 47b0e7ad8c Update function declarations to ISO C90 formatting 2005-07-01 11:16:33 +00:00
Nick Clifton f432110413 Update the address and phone number of the FSF 2005-05-07 07:34:31 +00:00
Nick Clifton 8884595866 Add support for the M32R2 processor. 2003-12-03 17:38:48 +00:00
Michael Meissner ffead7aece regenerate cgen files after prototype fix 2003-08-09 00:39:21 +00:00
Graydon Hoare 9a2e995d8a [ include/opcode/ChangeLog ]
2002-01-22  Graydon Hoare  <graydon@redhat.com>

	* cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
	(CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.

[ opcodes/ChangeLog ]

2002-01-22  Graydon Hoare  <graydon@redhat.com>

	* fr30-asm.c: Regenerate.
	* fr30-desc.c: Likewise.
	* fr30-desc.h: Likewise.
	* fr30-dis.c: Likewise.
	* fr30-ibld.c: Likewise.
	* fr30-opc.c: Likewise.
	* fr30-opc.h: Likewise.
	* m32r-asm.c: Likewise.
	* m32r-desc.c: Likewise.
	* m32r-desc.h: Likewise.
	* m32r-dis.c: Likewise.
	* m32r-ibld.c: Likewise.
	* m32r-opc.c: Likewise.
	* m32r-opc.h: Likewise.
	* m32r-opinst.c: Likewise.
	* openrisc-asm.c: Likewise.
	* openrisc-desc.c: Likewise.
	* openrisc-desc.h: Likewise.
	* openrisc-dis.c: Likewise.
	* openrisc-ibld.c: Likewise.
	* openrisc-opc.c: Likewise.
	* openrisc-opc.h: Likewise.
	* xstormy16-desc.c: Likewise.

[ cgen/ChangeLog ]

2002-01-22  Graydon Hoare  <graydon@redhat.com>

	* desc-cpu.scm (ifld-number-cache): Add.
	(ifld-number): Add.
	(gen-maybe-multi-ifld-of-op): Add.
	(gen-maybe-multi-ifld): Add.
	(gen-multi-ifield-nodes): Add.
	(cgen-desc.c): Add call to gen-multi-ifield-nodes.
2002-01-22 21:45:36 +00:00
Nick Clifton e333d2c401 Fix badly placed #if 0... 2001-11-09 10:21:22 +00:00
Nick Clifton 37111cc728 Use safe-ctype.h not ctype.h 2001-10-13 09:38:04 +00:00
Nick Clifton 0e2ee3ca05 Fix compile time warnings in cgen-generated files 2001-10-09 08:54:58 +00:00
Nick Clifton fc05c67f12 Fix compile time warnings 2001-09-20 15:28:25 +00:00
H.J. Lu 3882b01078 Locale changes from Bruno Haible <haible@clisp.cons.org>. 2001-09-19 05:33:36 +00:00
Richard Henderson fc7bc88384 * cgen-ibld.in (extract_normal): Match type of VALUE and MASK
to *VALUEP.  Regenerate all cgen files.
2001-08-12 20:16:29 +00:00
Frank Ch. Eigler 5264623336 * m32r disasm bug fix
2001-05-04  Frank Ch. Eigler  <fche@redhat.com>

	* m32r-dis.c, -asm.c, -ibld.c: Regenerated with disassembler fixes.

2001-05-04  Frank Ch. Eigler  <fche@redhat.com>

	* cgen-dis.in (print_insn): Remove call to read_insn.  Instead,
	assume incoming buffer already has the base insn loaded.  Handle
	case of smaller-than-base instructions for variable-length case.
2001-05-04 17:45:19 +00:00
Nick Clifton 060d22b0d0 Fix typos in ChangeLogs; fix dates in copyright notices 2001-03-13 22:58:38 +00:00
Dave Brolley b3466c39bc 2001-03-05 Dave Brolley <brolley@redhat.co
* opcodes/fr30-asm.c: Regenerate.
        * opcodes/fr30-desc.c: Regenerate.
        * opcodes/fr30-desc.h: Regenerate.
        * opcodes/fr30-dis.c: Regenerate.
        * opcodes/fr30-ibld.c: Regenerate.
        * opcodes/fr30-opc.c: Regenerate.
        * opcodes/fr30-opc.h: Regenerate.
        * opcodes/m32r-asm.c: Regenerate.
        * opcodes/m32r-desc.c: Regenerate.
        * opcodes/m32r-desc.h: Regenerate.
        * opcodes/m32r-dis.c: Regenerate.
        * opcodes/m32r-ibld.c: Regenerate.
        * opcodes/m32r-opc.c: Regenerate.
        * opcodes/m32r-opc.h: Regenerate.
        * opcodes/m32r-opinst.c: Regenerate.
2001-03-05 15:55:01 +00:00
Dave Brolley f40c3ea3c7 2000-10-06 Dave Brolley <brolley@redhat.com>
* fr30-desc.h: Regenerate.
	* m32r-desc.h: Regenerate.
	* m32r-ibld.c: Regenerate.
2000-10-06 16:57:26 +00:00
Dave Brolley 6bb95a0ff8 2000-08-28 Dave Brolley <brolley@redhat.com>
* cgen-ibld.in (cgen_put_insn_int_value): New function.
	(insert_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
	(insert_insn_normal): Use cgen_put_insn_int_value with CGEN_INT_INSN_P.
	(extract_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P.
	* cgen-dis.in (read_insn): New static function.
	(print_insn): Use read_insn to read the insn into the buffer and set
	up for disassembly.
	(print_insn): in CGEN_INT_INSN_P, make sure that the entire insn is
	in the buffer.
	* fr30-asm.c: Regenerated.
	* fr30-desc.c: Regenerated.
	* fr30-desc.h Regenerated.
	* fr30-dis.c: Regenerated.
	* fr30-ibld.c: Regenerated.
	* fr30-opc.c: Regenerated.
	* fr30-opc.h Regenerated.
	* m32r-asm.c: Regenerated.
	* m32r-desc.c: Regenerated.
	* m32r-desc.h Regenerated.
	* m32r-dis.c: Regenerated.
	* m32r-ibld.c: Regenerated.
	* m32r-opc.c: Regenerated.
2000-08-28 18:17:54 +00:00
Andrew Haley cfcdbe9790 2000-02-23 Andrew Haley <aph@cygnus.com>
* m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
        m32r-ibld.c,m32r-opc.h: Rebuild.
2000-02-24 16:19:36 +00:00
Doug Evans 1fa60b5dde * fr30-asm.c,fr30-desc.h: Rebuild.
* m32r-asm.c,m32r-desc.c,m32r-desc.h: Rebuild.  Add m32rx support.
	* m32r-dis.c,m32r-ibld.c,m32r-opc.c,m32r-opc.h,m32r-opinst.c: Ditto.
1999-10-05 00:05:52 +00:00
Doug Evans eb1b03df1a * fr30-asm.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c: Rebuild.
* m32r-asm.c,m32r-desc.h,m32r-dis.c,m32r-ibld.c,m32r-opc.c: Rebuild.
	* m32r-opinst.c: Rebuild.
1999-08-29 21:16:25 +00:00
Richard Henderson 252b5132c7 19990502 sourceware import 1999-05-03 07:29:11 +00:00