1f3de044c6
merge from gcc
2012-11-11 22:37:30 +00:00
de863c7475
2012-11-09 Nick Clifton <nickc@redhat.com>
...
* Makefile.am (ALL_MACHINES): Add cpu-v850-rh850.lo.
(ALL_MACHINES_CFILES): Add cpu-v850-rh850.c.
* archures.c (bfd_arch_info): Add bfd_v850_rh850_arch.
* config.bfd: Likewise.
* configure.in: Add bfd_elf32_v850_rh850_vec.
* cpu-v850.c: Update printed description.
* cpu-v850_rh850.c: New file.
* elf32-v850.c (v850_elf_check_relocs): Add support for RH850 ABI
relocs.
(v850_elf_perform_relocation): Likewise.
(v850_elf_final_link_relocate): Likewise.
(v850_elf_relocate_section): Likewise.
(v850_elf_relax_section): Likewise.
(v800_elf_howto_table): New.
(v850_elf_object_p): Add support for RH850 ABI values.
(v850_elf_final_write_processing): Likewise.
(v850_elf_merge_private_bfd_data): Likewise.
(v850_elf_print_private_bfd_data): Likewise.
(v800_elf_reloc_map): New.
(v800_elf_reloc_type_lookup): New.
(v800_elf_reloc_name_lookup): New.
(v800_elf_info_to_howto): New.
(bfd_elf32_v850_rh850_vec): New.
(bfd_arch_v850_rh850): New.
* targets.c (_bfd_targets): Add bfd_elf32_v850_rh850_vec.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI.
(guess_is_rela): Add EM_V800.
(dump_relocations): Likewise.
(get_machine_name): Update EM_V800.
(get_machine_flags): Add support for RH850 ABI flags.
(is_32bit_abs_reloc): Add support for RH850 ABI reloc.
* config/tc-v850.c (v850_target_arch): New.
(v850_target_format): New.
(set_machine): Use v850_target_arch.
(md_begin): Likewise.
(md_show_usage): Document new switches.
(md_parse_option): Add -mgcc-abi, -mrh850-abi, -m8byte-align and
-m4byte-align.
* config/tc-v850.c (TARGET_ARCH) Use v850_target_arch.
(TARGET_FORMAT): Use v850_target_format.
* doc/c-v850.texi: Document new options.
* v850.h: Add RH850 ABI values.
* Makefile.am: (ALL_EMULATION_SOURCES): Add ev850_rh850.c.
* Makefile.in: Regenerate.
* configure.tgt (v850*-*-*): Make v850_rh850 the default
emulation. Add vanilla v850 as an extra emulation.
* emulparams/v850_rh850.sh: New file.
* scripttempl/v850_rh850.sc: New file.
* configure.in: Add bfd_v850_rh850_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Likewise.
2012-11-09 17:36:19 +00:00
708e2187a3
2012-11-09 Nick Clifton <nickc@redhat.com>
...
* elf32-rx.c (describe_flags): New function. Returns a buffer
containing a description of the E_FLAG_RX_... values set.
(rx_elf_merge_private_bfd_data): Use it.
(rx_elf_print_private_bfd_data): Likewise.
(elf32_rx_machine): Skip EF_RX_CPU_RX check.
(elf32_rx_special_sections): Define.
(elf_backend_special_sections): Define.
2012-11-09 Nick Clifton <nickc@redhat.com>
* readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI.
2012-11-09 Nick Clifton <nickc@redhat.com>
* config/obj-elf.c (obj_elf_change_section): Allow init array
sections to have the SHF_EXECINSTR attribute for the RX target.
* config/tc-rx.c (elf_flags): Initialise with E_FLAG_RX_ABI.
(enum options): Add OPTION_USES_GCC_ABI and OPTION_USES_RX_ABI.
(md_longopts): Add -mgcc-abi and -mrx-abi.
(md_parse_option): Add support for OPTION_USES_GCC_ABI and
OPTION_USES_RX_ABI.
* doc/as.texinfo (RX Options): Add mention of remaining RX
options.
* doc/c-rx.texi: Document -mgcc-abi and -mrx-abi.
2012-11-09 Nick Clifton <nickc@redhat.com>
* rx.h (EF_RX_CPU_RX): Add comment.
(E_FLAG_RX_ABI): Define.
2012-11-09 Nick Clifton <nickc@redhat.com>
* emultempl/rxelf.em (no_flag_mismatch_warnings): Initialise to
true.
(PARSE_AND_LIST_LONGOPTS): Add flag-mismatch-warnings.
(PARSE_AND_LIST_ARG_CASES): Add support for
--flag-mismatch-warnings.
2012-11-09 17:00:44 +00:00
c266cd0290
* mips.h (EF_MIPS_32BITMODE): Move next to lower-order bits.
2012-11-08 18:25:23 +00:00
ff826ef3e2
binutils
...
* readelf.c (get_note_type): Handle NT_386_TLS, NT_386_IOPERM.
include/common/elf
* common.h (NT_386_TLS, NT_386_IOPERM): New defines.
2012-11-01 14:57:22 +00:00
3bfcb6528e
bfd:
...
* elf32-arm.c (elf32_arm_print_private_bfd_data): Recognise and
display the new ARM hard-float/soft-float ABI flags for EABI_VER5
(elf32_arm_post_process_headers): Add the hard-float/soft-float
ABI flag as appropriate for ET_DYN/ET_EXEC in EABI_VER5.
binutils:
* readelf.c (decode_ARM_machine_flags): Recognise and display the
new ARM hard-float/soft-float ABI flags for EABI_VER5. Split out
the code for EABI_VER4 and EABI_VER5 to allow this.
elfcpp:
* arm.h: New enum for EABI soft- and hard-float flags.
gold:
* gold.cc (Target_arm::do_adjust_elf_header): Add the
hard-float/soft-float ABI flag as appropriate for ET_DYN/ET_EXEC
in EABI_VER5.
include:
* elf/arm.h (EF_ARM_ABI_FLOAT_SOFT): New define.
(EF_ARM_ABI_FLOAT_HARD): Likewise.
ld/testsuite:
* ld-arm/eabi-hard-float.s: New test source.
* ld-arm/eabi-soft-float.s: New test source.
* ld-arm/eabi-hard-float.d: New test.
* ld-arm/eabi-soft-float.d: New test.
* ld-arm/eabi-soft-float-ABI4.d: New test.
* ld-arm/eabi-soft-float-r.d: New test.
* ld-arm/arm-elf.xp: Use the new tests.
binutils:
PR binutils/14779
* configure.in: Add checks for wchar.h and mbstate_t.
* config.in: Regenerate.
* configure: Regenerate.
* readelf.c: Conditionally include wchar.h.
(print_symbol): Conditionally use mbstate_t.
2012-10-30 12:44:58 +00:00
10fca301c7
* dwarf2.h (DW_AT_APPLE_optimized, DW_AT_APPLE_flags)
...
(DW_AT_APPLE_isa, DW_AT_APPLE_block)
(DW_AT_APPLE_major_runtime_vers, DW_AT_APPLE_runtime_class)
(DW_AT_APPLE_omit_frame_ptr, DW_AT_APPLE_property_name)
(DW_AT_APPLE_property_getter, DW_AT_APPLE_property_setter)
(DW_AT_APPLE_property_attribute, DW_AT_APPLE_objc_complete_type)
(DW_AT_APPLE_property, DW_OP_GNU_entry_value): New macros.
2012-10-26 15:07:21 +00:00
4f9d22a0b1
Move disable_target_specific_optimizations to bfd_link_info
...
include/
* bfdlink.h (bfd_link_info): Add
disable_target_specific_optimizations.
ld/
* ld.h (command_line): Remove
disable_target_specific_optimizations.
(RELAXATION_DISABLED_BY_DEFAULT): Removed.
(RELAXATION_DISABLED_BY_USER): Likewise.
(RELAXATION_ENABLED): Likewise.
(DISABLE_RELAXATION): Likewise.
(ENABLE_RELAXATION): Likewise.
* ldmain.c (main): Updated.
* ldmain.h (RELAXATION_DISABLED_BY_DEFAULT): New macro.
(RELAXATION_DISABLED_BY_USER): Likewise.
(RELAXATION_ENABLED): Likewise.
(DISABLE_RELAXATION): Likewise.
(ENABLE_RELAXATION): Likewise.
2012-10-24 11:09:28 +00:00
9ece1fa991
binutils
...
* readelf.c (get_note_type): Handle NT_SIGINFO, NT_FILE.
(print_core_note): New function.
(process_note): Call it.
include/common/elf
* common.h (NT_SIGINFO, NT_FILE): New defines.
2012-10-23 17:46:44 +00:00
04c3a75556
bfd/
...
* bfd-in.h (bfd_elf_stack_segment_size): Declare.
* bfd-in2.h: Rebuilt.
* elfxx-target.h (elf_backend_stack_align): New.
(elfNN_bed): Add it.
* elf-bfd.h (struct elf_backend_data): Add stack_align field.
* elf.c (bfd_elf_map_sections_to_segments): Pay attention to
stack_align and stacksize for PT_GNU_STACK segment.
(assign_file_positions_for_non_load_sections): Set p_memsz for
PT_GNU_STACK segment.
(copy_elf_program_header): Copy PT_GNU_STACK size.
* elflink.c (bfd_elf_stack_segment_size): New function, taken from
uclinux backends.
(bfd_elf_size_dynamic_sections): Determine
PT_GNU_STACK requirements after calling backend. Pay attention to
stacksize.
* elf32-bfin.c (elf32_bfinfdpic_always_size_sections): Call
bfd_elf_stack_segment_size.
(elf32_bfinfdpic_modify_program_headers): Delete.
(elf32_bfingfdpic_copy_private_bfd_data): Don't copy PT_GNU_STACK
here.
(elf_backend_stack_align): Override.
(elf_backend_modify_program_headers): Don't override.
* elf32-frv.c (frvfdpic_always_size_sections): Call
bfd_elf_stack_segment_size.
(elf32_frvfdpic_modify_program_headers): Delete.
(elf32_frvfdpic_copy_private_bfd_data): Don't copy PT_GNU_STACK
here.
(elf_backend_stack_align): Override.
(elf_backend_modify_program_headers): Don't override.
* elf32-lm32.c (lm32_elf_always_size_sections): Leave
PT_GNU_STACK creation to underlying elf support. Check
__stacksize here for backwards compatibility, and set it if
needed.
(lm32_elf_modify_segment_map): Delete.
(lm32_elf_modify_program_headers): Delete.
(elf_backend_stack_align): Override.
(elf_backend_modify_segment_map): Don't override.
(elf_backend_modify_program_headers): Don't override.
* elf32-sh.c (sh_elf_always_size_sections): Call
bfd_elf_stack_segment_size.
(sh_elf_modify_program_headers): Delete.
(sh_elf_copy_private_data): Don't copy PT_GNU_STACK
here.
(elf_backend_stack_align): Override.
(elf_backend_modify_program_headers): Don't override.
* elf32-tic6x.c (elf32_tic6x_always_size_sections): Call
bfd_elf_stack_segment_size.
(elf32_tic6x_modify_program_headers): Delete.
(elf32_tic6x_copy_private_data): Delete.
(elf_backend_stack_align): Override.
(bfd_elf32_bfd_copy_private_bfd_data): Don't override.
(elf_backend_modify_program_headers): Don't override.
include/
* bfdlink.h (struct bfd_link_info): Add stacksize option.
ld/
* ld.texinfo (stack-size): New option.
* emultempl/elf32.em: Add stack-size option.
ld/testsuite/
* ld-elf/binutils.exp: Add -z stack-size=0.
* ld-elf/elf.exp: Add stack-exec and stack-size tests.
* ld-elf/orphan-region.d: Add stack-size option. Remove xfail.
* ld-elf/stack-exec.rd: New.
* ld-elf/stack-size.rd: New.
* ld-elf/stack.s: New.
* ld-scripts/empty-aligned.d: Add stack-size option.
* ld-sh/fdpic-stack-set.d: New.
* ld-tic6x/shlib-1.rd: Remove __stacksize symbol.
* ld-tic6x/shlib-1b.rd: Likewise.
* ld-tic6x/shlib-1r.rd: Likewise.
* ld-tic6x/shlib-1rb.rd: Likewise.
* ld-tic6x/shlib-app-1.rd: Likewise.
* ld-tic6x/shlib-app-1b.rd: Likewise.
* ld-tic6x/shlib-app-1r.rd: Likewise.
* ld-tic6x/shlib-app-1rb.rd: Likewise.
* ld-tic6x/shlib-noindex.rd: Likewise.
* ld-tic6x/static-app-1.rd: Likewise.
* ld-tic6x/static-app-1b.rd: Likewise.
* ld-tic6x/static-app-1r.rd: Likewise.
* ld-tic6x/static-app-1rb.rd: Likewise.
2012-10-23 09:33:56 +00:00
0e86e20e04
include/
...
PR ld/14426
* bfdlink.h (bfd_link_info): Add ignore_hash.
ld/
PR ld/14426
* ldlex.h (option_values): Add OPTION_IGNORE_UNRESOLVED_SYMBOL.
* lexsup.c (parse_args): Likewise.
(ld_options): Describe --ignore-unresolved-symbol.
* ldmain.h (add_ignoresym): Declare.
* ldmain.c (add_ignoresym): New function, extracted from..
(undefined_symbol): ..here. Return if the symbol is in ignore_hash.
(constructor_callback): Don't use global link_info here.
(reloc_overflow): Likewise.
2012-10-22 13:33:49 +00:00
f05682d460
* hppa.h (pa_opcodes): Use "cX" completer instead of "cx" in fstqx
...
opcodes. Likewise, use "cM" instead of "cm" in fstqs opcodes.
2012-10-15 00:22:35 +00:00
995b61fe5b
merge from gcc
2012-10-10 03:11:33 +00:00
cfc7277920
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* config/tc-s390.c (s390_parse_cpu): Add new option zEC12.
* doc/as.texinfo: Document new option zEC12.
* doc/c-s390.texi: Likewise.
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/s390.exp: Run zEC12 tests.
* gas/s390/zarch-zEC12.d: New file.
* gas/s390/zarch-zEC12.s: New file.
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390-mkopc.c: Support new option zEC12.
* s390-opc.c: Add new instruction formats.
* s390-opc.txt: Add new instructions for zEC12.
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390.h (s390_opcode_cpu_val): Add S390_OPCODE_ZEC12.
2012-10-04 08:47:36 +00:00
1415a2a767
Don't abort() when disassembling bad moxie instructions.
2012-09-28 03:53:39 +00:00
f41aef5f6e
2012-09-11 Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
...
bfd/
* bfd-in2.h: Regenerated.
* elf64-aarch64.c
(elf64_aarch64_howto_table): Add R_AARCH64_GOT_LD_PREL19 reloc to HOWTO.
(elf64_aarch64_reloc_map): Add reloc entry.
(aarch64_resolve_relocation): Likewise.
(bfd_elf_aarch64_put_addend): Likewise.
(aarch64_reloc_got_type): Likewise.
(elf64_aarch64_final_link_relocate): Likewise.
(lf64_aarch64_check_relocs): Likewise.
(elf64_aarch64_check_relocs): New case for R_AARCH64_ADR_PREL_LO21
reloc.
* libbfd.h: Regenerated.
* reloc.c (R_AARCH64_GOT_LD_PREL19): New reloc.
gas/
* config/tc-aarch64.c
(reloc_table): Add reloc to table entry.
(parse_address_main): Add support for #:<reloc_op>:<symbol>.
(parse_operands): Check for unused reloc.
(md_apply_fix): New case for reloc.
(aarch64_force_relocation): Likewise.
gas/testsuite
* gas/aarch64/reloc-insn.d
(BFD_RELOC_AARCH64_GOT_LD_PREL19): Add expected asm for new reloc test.
* gas/aarch64/reloc-insn.s
(BFD_RELOC_AARCH64_GOT_LD_PREL19): Add test for reloc.
include/
* elf/aarch64.h (R_AARCH64_GOT_LD_PREL19): New reloc.
ld/testsuite
* ld-aarch64/aarch64-elf.exp: New reloc tests.
* ld-aarch64/emit-relocs-309-low-bad.d: New file. Expected asm for test
failure (lower bound overflow).
* ld-aarch64/emit-relocs-309-low.d: New file. Expected asm for test
success (lower bound).
* ld-aarch64/emit-relocs-309-up-bad.d: New file. Expected asm for test
failure (upper bound overflow).
* ld-aarch64/emit-relocs-309-up.d: New file. Expected asm for test
success (upper bound).
* ld-aarch64/emit-relocs-309.s: New file. Asm for new reloc tests.
2012-09-12 16:25:51 +00:00
f8bfbc48cc
2012-09-06 Cary Coutant <ccoutant@google.com>
...
include/
* dwarf2.def: Edit comment.
2012-09-06 23:08:07 +00:00
b3e14edafc
Add Intel Itanium Series 9500 support
...
bfd/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* cpu-ia64-opc.c (ins_cnt6a): New function.
(ext_cnt6a): Ditto.
(ins_strd5b): Ditto.
(ext_strd5b): Ditto.
(elf64_ia64_operands): Add new operand types.
gas/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* config/tc-ia64.c (reg_symbol): Add a new register.
(indirect_reg): Ditto.
(pseudo_func): Add new symbolic constants.
(operand_match): Add new operand types recognition.
(operand_insn): Add new register recognition.
(md_begin): Add new register definition.
(specify_resource): Add new register recognition.
gas/testsuite/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* gas/testsuite/gas/ia64/psn.d: New file.
* gas/testsuite/gas/ia64/psn.s: New file.
* gas/testsuite/gas/ia64/ia64.exp: Add new testcase.
* gas/testsuite/gas/ia64/opc-i.d: Fixed failing tests.
* gas/testsuite/gas/ia64/opc-m.d: Ditto.
include/opcode/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* ia64.h (ia64_opnd): Add new operand types.
opcodes/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* ia64-asmtab.h (completer_index): Extend bitfield to full uint.
* ia64-gen.c: Promote completer index type to longlong.
(irf_operand): Add new register recognition.
(in_iclass_mov_x): Add an entry for the new mov_* instruction type.
(lookup_specifier): Add new resource recognition.
(insert_bit_table_ent): Relax abort condition according to the
changed completer index type.
(print_dis_table): Fix printf format for completer index.
* ia64-ic.tbl: Add a new instruction class.
* ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
* ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
* ia64-opc.h: Define short names for new operand types.
* ia64-raw.tbl: Add new RAW resource for DAHR register.
* ia64-waw.tbl: Add new WAW resource for DAHR register.
* ia64-asmtab.c: Regenerate.
2012-09-04 13:52:06 +00:00
e5b95258d9
Add support for constructing pc-relative addresses to the plt, by
...
adding the necessary assembly operators and relocations.
bfd:
* reloc.c (Add BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): new relocations.
* elfxx-tilegx.c (tilegx_elf_howto_table): Handle new relocations.
(tilegx_reloc_map): Ditto.
(reloc_to_create_func): Ditto.
(tilegx_elf_check_relocs): Ditto.
(tilegx_elf_gc_sweep_hook): Ditto.
(tilegx_elf_relocate_section): Ditto.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas:
* tc-tilegx.c (O_hw0_plt): Define operator.
(O_hw1_plt): Ditto.
(O_hw1_last_plt): Ditto.
(O_hw2_last_plt): Ditto.
(md_begin): Handle new operators.
(emit_tilegx_instruction): Ditto.
(md_apply_fix): Ditto.
* doc/c-tilegx.texi: Document new operators.
include/elf:
* tilegx.h (R_TILEGX_IMM16_X0_HW0_PLT_PCREL): New relocation.
(R_TILEGX_IMM16_X1_HW0_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW1_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW1_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW2_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW2_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW3_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW3_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL ): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): Ditto.
2012-08-28 02:43:22 +00:00
16164a6b00
Patch adds support to allow plugins to map selected subset of sections to unique
...
segments.
2012-08-24 Sriraman Tallam <tmsriram@google.com>
* gold.cc (queue_middle_tasks): Call layout again when unique
segments for sections is desired.
* layout.cc (Layout::Layout): Initialize new members.
(Layout::get_output_section_flags): New function.
(Layout::choose_output_section): Call get_output_section_flags.
(Layout::layout): Make output section for mapping to a unique segment.
(Layout::insert_section_segment_map): New function.
(Layout::attach_allocated_section_to_segment): Make unique segment for
output sections marked so.
(Layout::segment_precedes): Check for unique segments when sorting.
* layout.h (Layout::Unique_segment_info): New struct.
(Layout::Section_segment_map): New typedef.
(Layout::insert_section_segment_map): New function.
(Layout::get_output_section_flags): New function.
(Layout::is_unique_segment_for_sections_specified): New function.
(Layout::set_unique_segment_for_sections_specified): New function.
(Layout::unique_segment_for_sections_specified_): New member.
(Layout::section_segment_map_): New member.
* object.cc (Sized_relobj_file<size, big_endian>::do_layout):
Rename is_gc_pass_one to is_pass_one.
Rename is_gc_pass_two to is_pass_two.
Rename is_gc_or_icf to is_two_pass.
Check for which pass based on whether symbols data is present.
Make it two pass when unique segments for sections is desired.
* output.cc (Output_section::Output_section): Initialize new
members.
* output.h (Output_section::is_unique_segment): New function.
(Output_section::set_is_unique_segment): New function.
(Output_section::is_unique_segment_): New member.
(Output_section::extra_segment_flags): New function.
(Output_section::set_extra_segment_flags): New function.
(Output_section::extra_segment_flags_): New member.
(Output_section::segment_alignment): New function.
(Output_section::set_segment_alignment): New function.
(Output_section::segment_alignment_): New member.
(Output_segment::Output_segment): Initialize is_unique_segment_.
(Output_segment::is_unique_segment): New function.
(Output_segment::set_is_unique_segment): New function.
(Output_segment::is_unique_segment_): New member.
* plugin.cc (allow_unique_segment_for_sections): New function.
(unique_segment_for_sections): New function.
(Plugin::load): Add new functions to transfer vector.
* Makefile.am (plugin_final_layout.readelf.stdout): Add readelf output.
* Makefile.in: Regenerate.
* testsuite/plugin_final_layout.sh: Check if unique segment
functionality works.
* testsuite/plugin_section_order.c (onload): Check if new interfaces
are available.
(allow_unique_segment_for_sections): New global.
(unique_segment_for_sections): New global.
(claim_file_hook): Call allow_unique_segment_for_sections.
(all_symbols_read_hook): Call unique_segment_for_sections.
2012-08-24 Sriraman Tallam <tmsriram@google.com>
* plugin-api.h (ld_plugin_allow_unique_segment_for_sections):
New interface.
(ld_plugin_unique_segment_for_sections): New interface.
(LDPT_ALLOW_UNIQUE_SEGMENT_FOR_SECTIONS): New enum val.
(LDPT_UNIQUE_SEGMENT_FOR_SECTIONS): New enum val.
(tv_allow_unique_segment_for_sections): New member.
(tv_unique_segment_for_sections): New member.
2012-08-24 18:35:35 +00:00
59d09be6f5
* gas/config/tc-arm.c (check_obsolete): New function.
...
(do_rd_rm_rn): Check swp{b} for obsoletion.
* gas/testsuite/gas/arm/armv8-a-bad.d: New testcase.
* gas/testsuite/gas/arm/armv8-a-bad.l: Likewise.
* gas/testsuite/gas/arm/armv8-a-bad.s: Likewise.
* gas/testsuite/gas/arm/depr-swp.l: Update for change in expected output.
* gas/testsuite/gas/arm/depr-swp.s: Add additional test.
* include/opcode/arm.h (ARM_CPU_IS_ANY): New define.
2012-08-24 07:52:49 +00:00
bca3892142
* bfd/elf32-arm.c (v8): New array.
...
(tag_cpu_arch_combine): Add support for ARMv8 attributes.
(elf32_arm_merge_eabi_attributes): Likewise.
(VFP_VERSION_COUNT): New define.
* binutils/readelf.c (arm_attr_tag_CPU_arch): Update for ARMv8.
(arm_attr_tag_FP_arch): Likewise.
(arm_attr_tag_Advanced_SIMD_arch): Likewise.
* gas/config/tc-arm.h (arm_ext_v8): New variable.
(fpu_vfp_ext_armv8): Likewise.
(fpu_neon_ext_armv8): Likewise.
(fpu_crypto_ext_armv8): Likewise.
(arm_archs): Add armv8-a.
(arm_extensions): Add crypto, fp, and simd.
(arm_fpus): Add fp-armv8, neon-fp-armv8, crypto-neon-fp-armv8.
(cpu_arch_ver): Add support for ARMv8.
(aeabi_set_public_sttributes): Likewise.
* gas/doc/c-arm.texi (ARM Options): Document new architecture and
extension options for ARMv8.
* gas/testsuite/gas/arm/attr-march-all.d: Update for change in expected
output.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv8-a+crypto.d: New testcase.
* gas/testsuite/gas/arm/attr-march-armv8-a+fp.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv8-a+simd.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv8-a.d: Likewise.
* include/elf/arm.h (TAG_CPU_ARCH_V8): New define.
(MAX_TAG_CPU_ARCH): Update.
* include/opcode/arm.h (ARM_EXT_V8): New define.
(FPU_VFP_EXT_ARMV8): Likewise.
(FPU_NEON_EXT_ARMV8): Likewise.
(FPU_CRYPTO_EXT_ARMV8): Likewise.
(ARM_AEXT_V8A): Likewise.
(FPU_VFP_ARMV8): Likwise.
(FPU_NEON_ARMV8): Likewise.
(FPU_CRYPTO_ARMV8): Likewise.
(FPU_ARCH_VFP_ARMV8): Likewise.
(FPU_ARCH_NEON_VFP_ARMV8): Likewise.
(FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise.
(ARM_ARCH_V8A): Likwise.
(ARM_ARCH_V8A_FP): Likewise.
(ARM_ARCH_V8A_SIMD): Likewise.
(ARM_ARCH_V8A_CRYPTO): Likewise.
* ld/testsuite/ld-arm/arm-elf.exp: Add new testcases.
* ld/testsuite/ld-arm/attr-merge-vfp-3.d: Update for change in expected
output.
* ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-7.d: New testcase.
* ld/testsuite/ld-arm/attr-merge-vfp-7r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-armv8-hard.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-armv8.s: Likewise.
2012-08-24 07:50:38 +00:00
2c63854f55
Fix sparc opcode encoding for 4-arg crypto instructions.
...
include/opcode
* sparc.h (F3F4): New macro.
opcodes
* sparc-opc.c (4-argument crypto instructions): Fix encoding using
F3F4 macro.
gas/testsuite
* gas/sparc/crypto.d: Fix opcodes for 4-arg crypto instructions.
2012-08-21 23:00:36 +00:00
a06ea96464
Add support for 64-bit ARM architecture: AArch64
2012-08-13 14:52:54 +00:00
35d0a16941
include/opcode/
...
* mips.h (mips_opcode): Add the exclusions field.
(OPCODE_IS_MEMBER): Remove macro.
(cpu_is_member): New inline function.
(opcode_is_member): Likewise.
opcodes/
* micromips-opc.c (micromips_opcodes): Update comment.
* mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
instructions for IOCT as appropriate.
* mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
opcode_is_member.
* configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
the result of a check for the -Wno-missing-field-initializers
GCC option.
* Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
(mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
compilation.
(mips16-opc.lo): Likewise.
(micromips-opc.lo): Likewise.
* aclocal.m4: Regenerate.
* configure: Regenerate.
* Makefile.in: Regenerate.
gas/
* config/tc-mips.c (NO_ISA_COP, COP_INSN): Remove macros.
(is_opcode_valid): Remove coprocessor instruction exclusions.
Replace OPCODE_IS_MEMBER with opcode_is_member.
(is_opcode_valid_16): Replace OPCODE_IS_MEMBER with
opcode_is_member.
(macro): Remove coprocessor instruction exclusions.
2012-08-13 14:26:14 +00:00
21a3750560
* elf/m68hc11.h: #define E_M68HC11_NO_BANK_WARNING
...
0x000000200
2012-08-02 20:10:10 +00:00
b8fdb283ea
* m68hc11.h: #define E_M68HC11_NO_BANK_WARNING
...
0x000000200
2012-08-02 20:08:54 +00:00
03f66e8a8f
include/opcode/
...
* mips.h: Document microMIPS DSP ASE usage.
(MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Update for
microMIPS DSP ASE support.
(MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise.
(MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise.
(MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise.
(MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise.
(MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise.
(MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise.
(MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise.
gas/
* config/tc-mips.c (macro_build) <'2'>: Handle microMIPS.
(macro) <M_BALIGN>: Update error handling.
(validate_micromips_insn) <'2', '3', '4', '5', '6'>: New cases.
<'7', '8', '0', '@', '^'>: Likewise.
(mips_ip) <'2', '3', '4', '5', '6', '7', '8'>: Handle microMIPS.
<'9'>: Fix formatting.
<'0', '@'>: Handle microMIPS.
<'^'>: New case.
gas/testsuite/
* gas/mips/micromips@mips32-dsp.d: New.
* gas/mips/micromips@mips32-dspr2.d: New.
* gas/mips/mips32-dsp.d: Remove -mips32r2.
* gas/mips/mips32-dspr2.d: Likewise.
* gas/mips/mips.exp: (mips_create_arch): Use -mips64r2
for micromips. Use run_dump_test_arches to run dsp tests.
opcodes/
* micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
(DSP_VOLA): Likewise.
(D32, D33): Likewise.
(micromips_opcodes): Add DSP ASE instructions.
* micromips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
<'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
2012-07-31 21:38:54 +00:00
3e26559742
2012-07-05 Sean Keys <skeys@ipdatasys.com>
...
* opcode/xgate.h: Changed the format string for mode
XGATE_OP_DYA_MON.
2012-07-30 21:44:51 +00:00
63d08c6844
Fix attributation of PR 13135 patch.
2012-07-26 14:05:38 +00:00
d908c8af5a
PR binutils/13135
...
* arm-dis.c: Add necessary casts for printing integer values.
Use %s when printing string values.
* hppa-dis.c: Likewise.
* m68k-dis.c: Likewise.
* microblaze-dis.c: Likewise.
* mips-dis.c: Likewise.
* ppc-dis.c: Likewise.
* sparc-dis.c: Likewise.
* dis-asm.h (fprintf_ftype): Add ATTRIBUTE_FPTR_PRINTF_2.
2012-07-24 12:56:47 +00:00
0429544a87
include/
...
* filenames.h: #include "hashtab.h".
(filename_hash, filename_eq): Declare.
libiberty/
* filename_cmp.c (filename_hash, filename_eq): New functions.
2012-07-13 23:39:46 +00:00
470b557aaf
2012-07-13 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* elf64-s390.c: Include elf-s390-common.c.
(R_390_IRELATIVE): New reloc.
(elf_s390_reloc_type_lookup): Support R_390_IRELATIVE.
(RELA_ENTRY_SIZE): New macro.
(elf_s390_link_hash_entry): New fields ifunc_resolver_address and
*ifunc_resolver_section.
(struct plt_entry): New struct.
(struct elf_s390_obj_tdata): New field local_plt.
(elf_s390_local_plt): New macro.
(struct elf_s390_link_hash_table): New field irelifunc.
(ELF64): New macro.
(link_hash_newfunc): Initialize new fields.
(elf_s390_check_relocs): Handle IFUNC symbols.
(elf_s390_adjust_dynamic_symbol): Don't do anything for IFUNC
symbols.
(allocate_dynrelocs): Call s390_elf_allocate_ifunc_dyn_relocs for
IFUNC symbols.
(elf_s390_size_dynamic_sections): Handle IFUNC symbols.
(elf_s390_relocate_section): Likewise.
(elf_s390_finish_dynamic_symbol): Likewise.
(elf_s390_finish_dynamic_sections): Handle local IFUNC symbols.
(elf_s390_finish_ifunc_symbol): New function.
(elf_s390_gc_sweep_hook): Handle local plt entries.
(elf_backend_add_symbol_hook): Define.
* elf32-s390.c: See elf64-s390.c changes.
* elf-s390-common.c: New file.
* bfd-in2.h (BFD_RELOC_390_IRELATIVE): New enum field.
* libbfd.h (BFD_RELOC_390_IRELATIVE): New entry for
BFD_RELOC_390_IRELATIVE.
* reloc.c (BFD_RELOC_390_IRELATIVE): Document new relocation.
2012-07-13 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* elf/s390.h (START_RELOC_NUMBERS): Define R_390_IRELATIVE reloc.
2012-07-13 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* emulparams/elf_s390.sh (IREL_IN_PLT): Define.
* emulparams/elf64_s390.sh (IREL_IN_PLT): Define.
2012-07-13 15:47:27 +00:00
9d7b4c23ac
* mips.h: Fix a typo in description.
2012-07-06 14:20:22 +00:00
3879925e69
gas/config/
...
* tc-xgate.c: Revised assembler so that operands
are collected before the addressing mode is
determined.
include/opcode/
* xgate.h: Changed the format string for mode
XGATE_OP_DYA_MON.
opcodes/
* xgate-dis.c: Removed an IF statement that will
always be false due to overlapping operand masks.
* xgate-opc.c: Corrected 'com' opcode entry and
fixed spacing.
2012-07-05 19:37:52 +00:00
cefc6d46de
* common.h (AT_L1I_CACHESHAPE, AT_L1D_CACHESHAPE,
...
AT_L2_CACHESHAPE, AT_L3_CACHESHAPE): New defines.
2012-06-28 09:12:27 +00:00
156942c7d1
PR 14125
...
* NEWS: Document additions to .gdb_index.
* dwarf2read.c: #include "gdb/gdb-index.h".
(DW2_GDB_INDEX_SYMBOL_STATIC_SET_VALUE): New macro.
(DW2_GDB_INDEX_SYMBOL_KIND_SET_VALUE): New macro.
(DW2_GDB_INDEX_CU_SET_VALUE): New macro.
(dwarf2_read_index): Recognize version 7.
(dw2_do_expand_symtabs_matching): New args want_specific_block,
block_kind, domain): All callers updated.
(dw2_find_symbol_file): Handle new index CU values.
(dw2_expand_symtabs_matching): Match symbol kind if requested.
(add_index_entry): New args is_static, kind. All callers updated.
(offset_type_compare, uniquify_cu_indices): New functions
(symbol_kind): New function.
(write_psymtabs_to_index): Remove duplicate CU values.
(write_psymtabs_to_index): Write .gdb_index version 7.
doc/
* gdb.texinfo (Index Section Format): Document version 7 format.
include/gdb/
* gdb-index.h: New file.
2012-06-23 22:23:47 +00:00
e48f889115
merge from gcc
2012-06-19 00:03:49 +00:00
2202d7cd99
2012-06-12 Rafael Ávila de Espíndola <respindola@mozilla.com>
...
* plugin-api.h (ld_plugin_output_file_type): Add LDPO_PIE.
2012-06-12 22:50:44 +00:00
9761def577
merge from gcc
2012-06-08 19:01:23 +00:00
76e879f8e4
* avr.h: (AVR_ISA_XCH): New define.
...
(AVR_ISA_XMEGA): Use it.
(XCH, LAS, LAT, LAC): New XMEGA opcodes.
2012-06-07 16:43:36 +00:00
a493e3e2e4
gdb/
...
2012-05-24 Pedro Alves <palves@redhat.com>
PR gdb/7205
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
gdb/gdbserver/
2012-05-24 Pedro Alves <palves@redhat.com>
PR gdb/7205
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
include/gdb/
2012-05-24 Pedro Alves <palves@redhat.com>
PR gdb/7205
* gdb/signals.def: Replace TARGET_SIGNAL_ with GDB_SIGNAL_
throughout.
sim/arm/
2012-05-24 Pedro Alves <palves@redhat.com>
PR gdb/7205
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
sim/avr/
2012-05-24 Pedro Alves <palves@redhat.com>
PR gdb/7205
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
sim/common/
2012-05-24 Pedro Alves <palves@redhat.com>
PR gdb/7205
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
sim/cr16/
2012-05-24 Pedro Alves <palves@redhat.com>
PR gdb/7205
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
sim/d10v/
2012-05-24 Pedro Alves <palves@redhat.com>
PR gdb/7205
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
sim/erc32/
2012-05-24 Pedro Alves <palves@redhat.com>
PR gdb/7205
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
sim/m32c/
2012-05-24 Pedro Alves <palves@redhat.com>
PR gdb/7205
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
sim/ppc/
2012-05-24 Pedro Alves <palves@redhat.com>
PR gdb/7205
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
sim/rl78/
2012-05-24 Pedro Alves <palves@redhat.com>
PR gdb/7205
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
sim/rx/
2012-05-24 Pedro Alves <palves@redhat.com>
PR gdb/7205
Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
2012-05-24 16:51:47 +00:00
2ea286498f
gdb/
...
2012-05-24 Pedro Alves <palves@redhat.com>
PR gdb/7205
Replace target_signal with gdb_signal throughout.
gdb/gdbserver/
2012-05-24 Pedro Alves <palves@redhat.com>
PR gdb/7205
Replace target_signal with gdb_signal throughout.
include/gdb/
2012-05-24 Pedro Alves <palves@redhat.com>
PR gdb/7205
Replace target_signal with gdb_signal throughout.
sim/common/
2012-05-24 Pedro Alves <palves@redhat.com>
PR gdb/7205
Replace target_signal with gdb_signal throughout.
2012-05-24 16:39:15 +00:00
c81795e6d4
* leb128.h: #include stdint.h, inttypes.h.
...
(read_uleb128_to_uint64): Renamed from read_uleb128_to_ull.
Change to take a uint64_t * argument instead of unsigned long long.
(read_sleb128_to_uint64): Renamed from read_sleb128_to_ll.
Change to take an int64_t * argument instead of long long.
2012-05-24 01:18:15 +00:00
67bf71fede
merge from gcc
2012-05-22 18:05:41 +00:00
40551fb82e
PR 13503
...
* reloc.c: Rename BFD_RELOC_AVR_8_HHI to BFD_RELOC_AVR_8_HLO.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenrate.
* elf32-avr.c (elf_avr_howto_table): Rename R_AVR_8_HHI8 to
R_AVR_8_HLO8.
(avr_reloc_map): Ditto.
* config/tc-avr.c (avr_cons_fix_new): Rename R_AVR_8_HHI8 to
R_AVR_8_HLO8.
(exp_mod_data) Ditto. And replace "hhi8" with "hlo8".
(md_apply_fix): Rename BFD_RELOC_AVR_8_HHI to BFD_RELOC_AVR_8_HLO.
* avr.h (RELOC_NUMBERS): Rename R_AVR_8_HHI8 to R_AVR_8_HLO8.
2012-05-16 14:52:16 +00:00
6927f98292
* config/tc-m68hc11.c: Add S12X and XGATE co-processor support.
...
Add option to offset S12 addresses into XGATE memory space.
Tweak target flags to match other tools. (i.e. -m m68hc11).
* doc/as.texinfo: Mention new options.
* doc/c-m68hc11.texi: Document new options.
* NEWS: Mention new support.
* archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg.
* config.bfd: Likewise.
* cpu-m9s12x.c: New.
* cpu-m9s12xg.c: New.
* elf32-m68hc12.c: Add S12X and XGATE co-processor support.
Add option to offset S12 addresses into XGATE memory space.
Fix carry bug in IMM16 (IMM8 low/high) relocate.
* Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg.
(ALL_MACHINES_CFILES): Likewise.
* reloc.c: Add S12X relocs.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* gas/m68hc11/insns9s12x.s: New
* gas/m68hc11/insns9s12x.d: New
* gas/m68hc11/hexprefix.s: New
* gas/m68hc11/hexprefix.d: New
* gas/m68hc11/9s12x-exg-sex-tfr.s: New
* gas/m68hc11/9s12x-exg-sex-tfr.d: New
* gas/m68hc11/insns9s12xg.s: New
* gas/m68hc11/insns9s12xg.d: New
* gas/m68hc11/9s12x-mov.s: New
* gas/m68hc11/9s12x-mov.d: New
* gas/m68hc11/m68hc11.exp: Updated
* gas/m68hc11/*.d: Brought in line with changed objdump output.
* gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3.
* gas/elf/elf.exp: XFAIL all hc11/12 targets for redef.
* gas/elf/dwarf2-1.d: Skip for hc11/12 targets.
* gas/elf/dwarf2-2.d: Likewise.
* ld-m68hc11/xgate-link.s: New.
* ld-m68hc11/xgate-link.d: New.
* ld-m68hc11/xgate-offset.s: New.
* ld-m68hc11/xgate-offset.d: New.
* ld-m68hc11/xgate1.s: New.
* ld-m68hc11/xgate1.d: New.
* ld-m68hc11/xgate2.s: New.
* ld-m68hc11/m68hc11.exp: Updated.
* ld-m68hc11/*.d: Brought in line with changed objdump output.
* ld-gc/gc.exp: Update CFLAGS for m68hc11.
* ld-plugin/plugin.exp: Likewise.
* ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12.
* configure.in: Add S12X and XGATE co-processor support to m68hc11
target.
* disassemble.c: Likewise.
* configure: Regenerate.
* m68hc11-dis.c: Make objdump output more consistent, use hex
instead of decimal and use 0x prefix for hex.
* m68hc11-opc.c: Add S12X and XGATE opcodes.
* dis-asm.h (print_insn_m9s12x): Prototype.
(print_insn_m9s12xg): Prototype.
* m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10)
R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations.
(E_M68HC11_XGATE_RAMOFFSET): Define.
* m68hc11.h: Add XGate definitions.
(struct m68hc11_opcode): Add xg_mask field.
2012-05-15 12:55:51 +00:00
b9c361e0ad
Add support for PowerPC VLE.
...
2012-05-14 Catherine Moore <clm@codesourcery.com>
* NEWS: Mention PowerPC VLE port.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
bfd/
* bfd.c (bfd_lookup_section_flags): Add section parm.
* ecoff.c (bfd_debug_section): Remove flag_info initializer.
* elf-bfd.h (bfd_elf_section_data): Move in section_flag_info.
(bfd_elf_lookup_section_flags): Add section parm.
* elf32-ppc.c (is_ppc_vle): New function.
(ppc_elf_modify_segment_map): New function.
(elf_backend_modify_segment_map): Define.
(has_vle_insns): New define.
* elf32-ppc.h (ppc_elf_modify_segment_map): Declare.
* elflink.c (bfd_elf_lookup_section_flags): Add return value & parm.
Move in logic to omit / include a section.
* libbfd-in.h (bfd_link_info): Add section parm.
(bfd_generic_lookup_section_flags): Likewise.
* reloc.c (bfd_generic_lookup_section_flags): Likewise.
* section.c (bfd_section): Move out section_flag_info.
(BFD_FAKE_SECTION): Remove flag_info initializer.
* targets.c (_bfd_lookup_section_flags): Add section parm.
2012-05-14 Catherine Moore <clm@codesourcery.com>
bfd/
* archures.c (bfd_mach_ppc_vle): New.
* bfd-in2.h: Regenerated.
* cpu-powerpc.c (bfd_powerpc_archs): New entry for vle.
* elf32-ppc.c (split16_format_type): New enumeration.
(ppc_elf_vle_split16): New function.
(HOWTO): Add entries for R_PPC_VLE relocations.
(ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations.
(ppc_elf_section_flags): New function.
(ppc_elf_lookup_section_flags): New function.
(ppc_elf_section_processing): New function.
(ppc_elf_check_relocs): Handle PPC_VLE relocations.
(ppc_elf_relocation_section): Likewise.
(elf_backend_lookup_section_flags_hook): Define.
(elf_backend_section_flags): Define.
(elf_backend_section_processing): Define.
* elf32-ppc.h (ppc_elf_section_processing): Declare.
* libbfd.h: Regenerated.
* reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15,
BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A,
BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A,
BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A,
BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21,
BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A,
BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A,
BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A,
BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (insn_validate): New func of existing code to call..
(ppc_setup_opcodes): ..from 2 places here.
Revise for second (VLE) opcode table.
Add #ifdef'd code to print opcode tables.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order
for the VLE conditional branches.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/
* config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro.
(PPC_VLE_SPLIT16D): New macro.
(PPC_VLE_LO16A): New macro.
(PPC_VLE_LO16D): New macro.
(PPC_VLE_HI16A): New macro.
(PPC_VLE_HI16D): New macro.
(PPC_VLE_HA16A): New macro.
(PPC_VLE_HA16D): New macro.
(PPC_APUINFO_VLE): New definition.
(md_chars_to_number): New function.
(md_parse_option): Check for combinations of little
endian and -mvle.
(md_show_usage): Document -mvle.
(ppc_arch): Recognize VLE.
(ppc_mach): Recognize bfd_mach_ppc_vle.
(ppc_setup_opcodes): Print the opcode table if
* config/tc-ppc.h (ppc_frag_check): Declare.
* doc/c-ppc.texi: Document -mvle.
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
gas/
* config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare.
(DWARF2_LINE_MIN_INSN_LENGTH): Redefine.
* config/tc-ppc.c (ppc_dw2_line_min_insn_length): New.
* dwarf2dbg.c (scale_addr_delta): Handle values of 1
for DWARF2_LINE_MIN_INSN_LENGTH.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/testsuite/
* gas/ppc/ppc.exp: Run new tests.
* gas/ppc/vle-reloc.d: New test.
* gas/ppc/vle-reloc.s: New test.
* gas/ppc/vle-simple-1.d: New test.
* gas/ppc/vle-simple-1.s: New test.
* gas/ppc/vle-simple-2.d: New test.
* gas/ppc/vle-simple-2.s: New test.
* gas/ppc/vle-simple-3.d: New test.
* gas/ppc/vle-simple-3.s: New test.
* gas/ppc/vle-simple-4.d: New test.
* gas/ppc/vle-simple-4.s: New test.
* gas/ppc/vle-simple-5.d: New test.
* gas/ppc/vle-simple-5.s: New test.
* gas/ppc/vle-simple-6.d: New test.
* gas/ppc/vle-simple-6.s: New test.
* gas/ppc/vle.d: New test.
* gas/ppc/vle.s: New test.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (SEC_PPC_VLE): Remove.
2012-05-14 Catherine Moore <clm@codesourcery.com>
James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (R_PPC_VLE_REL8): New reloction.
(R_PPC_VLE_REL15): Likewise.
(R_PPC_VLE_REL24): Likewise.
(R_PPC_VLE_LO16A): Likewise.
(R_PPC_VLE_LO16D): Likewise.
(R_PPC_VLE_HI16A): Likewise.
(R_PPC_VLE_HI16D): Likewise.
(R_PPC_VLE_HA16A): Likewise.
(R_PPC_VLE_HA16D): Likewise.
(R_PPC_VLE_SDA21): Likewise.
(R_PPC_VLE_SDA21_LO): Likewise.
(R_PPC_VLE_SDAREL_LO16A): Likewise.
(R_PPC_VLE_SDAREL_LO16D): Likewise.
(R_PPC_VLE_SDAREL_HI16A): Likewise.
(R_PPC_VLE_SDAREL_HI16D): Likewise.
(R_PPC_VLE_SDAREL_HA16A): Likewise.
(R_PPC_VLE_SDAREL_HA16D): Likewise.
(SEC_PPC_VLE): Remove.
(PF_PPC_VLE): New program header flag.
(SHF_PPC_VLE): New section header flag.
(vle_opcodes, vle_num_opcodes): New.
(VLE_OP): New macro.
(VLE_OP_TO_SEG): New macro.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
include/opcode/
* ppc.h (PPC_OPCODE_VLE): New definition.
(PPC_OP_SA): New macro.
(PPC_OP_SE_VLE): New macro.
(PPC_OP): Use a variable shift amount.
(powerpc_operand): Update comments.
(PPC_OPSHIFT_INV): New macro.
(PPC_OPERAND_CR): Replace with...
(PPC_OPERAND_CR_BIT): ...this and
(PPC_OPERAND_CR_REG): ...this.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/
* ldlang.c (walk_wild_consider_section): Don't copy section_flag_list.
Pass it to callback.
(walk_wild_section_general): Pass section_flag_list to callback.
(lang_add_section): Add sflag_list parm.
Move out logic to keep / omit a section & call bfd_lookup_section_flags.
(output_section_callback_fast): Add sflag_list parm.
Add new parm to lang_add_section calls.
(output_section_callback): Likewise.
(check_section_callback): Add sflag_list parm.
(lang_place_orphans): Add new parm to lang_add_section calls.
(gc_section_callback): Add sflag_list parm.
(find_relro_section_callback): Likewise.
* ldlang.h (callback_t): Add flag_info parm.
(lang_add_section): Add sflag_list parm.
* emultempl/armelf.em (elf32_arm_add_stub_section):
Add lang_add_section parm.
* emultempl/beos.em (gld*_place_orphan): Likewise.
* emultempl/elf32.em (gld*_place_orphan): Likewise.
* emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise.
* emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise.
* emultempl/mipself.em (mips_add_stub_section): Likewise.
* emultempl/mmo.em (mmo_place_orphan): Likewise.
* emultempl/pe.em (gld_*_place_orphan): Likewise.
* emultempl/pep.em (gld_*_place_orphan): Likewise.
* emultempl/ppc64elf.em (ppc_add_stub_section): Likewise.
* emultempl/spuelf.em (spu_place_special_section): Likewise.
* emultempl/vms.em (vms_place_orphan): Likewise.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/testsuite/
* ld-powerpc/powerpc.exp: Create ppceabitests.
* ld-powerpc/vle-multiseg.s: New.
* ld-powerpc/vle-multiseg-1.d: New.
* ld-powerpc/vle-multiseg-1.ld: New.
* ld-powerpc/vle-multiseg-2.d: New.
* ld-powerpc/vle-multiseg-2.ld: New.
* ld-powerpc/vle-multiseg-3.d: New.
* ld-powerpc/vle-multiseg-3.ld: New.
* ld-powerpc/vle-multiseg-4.d: New.
* ld-powerpc/vle-multiseg-4.ld: New.
* ld-powerpc/vle-multiseg-5.d: New.
* ld-powerpc/vle-multiseg-5.ld: New.
* ld-powerpc/vle-multiseg-6.d: New.
* ld-powerpc/vle-multiseg-6.ld: New.
* ld-powerpc/vle-multiseg-6a.s: New.
* ld-powerpc/vle-multiseg-6b.s: New.
* ld-powerpc/vle-multiseg-6c.s: New.
* ld-powerpc/vle-multiseg-6d.s: New.
* ld-powerpc/powerpc.exp: Run new tests.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/testsuite/
* ld-powerpc/apuinfo.rd: Update for VLE.
* ld-powerpc/vle-reloc-1.d: New.
* ld-powerpc/vle-reloc-1.s: New.
* ld-powerpc/vle-reloc-2.d: New.
* ld-powerpc/vle-reloc-2.s: New.
* ld-powerpc/vle-reloc-3.d: New.
* ld-powerpc/vle-reloc-3.s: New.
* ld-powerpc/vle-reloc-def-1.s: New.
* ld-powerpc/vle-reloc-def-2.s: New.
* ld-powerpc/vle-reloc-def-3.s: New.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
opcodes/
* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
(vle_opcd_indices): New array.
(lookup_vle): New function.
(disassemble_init_powerpc): Revise for second (VLE) opcode table.
(print_insn_powerpc): Likewise.
* ppc-opc.c: Likewise.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
Nathan Froyd <froydnj@codesourcery.com>
opcodes/
* ppc-opc.c (insert_arx, extract_arx): New functions.
(insert_ary, extract_ary): New functions.
(insert_li20, extract_li20): New functions.
(insert_rx, extract_rx): New functions.
(insert_ry, extract_ry): New functions.
(insert_sci8, extract_sci8): New functions.
(insert_sci8n, extract_sci8n): New functions.
(insert_sd4h, extract_sd4h): New functions.
(insert_sd4w, extract_sd4w): New functions.
(insert_vlesi, extract_vlesi): New functions.
(insert_vlensi, extract_vlensi): New functions.
(insert_vleui, extract_vleui): New functions.
(insert_vleil, extract_vleil): New functions.
(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
(BI16, BI32, BO32, B8): New.
(B15, B24, CRD32, CRS): New.
(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
(SH6_MASK): Use PPC_OPSHIFT_INV.
(SI8, UI5, OIMM5, UI7, BO16): New.
(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
(ALLOW8_SPRG): New.
(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
(OPVUP, OPVUP_MASK OPVUP): New
(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
(SE_IM5, SE_IM5_MASK): New.
(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
(BO32DNZ, BO32DZ): New.
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
(PPCVLE): New.
(powerpc_opcodes): Add new VLE instructions. Update existing
instruction to include PPCVLE if supported.
* ppc-dis.c (ppc_opts): Add vle entry.
(get_powerpc_dialect): New function.
(powerpc_init_dialect): VLE support.
(print_insn_big_powerpc): Call get_powerpc_dialect.
(print_insn_little_powerpc): Likewise.
(operand_value_powerpc): Handle negative shift counts.
(print_insn_powerpc): Handle 2-byte instruction lengths.
2012-05-14 19:45:30 +00:00
99700d6feb
PR 13503
...
* reloc.c: Add new ENUM for BFD_RELOC_AVR_8_LO,
BFD_RELOC_AVR_8_HI, BFD_RELOC_AVR_8_HHI.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenrate.
* elf32-avr.c (elf_avr_howto_table): Add entries for
R_AVR_8_LO8, R_AVR_8_HI8, R_AVR_8_HHI8.
(avr_reloc_map): Add RELOC mappings for R_AVR_8_LO8, R_AVR_8_HI8,
R_AVR_8_HHI8.
* config/tc-avr.c (exp_mod_pm): Remove variable.
(exp_mod_data_t): New typedef.
(pexp_mod_data, exp_mod_data): New variables.
(avr_parse_cons_expression): Scan through exp_mod_data[] to find
data expression modifiers "pm", "gs", "lo8", hi8", "hhi8", "hh8"
and set pexp_mod_data accordingly to be used in avr_cons_fix_new.
(avr_cons_fix_new): Handle new data expression modifiers shipped
in pexp_mod_data.
(md_apply_fix): Handle BFD_RELOC_AVR_8_LO, BFD_RELOC_AVR_8_HI,
BFD_RELOC_AVR_8_HHI.
* elf/avr.h (RELOC_NUMBERS): Add values for R_AVR_8_LO8,
R_AVR_8_HI8, R_AVR_8_HHI8.
2012-05-11 12:59:23 +00:00
f6c1a2d592
Add support for Motorola XGATE embedded CPU
2012-05-03 13:12:08 +00:00
959fb20661
include/
...
* dwarf2.def: Remove DW_FORM_GNU_ref_index,
replace DW_AT_GNU_ref_base with DW_AT_GNU_ranges_base.
2012-05-02 18:33:43 +00:00
fcfa8919e5
* dwarf2.def (DW_OP): Add DW_OP_GNU_addr_index.
2012-04-28 21:41:06 +00:00
fa66ec5377
merge from gcc
2012-04-27 18:03:26 +00:00
6cda13266f
Add support for SPARC T4 crypto instructions.
...
include/opcode/
* sparc.h: Document new arg code' )' for crypto RS3
immediates.
opcodes/
* sparc-dis.c (print_insn_sparc): Handle ')'.
* sparc-opc.c (sparc_opcodes): Add crypto instructions.
gas/
* config/tc-sparc.c (sparc_ip): Likewise. Accept instruction
names containing "_".
(sparc_arch_table): Add sparc4, v8pluse, and v9e. Add crypto
hwcap masks to v8plusv and v9v.
gas/testsuite/
* gas/sparc/crypto.s: New file.
* gas/sparc/crypto.d: New file.
* gas/sparc/sparc.exp: Run crypto test.
2012-04-27 18:02:35 +00:00
ec668d69b9
Move sparc opcode hwcaps out of sparc_opcode flags field.
...
include/opcode/
* sparc.h (struct sparc_opcode): New field 'hwcaps'.
F_MUL32, F_DIV32, F_FDMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2,
F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS,
F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING, F_HWCAP_MASK): Delete.
(HWCAP_MUL32, HWCAP_DIV32, HWCAP_FSMULD, HWCAP_V8PLUS, HWCAP_POPC,
HWCAP_VIS, HWCAP_VIS2, HWCAP_ASI_BLK_INIT, HWCAP_FMAF,
HWCAP_VIS3, HWCAP_HPC, HWCAP_RANDOM, HWCAP_TRANS, HWCAP_FJFMAU,
HWCAP_IMA, HWCAP_ASI_CACHE_SPARING, HWCAP_AES, HWCAP_DES,
HWCAP_KASUMI, HWCAP_CAMELLIA, HWCAP_MD5, HWCAP_SHA1,
HWCAP_SHA256, HWCAP_SHA512, HWCAP_MPMUL, HWCAP_MONT, HWCAP_PAUSE,
HWCAP_CBCOND, HWCAP_CRC32): New defines.
opcodes/
* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
gas/
* config/tc-sparc.c (sparc_arch_table): Rework to use HWCAP_*
masks.
(sparc_md_end): No longer need to translate hwcap_seen values into
ELF hwcap bits, they now match exactly.
(get_hwcap_name): Use HWCAP_* and handle new values.
(sparc_ip): Fetch hwcaps from insn->hwcaps instead of insn->flags.
2012-04-27 18:01:35 +00:00
4d29644716
Add new ELF_SPARC_HWCAP_* defines for features found on SPARC-T4.
...
include/elf/
* sparc.h: Add new ELF_SPARC_HWCAP_* defines for crypto,
pause, and compare-and-branch instructions.
2012-04-27 18:00:52 +00:00
2615994e91
Support R_SPARC_WDISP10 and R_SPARC_H34.
...
include/
* elf/sparc.h (R_SPARC_WDISP10): New reloc.
* opcode/sparc.h: Define '=' as generating R_SPARC_WDISP10.
opcodes/
* sparc-dis.c (X_DISP10): Define.
(print_insn_sparc): Handle '='.
bfd/
* reloc.c (BFD_RELOC_SPARC_H34, BFD_RELOC_SPARC_SIZE32,
BFD_RELOC_SPARC_SIZE64, BFD_RELOC_SPARC_WDISP10): New relocs.
* libbfd.h: Regenerate.
* bfd-in2.h: Likewise.
* elfxx-sparc.c (sparc_elf_wdisp10_reloc): New function.
(_bfd_sparc_elf_howto_table): Add entries for R_SPARC_H34,
R_SPARC_SIZE32, R_SPARC_64, and R_SPARC_WDISP10.
(_bfd_sparc_elf_reloc_type_lookup): Handle new relocs.
(_bfd_sparc_elf_check_relocs): Likewise.
(_bfd_sparc_elf_gc_sweep_hook): Likewise.
(_bfd_sparc_elf_relocate_section): Likewise.
gas/
* config/tc-sparc.c (sparc_ip): Handle '=', "%h34", "%l34", and
BFD_RELOC_SPARC_H34.
(md_apply_fix): Handle BFD_RELOC_SPARC_WDISP10 and BFD_RELOC_SPARC_H34.
(tc_gen_reloc): Likewise.
gas/testsuite/
* gas/sparc/reloc64.s: Add abs34 code model tests.
* gas/sparc/reloc64.d: Update.
elfcpp/
* sparc.h (R_SPARC_WDISP10): New relocation.
gold/
* sparc.cc (Reloc::wdisp10): New relocation method.
(Reloc::h34): Likewise.
(Target_sparc::Scan::check_non_pic): Handle R_SPARC_H34.
(Target_sparc::Scan::get_reference_flags): Handle R_SPARC_H34 and
R_SPARC_WDISP10.
(Target_sparc::Scan::local): Likewise.
(Target_sparc::Scan::global): Likewise.
(Target_sparc::Relocate::relocate): Likewise.
2012-04-12 16:26:06 +00:00
81eb0a20fc
gdb: add callback defines for new ARGV handling
...
The common sim code has slightly unfinished support for these already,
but even arch ports are unable to handle these if the common header does
not define them. This is because the generated callback header includes
simple common gdb/sim headers only which causes it to skip the new ARGV
syscalls. Plus, it isn't like providing these in the common header will
break any sim targets which don't want them.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-12 05:33:15 +00:00
b3641a6eb9
merge from gcc
2012-04-10 17:07:35 +00:00
d324f6d66b
bfd/
...
* elf.c (_bfd_elf_map_sections_to_segments): Set INFO->user_phdrs.
* elf-nacl.c (nacl_modify_segment_map): Do nothing if INFO->user_phdrs.
(nacl_modify_program_headers): Likewise.
include/
* bfdlink.h (struct bfd_link_info): Add new member user_phdrs.
2012-04-09 16:27:18 +00:00
b240011aba
include/
...
* dis-asm.h (disassemble_init_powerpc): Declare.
opcodes/
* disassemble.c (disassemble_init_for_target): Handle ppc init.
* ppc-dis.c (private): New var.
(powerpc_init_dialect): Don't return calloc failure, instead use
private.
(PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
(powerpc_opcd_indices): New array.
(disassemble_init_powerpc): New function.
(print_insn_big_powerpc): Don't init dialect here.
(print_insn_little_powerpc): Likewise.
(print_insn_powerpc): Start search using powerpc_opcd_indices.
2012-03-15 12:58:48 +00:00
aea77599d0
include/opcode/
...
* ppc.h: Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR.
opcodes/
* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
(PPCVEC2, PPCTMR, E6500): New short names.
(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
optional operands on sync instruction for E6500 target.
bfd/
* archures.c: Add bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
* bfd-in2.h: Regenerate.
* cpu-powerpc.c (bfd_powerpc_archs): Add entryies for
bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
gas/
* config/tc-ppc.c (md_show_usage): Document -me5500 and -me6500.
(ppc_handle_align): Add termination nop opcode for e500mc family.
* doc/as.texinfo: Document options -me5500 and -me6500.
* doc/c-ppc.texi: Likewise.
gas/testsuite/
* gas/ppc/e500mc64_nop.s: New test case for e500mc family
termination nops.
* gas/ppc/e500mc64_nop.d: Likewise.
* gas/ppc/e5500_nop.s: Likewise.
* gas/ppc/e5500_nop.d: Likewise.
* gas/ppc/e6500_nop.s: Likewise.
* gas/ppc/e6500_nop.d: Likewise.
* gas/ppc/e6500.s: New.
* gas/ppc/e6500.d: Likewise.
* gas/ppc/ppc.exp: Run e6500, e500mc64_nop, e5500_nop, and e6500_nop.
2012-03-09 23:39:06 +00:00
f3cf45d507
2012-03-08 Tristan Gingold <gingold@adacore.com>
...
* lbr.h (struct vms_lhd): Add comments.
2012-03-08 14:14:52 +00:00
4e3aa40890
merge from gcc
2012-03-08 00:01:31 +00:00
0a22ae8eb5
* mn10300.h (elf_mn10300_reloc_type): Add R_MN10300_TLS_GD,
...
R_MN10300_TLS_LD, R_MN10300_TLS_LDO, R_MN10300_TLS_GOTIE,
R_MN10300_TLS_IE, R_MN10300_TLS_LE, R_MN10300_TLS_DPTMOD,
R_MN10300_TLS_DTPOFF and R_MN10300_TLS_TPOFF.
* elf-m10300.c (elf32_mn10300_link_hash_entry): Add tls_type
field.
(elf32_mn10300_link_hash_table): Add tls_ldm_got entry;
(elf_mn10300_tdata): Define.
(elf_mn10300_local_got_tls_type): Define.
(elf_mn10300_howto_table): Add entries for R_MN10300_TLS_GD,
R_MN10300_TLS_LD, R_MN10300_TLS_LDO, R_MN10300_TLS_GOTIE,
R_MN10300_TLS_IE, R_MN10300_TLS_LE, R_MN10300_TLS_DPTMOD,
R_MN10300_TLS_DTPOFF, R_MN10300_TLS_TPOFF relocs.
(mn10300_reloc_map): Likewise.
(elf_mn10300_tls_transition): New function.
(dtpoff, tpoff, mn10300_do_tls_transition): New functions.
(mn10300_elf_check_relocs): Add TLS support.
(mn10300_elf_final_link_relocate): Likewise.
(mn10300_elf_relocate_section): Likewise.
(mn10300_elf_relax_section): Likewise.
(elf32_mn10300_link_hash_newfunc): Initialise new field.
(_bfd_mn10300_copy_indirect_symbol): New function.
(elf32_mn10300_link_hash_table_create): Initialise new fields.
(_bfd_mn10300_elf_size_dynamic_sections): Add TLS support.
(_bfd_mn10300_elf_finish_dynamic_symbol): Likewise.
(_bfd_mn10300_elf_reloc_type_class): Allocate an
elf_mn10300_obj_tdata structure.
(elf_backend_copy_indirect_symbol): Define.
* reloc.c (BFD_MN10300_TLS_GD, BFD_MN10300_TLS_LD,
BFD_MN10300_TLS_LDO, BFD_MN10300_TLS_GOTIE, BFD_MN10300_TLS_IE,
BFD_MN10300_TLS_LE, BFD_MN10300_TLS_DPTMOD,
BFD_MN10300_TLS_DTPOFF, BFD_MN10300_TLS_TPOFF): New relocations.
(BFD_RELOC_MN10300_32_PCREL, BFD_RELOC_MN10300_16_PCREL): Move to
alongside other MN10300 relocations.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* config/tc-mn10300.c (other_registers): Add SSP and USP.
(md_assemble): Add support for TLS relocs.
(mn10300_parse_name): Likewise.
* readelf.c (is_16bit_abs_reloc): Add detection of R_MN10300_16.
2012-03-07 17:52:00 +00:00
1f42f8b31d
gas/
...
* config/tc-crx.c: Include bfd_stdint.h.
(getconstant): Remove irrelevant comment. Don't fail due to
sign-extension of int mask.
(check_range): Rewrite using unsigned arithmetic throughout.
opcodes/
* crx-dis.c (print_arg): Mask constant to 32 bits.
* crx-opc.c (cst4_map): Use int array.
include/opcode/
* crx.h (cst4_map): Update declaration.
2012-02-27 06:37:40 +00:00
6f7be9592d
Improve TLS support on TILE-Gx/TILEPro:
...
- Add support for TLS LE references.
- Support linker optimization of TLS references.
- Delete relocations of GOT/tp relative offsets beyond 32-bits.
This brings binutils in line with the support expected in gcc 4.7, for
TILE-Gx/TILEPro.
bfd/
* reloc.c: Add BFD_RELOC_TILEPRO_TLS_GD_CALL,
BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD,
BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD,
BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD,
BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD,
BFD_RELOC_TILEPRO_TLS_IE_LOAD, BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA,
BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE,
BFD_RELOC_TILEGX_TLS_GD_CALL, BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD,
BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD,
BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD,
BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD, BFD_RELOC_TILEGX_TLS_IE_LOAD,
BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD,
BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD,
BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD, BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD.
Delete BFD_RELOC_TILEGX_IMM16_X0_HW1_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW1_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW2_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW2_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW3_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW3_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_IE.
* elf32-tilepro.c (tilepro_elf_howto_table): Update tilepro
relocations.
(tilepro_reloc_map): Ditto.
(tilepro_info_to_howto_rela): Ditto.
(reloc_to_create_func): Ditto.
(tilepro_tls_translate_to_le): New.
(tilepro_tls_translate_to_ie): New.
(tilepro_elf_tls_transition): New.
(tilepro_elf_check_relocs): Handle new tls relocations.
(tilepro_elf_gc_sweep_hook): Ditto.
(allocate_dynrelocs): Ditto.
(tilepro_elf_relocate_section): Ditto.
(tilepro_replace_insn): New.
(insn_mask_X1): New.
(insn_mask_X0_no_dest_no_srca): New
(insn_mask_X1_no_dest_no_srca): New
(insn_mask_Y0_no_dest_no_srca): New
(insn_mask_Y1_no_dest_no_srca): New
(srca_mask_X0): New
(srca_mask_X1): New
(insn_tls_le_move_X1): New
(insn_tls_le_move_zero_X0X1): New
(insn_tls_ie_lw_X1): New
(insn_tls_ie_add_X0X1): New
(insn_tls_ie_add_Y0Y1): New
(insn_tls_gd_add_X0X1): New
(insn_tls_gd_add_Y0Y1): New
* elfxx-tilegx.c (tilegx_elf_howto_table): Update tilegx
relocations.
(tilegx_reloc_map): Ditto.
(tilegx_info_to_howto_rela): Ditto.
(reloc_to_create_func): Ditto.
(tilegx_elf_link_hash_table): New field disable_le_transition.
(tilegx_tls_translate_to_le): New.
(tilegx_tls_translate_to_ie): New.
(tilegx_elf_tls_transition): New.
(tilegx_elf_check_relocs): Handle new tls relocations.
(tilegx_elf_gc_sweep_hook): Ditto.
(allocate_dynrelocs): Ditto.
(tilegx_elf_relocate_section): Ditto.
(tilegx_copy_bits): New.
(tilegx_replace_insn): New.
(insn_mask_X1): New.
(insn_mask_X0_no_dest_no_srca): New.
(insn_mask_X1_no_dest_no_srca): New.
(insn_mask_Y0_no_dest_no_srca): New.
(insn_mask_Y1_no_dest_no_srca): New.
(insn_mask_X0_no_operand): New.
(insn_mask_X1_no_operand): New.
(insn_mask_Y0_no_operand): New.
(insn_mask_Y1_no_operand): New.
(insn_tls_ie_ld_X1): New.
(insn_tls_ie_ld4s_X1): New.
(insn_tls_ie_add_X0X1): New.
(insn_tls_ie_add_Y0Y1): New.
(insn_tls_ie_addx_X0X1): New.
(insn_tls_ie_addx_Y0Y1): New.
(insn_tls_gd_add_X0X1): New.
(insn_tls_gd_add_Y0Y1): New.
(insn_move_X0X1): New.
(insn_move_Y0Y1): New.
(insn_add_X0X1): New.
(insn_add_Y0Y1): New.
(insn_addx_X0X1): New.
(insn_addx_Y0Y1): New.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas/
* tc-tilepro.c (O_tls_le): Define operator.
(O_tls_le_lo16): Ditto.
(O_tls_le_hi16): Ditto.
(O_tls_le_ha16): Ditto.
(O_tls_gd_call): Ditto.
(O_tls_gd_add): Ditto.
(O_tls_ie_load): Ditto.
(md_begin): Delete old operators; handle new operators.
(emit_tilepro_instruction): Ditto.
(md_apply_fix): Ditto.
* tc-tilegx.c (O_hw1_got): Delete operator.
(O_hw2_got): Ditto.
(O_hw3_got): Ditto.
(O_hw2_last_got): Ditto.
(O_hw1_tls_gd): Ditto.
(O_hw2_tls_gd): Ditto.
(O_hw3_tls_gd): Ditto.
(O_hw2_last_tls_gd): Ditto.
(O_hw1_tls_ie): Ditto.
(O_hw2_tls_ie): Ditto.
(O_hw3_tls_ie): Ditto.
(O_hw2_last_tls_ie): Ditto.
(O_hw0_tls_le): Define operator.
(O_hw0_last_tls_le): Ditto.
(O_hw1_last_tls_le): Ditto.
(O_tls_gd_call): Ditto.
(O_tls_gd_add): Ditto.
(O_tls_ie_load): Ditto.
(O_tls_add): Ditto.
(md_begin): Delete old operators; handle new operators.
(emit_tilegx_instruction): Ditto.
(md_apply_fix): Ditto.
* doc/c-tilegx.texi: Delete old operators; document new operators.
* doc/c-tilepro.texi: Ditto.
include/elf/
* tilegx.h (R_TILEGX_IMM16_X0_HW1_GOT): Delete.
(R_TILEGX_IMM16_X1_HW1_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW2_GOT): Ditto.
(R_TILEGX_IMM16_X1_HW2_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW3_GOT): Ditto.
(R_TILEGX_IMM16_X1_HW3_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_GOT): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW1_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW1_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW2_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW2_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW3_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW3_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW1_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW1_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW2_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW2_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW3_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW3_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW0_TLS_LE): New relocation.
(R_TILEGX_IMM16_X1_HW0_TLS_LE): Ditto.
(R_TILEGX_IMM16_X0_HW0_LAST_TLS_LE): Ditto.
(R_TILEGX_IMM16_X1_HW0_LAST_TLS_LE): Ditto.
(R_TILEGX_IMM16_X0_HW1_LAST_TLS_LE): Ditto.
(R_TILEGX_IMM16_X1_HW1_LAST_TLS_LE): Ditto.
(R_TILEGX_TLS_GD_CALL): Ditto.
(R_TILEGX_IMM8_X0_TLS_GD_ADD): Ditto.
(R_TILEGX_IMM8_X1_TLS_GD_ADD): Ditto.
(R_TILEGX_IMM8_Y0_TLS_GD_ADD): Ditto.
(R_TILEGX_IMM8_Y1_TLS_GD_ADD): Ditto.
(R_TILEGX_TLS_IE_LOAD): Ditto.
(R_TILEGX_IMM8_X0_TLS_ADD): Ditto.
(R_TILEGX_IMM8_X1_TLS_ADD): Ditto.
(R_TILEGX_IMM8_Y0_TLS_ADD): Ditto.
(R_TILEGX_IMM8_Y1_TLS_ADD): Ditto.
* tilepro.h (R_TILEPRO_TLS_GD_CALL): New relocation.
(R_TILEPRO_IMM8_X0_TLS_GD_ADD): Ditto.
(R_TILEPRO_IMM8_X1_TLS_GD_ADD): Ditto.
(R_TILEPRO_IMM8_Y0_TLS_GD_ADD): Ditto.
(R_TILEPRO_IMM8_Y1_TLS_GD_ADD): Ditto.
(R_TILEPRO_TLS_IE_LOAD): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE_LO): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE_LO): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE_HI): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE_HI): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE_HA): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE_HA): Ditto.
include/opcode/
* tilegx.h (tilegx_mnemonic): Add TILEGX_OPC_LD4S_TLS,
TILEGX_OPC_LD_TLS.
* tilepro.h (tilepro_mnemonic): Add TILEPRO_OPC_LW_TLS,
TILEPRO_OPC_LW_TLS_SN.
opcodes/
* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
TILEPRO_OPC_LW_TLS_SN.
2012-02-25 22:24:21 +00:00
19765f5229
deal with endian-ness in mach-o non-scattered relocs.
...
BFD:
* mach-o.c (bfd_mach_o_swap_in_non_scattered_reloc): New.
(bfd_mach_o_canonicalize_one_reloc): Swap non-scattered reloc
bit-fields when target and host differ in endian-ness. When
PAIRs are non-scattered find the 'symbol' from the preceding
reloc. Add FIXME re. reloc symbols on section boundaries.
(bfd_mach_o_swap_out_non_scattered_reloc): New.
(bfd_mach_o_write_relocs): Use bfd_mach_o_encode_non_scattered_reloc.
include/mach-o:
* external.h: Add comments about relocations fields. Add macros
for non-scattered relocations. Move scattered relocation macros to here.
* reloc.h: Remove macros related to external representation of reloc fields.
2012-02-23 16:29:56 +00:00
42164a7195
Implement Intel Transactional Synchronization Extensions
...
gas/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (HLE_PREFIX): New.
(check_hle): Likewise.
(_i386_insn): Add have_hle.
(cpu_arch): Add .hle and .rtm.
(md_assemble): Call check_hle if i.have_hle isn't zero.
(parse_insn): Set i.have_hle to 1 for HLE prefix.
(output_jump): Support up to 2 byte opcode.
* doc/c-i386.texi: Document hle/.hle and rtm/.rtm.
gas/testsuite/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/hle-intel.d: New.
* gas/i386/hle.d: Likewise.
* gas/i386/hle.s: Likewise.
* gas/i386/hlebad.l: Likewise.
* gas/i386/hlebad.s: Likewise.
* gas/i386/rtm-intel.d: Likewise.
* gas/i386/rtm.d: Likewise.
* gas/i386/rtm.s: Likewise.
* gas/i386/x86-64-hle-intel.d: Likewise.
* gas/i386/x86-64-hle.d: Likewise.
* gas/i386/x86-64-hle.s: Likewise.
* gas/i386/x86-64-hlebad.l: Likewise.
* gas/i386/x86-64-hlebad.s: Likewise.
* gas/i386/x86-64-rtm-intel.d: Likewise.
* gas/i386/x86-64-rtm.d: Likewise.
* gas/i386/x86-64-rtm.s: Likewise.
* gas/i386/i386.exp: Run hle, hle-intel, hlebad x86-64-hle, rtm,
rtm-intel, x86-64-hle-intel, x86-64-hlebad, x86-64-rtm and
x86-64-rtm-intel.
include/opcode/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (XACQUIRE_PREFIX_OPCODE): New.
(XRELEASE_PREFIX_OPCODE): Likewise.
opcodes/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (HLE_Fixup1): New.
(HLE_Fixup2): Likewise.
(HLE_Fixup3): Likewise.
(Ebh1): Likewise.
(Evh1): Likewise.
(Ebh2): Likewise.
(Evh2): Likewise.
(Ebh3): Likewise.
(Evh3): Likewise.
(MOD_C6_REG_7): Likewise.
(MOD_C7_REG_7): Likewise.
(RM_C6_REG_7): Likewise.
(RM_C7_REG_7): Likewise.
(XACQUIRE_PREFIX): Likewise.
(XRELEASE_PREFIX): Likewise.
(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
MOD_C6_REG_7 and MOD_C7_REG_7.
(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
xtest.
(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
CPU_RTM_FLAGS.
(cpu_flags): Add CpuHLE and CpuRTM.
(opcode_modifiers): Add HLEPrefixOk.
* i386-opc.h (CpuHLE): New.
(CpuRTM): Likewise.
(HLEPrefixOk): Likewise.
(i386_cpu_flags): Add cpuhle and cpurtm.
(i386_opcode_modifier): Add hleprefixok.
* i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
operand. Add xacquire, xrelease, xabort, xbegin, xend and
xtest.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2012-02-08 18:20:41 +00:00
9058f767a5
Add support to GDB for the Renesas rl78 architecture.
2012-02-04 06:05:50 +00:00
8b40760ade
Move ELF header entries to elf/ChangeLog
2012-01-31 20:00:16 +00:00
b7761f1106
Support arch-dependent fill
...
bfd/
2012-01-31 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13616
* archures.c (bfd_arch_info): Add fill.
(bfd_default_arch_struct): Add bfd_arch_default_fill.
(bfd_arch_default_fill): New.
* configure.in: Set bfd version to 2.22.52.
* configure: Regenerated.
* cpu-alpha.c: Add bfd_arch_default_fill to bfd_arch_info
initializer.
* cpu-arc.c: Likewise.
* cpu-arm.c: Likewise.
* cpu-avr.c: Likewise.
* cpu-bfin.c: Likewise.
* cpu-cr16.c: Likewise.
* cpu-cr16c.c: Likewise.
* cpu-cris.c: Likewise.
* cpu-crx.c: Likewise.
* cpu-d10v.c: Likewise.
* cpu-d30v.c: Likewise.
* cpu-dlx.c: Likewise.
* cpu-epiphany.c: Likewise.
* cpu-fr30.c: Likewise.
* cpu-frv.c: Likewise.
* cpu-h8300.c: Likewise.
* cpu-h8500.c: Likewise.
* cpu-hppa.c: Likewise.
* cpu-i370.c: Likewise.
* cpu-i860.c: Likewise.
* cpu-i960.c: Likewise.
* cpu-ia64.c: Likewise.
* cpu-ip2k.c: Likewise.
* cpu-iq2000.c: Likewise.
* cpu-lm32.c: Likewise.
* cpu-m10200.c: Likewise.
* cpu-m10300.c: Likewise.
* cpu-m32c.c: Likewise.
* cpu-m32r.c: Likewise.
* cpu-m68hc11.c: Likewise.
* cpu-m68hc12.c: Likewise.
* cpu-m68k.c: Likewise.
* cpu-m88k.c: Likewise.
* cpu-mcore.c: Likewise.
* cpu-mep.c: Likewise.
* cpu-microblaze.c: Likewise.
* cpu-mips.c: Likewise.
* cpu-mmix.c: Likewise.
* cpu-moxie.c: Likewise.
* cpu-msp430.c: Likewise.
* cpu-mt.c: Likewise.
* cpu-ns32k.c: Likewise.
* cpu-openrisc.c: Likewise.
* cpu-or32.c: Likewise.
* cpu-pdp11.c: Likewise.
* cpu-pj.c: Likewise.
* cpu-plugin.c: Likewise.
* cpu-powerpc.c: Likewise.
* cpu-rl78.c: Likewise.
* cpu-rs6000.c: Likewise.
* cpu-rx.c: Likewise.
* cpu-s390.c: Likewise.
* cpu-score.c: Likewise.
* cpu-sh.c: Likewise.
* cpu-sparc.c: Likewise.
* cpu-spu.c: Likewise.
* cpu-tic30.c: Likewise.
* cpu-tic4x.c: Likewise.
* cpu-tic54x.c: Likewise.
* cpu-tic6x.c: Likewise.
* cpu-tic80.c: Likewise.
* cpu-tilegx.c: Likewise.
* cpu-tilepro.c: Likewise.
* cpu-v850.c: Likewise.
* cpu-vax.c: Likewise.
* cpu-w65.c: Likewise.
* cpu-we32k.c: Likewise.
* cpu-xc16x.c: Likewise.
* cpu-xstormy16.c: Likewise.
* cpu-xtensa.c: Likewise.
* cpu-z80.c: Likewise.
* cpu-z8k.c: Likewise.
* cpu-i386.c: Include "libiberty.h".
(bfd_arch_i386_fill): New.
Add bfd_arch_i386_fill to bfd_arch_info initializer.
* cpu-k1om.c: Add bfd_arch_i386_fill to bfd_arch_info initializer.
* cpu-l1om.c: Likewise.
* linker.c (default_data_link_order): Call abfd->arch_info->fill
if fill size is 0.
* bfd-in2.h: Regenerated.
include/
2012-01-31 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13616
* bfdlink.h (bfd_link_order): Update comments on data size.
ld/
2012-01-31 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13616
* emulparams/elf32_x86_64.sh: Remove NOP.
* emulparams/elf_i386.sh: Likewise.
* emulparams/elf_i386_be.sh: Likewise.
* emulparams/elf_i386_ldso.sh: Likewise.
* emulparams/elf_i386_vxworks.sh: Likewise.
* emulparams/elf_k1om.sh: Likewise.
* emulparams/elf_l1om.sh: Likewise.
* emulparams/elf_x86_64.sh: Likewise.
* ldlang.c (zero_fill): Initialized to 0.
* ldwrite.c (build_link_order): Set data size to linker odrder
size when they are the same.
* scripttempl/elf.sc: Don't specify fill if NOP is undefined.
ld/testsuite/
2012-01-31 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13616
* ld-i386/tlsbindesc.dd: Update no-op padding.
* ld-i386/tlsnopic.dd: Likewise.
* ld-i386/tlspic.dd: Likewise.
* ld-x86-64/tlsbin.dd: Likewise.
* ld-x86-64/tlsbindesc.dd: Likewise.
* ld-x86-64/tlspic.dd: Likewise.
2012-01-31 17:54:39 +00:00
4e35ccee96
* dwarf2.h (enum dwarf_form): Add Fission extensions.
...
(enum dwarf_attribute): Likewise.
2012-01-26 22:57:17 +00:00
50d10658ee
add indirect_symbol to mach-o port.
...
bfd:
* mach-o.c (bfd_mach_o_count_indirect_symbols): New.
(bfd_mach_o_build_dysymtab_command): Populate indirect symbol table.
* mach-o.h (bfd_mach_o_asymbol): Move declaration to start of the
file. (bfd_mach_o_section): Add indirect_syms field.
gas:
* config/obj-macho.c (obj_mach_o_set_symbol_qualifier): Switch off
lazy when the symbol is private_extern.
(obj_mach_o_indirect_sym): New type.
(obj_mach_o_indirect_symbol): New.
(mach_o_pseudo_table): Use obj_mach_o_indirect_symbol.
(obj_macho_frob_label): Adjust to avoid adding bsyms for locals.
(obj_macho_frob_label): Likewise. Adjust external and comm
symbol tests.
(obj_mach_o_set_indirect_symbols): New.
(obj_mach_o_frob_file_after_relocs): New.
*config/obj-macho.h (obj_frob_file_after_relocs): Define.
(obj_mach_o_frob_file_after_relocs): Declare.
include/mach-o:
* loader.h (BFD_MACH_O_INDIRECT_SYM_LOCAL): New.
(BFD_MACH_O_INDIRECT_SYM_ABS): New
gas/testsuite:
* gas/mach-o/dysymtab-2.d: New.
* gas/mach-o/err-syms-4.s: New.
* gas/mach-o/err-syms-5.s: New.
* gas/mach-o/err-syms-6.s: New.
* gas/mach-o/symbols-6-64.d: New.
* gas/mach-o/symbols-6-64.s: New.
* gas/mach-o/symbols-6.d: New.
* gas/mach-o/symbols-6.s: New.
2012-01-12 14:03:12 +00:00
c7571c06f1
merge from gcc
2012-01-07 02:53:16 +00:00
9f4a5bd19a
bfd/
...
2012-01-04 Tristan Gingold <gingold@adacore.com>
* mach-o.h (bfd_mach_o_fvmlib_command): New structure.
(bfd_mach_o_load_command): Add fvmlib field.
* mach-o.c (bfd_mach_o_read_fvmlib): New function.
(bfd_mach_o_read_command): Handle fvmlib.
binutils/
2012-01-04 Tristan Gingold <gingold@adacore.com>
* od-macho.c (dump_load_command): Handle fvmlib.
include/mach-o/
2012-01-04 Tristan Gingold <gingold@adacore.com>
* external.h (mach_o_fvmlib_command_external): New structure.
2012-01-04 10:37:36 +00:00
0b2de10705
bfd/
...
2012-01-04 Tristan Gingold <gingold@adacore.com>
* mach-o.c (bfd_mach_o_convert_architecture): Reindent.
Decode msubtype for ARM.
include/mach-o/
2012-01-04 Tristan Gingold <gingold@adacore.com>
* loader.h: Update copyright year.
(bfd_mach_o_cpu_subtype): Add ARM subtypes.
2012-01-04 10:25:14 +00:00
fc55a90257
bfd/
...
2012-01-04 Tristan Gingold <gingold@adacore.com>
* mach-o.h: Reindent header.
(bfd_mach_o_encryption_info_command): New structure.
(bfd_mach_o_load_command): Add encryption_info field.
* mach-o.c (bfd_mach_o_read_encryption_info): New function.
(bfd_mach_o_read_command): Handle BFD_MACH_O_LC_ENCRYPTION_INFO.
(bfd_mach_o_read_command): Adjust error message.
binutils/
2012-01-04 Tristan Gingold <gingold@adacore.com>
* od-macho.c: Update copyright year.
(dump_load_command): Handle BFD_MACH_O_LC_ENCRYPTION_INFO.
include/mach-o/
2012-01-04 Tristan Gingold <gingold@adacore.com>
* external.h: Update copyright year.
(mach_o_symtab_command_external): Add comments.
(mach_o_encryption_info_command_external): New structure.
2012-01-04 09:58:55 +00:00
c5a5708100
Copyright year update in most files of the GDB Project.
...
gdb/ChangeLog:
Copyright year update in most files of the GDB Project.
2012-01-04 08:28:28 +00:00
9cea966c22
[bfd]
...
* elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX.
(rl78_reloc_map): Add BFD_RELOC_RL78_RELAX.
(rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR,
and R_RL78_RH_SADDR.
(rl78_elf_finish_dynamic_sections): Only validate PLT section if
we didn't relax anything, as relaxing might remove a PLT reference
after we've set up the table.
(elf32_rl78_relax_delete_bytes): New.
(reloc_bubblesort): New.
(rl78_offset_for_reloc): New.
(relax_addr16): New.
(rl78_elf_relax_section): Add support for relaxing long
instructions into short ones.
[gas]
* config/rl78-defs.h (rl78_linkrelax_addr16): Add.
(rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove.
* config/rl78-parse.y: Tag all addr16 and branch patterns with
relaxation markers.
* config/tc-rl78.c (rl78_linkrelax_addr16): New.
(rl78_linkrelax_branch): New.
(OPTION_RELAX): New.
(md_longopts): Add relax option.
(md_parse_option): Add OPTION_RELAX.
(rl78_frag_init): Support relaxation.
(rl78_handle_align): New.
(md_assemble): Support relaxation.
(md_apply_fix): Likewise.
(md_convert_frag): Likewise.
* config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New.
(HANDLE_ALIGN): New.
(rl78_handle_align): Declare.
* config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit
insn patterns.
(find_bit_index): New. Strip .BIT suffix off relevent
expressions for bit insns.
(rl78_lex): Exclude bit suffixes from expression parsing.
[include/elf]
* rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New.
(RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 01:49:37 +00:00
d0f1368214
2011-12-19 Chung-Lin Tang <cltang@codesourcery.com>
...
gas/
* config/tc-mips.c (mips_pseudo_table): Add tprelword/tpreldword
entries.
(mips16_percent_op): Add MIPS16 TLS relocation ops.
(md_apply_fix): Add BFD_RELOC_MIPS16_TLS_* switch cases.
(s_tls_rel_directive): Rename from s_dtprel_internal(). Abstract out
directive string and reloc type as function parameters. Update
comments.
(s_dtprelword,s_dtpreldword): Change to use s_tls_rel_directive().
(s_tprelword,s_tpreldword): New functions.
include/
* elf/mips.h (elf_mips_reloc_type): Add R_MIPS16_TLS_* entries.
bfd/
* reloc.c (BFD_RELOC_MIPS16_TLS_GD,BFD_RELOC_MIPS16_TLS_LDM,
BFD_RELOC_MIPS16_TLS_DTPREL_HI16,BFD_RELOC_MIPS16_TLS_DTPREL_LO16,
BFD_RELOC_MIPS16_TLS_GOTTPREL,BFD_RELOC_MIPS16_TLS_TPREL_HI16,
BFD_RELOC_MIPS16_TLS_TPREL_LO16): New relocations for MIPS16 TLS.
* bfd-in2.h (bfd_reloc_code_real): Regenerate.
* libbfd.h (bfd_reloc_code_real_names): Regenerate.
* elf32-mips.c (elf_mips16_howto_table_rel): Add R_MIPS16_TLS_*
entries.
(mips16_reloc_map): Add BFD_RELOC_MIPS16_TLS_* to R_MIPS16_TLS_*
mappings.
* elfn32-mips.c (elf_mips16_howto_table_rel,
elf_mips16_howto_table_rela): Add R_MIPS16_TLS_* entries.
(mips16_reloc_map): Add BFD_RELOC_MIPS16_TLS_* to R_MIPS16_TLS_*
mappings.
* elf64-mips.c (mips16_elf64_howto_table_rel,
mips16_elf64_howto_table_rela): Add R_MIPS16_TLS_* entries.
(mips16_reloc_map): Add BFD_RELOC_MIPS16_TLS_* to R_MIPS16_TLS_*
mappings.
* elfxx-mips.c (TLS_RELOC_P,mips16_reloc_p,
_bfd_mips_elf_check_relocs): Add cases for R_MIPS16_TLS_* relocations.
(tls_gd_reloc_p): Add R_MIPS16_TLS_GD case.
(tls_ldm_reloc_p): Add R_MIPS16_TLS_LDM case.
(tls_gottprel_reloc_p): Add R_MIPS16_TLS_GOTTPREL case.
(mips_elf_calculate_relocation): Add cases for R_MIPS16_TLS_*,
R_MIPS_TLS_DTPREL32/64, and R_MIPS_TLS_TPREL32/64 relocations.
2011-12-19 07:58:02 +00:00
2634e8c8ff
binutils/
...
2011-12-16 Tristan Gingold <gingold@adacore.com>
* od-macho.c: Include mach-o/codesign.h
(OPT_CODESIGN): Define.
(options): Add an entry for codesign.
(mach_o_help): Likewise.
(dump_header): Fix indentation.
(dump_thread): Do not test result of xmalloc.
(bfd_mach_o_cs_magic, bfd_mach_o_cs_hash_type): New.
(dump_code_signature_superblob): New function.
(swap_code_codedirectory_v1_in): Likewise.
(hexdump): Likewise.
(dump_code_signature_codedirectory): Likewise.
(dump_code_signature_blob, dump_code_signature): Likewise.
(dump_load_command): Dump code signature.
(mach_o_dump): Likewise.
include/mach-o/
2011-12-16 Tristan Gingold <gingold@adacore.com>
* codesign.h: New file.
2011-12-16 10:23:01 +00:00
a455111938
bfd/
...
2011-12-14 Iain Sandoe <iains@gcc.gnu.org>
* mach-o-i386.c (text_section_names_xlat): New table.
(data_section_names_xlat): Likewise.
(import_section_names_xlat): Likewise.
(mach_o_i386_segsec_names_xlat): Likewise.
(bfd_mach_o_tgt_seg_table): Use new tables.
* mach-o-x86-64.c (bfd_mach_o_tgt_seg_table): Set NULL.
* mach-o.c (mach_o_section_name_xlat, mach_o_segment_name_xlat):
Move to mach-o.h as typedefs.
(text_section_names_xlat): Update for current GCC usage.
(data_section_names_xlat): Likewise.
(dwarf_section_names_xlat): Likewise.
(objc_section_names_xlat): New table.
(segsec_names_xlat): Add objc table.
(bfd_mach_o_normalize_section_name): Replace with...
(bfd_mach_o_section_data_for_mach_sect): New.
(bfd_mach_o_section_data_for_bfd_name): New.
(bfd_mach_o_section_data_for_bfd_name): Update to use additional data.
(bfd_mach_o_convert_section_name_to_mach_o): Likewise.
(bfd_mach_o_bfd_copy_private_section_data): Implement.
(bfd_mach_o_write_symtab): Write a zero-length string as the first entry
for compatibility with system tools.
(bfd_mach_o_build_commands): Update section alignment info.
(bfd_mach_o_new_section_hook): Use translation table data to define
default section flags, type, attributes and alignment, when available.
(bfd_mach_o_init_section_from_mach_o): Add TODO comment.
(bfd_mach_o_section_type_name): Add 'symbol_stubs'.
(bfd_mach_o_section_attribute_name): Add 'self_modifying_code'.
(bfd_mach_o_get_section_type_from_name): Change "not-found" return
value.
(bfd_mach_o_tgt_seg_table): Set default NULL.
* mach-o.h (bfd_mach_o_segment_command): Use define for name length.
(bfd_mach_o_backend_data): Move until after contents are defined.
(bfd_mach_o_normalize_section_name): Remove.
(bfd_mach_o_convert_section_name_to_bfd): Declare.
(mach_o_section_name_xlat): Declare.
(mach_o_segment_name_xlat): Declare.
(bfd_mach_o_section_data_for_mach_sect): Declare.
(bfd_mach_o_section_data_for_bfd_name): Declare.
include/
2011-12-14 Iain Sandoe <iains@gcc.gnu.org>
* mach-o/loader.h (bfd_mach_o_section_type): define
BFD_MACH_O_S_ATTR_NONE to 0.
gas/
2011-12-14 Iain Sandoe <iains@gcc.gnu.org>
* config/obj-macho.c: Add some more top-level comments.
(collect_16char_name): New.
(obj_mach_o_section): Amend to allow syntax compatible with existing system
tools. Use section translation data when available.
(obj_mach_o_segT_from_bfd_name): New.
(known_sections): Update.
(obj_mach_o_known_section): Use obj_mach_o_segT_from_bfd_name.
(objc_sections): New.
(obj_mach_o_objc_section): New.
(debug_sections): New.
(obj_mach_o_debug_section): New.
(tgt_sections): New.
(obj_mach_o_opt_tgt_section): New.
(obj_mach_o_base_section): New.
(obj_mach_o_common_parse): Update to create BSS on demand and to handle
lcomm optional alignment param.
(obj_mach_o_comm): Update parameter name.
(obj_mach_o_placeholder): New.
(mach_o_pseudo_table): Update for GCC section directives.
* config/obj-macho.h (_OBJ_MACH_O_H): New.
(USE_ALIGN_PTWO): Define.
(S_SET_ALIGN) Define.
2011-12-14 10:30:09 +00:00
432233b359
bfd:
...
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* archures.c (bfd_mach_mips_octeon2): New macro
* bfd-in2.h: Regenerate.
* cpu-mips.c (I_mipsocteon2): New enum value.
(arch_info_struct): Add bfd_mach_mips_octeon2.
* elfxx-mips.c (_bfd_elf_mips_mach): Support E_MIPS_MACH_OCTEON2.
(mips_set_isa_flags): Add bfd_mach_mips_octeon2.
(mips_mach_extensions): Add bfd_mach_mips_octeon2.
gas:
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* tc-mips.c (CPU_IS_OCTEON): Add Octeon2.
(mips_cpu_info_table): Add Octeon2.
* doc/c-mips.texi: Document octeon2 as an acceptable value for -march=.
gas/testsuite:
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* gas/mips/mips.exp: Add Octeon2 for an architecture.
Run octeon2 test.
* gas/mips/octeon2.d: New file.
* gas/mips/octeon2.s: New file.
include/opcode:
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* mips.h (INSN_CHIP_MASK): Update according to INSN_OCTEON2.
(INSN_OCTEON2): New macro.
(CPU_OCTEON2): New macro.
(OPCODE_IS_MEMBER): Add Octeon2.
opcodes:
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* mips-dis.c (mips_arch_choices): Add Octeon2.
For "octeon+", just include OcteonP for the insn.
* mips-opc.c (IOCT): Include Octeon2.
(IOCTP): Include Octeon2.
(IOCT2): New macro.
(mips_builtin_opcodes): Add "laa", "laad", "lac", "lacd", "lad",
"ladd", "lai", "laid", "las", "lasd", "law", "lawd".
Move "lbux", "ldx", "lhx", "lwx", and "lwux" up to where the standard
loads are, and add IOCT2 to them.
Add "lbx" and "lhux".
Add "qmac.00", "qmac.01", "qmac.02", "qmac.03", "qmacs.00",
"qmacs.01", "qmacs.01", "qmacs.02" and "qmacs.03".
Add "zcb" and "zcbt".
2011-12-08 20:47:27 +00:00
355b81d949
include/elf/ChangeLog:
...
* common.h (NT_S390_LAST_BREAK): Define.
(NT_S390_SYSTEM_CALL): Likewise.
bfd/ChangeLog:
* elf-bfd.h (elfcore_write_s390_last_break): Add prototype.
(elfcore_write_s390_system_call): Likewise.
* elf.c (elfcore_write_s390_last_break): New function.
(elfcore_write_s390_system_call): Likewise.
(elfcore_write_register_note): Call them.
(elfcore_grok_s390_last_break): New function.
(elfcore_grok_s390_system_call): Likewise.
(elfcore_grok_note): Call them.
2011-12-06 14:09:12 +00:00
7171232768
sim: export cb_get_string for people to use
...
The common sim code provides a useful "get_string" function which reads
a C string out of the target's memory space. So rename and export it
for other people to use.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-12-03 18:39:43 +00:00
dd6a37e700
opcode/
...
2011-11-29 Andrew Pinski <apinski@cavium.com>
* mips-dis.c (mips_arch_choices): Add Octeon+.
* mips-opc.c (IOCT): Include Octeon+.
(IOCTP): New macro.
(mips_builtin_opcodes): Add "saa" and "saad".
bfd/
2011-11-29 Andrew Pinski <apinski@cavium.com>
* archures.c (bfd_mach_mips_octeonp): New macro.
* bfd-in2.h: Regenerate.
* bfd/cpu-mips.c (I_mipsocteonp): New enum value.
(arch_info_struct): Add bfd_mach_mips_octeonp.
* elfxx-mips.c (mips_set_isa_flags): Add bfd_mach_mips_octeonp.
(mips_mach_extensions): Add bfd_mach_mips_octeonp.
include/opcodes/
2011-11-29 Andrew Pinski <apinski@cavium.com>
* mips.h (INSN_CHIP_MASK): Update according to INSN_OCTEONP.
(INSN_OCTEONP): New macro.
(CPU_OCTEONP): New macro.
(OPCODE_IS_MEMBER): Add Octeon+.
(M_SAA_AB, M_SAAD_AB, M_SAA_OB, M_SAAD_OB): New enum values.
gas/
2011-11-29 Andrew Pinski <apinski@cavium.com>
* config/tc-mips.c (CPU_IS_OCTEON): New macro function.
(CPU_HAS_SEQ): Change to use CPU_IS_OCTEON.
(NO_ISA_COP): Likewise.
(macro) <ld_st>: Add support when off0 is true.
Add support for M_SAA_AB, M_SAA_OB, M_SAAD_OB and M_SAAD_AB.
(mips_cpu_info_table): Add octeon+.
* doc/c-mips.texi: Document octeon+ as an acceptable value for -march=.
gas/testsuite/
2011-11-29 Andrew Pinski <apinski@cavium.com>
* gas/mips/mips.exp: Add octeon+ for an architecture.
Run octeon-saa-saad test.
(run_dump_test_arch): For Octeon architectures, also try octeon@.
* gas/mips/octeon-pref.d: Remove -march=octeon from command line.
* gas/mips/octeon.d: Likewise.
* gas/mips/octeon-saa-saad.d: New file.
* gas/mips/octeon-saa-saad.s: New file
2011-11-29 20:28:55 +00:00
956a8f8beb
merge from gcc
2011-11-08 16:01:58 +00:00
99c513f6ac
[.]
...
* configure.ac (rl78-*-*) New case.
* configure: Regenerate.
[bfd]
* Makefile.am (ALL_MACHINES): Add cpu-rl78.lo.
(ALL_MACHINES_CFILES): Add cpu-rl78.c.
(BFD32_BACKENDS): Add elf32-rl78.lo.
(BFD32_BACKENDS_CFILES): Add elf32-rl78.c.
(Makefile.in): Regenerate.
* archures.c (bfd_architecture): Define bfd_arch_rl78.
(bfd_archures_list): Add bfd_rl78_arch.
* config.bfd: Add rl78-*-elf.
* configure.in: Add bfd_elf32_rl78_vec.
* reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations.
* targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* cpu-rl78.c: New file.
* elf32-rl78.c: New file.
[binutils]
* readelf.c: Include elf/rl78.h
(guess_is_rela): Handle EM_RL78.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
(is_32bit_abs_reloc): Likewise.
* NEWS: Mention addition of RL78 support.
* MAINTAINERS: Add myself as RL78 port maintainer.
[gas]
* Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c.
(TARGET_CPU_HFILES): Add rc-rl78.h.
(EXTRA_DIST): Add rl78-parse.c and rl78-parse.y.
(rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules.
* Makefile.in: Regenerate.
* configure.in: Add rl78 case.
* configure: Regenerate.
* configure.tgt: Add rl78 case.
* config/rl78-defs.h: New file.
* config/rl78-parse.y: New file.
* config/tc-rl78.c: New file.
* config/tc-rl78.h: New file.
* NEWS: Add Renesas RL78.
* doc/Makefile.am (c-rl78.texi): New.
* doc/Makefile.in: Likewise.
* doc/all.texi: Enable it.
* doc/as.texi: Add it.
[include]
* dis-asm.h (print_insn_rl78): Declare.
[include/elf]
* common.h (EM_RL78, EM_78K0R): New.
* rl78.h: New.
[include/opcode]
* rl78.h: New file.
[ld]
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c.
(+eelf32rl78.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Add rl78-*-* case.
* emulparams/elf32rl78.sh: New file.
* NEWS: Mention addition of Renesas RL78 support.
[opcodes]
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and
rl78-dis.c.
(MAINTAINERCLEANFILES): Add rl78-decode.c.
(rl78-decode.c): New rule, built from rl78-decode.opc and opc2c.
* Makefile.in: Regenerate.
* configure.in: Add bfd_rl78_arch case.
* configure: Regenerate.
* disassemble.c: Define ARCH_rl78.
(disassembler): Add ARCH_rl78 case.
* rl78-decode.c: New file.
* rl78-decode.opc: New file.
* rl78-dis.c: New file.
2011-11-02 03:09:11 +00:00
926e2094bb
bfd:
...
* cpu-epiphany.c: Reinstate full list of Copyright years.
* elf32-epiphany.c: Likewise.
cpu:
* epiphany.cpu, epiphany.opc: Likewise.
gas:
* config/tc-epiphany.c, config/tc-epiphany.h: Likewise.
* doc/c-epiphany.texi: Likewise.
include:
* elf/epiphany.h: Likewise.
2011-10-27 14:27:16 +00:00
cfb8c0921c
bfd:
...
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
26f85d7a30
* mips.h: Fix a typo in description.
2011-10-24 14:21:41 +00:00
006d5c8857
* obstack.h [!GNUC] (obstack_free): Avoid cast to int.
...
* ansidecl.h (ENUM_BITFIELD): Always use enum in C++
2011-10-22 01:35:29 +00:00
c192a13368
PR ld/13254
...
include/
* bfdlink.h (struct bfd_link_info): Add error_textrel.
bfd/
* elflink.c (bfd_elf_final_link): Emit error_textrel error.
ld/
* emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Add
-z text, -z notext, -z textoff options for all targets having
shared lib support.
2011-10-19 04:13:28 +00:00
3b421ab3bc
include/elf/
...
* ppc64.h (R_PPC64_TOCSAVE): Add.
bfd/
* elf64-ppc.c (ppc64_elf_howto_table): Add R_PPC64_TOCSAVE entry.
(struct ppc_link_hash_table): Add tocsave_htab.
(struct tocsave_entry): New.
(tocsave_htab_hash, tocsave_htab_eq, tocsave_find): New functions.
(ppc64_elf_link_hash_table_create): Create tocsave_htab..
(ppc64_elf_link_hash_table_free): ..and delete it.
(build_plt_stub): Always put STD_R2_40R1 first.
(ppc64_elf_size_stubs): Check for R_PPC64_TOCSAVE following reloc
on plt call. If present add prologue nop location to tocsave_htab.
(ppc64_elf_relocate_section): Convert prologue nop to std. Skip
first insn of plt call stub when R_PPC64_TOCSAVE present.
2011-10-10 13:21:07 +00:00
d4cb0ea0ca
* readelf.c (get_machine_dlags): Add support for RX's PID mode.
...
* ld-scripts/phdrs.exp: Expect to fail for the RX.
* elf32-rx.c: Add support for PID mode.
(rx_elf_relocate_section): Add checks for unsafe PID relocations.
Include addend in R_RX_SYM relocations.
* config/rx-defs.h (rx_pid_register): New.
(rx_gp_register): New.
* config/rx-parse.y (rx_lex): Add support for %gpreg and %pidreg.
(displacement): Add PID support.
* config/tc-rx.c (rx_pid_mode): New.
(rx_num_int_regs): New.
(rx_pid_register): New.
(rx_gp_register): New.
(options): Add -mpid and -mint-register= options.
(md_longopts): Likewise.
(md_parse_option): Likewise.
(md_show_usage): Likewise.
(rx_pid_symbol): New.
(rx_pidreg_symbol): New.
(rx_gpreg_symbol): New.
(md_begin): Support PID.
(rx_validate_fix_sub): Support PID.
(tc_gen_reloc): Support PID.
* doc/c-rx.texi: Document PID support.
* rx.h (E_FLAG_RX_PID): New.
2011-10-05 14:13:31 +00:00
514c97d3e0
merge from gcc
2011-09-28 20:01:45 +00:00
79df06c40d
merge from gcc
2011-09-27 00:01:35 +00:00
139d7133b8
merge from gcc
2011-09-26 23:05:03 +00:00
235061c2f4
include/ChangeLog
...
gcc PR lto/47247
* plugin-api.h (enum ld_plugin_symbol_resolution): Add
LDPR_PREVAILING_DEF_IRONLY_EXP.
(enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V2.
gold/ChangeLog
gcc PR lto/47247
* plugin.cc (get_symbols_v2): New function.
(Plugin::load): Add LDPT_GET_SYMBOLS_V2.
(is_referenced_from_outside): New function.
(Pluginobj::get_symbol_resolution_info): Add version parameter, return
LDPR_PREVAILING_DEF_IRONLY_EXP when using new version.
(get_symbols): Pass version parameter.
(get_symbols_v2): New function.
* plugin.h (Pluginobj::get_symbol_resolution_info): Add version
parameter.
* testsuite/plugin_test.c (get_symbols_v2): New static variable.
(onload): Add LDPT_GET_SYMBOLS_V2.
(all_symbols_read_hook): Use get_symbols_v2; check for
LDPR_PREVAILING_DEF_IRONLY_EXP.
* testsuite/plugin_test_3.sh: Update expected results.
2011-09-26 23:00:17 +00:00
DJ Delorie
Nick Clifton
Maciej W. Rozycki
Tom Tromey
H.J. Lu
Nathan Sidwell
Alan Modra
Dave Anglin
Andreas Krebbel
Anthony Green
Richard Earnshaw
Cary Coutant
Walter Lee
Sriraman Tallam
Matthew Gretton-Dann
David S. Miller
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Doug Evans
Iain Sandoe
Rafael Ávila de Espíndola
Pedro Alves
James Lemke
Mike Frysinger
Roland McGrath
Tristan Gingold
Kevin Buettner
Jason Merrill
Joel Brobecker
Chung-Lin Tang
Andrew Pinski
Ulrich Weigand
Joern Rennecke