Move ELF relocation check after lang_gc_sections so that all the
reference counting code for plt and got relocs can be removed. This
only affects ELF targets which check relocations after opening all
input file.
* ldlang.c (lang_check_relocs): New function.
(lang_process): Call lang_check_relocs after lang_gc_sections.
* emultempl/elf32.em (gld${EMULATION_NAME}_before_parse): Don't
call _bfd_elf_link_check_relocs here.
Delaying checking ELF relocations until opening all input files so
that symbol information is final when relocations are checked. This
is only enabled for x86 targets.
bfd/
* elf-bfd.h (_bfd_elf_link_check_relocs): New.
* elflink.c (_bfd_elf_link_check_relocs): New function.
(elf_link_add_object_symbols): Call _bfd_elf_link_check_relocs
if check_relocs_after_open_input is FALSE.
include/
* bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
ld/
* emulparams/elf32_x86_64.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
New.
* emulparams/elf_i386.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/elf_i386_be.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/elf_i386_chaos.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/elf_i386_ldso.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/elf_i386_vxworks.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/elf_x86_64.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/i386nto.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emultempl/elf32.em (gld${EMULATION_NAME}_before_parse):
Set check_relocs_after_open_input to TRUE if
CHECK_RELOCS_AFTER_OPEN_INPUT is yes.
(gld${EMULATION_NAME}_after_open): Call
_bfd_elf_link_check_relocs on all inputs if
check_relocs_after_open_input is TRUE.
PR 19872
bfd * dwarf2.c (parse_comp_unit): Skip warning about unrecognised
version number if the version is zero.
bin * dwarf.c (display_debug_aranges): Skip warning about unrecognised
version number if the version is zero.
Since there is no need to place output sections in specific order for
relocatable link, we can skip merging flags of other input sections.
PR ld/19739
* emultempl/mmo.em (mmo_place_orphan): Don't merge flags of other
input sections for relocatable link.
* emultempl/pe.em (gld_${EMULATION_NAME}_place_orphan): Likewise.
* emultempl/pep.em (gld_${EMULATION_NAME}_place_orphan): Likewise.
Since there is no need to place output sections in specific order for
relocatable link, we can skip merging flags of other input sections.
PR ld/19739
* ld/emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Don't
merge flags of other input sections for relocatable link.
bfd * elf-bfd.h: Add callback to count additional relocations.
* elf32-arm.c (_arm_elf_section_data): Add new counter.
(insert_cantunwind_after): Increment relocations counter.
(elf32_arm_fix_exidx_coverage): Remove exidx entries and add
terminating CANTUNWIND entry only in final builds.
(elf32_arm_add_relocation): New function.
(elf32_arm_write_section): Add relocations in relocatable builds.
(elf32_arm_count_additional_relocs): New function.
(elf_backend_count_additional_relocs): New define.
* bfd/elflink.c (bfd_elf_final_link): Use callback and adjust size of
.rel section.
* bfd/elfxx-target.h (elf_backend_count_additional_relocs): New define.
ld * emultempl/armelf.em (gld${EMULATION_NAME}_after_allocation): Call
elf32_arm_fix_exidx_coverage for relocatable builds.
ld/testsuite
* ld-arm/arm-elf.exp: New test.
* ld-arm/unwind-rel.d: New file.
* ld-arm/unwind-rel1.s: New file.
* ld-arm/unwind-rel2.s: New file.
* ld-arm/unwind-rel3.s: New file.
The last patch missed handling the case where the ideal place to put
an orphan was after a non-existent output section statement, as can
happen when not using the builtin linker scripts. This patch uses the
updated flags for that case too, and extends the support to mmo and pe.
PR ld/19162
* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Pass
updated flags to lang_output_section_find_by_flags.
* emultempl/mmo.em (mmo_place_orphan): Merge flags for any
other input sections that might match a new output section to
decide placement.
* emultempl/pe.em (gld_${EMULATION_NAME}_place_orphan): Likewise.
* emultempl/pep.em (gld_${EMULATION_NAME}_place_orphan): Likewise.
* ldlang.c (lang_output_section_find_by_flags): Add sec_flags param.
* ldlang.h (lang_output_section_find_by_flags): Update prototype.
If given input sections with differing flags, we'd like to place the
section according to the final output section flags.
bfd/
PR ld/19162
* elflink.c (_bfd_elf_gc_mark_reloc): Move code iterating over
linker input bfds..
* section.c (bfd_get_next_section_by_name): ..to here. Add ibfd param.
(bfd_get_linker_section): Adjust bfd_get_next_section_by_name call.
* tekhex.c (first_phase): Likewise.
* elflink.c (bfd_elf_gc_sections): Likewise.
* bfd-in2.h: Regenerate.
ld/
PR ld/19162
* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Check flags
before calling _bfd_elf_match_sections_by_type. Merge flags for
any other input sections that might match a new output section to
decide placement.
bfd * bfd-in2.h: Regenerate.
* bfd-in.h (bfd_arm_stm32l4xx_fix): New enum. Specify how
STM32L4XX instruction scanning should be done.
(bfd_elf32_arm_set_stm32l4xx_fix)
(bfd_elf32_arm_stm32l4xx_erratum_scan)
(bfd_elf32_arm_stm32l4xx_fix_veneer_locations): Add prototypes.
(bfd_elf32_arm_set_target_relocs): Add stm32l4xx fix type argument
to prototype.
* elf32-arm.c (STM32L4XX_ERRATUM_VENEER_SECTION_NAME)
(STM32L4XX_ERRATUM_VENEER_ENTRY_NAME): Define macros.
(elf32_stm32l4xx_erratum_type): New enum.
(elf32_stm32l4xx_erratum_list): New struct. List of veneers or
jumps to veneers.
(_arm_elf_section_data): Add stm32l4xx_erratumcount,
stm32l4xx_erratumlist.
(elf32_arm_link_hash_table): Add stm32l4xx_erratum_glue_size,
stm32l4xx_fix and num_stm32l4xx_fixes fields.
(ctz): New function.
(popcount): New function.
(elf32_arm_link_hash_table_create): Initialize stm32l4xx_fix.
(put_thumb2_insn): New function.
(STM32L4XX_ERRATUM_LDM_VENEER_SIZE): Define. Size of a veneer for
LDM instructions.
(STM32L4XX_ERRATUM_VLDM_VENEER_SIZE): Define. Size of a veneer for
VLDM instructions.
(bfd_elf32_arm_allocate_interworking_sections): Initialise erratum
glue section.
(record_stm32l4xx_erratum_veneer) : New function. Create a single
veneer, and its associated symbols.
(bfd_elf32_arm_add_glue_sections_to_bfd): Add STM32L4XX erratum glue.
(bfd_elf32_arm_set_stm32l4xx_fix): New function. Set the type of
erratum workaround required.
(bfd_elf32_arm_stm32l4xx_fix_veneer_locations): New function. Find
out where veneers and branches to veneers have been placed in
virtual memory after layout.
(is_thumb2_ldmia): New function.
(is_thumb2_ldmdb): Likewise.
(is_thumb2_vldm ): Likewise.
(stm32l4xx_need_create_replacing_stub): New function. Decide if a
veneer must be emitted.
(bfd_elf32_arm_stm32l4xx_erratum_scan): Scan the sections of an
input BFD for potential erratum-triggering insns. Record results.
(bfd_elf32_arm_set_target_relocs): Set stm32l4xx_fix field in
global hash table.
(elf32_arm_size_dynamic_sections): Collect glue information.
(create_instruction_branch_absolute): New function.
(create_instruction_ldmia): Likewise.
(create_instruction_ldmdb): Likewise.
(create_instruction_mov): Likewise.
(create_instruction_sub): Likewise.
(create_instruction_vldmia): Likewise.
(create_instruction_vldmdb): Likewise.
(create_instruction_udf_w): Likewise.
(create_instruction_udf): Likewise.
(push_thumb2_insn32): Likewise.
(push_thumb2_insn16): Likewise.
(stm32l4xx_fill_stub_udf): Likewise.
(stm32l4xx_create_replacing_stub_ldmia): New function. Expands the
replacing stub for ldmia instructions.
(stm32l4xx_create_replacing_stub_ldmdb): Likewise for ldmdb.
(stm32l4xx_create_replacing_stub_vldm): Likewise for vldm.
(stm32l4xx_create_replacing_stub): New function. Dispatches the
stub emission to the appropriate functions.
(elf32_arm_write_section): Output veneers, and branches to veneers.
ld * ld.texinfo: Description of the STM32L4xx erratum workaround.
* emultempl/armelf.em (stm32l4xx_fix): New.
(arm_elf_before_allocation): Choose the type of fix, scan for
erratum.
(gld${EMULATION_NAME}_finish): Fix veneer locations.
(arm_elf_create_output_section_statements): Propagate
stm32l4xx_fix value.
(PARSE_AND_LIST_PROLOGUE): Define OPTION_STM32L4XX_FIX.
(PARSE_AND_LIST_LONGOPTS): Add entry for handling
--fix-stm32l4xx-629360.
(PARSE_AND_LIST_OPTION): Add entry for helping on
--fix-stm32l4xx-629360.
(PARSE_AND_LIST_ARGS_CASES): Treat OPTION_STM32L4XX_FIX.
tests * ld-arm/arm-elf.exp (armelftests_common): Add STM32L4XX
tests.
* ld-arm/stm32l4xx-cannot-fix-far-ldm.d: New.
* ld-arm/stm32l4xx-cannot-fix-far-ldm.s: Likewise.
* ld-arm/stm32l4xx-cannot-fix-it-block.d: Likewise.
* ld-arm/stm32l4xx-cannot-fix-it-block.s: Likewise.
* ld-arm/stm32l4xx-fix-all.d: Likewise.
* ld-arm/stm32l4xx-fix-all.s: Likewise.
* ld-arm/stm32l4xx-fix-it-block.d: Likewise.
* ld-arm/stm32l4xx-fix-it-block.s: Likewise.
* ld-arm/stm32l4xx-fix-ldm.d: Likewise.
* ld-arm/stm32l4xx-fix-ldm.s: Likewise.
* ld-arm/stm32l4xx-fix-vldm.d: Likewise.
* ld-arm/stm32l4xx-fix-vldm.s: Likewise.
This fixes two problems. First, the --sysroot option wasn't available
with a ld configured without --with-sysroot, a historical accident.
This led to people configuring binutils with --with-sysroot=/ in order
to enable sysroot support, which exposes a case where ld wrongly
prepends the sysroot to a relative path.
PR ld/18992
* ldmain.c (main): Always enable --sysroot.
* emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Don't
prepend sysroot to relative rpath/runpath.
Sometimes it may be of benefit to force use of the __tls_get_addr_opt
call stub even when the glibc being used during linking does not
advertise __tls_get_addr_opt.
bfd/
* elf64-ppc.h (struct ppc64_elf_params <tls_get_addr_opt>): Rename
from no_tls_get_addr_opt.
* elf64-ppc.c: Update for rename and inversion of tls_get_addr_opt.
(ppc64_elf_tls_setup): Set tls_get_addr_opt to 0 only when at
default of -1.
ld/
* emultempl/ppc64elf.em (params): Init tls_get_addr_opt field to -1.
(OPTION_TLS_GET_ADDR_OPT): Define.
(PARSE_AND_LIST_LONGOPTS): Handle --tls-get-addr-opt.
(PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Likewise.
* ld.texinfo: Document --tls-get-addr-optimize and
--no-tls-get-addr-optimize.
All programs in binutils+gdb git repo now support gABI compression
with the SHF_COMPRESSED bit. This patch makes the zlib-gabi option
as compression default for gas, gold, ld and objcopy, instead of the
zlib-gnu option whose outputs are incompatible with gABI.
binutils/
* objcopy.c (copy_file): Set BFD_COMPRESS_GABI if not
zlib-gnu.
* doc/binutils.texi: Change --compress-debug-sections and
--compress-debug-sections=zlib to zlib-gabi.
binutils/testsuite/
* binutils-all/compress.exp: Update.
gas/
* as.c (parse_args): Make --compress-debug-sections and
--compress-debug-sections=zlib the same as
--compress-debug-sections=zlib-gabi.
* doc/as.texinfo: Change --compress-debug-sections and
--compress-debug-sections=zlib to zlib-gabi.
gold/
* compressed_output.cc (Output_compressed_section::set_final_data_size):
Make --compress-debug-sections=zlib the same as
--compress-debug-sections=zlib-gabi.
* testsuite/Makefile.am (flagstest_compress_debug_sections.check):
Expect ".debug_.*" with the SHF_COMPRESSED bit, instead of
".zdebug_".
* testsuite/Makefile.in: Regenerated.
ld/
* emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Make
--compress-debug-sections=zlib the same as
--compress-debug-sections=zlib-gabi.
* ld.texinfo: Change --compress-debug-sections=zlib to zlib-gabi.
ld/testsuite/
* ld-elf/zlibbegin.rS: Updated to .debug_.* with the
SHF_COMPRESSED bit.
* ld-elf/zlibnormal.rS: Likewise.
PR ld/18466
* emultempl/pe.em (pe_find_data_imports): Generate an error if a
symbol name is too long to handle.
* emultempl/pep.em (pep_find_data_imports): Likewise.
gas * config/tc-msp430.c (MAX_OP_LEN): Increase to 4096.
(msp430_make_init_symbols): New function.
(msp430_section): Call it.
(msp430_frob_section): Likewise.
ld * emulparams/msp430elf.sh (TEMPLATE_NAME): Change to msp430.
* scripttempl/msp430.sc (.text): Add .lower.text and .either.text.
(.data): Add .lower.data and .either.data.
(.bss): Add .lower.bss and .either.bss.
(.rodata): Add .lower.rodata and .either.rodata.
* emultempl/msp430.em: New file. Implements a new orphan
placement algorithm that divides sections between lower and upper
memory regions.
* Makefile.am (emsp430elf.c): Depend upon msp430.em.
*emsp430X.c): Likewise.
* Makefine.in: Regenerate.
Taking them out showed a bug in the powerpc64 backend with .branch_lt
being removed from output_bfd but not from previously set up segment
section maps. Removing the bfd sections meant their sh_flags (and
practically everything else) remaining zero, ie. not SHF_ALLOC,
triggering complaints about "`.branch_lt' can't be allocated in
segment".
include/elf/
* internal.h (ELF_SECTION_IN_SEGMENT_1): Ensure PT_LOAD and
similar segments only contain alloc sections.
ld/
* emultempl/ppc64elf.em (gld${EMULATION_NAME}_after_allocation):
Call gld${EMULATION_NAME}_map_segments regardless of need_laying_out.
ld/testsuite/
* ld-powerpc/tocnovar.d: Revert last change.
This patch adds --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi]
to ld for ELF targets to support generating compressed DWARF debug
sections. We always generate .zdebug_* section since section names have
been finalized and they can't be changed easily when compression is
being performed.
bfd/
* bfd-in.h (compressed_debug_section_type): New.
* compress.c (bfd_compress_section_contents): Add an argument
for linker write compression and always generate .zdebug_*
section when linking.
(bfd_init_section_compress_status): Pass FALSE to
bfd_compress_section_contents.
(bfd_compress_section): New function.
* elf.c (elf_fake_sections): For linking, set SEC_ELF_COMPRESS
on DWARF debug sections if COMPRESS_DEBUG is set and rename
section if COMPRESS_DEBUG_GABI_ZLIB isn't set.
(assign_file_positions_for_non_load_sections): Set sh_offset
to -1 if SEC_ELF_COMPRESS is set.
(assign_file_positions_except_relocs): Likwise.
(_bfd_elf_assign_file_positions_for_relocs): Renamed to ...
(_bfd_elf_assign_file_positions_for_non_load): This. Change
return time to bfd_boolean. Compress the section if
SEC_ELF_COMPRESS is set.
(_bfd_elf_write_object_contents): Updated.
(_bfd_elf_set_section_contents): Write section contents to
the buffer if SEC_ELF_COMPRESS is set.
* merge.c: Include "elf-bfd.h".
(sec_merge_emit): Add arguments for contents and offset. Write
to contents with offset if contents isn't NULL.
(_bfd_write_merged_section): Write section contents to the
buffer if SEC_ELF_COMPRESS is set. Pass contents and
output_offset to sec_merge_emit.
* elflink.c (bfd_elf_final_link): Allocate the buffer for
output section contents if SEC_ELF_COMPRESS is set.
* section.c (SEC_ELF_COMPRESS): New.
* bfd-in2.h: Regenerated.
gas/
* as.h (compressed_debug_section_type): Removed.
include/
* bfdlink.h (bfd_link_info): Add compress_debug.
ld/
* ld.texinfo: Document --compress-debug-sections=.
* ldmain.c (main): Set BFD_COMPRESS on output_bfd if
COMPRESS_DEBUG is set. Set BFD_COMPRESS_GABI on output_bfd
for COMPRESS_DEBUG_GABI_ZLIB.
* lexsup.c (elf_static_list_options): Add
--compress-debug-sections=.
* emultempl/elf32.em (OPTION_COMPRESS_DEBUG): New.
(xtra_long): Add "compress-debug-sections".
(gld${EMULATION_NAME}_handle_option): Handle
OPTION_COMPRESS_DEBUG.
ld/testsuite/
* ld-elf/compress.exp (build_tests): Add tests for
--compress-debug-sections=.
(run_tests): Likewise.
Add additonal tests for --compress-debug-sections=.
* ld-elf/gabiend.rt: New file.
* ld-elf/gabinormal.rt: Likewise.
* ld-elf/gnubegin.rS: Likewise.
* ld-elf/gnunormal.rS: Likewise.
* ld-elf/zlibbegin.rS: Likewise.
* ld-elf/zlibnormal.rS: Likewise.
This is a linker-only solution to the incompatibility between shared
library protected visibility variables and using .dynbss and copy
relocs for non-PIC access to shared library variables.
bfd/
* elf32-ppc.c (struct ppc_elf_link_hash_entry): Add has_addr16_ha
and has_addr16_lo. Make has_sda_refs a bitfield.
(ppc_elf_check_relocs): Set new flags.
(ppc_elf_link_hash_table_create): Update default_params.
(ppc_elf_adjust_dynamic_symbol): Clear protected_def in cases
where we won't be making .dynbss entries or editing code. Set
params->pic_fixup when we'll edit code for protected var access.
(allocate_dynrelocs): Allocate got entry for edited code and
discard dyn_relocs.
(struct ppc_elf_relax_info): Add picfixup_size.
(ppc_elf_relax_section): Rename struct one_fixup to struct
one_branch_fixup. Rename fixups to branch_fixups. Size space for
pic fixups.
(ppc_elf_relocate_section): Edit non-PIC accessing protected
visibility variables to PIC. Don't emit dyn_relocs for code
we've edited.
* elf32-ppc.h (struct ppc_elf_params): Add pic_fixup.
ld/
* emultempl/ppc32elf.em: Handle --no-pic-fixup.
(params): Init new field.
(ppc_before_allocation): Enable relaxation for pic_fixup.
Some early revisions of the Cortex-A53 have an erratum (843419). The
details of the erratum are quite complex and involve dynamic
conditions. For the purposes of the workaround we have simplified the
static conditions to an ADRP in the last two instructions of a 4KByte
page, followed within four instructions by a load/store dependent on
the ADRP.
This patch adds support to conservatively scan for and workaround
Cortex A53 erratum 843419. There are two different workaround
strategies used. The first is to rewrite ADRP instructions which form
part of an erratum sequence with an ADR instruction. In situations
where the ADR provides insufficient offset the dependent load or store
instruction from the sequence is moved to a stub section and branches
are inserted from the original sequence to the relocated instruction
and back again.
Stub section sizes are rounded up to a multiple of 4096 in order to
ensure that the act of inserting work around stubs does not create
more errata sequences.
Workaround stubs are always inserted into the stub section associated
with the input section containing the erratum sequence. This ensures
that the fully relocated form of the veneered load store instruction
is available at the point in time when the stub section is written.
Older compilers that warn wrongly will just need -Wno-error. No way
am I going to init every single field, then have to edit this code
whenever bfd_link_hash_entry changes. Another option, making the
struct static, isn't very nice since it means larger binaries and
worse code.
* emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation): Don't
init ehdr_start_save.
The ehdr_start_save variable does not need to be initialized. However,
not initializing it will trigger a compiler warning when using older
versions of GCC. Self-assignment unfortunately doesn't work for Clang
as Clang has a warning similar to -Winit-self as part of -Wall.
* emultempl/elf32.em (gld*_before_allocation): Zero-initialize
the ehdr_start_save variable.
bfd * elf32-v850.c (v850_set_note): New function. Creates a Renesas
style note entry.
(v850_elf_make_note_section): New function. Creates a note
section.
(v850_elf_create_sections): New function. Create a note section
if one is not already present.
(v850_elf_set_note): New function. Adds a note to a bfd.
(v850_elf_copy_private_bfd_data): New function. Copies V850
notes.
(v850_elf_merge_notes): New function. Merges V850 notes.
(print_v850_note): New function. Displays a V850 note.
(v850_elf_print_notes): New function. Displays all notes attached
to a bfd.
(v850_elf_merge_private_bfd_data): Call v850_elf_merge_notes.
(v850_elf_print_private_bfd_data): Call v850_elf_print_notes.
(v850_elf_fake_sections): Set the type of the V850 note section.
* bfd-in.h (v850_elf_create_sections): Add prototype.
(v850_elf_set_note): Add prototype.
* bfd-in2.h: Regenerate.
binutils* readelf.c (get_machine_flags): Remove deprecated V850 machine
flags.
(get_v850_section_type_name): New function. Handles V850 special
sections.
(get_section_type_name): Add support for V850.
(get_v850_elf_note_type): New function. Returns the name of a
V850 note.
(print_v850_note): New function. Prints a V850 note.
(process_v850_notes): New function. Prints V850 notes.
(process_note_sections): Add support for V850.
binutils/testsute
* binutils-all/objcopy.exp: Skip the strip-10 test for the V850.
gas * config/tc-v850.c (soft_float): New variable.
(v850_data_8): New variable.
(md_show_usage): Add -msoft-float/-mhard-float.
(md_parse_option): Likewise.
(md_begin): Set the default value of soft_float.
(v850_md_end): New function. Creates a note section.
* config/tc-v850.h (md_end): Define.
* doc/c-v850.texi: Document -msoft-float/-mhard-float.
gas/testsuite
* gas/elf/elf.exp: Add special version of the section2 test for
the V850.
* gas/elf/section2.e-v850: New file.
include/elf
* v850.h (EF_RH850_SIMD): Delete deprecated flag.
(EF_RH850_CACHE): Likewise.
(EF_RH850_MMU): Likewise.
(EF_RH850_DATA_ALIGN8): Likewise.
(SHT_RENESAS_IOP): Fix typo in name.
(SHT_RENESAS_INFO): Define.
(V850_NOTE_SECNAME): Define.
(SIZEOF_V850_NOTE): Define.
(V850_NOTE_NAME): Define.
(enum v850_notes): New enum.
(NUM_V850_NOTES): Define.
ld/ChangeLog
2015-02-24 Nick Clifton <nickc@redhat.com>
* Makefile.am (ev850.c): Add dependency upon
$(srcdir)/emultempl/v850elf.em.
(ev850_rh850.c): Likewise.
* Makefile.in: Regenerate.
* emultempl/v850elf.em: New file.
* emulparams/v850.sh (EXTRA_EM_FILE): Define.
* emulparams/v850_rh850.sh (EXTRA_EM_FILE): Define.
* scripttempl/v850.sc: Add .note.renesas section.
* scripttempl/v850_rh850.sc: Likewise.
ld/testsuite
* ld-elf/extract-symbol-1sec.d: Expect to fail on the V850.
Moving .toc out of .got caused us to lose toc sorting and multi-toc
support.
* emultempl/ppc64elf.em (toc_section_name): New var.
(ppc_after_open): Set it.
(ppc_before_allocation): Use it.
(gld${EMULATION_NAME}_after_allocation): Here too.
The changes to reorder sections for better relro protection on powerpc64,
3e2b0f31, 23283c1b, and 5ad18f16, run into a problem with xlc.
xlc -qdatalocal puts global variables into .toc, which means that .toc
must be writable. The simplest way to accomplish this is to edit the
linker script to remove .toc sections from .got on detecting xlc object
files.
bfd/
* elf64-ppc.h (struct ppc64_elf_params): Add "object_in_toc".
* elf64-ppc.c (ppc64_elf_add_symbol_hook): Assume that global symbols
in .toc indicate xlc compiled code that might require a rw .toc.
ld/
* emulparams/elf64ppc.sh (INITIAL_READWRITE_SECTIONS): Define.
* emultempl/ppc64elf.em (params): Init new field.
(ppc_after_open): New function.
(LDEMUL_AFTER_OPEN): Define.
* ldlang.c (lang_final): Whitespace fix.
ld/testsuite/
* ld-powerpc/tocvar.d, * ld-powerpc/tocvar.s: New test.
* ld-powerpc/tocnovar.d, * ld-powerpc/tocnovar.s: New test.
* ld-powerpc/powerpc.exp: Run tocvar and tocnovar.
If no object files have .eh_frame, but some shared library does, then
ld creates a .eh_frame_hdr section using the shared library bfd. This
is silly since shared library .eh_frame sections don't contribute to
the output .eh_frame and thus no .eh_frame_hdr is needed.
Also, the bfd section list and count is cleared for shared libraries,
and a zero section count used as a flag in lang_check to omit a call
to bfd_merge_private_bfd_data for shared libraries. If we create a
section on a shared lib bfd then ld will wrongly attempt to merge the
shared library private bfd data.
PR 17742
* ld/emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Exclude
shared libraries in loop looking for .eh_frame sections.
Similarly for build-id loop.
The AVR target has an elf header flag to indicate if an object was
assembler ready for linker relaxation. If a partial link is performed
then it is important that the link-relax flag in the output object is
set correctly, otherwise, during the final link, we might try to perform
linker relaxation on code that was not assembled suitably.
As the link-relax elf header covers the entire object file we must be
conservative when setting the flag in the output object, so, for a
partial link, any input object that does not have the link-relax flag
set will cause the output object to also not have the link-relax flag
set.
This conservative approach could be softened in future, we only need to
disable the link relax flag if an input file is not marked link-relax
ready, and the input file contains a relaxable section. However, I've
left this optimisation for a later day.
For the final link I've overloaded the use of the link-relax elf header
flag, in a final executable, the flag now indicates if the executable
was built with linker relaxation on or not.
ld/ChangeLog:
* emultempl/avrelf.em: Add include of elf/avr.h.
(avr_finish): New function.
(LDEMUL_FINISH): Added.
ld/testsuite/ChangeLog:
* ld-avr/relax-elf-flags-01.d: New file.
* ld-avr/relax-elf-flags-02.d: New file.
* ld-avr/relax-elf-flags-03.d: New file.
* ld-avr/relax-elf-flags-04.d: New file.
* ld-avr/relax-elf-flags-05.d: New file.
* ld-avr/relax-elf-flags-06.d: New file.
* ld-avr/relax-elf-flags-07.d: New file.
* ld-avr/relax-elf-flags-08.d: New file.
* ld-avr/relax-elf-flags-a.s: New file.
* ld-avr/relax-elf-flags-b.s: New file.
Alignment of plt stubs was broken, firstly because the option was
being dropped due to the alignment value not being set in the "params"
struct used in elf64-ppc.c, and secondly due to not calculating the
number of alignment boundary crossings correctly.
bfd/
* elf64-ppc.c (plt_stub_pad): Correct.
ld/
* ld.texinfo: Correct --plt-align documentation.
* emultempl/ppc64elf.em (plt_stub_align): Delete. Use and set
params.plt_stub_align instead.
2014-10-22 Tejas Belagod <tejas.belagod@arm.com>
bfd/
* bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter.
* bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise.
* elfnn-aarch64.c (aarch64_erratum_835769_stub): New.
(elf_aarch64_stub_type): Add new type
aarch64_stub_erratum_835769_veneer.
(elf_aarch64_stub_hash_entry): New fields for erratum 835769.
(aarch64_erratum_835769_fix): New data struct to record erratum
835769.
(elf_aarch64_link_hash_table: Global flags for 835769.
(aarch64_build_one_stub): Add case for 835769.
(aarch64_size_one_stub): Likewise.
(aarch64_mem_op_p, aarch64_mlxl_p,
aarch64_erratum_sequence,erratum_835769_scan):
New. Decode and scan functions for erratum 835769.
(elf_aarch64_create_or_find_stub_sec): New.
(elfNN_aarch64_size_stubs): Look for erratum 835769 and record
them.
(bfd_elfNN_aarch64_set_options: Set global flag for 835769.
(erratum_835769_branch_to_stub_data,
make_branch_to_erratum_835769_stub):New. Connect up all the
erratum stubs to occurances by branches.
(elfNN_aarch64_write_section): New hook.
(aarch64_map_one_stub): Output erratum stub symbol.
(elfNN_aarch64_size_dynamic_sections): Init mapping symbol
information for erratum 835769.
(elf_backend_write_section): Define.
ld/
* emultempl/aarch64elf.em: Add command-line option for erratum
835769.
ld/testsuite/
* ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum
835769 tests.
* ld-aarch64/erratum835769.d: New.
* ld-aarch64/erratum835769.s: New.
For binary ouput, we don't have an ELF bfd output so can't access
elf_elfheader. The elf64-ppc.c changes are really just a tidy,
triggered by looking at all places where the abiversion bits are
accessed.
bfd/
* elf64-ppc.c (ppc64_elf_before_check_relocs): Do .opd processing
even when output is not ppc64 ELF. Remove redundant tests on
type of input bfd.
ld/
PR 17488
* emultempl/ppc64elf.em (gld${EMULATION_NAME}_finish): Don't attempt
to access ELF header e_flags when not ppc64 ELF output.
Refactor each relaxation pattern to raise the maintainability.
In origin, all patterns is analysed in nds32_elf_relax_section,
so it is hard to debug and maintain. Therefore, we classify all
patterns into different functions in this patch.
Moreover, we adjust all optimizations into nds32_elf_relax_section
to take these optimizations in turn. This can promise all relaxation
being done after calling gld${EMULATION_NAME}_after_allocation.
The section name used to store the build-id on pe/coff is arbitrary, as it's
contents should be located using the pe/coff header's DataDirectory debug data
entry, not by using the section name.
But '.build-id' is not a good choice for that section name, as it is 9
characters long, and hence truncated to 8 characters when
--disable-long-section-names is used (which is the default, when producing an
executable with no dwarf debug sections, e.g. using ld --strip-all --build-id)
This truncation then breaks 'objcopy --only-keep-debug', which does use the
section name, due to concerns that keeping an arbitrary section which contains
the debug directory is not sensible.
binutils/ChangeLog
2014-09-01 Jon TURNEY <jon.turney@dronecode.org.uk>
* objcopy.c (is_nondebug_keep_contents_section): Change pe/coff
build-id section name from '.build-id' to '.buildid'.
ld/ChangeLog
2014-09-01 Jon TURNEY <jon.turney@dronecode.org.uk>
* emultempl/pe.em (write_build_id, setup_build_id): Change pe/coff
build-id section name from '.build-id' to '.buildid'.
* emultempl/pep.em (write_build_id, setup_build_id): Ditto.
Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk>
I noticed recently that .eh_frame FDEs generated by the linker for
call stubs and .glink weren't being indexed in .eh_frame_hdr, due to
bfd_elf_discard_info being run before the linker generated .eh_frame
sections were available for parsing. This patch moves code around in
elf64-ppc.c and ppc64elf.em to avoid that problem.
Another problem fixed here is that --gc-sections parses .eh_frame
early, and the existing machinery allows only one go at parsing the
.eh_frame sections. That resulted in the linker generated .eh_frame
CIEs not being merged and no .eh_frame_hdr index entries for those
FDEs. It turns out that all the info from parsing .eh_frame is
attached to the section, so order of parsing isn't important, and
after parsing sec_info_type being set will prevent a section being
parsed again. At least, when parsing doesn't hit an error. So there
isn't really any need for "parsed_eh_frame". "merge_cies" is also
redundant, which means _bfd_elf_{begin,end}_eh_frame_parsing can also
disappear.
bfd/
* elf-bfd.h (struct eh_frame_hdr_info): Delete merge_cies and
parsed_eh_frames.
(_bfd_elf_begin_eh_frame_parsing): Delete.
(_bfd_elf_end_eh_frame_parsing): Delete.
* elf-eh-frame.c (_bfd_elf_begin_eh_frame_parsing): Delete.
(_bfd_elf_end_eh_frame_parsing): Delete.
(_bfd_elf_parse_eh_frame): Don't test parsed_eh_frame. Test
!info->relocatable in place of merge_cies.
* elflink.c (bfd_elf_gc_sections, bfd_elf_discard_info): Adjust.
* elf64-ppc.c (glink_eh_frame_cie): Pad to multiple of 8.
(ppc64_elf_size_stubs): Likewise pad stub FDE.
(ppc64_elf_build_stubs): Move code setting glink .eh_frame to..
(ppc64_elf_size_stubs): ..here and..
(ppc64_elf_finish_dynamic_sections): ..here.
ld/
* emultempl/ppc64elf.em (gld${EMULATION_NAME}_after_allocation): Call
bfd_elf_discard_info after generating glink .eh_frame. Delete
redundant test on ppc64_elf_setup_section_lists status.
addresses outside of the 32-bit range before memory exhaustion. This
results in a higher entropy implementation of ASLR when used with the
DYNAMIC_BASE flag.
* include/coff/pe.h: Add HIGH_ENTROPY_VA flag
* ld/emultempl/pep.em: Add --high-entropy-va switch
* ld/ld.texinfo: Document the --high-entropy-va switch
Presents .eh_frame input sections to the optimisation machinery in
elf-eh-frame.c in the order they are given by the linker script.
PR 16563
bfd/
* elflink.c (bfd_elf_discard_info): Process .eh_frame and .stab
in the order they are mapped to output sections.
ld/
* ldlang.c (map_head_is_link_order): Rename from
stripped_excluded_sections.
(lang_clear_os_map): New function, extracted from..
(strip_excluded_output_sections): ..here.
* ldlang.h (lang_clear_os_map): Declare.
* ldwrite.c (ldwrite): Call lang_clear_os_map.
* emultempl/sh64elf.em (sh64_elf_${EMULATION_NAME}_after_allocation):
Likewise.
is_inconsistent_linkonce_section makes an assumption that section name
that starts with ".gnu.linkonce.prop." has one more dot in its suffix.
However gas generates such section name by insertion of "prop." right
after ".gnu.linkonce." part of the name of the original section. So, for
section named ".gnu.linkonce.this_module" corresponding property section
name does not satisfy the assumption. Such section names are common in
linux modules. This bug was exposed by the patch "a35d5e8 Fix alignment
for the first section frag on xtensa", that makes gas produce property
section for each section that has ".align" directive in it.
Use suffix that immediately follows ".gnu.linkonce.prop." when there are
no more dots following it.
2014-07-10 Max Filippov <jcmvbkbc@gmail.com>
ld/
* emultempl/xtensaelf.em (is_inconsistent_linkonce_section):
correctly handle missing dot in section name after
".gnu.linkonce.prop.".
The undefined function symbols (with non-zero value) on global entry
stubs are discarded by objdump when disassembling, so give objdump
another symbol to mark the stubs.
Also fixes a couple of bugs:
- entry_section was set to .opd for ELFv2, which meant a hard error
rather than a warning when _start wasn't defined.
- global entry stubs were not built if they were the only type of
stub in an executable.
bfd/
* elf64-ppc.c (ppc_stub_type): Add ppc_stub_global_entry.
(struct ppc_link_hash_table): Increase size of stub_count array.
(build_global_entry_stubs): Emit symbol on global entry stub.
(ppc64_elf_build_stubs): NULL check htab->brlt. Add global entry
stub stats.
ld/
* emultempl/ppc64elf.em (stub_added): Delete.
(gld${EMULATION_NAME}_finish): Call ppc64_elf_build_stubs even when
none of the usual stubs have been added. Only change entry_section
for ELFv1.
inserted. This is for compatibility with other, non-GNU tools. Deterministic
binaries can still be created by using the new --no-insert-timestamp command line
option.
* emultempl/pe.em: Initialise insert_timestamp to true.
Add a --no-insert-timestamp command line option.
* emultempl/pep.em: Likewise.
* ld.texinfo: Document that --insert-timestamp is enabled by
default and that it now has an inverse command line option.
* NEWS: Mention the new behaviour.
1) _SDA_BASE_ and _SDA2_BASE_ and defined automatically, in a similar
manner to the way _GLOBAL_OFFSET_TABLE_ is handled. It's a little
more complicated to remove the symbols because _SDA_BASE_ needs to
be there if either .sdata or .sbss is present, and similarly for
_SDA2_BASE.
2) The linker created .sdata and .sdata2 sections used for
R_PPC_EMB_SDAI16 and R_PPC_EMB_SDA2I16 pointers are created early.
Nowadays we strip unneeded sections from the output, so it isn't
necessary to delay creating the sections.
3) The output section for targets of various SDA relocs is now checked
as per the ABI(s). We previously allowed .sdata.foo and similar,
most likely because at some stage we were checking input sections.
Also, the patch fixes a long-standing bug in size_input_sections
that affects the values of symbols defined in stripped input
sections.
PR 16952
bfd/
* elf32-ppc.c (ppc_elf_create_linker_section): Move earlier.
Remove redundant setting of htab->elf.dynobj. Don't align.
Define .sdata symbols using _bfd_elf_define_linkage_sym.
(ppc_elf_create_glink): Call ppc_elf_create_linker_section.
(create_sdata_sym): Delete.
(elf_allocate_pointer_linker_section): Rename from
elf_create_pointer_linker_section. Align section.
(ppc_elf_check_relocs): Don't call ppc_elf_creat_linker_section
directly here, or create_sdata_sym. Set ref_regular on _SDA_BASE_
and _SDA2_BASE_.
(ppc_elf_size_dynamic_sections): Remove ATTRIBUTE_UNUSED on param.
Remove unnecessary tests on _SDA_BASE_ sym.
(maybe_strip_sdasym, ppc_elf_maybe_strip_sdata_syms): New functions.
(ppc_elf_relocate_section): Tighten SDA reloc symbol section checks.
* elf32-ppc.h (ppc_elf_set_sdata_syms): Delete.
(ppc_elf_maybe_strip_sdata_syms): Declare.
ld/
* emulparams/elf32ppccommon.sh (_SDA_BASE_, _SDA2_BASE_): Delete.
* emultempl/ppc32elf.em (ppc_before_allocation): Call
ppc_elf_maybe_strip_sdata_syms.
* ldlang.c (size_input_section): Correct output_offset value
for excluded input sections.
ld/
* emultempl/alphaelf.em (alpha_after_parse): Enable 2 relax passes.
bfd/
* elf64-alpha.c (elf64_alpha_size_got_sections): New may_merge
parameter; honor it and disable got merging when false.
(elf64_alpha_relax_got_load): Do not relax to GPREL relocs during
the first pass of relaxation.
(elf64_alpha_relax_with_lituse): Likewise. Move relaxed relocs to
the end of the LITERAL+LITUSE chain.
(elf64_alpha_relax_section): Only process LITERAL relocs during the
second pass of relaxation.
I got the ppc476 workaround wrong. bctr (and bctrl) as the last
instruction in a page can hit the icache bug if the preceding mtctr
insn is close by, and the destination is in the first few instructions
on the next page. This scenario can occur with code generated by gcc
to implement switch statements, or in code generated to call by
function pointer.
To prevent the bctr problem it is also necessary to remove other
instructions that otherwise would be safe.
bfd/
* elf32-ppc.c (ppc_elf_relocate_section): Remove bctr from list
of safe ppc476 insns at end of page. Also remove non-branch insns.
Expand comments.
ld/
* emultempl/ppc32elf.em (no_zero_padding, ppc_finish): New functions.
(LDEMUL_FINISH): Define.
would not honour the [no]execstack. Fully linked binaries use a special segment to indicate the
state of the stack, but relocatable object files only have sections, and .note.GNU-stack was not
being created.
* emultempl/elf32.em (_after_open): Create a .note.GNU-stack
section when performing a relocatable link with -z [no]execstack
specified.
For libraries without a soname, -l:libfoo.so set DT_NEEDED to the search
dir plus filename, while gold and -lfoo just use the filename. This
patch fixes the inconsistency.
* ldlang.h (full_name_provided): New input flag.
* ldlang.c (new_afile): Don't use lang_input_file_is_search_file_enum
for -l:namespec. Instead use lang_input_file_is_l_enum with
full_name_provided flag.
* ldlfile.c (ldfile_open_file_search): Don't complete lib name if
full_name_provided flag is set.
* emultempl/elf32.em (gld${EMULATION_NAME}_open_dynamic_archive):
Handle full_name_provided libraries. Tidy EXTRA_SHLIB_EXTENSION
support. Set DT_NEEDED for -l:namespec as namespec.
* emultempl/aix.em (ppc_after_open_output): Handle full_name_provided.
* emultempl/linux.em (gld${EMULATION_NAME}_open_dynamic_archive):
Don't handle full_name_provided libraries.
* emultempl/pe.em (gld${EMULATION_NAME}_open_dynamic_archive): Ditto.
* emultempl/pep.em (gld${EMULATION_NAME}_open_dynamic_archive): Ditto.
* emultempl/vms.em (gld${EMULATION_NAME}_open_dynamic_archive): Ditto.
Enabled via the use of a new linker command line option: --long-plt.
* bfd-in.h: Add export of bfd_elf32_arm_use_long_plt.
* bfd-in2.h: Regenerate.
* elf32-arm.c (elf32_arm_plt_entry_long): New array.
(elf32_arm_link_hash_table_create): Set plt_entry_size to 16 if
using long PLT entries.
(bfd_elf32_arm_use_long_plt): New function.
(elf32_arm_populate_plt_entry): Add support for long PLT entries.
* emultempl/armelf.em (OPTION_LONG_PLT): Define.
(PARSE_AND_LIST_LONGOPTS): Add long-plt.
(PARSE_AND_LIST_OPTIONS): Likewise.
(PARSE_AND_LIST_ARGS_CASES): Handle long-plt.
* ld.texinfo: Document --long-plt.
* ld-arm/long-plt-format.s: New test case.
* ld-arm/long-plt-format.d: Expected disassembly.
* ld-arm/arm-elf.exp: Run the new test.
The manifest is necessary in order for the linked binaries to be executed in a Windows 8 environment.
The manifest is added using a linker script so that this feature will be compiler-neutral. The resource
merging code in the linker means that if an application provides its own manifest then the default
manifest will be ignored.
* configure.in (all_emul_extra_binaries): New variable. Populated
by invoking configure.tgt.
(EMUL_EXTRA_BINARIES): New substitution.
* configure: Regenerate.
* configure.tgt (target_extra_binaries): New variable. Set to
default-manifest.o for Cygwin and MinGW targets.
* Makefile.am (EMUL_EXTRA_BINARIES): New variable. Initialised
by the configure script.
(ALL_EMUL_EXTRA_BINARIES): New variable.
(default-manifest.o): New rule to build the default manifest.
(ld_new_DEPENDENCIES): Add EMUL_EXTRA_BINARIES.
(install-data-local): Add EMUL_EXTRA_BINARIES.
* Makefile.in: Regenerate.
* ld.texinfo: Document default manifest support.
* emulparams/i386pe.sh (DEFAULT_MANIFEST): Define.
* emulparams/i386pep.sh (DEFAULT_MANIFEST): Define.
* emultempl/default-manifest.rc: New file.
* scripttempl/pe.sc (R_RSRC): Include DEFAULT_MANIFEST, if defined.
* scripttempl/pep.sc (R_RSRC): Likewise.
* ld-pe/longsecn-1.d: Allow for extra sections.
* ld-pe/longsecn-2.d: Likewise.
* ld-pe/longsecn.d: Likewise.
* ld-pe/secrel.d: Likewise.
5446cbdf82 broke powerpc-lynxos,
powerpc-netware, powerpc-windiss and powerpc-vxworks.
bfd/
* elf32-ppc.c (ppc_elf_link_hash_table_create): Provide default
params for targets that don't use ppc32elf.em.
ld/
* emulparams/elf32ppcvxworks.sh: Source plt_unwind.sh and
use ppc32elf.em.
* emultempl/ppc32elf.em (ppc_after_open): Don't compile for
vxworks.
(LDEMUL_AFTER_OPEN): Don't set for vxworks.
(PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Exclude
-secure-plt, -bss-plt and -sdata-got when vxworks.
This patch allows the user to override powerpc64-ld's default for
providing linker generated register save and restore functions as used
by gcc -Os code. Normally these are not provided by ld -r, so Linux
kernel modules have needed to include their own copies.
bfd/
* elf64-ppc.h (struct ppc64_elf_params): Add save_restore_funcs.
* elf64-ppc.c (ppc64_elf_func_desc_adjust): Use it to control
provision of out-of-line register save/restore routines.
ld/
* emultempl/ppc64elf.em (params): Init new field.
(ppc_create_output_section_statements): Set params.save_restore_funcs
default.
(PARSE_AND_LIST_*): Add support for --save-restore-funcs and
--no-save-restore-funcs.
Moves assorted variables used to communicate between ld and bfd into
a struct, hooks it into the bfd link_hash_table early, and removes
all other places where such variables were passed piecemeal.
bfd/
* elf64-ppc.h (struct ppc64_elf_params): Define.
(ppc64_elf_init_stub_bfd, ppc64_elf_edit_opd, ppc64_elf_tls_setup,
ppc64_elf_setup_section_lists, ppc64_elf_size_stubs,
ppc64_elf_build_stubs): Update prototype.
* elf64-ppp.c (struct ppc_link_hash_table): Add params, delete other
fields now in params. Adjust code throughout file.
(ppc64_elf_init_stub_bfd): Delete "abfd" parameter, add "params".
Save params pointer in htab.
(ppc64_elf_edit_opd, ppc64_elf_tls_setup,
ppc64_elf_setup_section_lists, ppc64_elf_size_stubs,
ppc64_elf_build_stubs): Remove parameters now in "params".
ld/
* emultemps/ppc64elf.em (params): New static struct replacing
various other static vars. Adjust code throughout file.
This fixes the glaring error that the ppc476 workaround wasn't
actually enabled for ld -r, and adjusts relocations to match moved
code.
bfd/
* elf32-ppc.c (ppc_elf_relocate_section): Move relocs on insns
patched for ppc476 workaround. Reapply branch taken/not taken
relocs.
ld/
* emultempl/ppc32elf.em (ppc_after_open_output): Really enable
ppc476 workaround for ld -r.
The Linux kernel builds modules using ld -r. These might need the
ppc476 workaround, so enable it for ld -r if sections have sufficient
alignment to tell location within a page.
bfd/
* elf32-ppc.c (ppc_elf_relax_section): Enable ppc476 workaround
for ld -r, when code sections are sufficiently aligned.
* elf32-ppc.h (struct ppc_elf_params): Delete pagesize. Add
pagesize_p2.
ld/
* emultempl/ppc32elf.em (pagesize): New static var.
(ppc_after_open_output): Set params.pagesize_p2 from pagesize.
(PARSE_AND_LIST_ARGS_CASES): Adjust to use pagesize.
This implements a work-around for an icache bug on 476 that can cause
execution of stale instructions when control falls through from one
page to the next. The idea is to prevent such fall-through by
replacing the last instruction on a page with a branch to a patch
area containing the instruction, then branch to the next page.
The patch also fixes a number of bugs in the existing support for long
branch trampolines.
bfd/
* elf32-ppc.c (struct ppc_elf_link_hash_table): Add params.
Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses.
(ppc_elf_link_params): New function.
(ppc_elf_create_glink): Align .glink to 64 bytes for ppc476
workaround.
(ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms
parameters. Use htab->params instead.
(ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter.
(ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to
64 bytes for ppc476 workaround.
(struct ppc_elf_relax_info): New.
(ppc_elf_relax_section): Exclude linker created sections and
those too small to hold one instruction. Don't add another
branch around trampolines on later relax passes. Don't
generate trampolines for undefined symbols when !relocatable,
nor for plugin symbols. Allocate space for ppc476 workaround
patch area. Free fixups on error return path.
(ppc_elf_relocate_section): Handle ppc476 workaround patching.
* elf32-ppc.h (struct ppc_elf_params): New.
(ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype.
(ppc_elf_link_params): Declare.
* section.c (SEC_INFO_TYPE_TARGET): Define.
* bfd-in2.h: Regenerate.
ld/
* emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms)
plt_style): Delete. Adjust all refs to instead use..
(params): ..this. New variable.
(ppc_after_open_output): New function. Tweak params and pass to
ppc_elf_link_params.
(ppc_after_open): Adjust ppc_elf_select_plt_layout call.
(ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable
relaxation for ppc476 workaround.
(PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support.
(LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
Tie output section statements to their associated output section via
output section userdata. This allows us to avoid hash lookups which
are slower and fail when multiple output sections have the same name.
* ldlang.h (lang_output_section_get): Define.
* ldlang.c (lang_output_section_get): Likewise.
(init_os): Set the output_section userdata to the output
section statement.
* emultempl/hppaelf.em: Use lang_output_section_get instead of
lang_output_section_find where applicable.
* emultempl/aarch64elf.em: Likewise.
* emultempl/aix.em: Likewise.
* emultempl/armelf.em: Likewise.
* emultempl/m68hc1xelf.em: Likewise.
* emultempl/metagelf.em: Likewise.
* emultempl/mipself.em: Likewise.
* emultempl/ppc64elf.em: Likewise.
* emultempl/spuelf.em: Likewise.
Older GCC, like 4.1/4.2, will issue an uninitialized warning on
ehdr_start_save. This patch silences by using
struct bfd_link_hash_entry ehdr_start_save = ehdr_start_save;
* emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation):
Silence uninitialized warning on ehdr_start_save with older
GCC.
Rather than hacking every backend to not discard dynamic relocations
against an undefined hidden __ehdr_start, make it appear to be defined
early. We want __ehdr_start hidden before size_dynamic_sections so
that it isn't put in .dynsym, but we do need the dynamic relocations
for a PIE or shared library with a non-PIC reference. Defining it
early is wrong if we don't actually define the symbol later to its
proper value. (In some cases we want to leave the symbol undefined,
for example, when the ELF header isn't loaded, and we don't have this
infomation available in before_allocation.)
ld/
* emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation): Define
__ehdr_start before size_dynamic_sections and restore afterwards.
ld/testsuite/
* ld-elf/ehdr_start-shared.d: New.
* ld-elf/ehdr_start-userdef.d: xfail frv.
* ld-elf/ehdr_start-weak.d: Likewise.
* ld-elf/ehdr_start.d: Likewise.
output deterministic. time.h include is no longer needed.
* resres.c (res_append_resource): Likewise.
* pe-dll.c (fill_edata): Only use a real timestamp if
--insert-timestamp was used.
* emultempl/pe.em: Add the --insert-timestamp option.
* emultempl/pep.em: Likewise for 64bit.
* ld.texinfo: Document the --insert-timestamp option.
* libcoff-in.h: Add insert_timestamp flag to the pe_data struct.
* libcoff.h: Regenerate.
* peXXigen.c (_bfd_XXi_only_swap_filehdr_out): Only use a real
timestamp if --insert-timestamp was used.
ld/
* emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation):
Don't use bfd_elf_record_link_assignment to mark __ehdr_start
hidden. Instead, just do it directly here, and only if it was
referenced but not defined.
ld/testsuite/
* ld-elf/ehdr_start-userdef.t: New file.
* ld-elf/ehdr_start-userdef.d: New file.
* ld-elf/ehdr_start-strongref.s: New file.
* ld-elf/ehdr_start-missing.t: New file.
* ld-elf/ehdr_start-missing.d: New file.
* ld-elf/ehdr_start-weak.d: New file.
* ld-mips-elf/ehdr_start-2.nd: Expect __ehdr_start to be global.
* emultempl/elf32.em (id_note_section_size): Use ATTRIBUTE_UNUSED
rather than a dummy assignment for unused parameter.
* plugin.c (get_input_file, release_input_file): Likewise.
(elf32_arm_stub_long_branch_arm_nacl_pic): New variable.
(arm_build_one_stub): Increase MAXRELOCS to 3.
(arm_type_of_stub): Use them if GLOBALS->nacl_p.
(struct elf32_arm_link_hash_table): Give add_stub_section member's
pointee type a third argument.
(elf32_arm_create_or_find_stub_sec): Update caller.
(elf32_arm_size_stubs): Update argument type.
* bfd-in.h (elf32_arm_size_stubs): Update decl.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* emultempl/armelf.em (elf32_arm_add_stub_section): Take third
argument ALIGNMENT_POWER, use it instead of constant 3.
* ld-arm/farcall-arm-nacl.d: New file.
* ld-arm/farcall-arm-nacl-pic.d: New file.
* ld-arm/farcall-data-nacl.d: New file.
* ld-arm/arm-elf.exp (armeabitests_common): Add extra element to
"action" lists for those cases to use a different dump file for NaCl
targets.
Massage $armeabitests_common to drop the extra element or the one
before it, depending on [istarget "arm*-*-nacl*"].
* ld-arm/arm-elf.exp (armelftests_common): Move all "Cortex-A8
erratum fix", Thumb-only and interworking cases to ...
(armelftests_nonacl): ... here.
(armeabitests_common): Move all "erratum 760522 fix", Thumb-only
and interworking cases to ...
(armeabitests_nonacl): ... here.
* elf64-ppc.h (ppc64_elf_toc): Delete.
(ppc64_elf_set_toc): Declare.
* elf64-ppc.c (ppc64_elf_toc_reloc): Replace call to ppc64_elf_toc
with call the ppc64_elf_set_toc.
(ppc64_elf_toc_ha_reloc, ppc64_elf_toc64_reloc): Likewise.
(ppc64_elf_start_multitoc_partition): Likewise.
(struct ppc_link_hash_table): Delete dot_toc_dot. Replace all uses
with elf.hgot.
(ppc64_elf_process_dot_syms): Don't make a fake function descriptor
for ".TOC.".
(ppc64_elf_check_relocs): Mark sections with a reference to .TOC.
as needing a toc pointer.
(ppc64_elf_size_stubs): Don't set dot_toc_dot here.
(ppc64_elf_set_toc): Rename from ppc64_elf_toc. Add info param.
Set elf.hgot value.
ld/
* emultempl/ppc64elf.em: (ppc_layout_sections_again): Call
ppc64_elf_set_toc rather than ppc64_elf_toc/_bfd_set_gp_value.
(gld${EMULATION_NAME}_after_allocation): Likewise.
PR ld/15365
* layout.cc (Layout::finalize): Make __ehdr_start STV_HIDDEN.
ld/
PR ld/15365
* emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation):
Restrict __ehdr_start's export class to no less than STV_HIDDEN.
ld/testsuite/
PR ld/15365
* ld-elf/ehdr_start.d: Expect __ehdr_start to be STB_LOCAL.
* ld-mips-elf/ehdr_start-1.nd: New test.
* ld-mips-elf/ehdr_start-2.nd: New test.
* ld-mips-elf/ehdr_start-1.ld: New test linker script.
* ld-mips-elf/ehdr_start-2.ld: New test linker script.
* ld-mips-elf/ehdr_start-new.s: New test source.
* ld-mips-elf/ehdr_start-o32.s: New test source.
* ld-mips-elf/mips-elf.exp: Run the new tests.
* config.bfd (msp430): Define targ_selvecs.
* configure.in: Add bfd_elf32_msp430_ti_vec.
* cpu-msp430.c: Add some more MSP430 machine numbers.
* elf32-msp430.c Add support for MSP430X relocations.
Add support for TI compiler generated relocations.
Add support for sym_diff relocations.
Add support for relaxing out of range short branches into long
branches.
Add support for MSP430 attribute section.
* reloc.c: Add MSP430X relocations.
* targets.c: Add bfd_elf32_msp430_ti_vec.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* readelf.c: Add support for MSP430X architecture.
* readelf.exp: Expect -wi test to fail for the MSP430.
* config/tc-msp430.c: Add support for the MSP430X architecture.
Add code to insert a NOP instruction after any instruction that
might change the interrupt state.
Add support for the LARGE memory model.
Add code to initialise the .MSP430.attributes section.
* config/tc-msp430.h: Add support for the MSP430X architecture.
* doc/c-msp430.texi: Document the new -mL and -mN command line
options.
* NEWS: Mention support for the MSP430X architecture.
* gas/all/gas.exp: Skip the DIFF1 test for the MSP430.
Expect the FORWARD test to pass for the MSP430.
Skip the REDEF tests for the MSP430.
Expect the 930509A test to fail for the MSP430.
* gas/all/sleb128-4.d: Skip for the MSP430.
* gas/elf/elf.exp: Set target_machine to msp430 for the MSP430.
Skip the EHOPT0 test for the MSP430.
Skip the REDEF and EQU-RELOC tests for the MSP430.
* gas/elf/section2.e-msp430: New file.
* gas/lns/lns-big-delta.d: Remove expectation of 20-bit
addresses.
* gas/lns/lns.exp: Use alternate LNS COMMON test for the MSP430.
* gas/msp430/msp430x.s: New test.
* gas/msp430/msp430x.d: Expected disassembly.
* gas/msp430/msp430.exp: Run new test.
* gas/msp430/opcode.d: Update expected disassembly.
* msp430.h: Add MSP430X relocs.
Add some more MSP430 machine numbers.
Add values used by .MSP430.attributes section.
* msp430.h: Add patterns for MSP430X instructions.
* Makefile.am: Add emsp430X.c
* Makefine.in: Regenerate.
* configure.tgt (msp430): Add msp430X emulation.
* ldmain.c (multiple_definition): Only disable relaxation if it
was enabled by the user.
* ldmain.h (RELAXATION_ENABLED_BY_USER): New macro.
* emulparams/msp430all.sh: Add support for MSP430X.
* emultempl/generic.em: (before_parse): Enable relaxation for the
MSP430.
* scripttempl/msp430.sc: Reorganize sections. Add .rodata
section.
* scripttempl/msp430_3.sc: Likewise.
* NEWS: Mention support for MSP430X.
* ld-elf/flags1.d: Expect this test to pass on the MSP430.
* ld-elf/init-fini-arrays.d: Expect this test to fail on the
MSP430.
* ld-elf/merge.d: Expect this test to pass on the MSP430.
* ld-elf/sec64k.exp: Skip these tests for the MSP430.
* ld-gc/pr13683.d: Expect this test to fail on the MSP430.
* ld-srec/srec.exp: Expect these tests to fail on the MSP430.
* ld-undefined/undefined.exp: Expect the UNDEFINED LINE test to
fail on the MSP430.
* msp430-dis.c: Add support for MSP430X instructions.
* configure.tgt: Add x86_64-*-cygwin* as valid target.
* emultempl/pep.em: Handle different requirements for Cygwin in terms
of start addresses for executables and DLLs, based on memory model in
http://cygwin.com/ml/cygwin-developers/2013-02/msg00027.html
The "new" dtags options have been around for 14+ years now, so for Linux
and GNU targets, enable them by default.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* metag.h: New file.
* dis-asm.h (print_insn_metag): New declaration.
* metag.h: New file.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* configure: Regenerate.
* configure.in: Add Meta.
* disassemble.c: Add Meta support.
* metag-dis.c: New file.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* archures.c (bfd_mach_metag): New.
* bfd-in2.h: Regenerate.
* config.bfd: Add Meta.
* configure: Regenerate.
* configure.in: Add Meta.
* cpu-metag.c: New file.
* elf-bfd.h: Add Meta.
* elf32-metag.c: New file.
* elf32-metag.h: New file.
* libbfd.h: Regenerate.
* reloc.c: Add Meta relocations.
* targets.c: Add Meta.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* config/tc-metag.c: New file.
* config/tc-metag.h: New file.
* configure.tgt: Add Meta.
* doc/Makefile.am: Add Meta.
* doc/Makefile.in: Regenerate.
* doc/all.texi: Add Meta.
* doc/as.texiinfo: Document Meta options.
* doc/c-metag.texi: New file.
* gas/metag/labelarithmetic.d: New file.
* gas/metag/labelarithmetic.s: New file.
* gas/metag/metacore12.d: New file.
* gas/metag/metacore12.s: New file.
* gas/metag/metacore21-invalid.l: New file.
* gas/metag/metacore21-invalid.s: New file.
* gas/metag/metacore21.d: New file.
* gas/metag/metacore21.s: New file.
* gas/metag/metacore21ext.d: New file.
* gas/metag/metacore21ext.s: New file.
* gas/metag/metadsp21-invalid.l: New file.
* gas/metag/metadsp21-invalid.s: New file.
* gas/metag/metadsp21.d: New file.
* gas/metag/metadsp21.s: New file.
* gas/metag/metadsp21ext.d: New file.
* gas/metag/metadsp21ext.s: New file.
* gas/metag/metafpu21.d: New file.
* gas/metag/metafpu21.s: New file.
* gas/metag/metafpu21ext.d: New file.
* gas/metag/metafpu21ext.s: New file.
* gas/metag/metag.exp: New file.
* gas/metag/tls.d: New file.
* gas/metag/tls.s: New file.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* configure.tgt: Add Meta.
* emulparams/elf32metag.sh: New file.
* emultempl/metagelf.em: New file.
* ld-elf/merge.d: Mark Meta as xfail.
* ld-gc/start.d: Skip this test on Meta.
* ld-gc/personality.d: Skip this test on Meta.
* ld-metag/external.s: New file.
* ld-metag/metag.exp: New file.
* ld-metag/pcrel.d: New file.
* ld-metag/pcrel.s: New file.
* ld-metag/shared.d: New file.
* ld-metag/shared.r: New file.
* ld-metag/shared.s: New file.
* ld-metag/stub.d: New file.
* ld-metag/stub.s: New file.
* ld-metag/stub_pic_app.d: New file.
* ld-metag/stub_pic_app.r: New file.
* ld-metag/stub_pic_app.s: New file.
* ld-metag/stub_pic_shared.d: New file.
* ld-metag/stub_pic_shared.s: New file.
* ld-metag/stub_shared.d: New file.
* ld-metag/stub_shared.r: New file.
* ld-metag/stub_shared.s: New file.
* binutils/readelf.c: (guess_is_rela): Add EM_METAG.
(dump_relocations): Add EM_METAG.
(get_machine_name): Correct case for Meta.
(is_32bit_abs_reloc): Add support for Meta ADDR32 reloc.
(is_none_reloc): Add support for Meta NONE reloc.
ld/
PR ld/14915
* emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Also
check DT_NEEDED entries when creating shared object with
--copy-dt-needed-entries.
ld/testsuite/
PR ld/14915
* ld-elf/shared.exp (build_tests): Test --add-needed,
--copy-dt-needed-entries, --no-add-needed and
--no-copy-dt-needed-entries with -shared.
Add tests for --no-add-needed and --no-copy-dt-needed-entries
with -shared.
* ld.h (ld_config_type): New flag member separate_code.
* emultempl/elf32.em
(gld${EMULATION_NAME}_before_parse): Set it based on $SEPARATE_CODE.
* ldlang.c (ldlang_override_segment_assignment): If it's set, then
always return TRUE when SEC_CODE differs between the sections.
* elf32-rx.c (describe_flags): New function. Returns a buffer
containing a description of the E_FLAG_RX_... values set.
(rx_elf_merge_private_bfd_data): Use it.
(rx_elf_print_private_bfd_data): Likewise.
(elf32_rx_machine): Skip EF_RX_CPU_RX check.
(elf32_rx_special_sections): Define.
(elf_backend_special_sections): Define.
2012-11-09 Nick Clifton <nickc@redhat.com>
* readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI.
2012-11-09 Nick Clifton <nickc@redhat.com>
* config/obj-elf.c (obj_elf_change_section): Allow init array
sections to have the SHF_EXECINSTR attribute for the RX target.
* config/tc-rx.c (elf_flags): Initialise with E_FLAG_RX_ABI.
(enum options): Add OPTION_USES_GCC_ABI and OPTION_USES_RX_ABI.
(md_longopts): Add -mgcc-abi and -mrx-abi.
(md_parse_option): Add support for OPTION_USES_GCC_ABI and
OPTION_USES_RX_ABI.
* doc/as.texinfo (RX Options): Add mention of remaining RX
options.
* doc/c-rx.texi: Document -mgcc-abi and -mrx-abi.
2012-11-09 Nick Clifton <nickc@redhat.com>
* rx.h (EF_RX_CPU_RX): Add comment.
(E_FLAG_RX_ABI): Define.
2012-11-09 Nick Clifton <nickc@redhat.com>
* emultempl/rxelf.em (no_flag_mismatch_warnings): Initialise to
true.
(PARSE_AND_LIST_LONGOPTS): Add flag-mismatch-warnings.
(PARSE_AND_LIST_ARG_CASES): Add support for
--flag-mismatch-warnings.
orphan sections to .data and .bss output sections, not just .text.
When giving up on finding a suitable output section, attach to any
output section other than .MMIX.reg_contents, if it exists.
* scripttempl/mmo.sc: Move output debug sections to just before
.MMIX.reg_contents. Add .gnu.attributes. Add new . = . NOP
assignments and move end-of-section provide-symbols after them
to force the end-of-section symbols to the address after orphan
placement. Add SORT_NONE to .init and .fini sections.
bfd_get_section_lma, bfd_get_section_alignment,
bfd_get_section_flags, bfd_get_section_userdata): Rewrite macros
in order to use the `bfd' argument.
* bfd-in2.h: Regenerate.
* elf-vxworks.c (elf_vxworks_finish_dynamic_entry): Pass proper `bfd'
as the first argument for `bfd_get_section_alignment'.
* elf32-arm.c (create_ifunc_sections): Likewise, for
`bfd_set_section_alignment'.
* elf32-m32r.c (m32r_elf_relocate_section): Likewise, for
`bfd_get_section_name'.
* elf32-microblaze.c (microblaze_elf_relocate_section): Likewise.
* elf32-ppc.c (ppc_elf_size_dynamic_sections): Likewise.
(ppc_elf_relocate_section): Likewise.
* elf64-mmix.c (mmix_final_link_relocate): Likewise, for
`bfd_get_section_vma'.
* elf64-ppc.c (create_linkage_sections): Likewise, for
`bfd_set_section_alignment'.
* emultempl/m68hc1xelf.em (hook_in_stub): Pass proper `bfd'
as the first argument for `bfd_get_section_name'.
* config/tc-alpha.c (maybe_set_gp): Pass proper `bfd'
as the first argument for `bfd_get_section_vma'.
* elf64-ppc.c: Define more insns used in plt call stubs.
(ppc64_elf_brtaken_reloc): Assume isa version 2 or above.
(ppc64_elf_relocate_section): Likewise.
(enum ppc_stub_type): Add ppc_stub_plt_call_r2save.
(struct ppc_link_hash_table): Increase size of stub_count array.
Add plt_stub_align and plt_thread_safe.
(ALWAYS_USE_FAKE_DEP, ALWAYS_EMIT_R2SAVE): Define.
(plt_stub_size, plt_stub_pad): New functions.
(build_plt_stub): Emit barriers for power7 thread safety. Don't
emit needless save of r2.
(build_tls_get_addr_stub): Adjust params.
(ppc_build_one_stub): Handle ppc_stub_plt_call_r2save and aligning
plt stubs. Adjust build_*plt_stub calls.
(ppc_size_one_stub): Similarly.
(ppc64_elf_size_stubs): Accept plt_thread_safe and plt_stub_align
params. Choose default for plt_thread_safe based on existence of
calls to thread creation functions. Modify plt_call to
plt_call_r2save when no tocsave reloc found. Align tail of stub
sections.
(ppc64_elf_build_stubs): Align tail of stub sections. Adjust
output of stub statistics.
(ppc64_elf_relocate_section): Handle ppc_stub_plt_call_r2save.
* elf64-ppc.h (ppc64_elf_size_stubs): Update prototype.
ld/
* emultempl/ppc64elf.em (PARSE_AND_LIST_PROLOGUE,
PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS,
PARSE_AND_LIST_ARGS_CASES): Handle --{no-,}plt-thread-safe and
--{no-,}plt-align.
(plt_thread_safe, plt_stub_align): New vars.
(gld${EMULATION_NAME}_after_allocation): Pass them to
ppc64_elf_size_stubs. Align stub sections according to plt_stub_align.
* ld.texinfo: Document new command line options, and an old
undocumented option.
source.
(eelf64ppc_fbsd.c): Add rules to build this file.
* Makefile.in: Regenerate.
* configure.tgt: Add target definition for powerpc64-*-freebsd*.
Adjust powerpc-*-freebsd*.
* emultempl/ppc64elf.em: Add a mechanism to override the default
value of 0 for plt_static_chain.
* emulparams/elf32ppc_fbsd.sh (OUTPUT_FORMAT): Override the default.
* emulparams/elf64ppc_fbsd.sh (OUTPUT_FORMAT): Likewise.
(DEFAULT_PLT_STATIC_CHAIN): Define to 1.
* bfd/bfd-in2.h (bfd_elf32_arm_set_target_relocs): Likewise.
* bfd/elf32-arm.c (elf32_arm_link_hash_table): New field.
(elf232_arm_link_hash_table_create): Initialise new field.
(check_use_blx): Change test depending on fix_arm1176.
(bfd_elf32_arm_set_target_relocs): Set fix_arm1176 from
command line options.
* ld/emultempl/armelf.em (fix_arm1176): New variable.
(arm_elf_create_output_section_statements): Pass
fix_arm1176 option to bfd backend.
(OPTION_FIX_ARM1176): New define.
(OPTION_NO_FIX_ARM1176): Likewise.
(PARSE_AND_LIST_LONGOPTS): Add new command line options.
(PARSE_AND_LIST_OPTIONS): Likewise.
(PARSE_AND_LIST_ARGS_CASES): Likewise.
* ld/ld.texinfo: Document new command line options.
* ld/testsuite/ld-arm/arm-elf.exp (armelftests): Update for new command-line
options.
(armeabitests): Update for new command-line options, and add
new test cases.
* ld/testsuite/ld-arm/fix-arm1176.s: Add test case.
* ld/testsuite/ld-arm/fix-arm1176-off.d: Likewise.
* ld/testsuite/ld-arm/fix-arm1176-on.d: Likewise.
* elf.c (_bfd_elf_init_private_section_data): Add an assertion
that the output section has an allocated bfd_elf_section_data
structure.
* elfxx-mips.c (mips_elf_check_symbols): Do not create a stub for
symbols in sections that have been removed by garbage collection.
* emultempl/mipself.em (mips_add_stub_section): Do not add stubs
for sections that have been removed by garbage collection.
* emultempl/rxelf.em (ignore_lma): New variable.
(rx_elf_create_output_section_statements): Pass the setiing of
ignore_lma to bfd_elf32_rx_set_target_flags.
(OPTION_IGNORE_LMA): Define.
(OPTION_NO_IGNORE_LMA): Define.
(PARSE_AND_LIST_LONGOPTS): Add ignore lma.
(PARSE_AND_LIST_OPTIONS): Add ignore lma.
(PARSE_AND_LIST_ARGS_CASES): Add ignore lma.
* elf32-rx.c (ignore_lma): New variable.
(bfd_elf32_rx_set_target_flags): Add ignore_lma parameter.
(rx_modify_program_headers): Only copy the LMA into the VMA if
ignore_lma is true.
* tic6x.h (R_C6000_JUMP_SPLOT, R_C6000_EHTYPE,
R_C6000_PCR_H16, R_C6000_PCR_L16): New relocs.
(SHN_TIC6X_SCOMMON): Define.
bfd/
* elf32-tic6x.h (struct elf32_tic6x_params): New.
(elf32_tic6x_setup): Declare.
* elf32-tic6x.c: Include <limits.h>.
(ELF_DYNAMIC_LINKER, DEFAULT_STACK_SIZE, PLT_ENTRY_SIZE): Define.
(struct elf32_tic6x_link_hash_table, struct elf32_link_hash_entry):
New structures.
(elf32_tic6x_link_hash_table, is_tic6x_elf): New macros.
(tic6x_elf_scom_section, tic6x_elf_scom_symbol,
tic6x_elf_scom_symbol_ptr): New static variables.
(elf32_tic6x_howto_table, elf32_tic6x_howto_table_rel,
elf32_tic6x_reloc_map): Add R_C6000_JUMP_SLOT, R_C6000_EHTYPE,
R_C6000_PCR_H16 and R_C6000_PCR_L16.
(elf32_tic6x_link_hash_newfunc, elf32_tic6x_link_hash_table_create,
elf32_tic6x_link_hash_table_free, elf32_tic6x_setup,
elf32_tic6x_using_dsbt, elf32_tic6x_install_rela,
elf32_tic6x_create_dynamic_sections, elf32_tic6x_make_got_dynreloc,
elf32_tic6x_finish_dynamic_symbol, elf32_tic6x_gc_sweep_hook,
elf32_tic6x_adjust_dynamic_symbol): New static functions.
(elf32_tic6x_relocate_section): For R_C6000_PCR_S21, convert branches
to weak symbols as required by the ABI.
Handle GOT and DSBT_INDEX relocs, and copy relocs to the output file
as needed when generating DSBT output.
(elf32_tic6x_check_relocs, elf32_tic6x_add_symbol_hook,
elf32_tic6x_symbol_processing, elf32_tic6x_section_from_bfd_section,
elf32_tic6x_allocate_dynrelocs, elf32_tic6x_size_dynamic_sections,
elf32_tic6x_always_size_sections, elf32_tic6x_modify_program_headers,
elf32_tic6x_finish_dynamic_sections, elf32_tic6x_plt_sym_val,
elf32_tic6x_copy_private_data, elf32_tic6x_link_omit_section_dynsym):
New static functions.
(ELF_MAXPAGESIZE): Define to 0x1000.
(bfd_elf32_bfd_copy_private_bfd_data,
bfd_elf32_bfd_link_hash_table_create,
bfd_elf32_bfd_link_hash_table_free, elf_backend_can_refcount,
elf_backend_want_got_plt, elf_backend_want_dynbss,
elf_backend_plt_readonly, elf_backend_got_header_size,
elf_backend_gc_sweep_hook, elf_backend_modify_program_headers,
elf_backend_create_dynamic_sections, elf_backend_adjust_dynamic_symbol,
elf_backend_check_relocs, elf_backend_add_symbol_hook,
elf_backend_symbol_processing, elf_backend_link_output_symbol_hook,
elf_backend_section_from_bfd_section,
elf_backend_finish_dynamic_symbol, elf_backend_always_size_sections,
elf32_tic6x_size_dynamic_sections, elf_backend_finish_dynamic_sections,
elf_backend_omit_section_dynsym, elf_backend_plt_sym_val): Define.
* bfd/reloc.c (BFD_RELOC_C6000_JUMP_SLOT, BFD_RELOC_C6000_EHTYPE,
BFD_RELOC_C6000_PCR_H16, BFD_RELOC_C6000_PCR_S16): Add.
* bfd/bfd-in2.h: Regenerate.
* bfd/libbfd.h: Regenerate.
* config.bfd: Accept tic6x-*-* instead of tic6x-*-elf.
gas/
* config/tc-tic6x.c (sbss_section, scom_section, scom_symbol): New
static variables.
(md_begin): Initialize them.
(s_tic6x_scomm): New static function.
(md_pseudo_table): Add "scomm".
(tc_gen_reloc): Really undo all adjustments made by
bfd_install_relocation.
* doc/c-tic6x.texi: Document the .scomm directive.
gas/testsuite/
* gas/tic6x/scomm-directive-1.s: New test.
* gas/tic6x/scomm-directive-1.d: New test.
* gas/tic6x/scomm-directive-2.s: New test.
* gas/tic6x/scomm-directive-2.d: New test.
* gas/tic6x/scomm-directive-3.s: New test.
* gas/tic6x/scomm-directive-3.d: New test.
* gas/tic6x/scomm-directive-4.s: New test.
* gas/tic6x/scomm-directive-4.d: New test.
* gas/tic6x/scomm-directive-5.s: New test.
* gas/tic6x/scomm-directive-5.d: New test.
* gas/tic6x/scomm-directive-6.s: New test.
* gas/tic6x/scomm-directive-6.d: New test.
* gas/tic6x/scomm-directive-7.s: New test.
* gas/tic6x/scomm-directive-7.d: New test.
* gas/tic6x/scomm-directive-8.s: New test.
* gas/tic6x/scomm-directive-8.d: New test.
ld/
* emulparams/elf32_tic6x_le.sh (BIG_OUTPUT_FORMAT, EXTRA_EM_FILE,
GENERATE_SHLIB_SCRIPT): New defines.
(TEXT_START_ADDR): Define differently depending on target.
(.got): Redefine to include "*(.dsbt)".
(SDATA_START_SYMBOLS): Remove, replace with
(OTHER_GOT_SYMBOLS): New.
(OTHER_BSS_SECTIONS): Define only for ELF targets.
* emultempl/tic6xdsbt.em: New file.
* gen-doc.texi: Set C6X.
* ld.texinfo: Likewise.
(Options specific to C6X uClinux targets): New section.
binutils/
* readelf.c (get_symbol_index_type): Handle SCOM for TIC6X.
(dump_relocations): Likewise.
binutils/testsuite/
* lib/binutils-common.exp (is_elf_format): Accept tic6x*-*-uclinux*.
ld/testsuite/
* ld-scripts/crossref.exp: Add CFLAGS for tic6x*-*-*.
* ld-elf/sec-to-seg.exp: Remove tic6x from list of targets defining
pagesize to 1.
* ld-tic6x/tic6x.exp: Add support for DSBT shared library/executable
linking tests.
* ld-tic6x/dsbt.ld: New linker script.
* ld-tic6x/dsbt-be.ld: New linker script.
* ld-tic6x/dsbt-overflow.ld: New linker script.
* ld-tic6x/dsbt-inrange.ld: New linker script.
* ld-tic6x/shlib-1.s: New test.
* ld-tic6x/shlib-2.s: New test.
* ld-tic6x/shlib-app-1r.s: New test.
* ld-tic6x/shlib-app-1.s: New test.
* ld-tic6x/shlib-1.sd: New test.
* ld-tic6x/shlib-1.dd: New test.
* ld-tic6x/shlib-app-1.rd: New test.
* ld-tic6x/shlib-app-1rb.rd: New test.
* ld-tic6x/shlib-app-1.sd: New test.
* ld-tic6x/static-app-1rb.od: New test.
* ld-tic6x/shlib-app-1.dd: New test.
* ld-tic6x/shlib-app-1rb.sd: New test.
* ld-tic6x/static-app-1b.od: New test.
* ld-tic6x/static-app-1r.od: New test.
* ld-tic6x/shlib-1rb.rd: New test.
* ld-tic6x/shlib-app-1rb.dd: New test.
* ld-tic6x/shlib-1rb.sd: New test.
* ld-tic6x/shlib-1rb.dd: New test.
* ld-tic6x/shlib-app-1b.od: New test.
* ld-tic6x/tic6x.exp: New test.
* ld-tic6x/static-app-1rb.rd: New test.
* ld-tic6x/shlib-app-1r.od: New test.
* ld-tic6x/static-app-1.od: New test.
* ld-tic6x/static-app-1b.rd: New test.
* ld-tic6x/static-app-1r.rd: New test.
* ld-tic6x/static-app-1rb.sd: New test.
* ld-tic6x/static-app-1b.sd: New test.
* ld-tic6x/static-app-1rb.dd: New test.
* ld-tic6x/static-app-1r.sd: New test.
* ld-tic6x/static-app-1b.dd: New test.
* ld-tic6x/shlib-1b.rd: New test.
* ld-tic6x/static-app-1r.dd: New test.
* ld-tic6x/shlib-app-1b.rd: New test.
* ld-tic6x/shlib-1r.rd: New test.
* ld-tic6x/shlib-app-1r.rd: New test.
* ld-tic6x/shlib-1b.sd: New test.
* ld-tic6x/static-app-1.rd: New test.
* ld-tic6x/shlib-app-1b.sd: New test.
* ld-tic6x/shlib-1r.sd: New test.
* ld-tic6x/shlib-1b.dd: New test.
* ld-tic6x/shlib-app-1r.sd: New test.
* ld-tic6x/shlib-app-1b.dd: New test.
* ld-tic6x/shlib-1r.dd: New test.
* ld-tic6x/static-app-1.sd: New test.
* ld-tic6x/shlib-app-1r.dd: New test.
* ld-tic6x/static-app-1.dd: New test.
* ld-tic6x/shlib-noindex.rd: New test.
* ld-tic6x/shlib-noindex.dd: New test.
* ld-tic6x/shlib-noindex.sd: New test.
* ld-tic6x/got-reloc-local-1.s: New test.
* ld-tic6x/got-reloc-local-2.s: New test.
* ld-tic6x/got-reloc-local-r.d: New test.
* ld-tic6x/got-reloc-global.s: New test.
* ld-tic6x/got-reloc-global-addend-1.d: New test.
* ld-tic6x/got-reloc-global-addend-1.s: New test.
* ld-tic6x/got-reloc-global-addend-2.d: New test.
* ld-tic6x/got-reloc-inrange.d: New test.
* ld-tic6x/got-reloc-overflow.d: New test.
* ld-tic6x/got-reloc-global-addend-2.s: New test.
* ld-tic6x/dsbt-index-error.d: New test.
* ld-tic6x/dsbt-index.d: New test.
* ld-tic6x/dsbt-index.s: New test.
* ld-tic6x/shlib-app-1.od: New test.
* ld-tic6x/shlib-app-1rb.od: New test.
* ld-tic6x/shlib-1.rd: New test.
* ld-tic6x/weak.d: New test.
* ld-tic6x/weak-be.d: New test.
* ld-tic6x/weak.s: New test.
* ld-tic6x/weak-data.d: New test.
* ld-tic6x/common.d: New test.
* ld-tic6x/common.ld: New test.
* ld-tic6x/common.s: New test.
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* archures.c: Add AVR XMEGA architecture information.
* cpu-avr.c (arch_info_struct): Likewise.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Likewise.
(elf32_avr_object_p): Likewise.
/gas:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (struct avr_opcodes_s): Add opcode field.
(AVR_INSN): Change definition to match.
(avr_opcodes): Likewise, change to match.
(mcu_types): Add XMEGA architecture names and new XMEGA device names.
(md_show_usage): Add XMEGA architecture names.
(avr_operand): Add 'E' constraint for DES instruction of XMEGA devices.
Add support for SPM Z+ instruction.
* doc/c-avr.texi: Add documentation for XMEGA architectures and
devices.
/include/opcode:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA):
New instruction set flags.
(AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA.
/ld:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* Makefile.am (ALL_EMULATION_SOURCES): Add AVR XMEGA architectures.
(eavrxmega?.c): Likewise.
* configure.tgt (targ_extra_emuls): Likewise.
* emulparams/avrxmega1.sh: New file.
* emulparams/avrxmega2.sh: Likewise.
* emulparams/avrxmega3.sh: Likewise.
* emulparams/avrxmega4.sh: Likewise.
* emulparams/avrxmega5.sh: Likewise.
* emulparams/avrxmega6.sh: Likewise.
* emulparams/avrxmega7.sh: Likewise.
* emultempl/avrelf.em (avr_elf_${EMULATION_NAME}_before_allocation):
Add avrxmega6, avrxmega7 to list of architectures for no stubs.
/opcodes:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* avr-dis.c (avr_operand): Add opcode_str parameter. Check for
post-increment to support LPM Z+ instruction. Add support for 'E'
constraint for DES instruction.
(print_insn_avr): Adjust calls to avr_operand. Rename variable.
* internal.h (elf_internal_sym): Add st_target_internal.
* arm.h (arm_st_branch_type): New enum.
(ARM_SYM_BRANCH_TYPE): New macro.
bfd/
* elf-bfd.h (elf_link_hash_entry): Add target_internal.
* elf.c (swap_out_syms): Set st_target_internal for each
Elf_Internal_Sym.
* elfcode.h (elf_swap_symbol_in): Likewise.
* elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise.
* elf32-sh-symbian.c (sh_symbian_relocate_section): Likewise.
* elf64-sparc.c (elf64_sparc_output_arch_syms): Likewise.
* elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections): Likewise.
* elflink.c (elf_link_output_extsym): Likewise.
(bfd_elf_final_link): Likewise.
(elf_link_add_object_symbols): Copy st_target_internal
to the hash table if we see a definition.
(_bfd_elf_copy_link_hash_symbol_type): Copy target_internal.
* elf32-arm.c (elf32_arm_stub_hash_entry): Replace st_type with
a branch_type field.
(a8_erratum_fix, a8_erratum_reloc): Likewise.
(arm_type_of_stub): Replace actual_st_type with an
actual_branch_type parameter.
(arm_build_one_stub): Use branch types rather than st_types to
determine the type of branch.
(cortex_a8_erratum_scan): Likewise.
(elf32_arm_size_stubs): Likewise.
(bfd_elf32_arm_process_before_allocation): Likewise.
(allocate_dynrelocs_for_symbol): Likewise.
(elf32_arm_finish_dynamic_sections): Likewise.
(elf32_arm_final_link_relocate): Replace sym_flags parameter with
a branch_type parameter.
(elf32_arm_relocate_section): Update call accordingly.
(elf32_arm_adjust_dynamic_symbol): Don't check STT_ARM_TFUNC.
(elf32_arm_output_map_sym): Initialize st_target_internal.
(elf32_arm_output_stub_sym): Likewise.
(elf32_arm_symbol_processing): Delete.
(elf32_arm_swap_symbol_in): Convert STT_ARM_TFUNCs into STT_FUNCs.
Use st_target_internal to record the branch type.
(elf32_arm_swap_symbol_out): Use st_target_internal to test for
Thumb functions.
(elf32_arm_is_function_type): Delete.
(elf_backend_symbol_processing): Likewise.
(elf_backend_is_function_type): Likewise.
gas/
* config/tc-arm.c (arm_adjust_symtab): Set the branch type
for Thumb symbols.
ld/
* emultempl/armelf.em (gld${EMULATION_NAME}_finish): Check
eh->target_internal.
opcodes/
* arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC.
Use branch types instead.
(print_insn): Likewise.
basever_syms to global_syms.
Emit global_syms into .dynamic section for all executables and
shared objects.
(elf_solaris2_after_allocation): New function.
(LDEMUL_AFTER_ALLOCATION): Use it.
* emulparams/solaris2.sh: New file.
* emulparams/elf32_sparc_sol2.sh: Use it.
* emulparams/elf64_sparc_sol2.sh: Likewise.
* emulparams/elf_i386_sol2.sh: Likewise.
* emulparams/elf_x86_64_sol2.sh: Likewise.
* Makefile.am (eelf32_sparc_sol2.c): Depend on
$(srcdir)/emulparams/solaris2.sh.
(eelf64_sparc_sol2.c): Likewise.
(eelf_x86_64_sol2.c): Likewise.
(eelf_i386_sol2.c): Likewise.
* Makefile.in: Regenerate.
* elf-bfd.h (struct bfd_elf_section_reloc_data): New structure.
(struct bfd_elf_section_data): New members REL and RELA; delete
members REL_HDR, REL_HDR2, REL_COUNT, REL_COUNT2, REL_IDX,
REL_IDX2, REL_HASHES.
(_bfd_elf_init_reloc_shdr): Adjust declaration.
(_bfd_elf_single_rel_hdr): Declare.
(RELOC_AGAINST_DISCARDED_SECTION): Use it.
* elf.c (bfd_section_from_shdr): Adjusted to match changes in
data structures.
(_bfd_elf_init_reloc_shdr): New arg RELDATA. Remove arg REL_HDR.
All callers changed. Allocate memory for the Elf_Internal_Shdr
structure.
(_bfd_elf_single_rel_hdr): New function.
(struct fake_section_arg): New structure.
(elf_fake_section): Expect to see a pointer to it in the third
argument. If doing a relocatable link, allocate both REL and RELA
sections as needed.
(assign_section_numbers): Adjusted to match changes in
data structures.
(_bfd_elf_compute_section_file_positions): Call elf_fake_sections
with a struct fake_section_args argument.
* elfcode.h (elf_write_relocs): Adjusted to match changes in
data structures.
(elf_slurp_reloc_table): Likewise.
* elflink.c (_bfd_elf_link_read_relocs): Likewise.
(_bfd_elf_link_size_reloc_section): Remove arg REL_HDR, replace with
RELDATA. Remove argument O. All callers changed. Remove code to
discover the right rel_hdr and count.
(_bfd_elf_link_output_relocs): Adjusted to match changes in
data structures.
(elf_link_adjust_relocs): Remove args REL_HDR, COUNT and REL_HASH;
replace with RELDATA. All callers changed.
(elf_link_input_bfd): Correctly generate rel_hash data when both
REL and RELA sections are present.
(elf_reloc_link_order): Adjusted to match changes in
data structures.
(bfd_elf_final_link): Simplify code to count relocs. Free the
hashes array for both REL and RELA.
(get_dynamic_reloc_section_name): Use _bfd_elf_single_reloc_hdr
* elf32-m32r.c (m32r_elf_fake_sections, elf_backend_fake_sections):
Delete.
* elf32-tic6x.c (elf32_tic6x_fake_sections, elf_backend_fake_sections):
Delete.
(elf32_tic6x_rel_relocation_p): Adjusted to match changes in
data structures.
* elf32-microblaze.c (microblaze_elf_check_relocs): Use
_bfd_elf_single_rel_hdr.
* elf32-ppc.c (ppc_elf_relax_section): Likewise.
* elf32-spu.c (spu_elf_relocate_section): Likewise.
* elf64-alpha.c (elf64_alpha_relocate_section): Likewise.
* elf64-hppa.c (get_reloc_section): Likewise.
* elf64-mips.c (mips_elf64_slurp_reloc_table): Adjusted to match
changes in data structures.
(mips_elf64_write_relocs): Use _bfd_elf_single_rel_hdr.
* elf64-ppc.c (ppc64_elf_edit_opd): Likewise.
(ppc64_elf_edit_toc): Likewise.
(get_relocs): Adjusted to match changes in data structures.
Allocate an Elf_Internal_Shdr structure if necessary.
(ppc64_elf_finish_dynamic_sections): Use _bfd_elf_single_rel_hdr.
* elf64-sparc.c (elf64_sparc_slurp_reloc_table): Adjusted to match
changes in data structures.
* elfxx-ia64.c (get_reloc_section): Use _bfd_elf_single_rel_hdr.
* elfxx-mips.c (MIPS_RELOC_RELA_P): Remove macro.
(mips_elf_rel_relocation_p): Adjusted to match changes in data
structures.
(_bfd_mips_elf_relocate_section): Use mips_elf_rel_relocation_p rather
than MIPS_RELOC_RELOCA_P.
* elfxx-sparc.c (_bfd_sparc_elf_check_relocs): Use
_bfd_elf_single_rel_hdr.
(_bfd_sparc_elf_relocate_section): Likewise.
ld/
* emultempl/xtensaelf.em (replace_insn_sec_with_prop_sec): Use
_bfd_elf_single_rel_hdr.
* ldlang.h (lang_for_each_statement_worker): Declare.
* ldlang.c (lang_for_each_statement_worker): Make global. Don't
recurse into children of output_section_statement with constraint
set to -1.
(print_assignment): Handle NULL output_section->bfd_section.
(lang_size_sections_1): Ignore output section statement address
when constraint is -1.
* emultempl/xtensaelf.em (lang_for_each_statement_worker): Delete.
H.J. Lu
Trevor Saunders
Nick Clifton
Senthil Kumar Selvaraj
Maciej W. Rozycki
Alan Modra
Yury Usishchev
Laurent Alfonsi
Rainer Orth
Catherine Moore
Marcus Shawcroft
Ed Schouten
Marcus Shawcroft
Andrew Burgess
Igor Zamyatin
Jiong Wang
Kuan-Lin Chen
Jon TURNEY
Maciej W. Rozycki
Max Filippov
Linda Zhang
DJ Delorie
Richard Henderson
Steve Ellcey
Chris Faylor
Yuri Gribov
Hans-Peter Nilsson
Sandra Loosemore
Guy Martin
Cory Fields
Roland McGrath
Roland McGrath
Maciej W. Rozycki
Richard Sandiford
Yufeng Zhang
Corinna Vinschen
Mike Frysinger
Joern Rennecke
Nathan Sidwell
Hans-Peter Nilsson
Eric B. Weddington
James Lemke
Tristan Gingold
Matthew Gretton-Dann
Jakub Jelinek
Bernd Schmidt
Paul Brook
Dave Korn
Kai Tietz
Rainer Orth