e3e473dacc
2001-07-05 Ben Elliston <bje@redhat.com>
...
* Make-common.in (srccgen): Remove.
(CGEN_CPU_DIR): Define.
(CGEN_READ_SCM): Redefine without $(srccgen).
(CGEN_ARCH_SCM): Ditto.
(CGEN_CPU_SCM): Ditto.
(CGEN_DECODE_SCM): Ditto.
(CGEN_DESC_SCM): Ditto.
* $arch/Makefile.in: Use $(CGEN_CPU_DIR) where applicable.
2001-07-05 13:51:26 +00:00
fec7d8b0e7
* Makefile.in: remove `@true' commands for rules that have
...
$(CGEN_MAINT) as a prerequisite.
2000-11-18 09:08:59 +00:00
de8f5985d0
2000-08-28 Dave Brolley <brolley@redhat.com>
...
* Makefile.in: Use of @true confuses VPATH. Remove it.
* cpu.h: Regenerated.
* cpux.h: Regenerated.
* decode.c: Regenerated.
* decodex.c: Regenerated.
* model.c: Regenerated.
* modelx.c: Regenerated.
* sem-switch.c: Regenerated.
* sem.c: Regenerated.
* semx-switch.c: Regenerated.
2000-08-28 18:20:30 +00:00
604259a086
* Contribute CGEN simulator build support code.
...
* Patch was posted by bje@redhat.com .
2000-08-21 15:52:39 +00:00
de57eccd12
import gdb-1999-12-07 snapshot
1999-12-08 02:51:13 +00:00
2df3850c7b
import gdb-1999-10-11 snapshot
1999-10-12 04:37:53 +00:00
c906108c21
Initial creation of sourceware repository
1999-04-16 01:35:26 +00:00
071ea11e85
Initial creation of sourceware repository
1999-04-16 01:34:07 +00:00
9aa2d8ddaf
* Makefile.in (SIM_EXTRA_DEPS): Add m32r-desc.h, delete cpu-opc.h.
...
(stamp-arch,stamp-cpu): Update FLAGS variable, option syntax changed.
(stamp-xmloop): s/-parallel/-parallel-write/.
(stamp-xcpu): Update FLAGS variable, option syntax changed.
* configure.in (sim_link_files,sim_link_links): Delete.
* configure: Rebuild.
* decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild.
* decodex.c,decodex.h,modelx.c,semx-switch.c: Rebuild.
* mloop.in (execute): CGEN_INSN_ATTR renamed to CGEN_INSN_ATTR_VALUE.
* sim-if.c (sim_open): m32r_cgen_cpu_open renamed from
m32r_cgen_opcode_open. Set disassembler.
(sim_close): m32r_cgen_cpu_open renamed from m32r_cgen_opcode_open.
* sim-main.h: Don't include cpu-opc.h,cpu-sim.h. Include
m32r-desc.h,m32r-opc.h,m32r-sim.h.
1999-02-10 09:23:35 +00:00
533a502faf
* Makefile.in (m32r-clean): rm eng.h.
1999-01-12 00:37:47 +00:00
368fc7dba8
* Makefile.in (MAIN_INCLUDE_DEPS): Delete.
...
(INCLUDE_DEPS,OPS_INCLUDE_DEPS): Delete.
(sim-if.o): Use SIM_MAIN_DEPS.
(arch.o,traps.o,devices.o): Ditto.
(M32RBF_INCLUDE_DEPS): Use CGEN_MAIN_CPU_DEPS.
(m32r.o,mloop.o,cpu.o,decode.o,sem.o,model.o): Simplify dependencies.
(m32rx.o,mloopx.o,cpux.o,decodex.o,semx.o,modelx.o): Ditto.
(stamp-arch): Pass mach=all to cgen-arch.
* cpu.c,cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate.
* m32r-sim.h (fr30bf_h_cr_[gs]et_handler): Declare.
([GS]ET_H_CR): Define.
(fr30bf_h_psw_[gs]et_handler): Declare.
([GS]ET_H_PSW): Define.
(fr30bf_h_accum_[gs]et_handler): Declare.
([GS]ET_H_ACCUM): Define.
(fr30xf_h_{cr,psw,accum}_[gs]et_handler): Declare.
(fr30bf_h_accums_[gs]et_handler): Declare.
([GS]ET_H_ACCUMS): Define.
* sim-if.c (sim_open): Model probing code moved to sim-model.c.
* m32r.c (WANT_CPU): Define as m32rbf.
(all register access fns): Rename to ..._handler.
* cpux.c,cpux.h,decodex.c,modelx.c,semx.c: Regenerate.
* m32rx.c (WANT_CPU): Define as m32rxf.
(all register access fns): Rename to ..._handler.
1999-01-06 03:04:25 +00:00
bb51b65d68
Add pseudo-basic-block execution support.
...
* Makefile.in (SIM_OBJS): Add sim-reg.o, cgen-run.o, sim-stop.o.
(SIM_EXTRA_DEPS): Add include/opcode/cgen.h.
(INCLUDE_DEPS): Delete cpu-sim.h, include/opcode/cgen.h.
(mloop.c): Build pseudo-basic-block version. Depend on stamp-cpu.
(stamp-decode): Delete, build decode files with other cpu files.
* arch.c,arch.h,cpuall.h: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* m32r-sim.h (M32R_MISC_PROFILE): New members load_regs,
load_regs_pending.
* m32r.c (m32rbf_fetch_register): Renamed from m32rb_fetch_register.
(m32rbf_store_register,m32rbf_h_cr_get,m32rbf_h_cr_set,
m32rbf_h_psw_get,m32rbf_h_psw_set,m32rbf_h_accum_get,
m32rbf_h_accum_set): Likewise.
(m32r_model_{init,update}_insn_cycles): Delete.
(m32rbf_model_insn_{before,after}): New fns.
(m32r_model_record_cti,m32r_model_record_cycles): Delete.
(m32rb_model_mark_get_h_gr,m32rb_model_mark_set_h_gr): Delete.
(m32rb_model_mark_busy_reg,m32rb_model_mark_unbusy_reg): Delete.
(check_load_stall): New fn.
(m32rbf_model_m32r_d_u_{exec,cmp,mac,cti,load,store}): New fns.
(m32rbf_model_test_u_exec): New fn.
* mloop.in: Rewrite, use pbb support.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Delete.
(sim_fetch_register,sim_store_register): Delete.
* sim-main.h (CIA_GET,CIA_SET): Fix.
(SIM_ENGINE_HALT_HOOK,SIM_ENGINE_RESTART_HOOK): Delete.
* tconfig.in (WITH_SCACHE_PBB): Define.
(WITH_SCACHE_PBB_M32RBF): Define.
* traps.c (sim_engine_invalid_insn): Renamed from ..._illegal_....
(m32r_trap): Pass pc to sim_engine_halt.
* configure.in (SIM_AC_OPTION_SCACHE): Change 1024 to 16384.
* configure: Regenerate.
start-sanitize-m32rx
* Makefile.in (M32RX_OBJS): Delete semx.o, add extract.o.
(mloopx.c): Build pseudo-basic-block version. Depend on stamp-xcpu.
(semx.o): Delete.
(extractx.o): Add.
(stamp-xdecode): Delete, build decode files with other cpu files.
* cpux.c,cpux.h,decodex.c,decodex.h,modelx.c: Regenerate.
* readx.c: Delete.
* semx.c: Delete.
* extractx.c: New file.
* semx-switch.c: New file.
* m32r-sim.h (BRANCH_NEW_PC): Delete.
(SEM_SKIP_INSN): New macro.
* m32rx.c (m32rxf_fetch_register): Renamed from m32rx_fetch_register.
(m32rxf_store_register,m32rxf_h_cr_get,m32rxf_h_cr_set,
m32rxf_h_psw_get,m32rxf_h_psw_set,m32rxf_h_accum_get,
m32rxf_h_accum_set,m32rxf_h_accums_get,m32rxf_h_accums_set): Likewise.
(m32rxf_model_insn_{before,after}): New fns.
(m32rx_model_mark_get_h_gr,m32rx_model_mark_set_h_gr): Delete.
(m32rx_model_mark_busy_reg,m32rx_model_mark_unbusy_reg): Delete.
(check_load_stall): New fn.
(m32rxf_model_m32rx_u_{exec,cmp,mac,cti,load,store}): New fns.
* mloopx.in: Rewrite, use pbb support.
* tconfig.in (WITH_SCACHE_PBB_M32RXF): Define.
(WITH_SEM_SWITCH_FULL): Change from 0 to 1.
end-sanitize-m32rx
1998-10-09 23:43:28 +00:00
13ccace0ca
* Makefile.in (INCLUDE_DEPS): Add include/opcode/cgen.h.
...
* sim-if.c (sim_open): Open opcode table.
(sim_close): Close it.
1998-08-03 19:58:36 +00:00
496cf06b76
* Makefile.in (SIM_OBJS): Add traps.o
1998-06-11 01:06:05 +00:00
177dedfb88
* Makefile.in (m32r.o,mloop.o,cpu.o,model.o): Add decode.h dependency.
...
(m32rx.o,mloopx.o,cpux.o,modelx.o): Add decodex.h dependency.
* decode.c,decode.h: Regenerate, introduces IDESC table.
* mloop.in (extract16,extract32): Add IDESC support.
Update names of semantic handler member names.
(execute): Ditto. Delete call to PROFILE_COUNT_INSN.
* decodex.c,decodex.h: Regenerate, introduces IDESC table.
* mloopx.in: Add IDESC support.
Update names of semantic handler member names.
Delete call to PROFILE_COUNT_INSN.
1998-05-06 22:37:14 +00:00
599bae2187
* Makefile.in (SIM_EXTRA_DEPS): Add cpu-opc.h.
...
(arch.o): Delete cpu-opc.h dependency.
(decode.o,model.o): Likewise.
(decodex.o,modelx.o): Likewise.
1998-03-04 21:22:09 +00:00
0e701ac37b
Add generic sim-info.c:sim_info() function using module mechanism.
...
Clean up compile probs in mips/vr5400.
1998-02-28 02:51:06 +00:00
b8a9943dd4
* Makefile.in (m32r.o): Depend on cpu.h
...
(extract.o): Pass -DSCACHE_P.
* mloop.in (extract{16,32}): Update call to m32r_decode.
* arch.h,cpu.h,cpuall.h,decode.[ch]: Regenerate.
* extract.c,model.c,sem-switch.c,sem.c: Regenerate.
* sim-main.h: #include "ansidecl.h".
Don't include cpu-opc.h, done by arch.h.
start-sanitize-m32rx
* Makefile.in (M32RX_OBJS): Build m32rx support now.
(m32rx.o): New rule.
* m32r-sim.h (m32rx_h_cr_[gs]et): Define.
* m32rx.c (m32rx_{fetch,store}_register): Update {get,set} of PC.
(m32rx_h_accums_get): New function.
* mloopx.in: Update call to m32rx_decode. Rewrite exec loop.
* cpux.h,decodex.[ch],modelx.c,readx.c,semx.c: Regenerate.
end-sanitize-m32rx
1998-02-05 21:01:06 +00:00
8e42015266
* Makefile.in: Add m32rx objs, and rules to build them.
...
* cpux.h, decodex.h, decodex.c, readx.c, semx.c, modelx.c: New files.
* m32rx.c, mloopx.in: New files.
1998-01-20 10:43:16 +00:00
369fba3089
* arch.c, arch.h, cpuall.h: New files.
...
* arch-defs.h: Deleted.
* mloop.in: Renamed from mainloop.in.
* sem.c: Renamed from semantics.c.
* Makefile.in: Update.
* sem-ops.h: Deleted.
* mem-ops.h: Deleted.
start-sanitize-cygnus
Add cgen support for generating files.
end-sanitize-cygnus
(arch): Renamed from CPU.
* decode.c: Redone.
* decode.h: Redone.
* extract.c: Redone.
* model.c: Redone.
* sem-switch.c: Redone.
* sem.c: Renamed from semantics.c, and redone.
* m32r-sim.h (PROFILE_COUNT_FILLNOPS): Update.
(GETTWI,SETTWI,BRANCH_NEW_PC): Define.
* m32r.c (WANT_CPU,WANT_CPU_M32R): Define.
(m32r_{fetch,store}_register): New functions.
(model_mark_{get,set}_h_gr): Prefix with m32r_.
(m32r_model_mark_{busy,unbusy}_reg): Prefix with m32r_.
(h_cr_{get,set}): Prefix with m32r_.
(do_trap): Fetch state from current_cpu, not current_state.
Call sim_engine_halt instead of engine_halt.
* sim-if.c (alloc_cpu): New function.
(free_state): New function.
(sim_open): Call sim_state_alloc, and malloc space for selected cpu
type. Call sim_analyze_program.
(sim_create_inferior): Handle selected cpu type when setting PC.
start-sanitize-m32rx
(sim_resume): Handle m32rx.
end-sanitize-m32rx
(sim_stop_reason): Deleted.
(print_m32r_misc_cpu): Update.
start-sanitize-m32rx
(sim_{fetch,store}_register): Handle m32rx.
end-sanitize-m32rx
(sim_{read,write}): Deleted.
(sim_engine_illegal_insn): New function.
* sim-main.h: Don't include arch-defs.h,sim-core.h,sim-events.h.
Include arch.h,cpuall.h. Include cpu.h,decode.h if m32r.
start-sanitize-m32rx
Include cpux.h,decodex.h if m32rx.
end-sanitize-m32rx
(_sim_cpu): Include member appropriate cpu_data member for the cpu.
(M32R_MISC_PROFILE): Renamed from M32R_PROFILE.
(sim_state): Delete members core,events,halt_jmp_buf.
Change `cpu' member to be a pointer to the cpu's struct, rather than
record inside the state struct.
* tconfig.in (WITH_DEVICES): Define here.
(WITH_FAST,WITH_SEM_SWITCH_{FULL,FAST}): Define for the cpu.
1998-01-20 06:17:32 +00:00
fafce69ab1
Add ABFD argument to sim_create_inferior. Document.
...
Add file sim-hload.c - generic load for hardware only simulators.
Review each simulators sim_open, sim_load, sim_create_inferior so that
they more closely match required behavour.
1997-08-27 04:44:41 +00:00
Ben Elliston