Commit Graph

2210 Commits

Author SHA1 Message Date
Matthew Green 5c8844646d * bits.c (LSMASKED64): New inline function.
(LSEXTRACTED64): Likewise.
* bits.h (_LSB_POS, _LSMASKn, LSMASK64): New macros from
sim/common/sim-bits.h
(LSMASKED64, LSEXTRACTED64): New functions definitions.
* Makefile.in (sim-bits.o): Remove target.

* main.c (zalloc): Fix typo in error message.
2002-01-04 00:00:54 +00:00
Kazu Hirata 280b26c033 * run.c (usage): Fix a typo. 2001-12-21 00:47:18 +00:00
Kazu Hirata de9b1892f5 * compile.c: Fix formatting. 2001-12-20 17:36:23 +00:00
Kazu Hirata 2ea716f649 * compile.c: Fix comment typos. 2001-12-20 16:47:52 +00:00
Andrew Cagney 3a11ea24fc Don't try to link in sim-bits.o. 2001-12-16 21:00:08 +00:00
Matthew Green de46f45f87 * main.c: Include "defs.h", "bfd.h", "callback.h" and "remote-sim.h".
(sim_io_error): New function.
	* sim_calls.c: (sim_io_error): New function.
2001-12-15 05:08:44 +00:00
Ben Elliston c9b2b0e016 s/cygnus.com/redhat.com/ 2001-12-15 04:51:01 +00:00
Matthew Green d29d5195ca * support sim-fpu.c for correct FP emulation.
* Makefile.in (LIB_OBJ): Add @sim_fpu@.
	(ICACHE_CFLAGS, SEMANTICS_CFLAGS): New variables.
	(icache.o, semantics.o): Add new ICACHE_FLAGS & SEMANTICS_FLAGS.
	(sim-fpu.o, sim-bits.o, tconfig.h): New targets.
	* configure.in: Rename INLINE_LOCALS to PSIM_INLINE_LOCALS.  Add a
	check for sim/common/sim-fpu.c.  Output sim_fpu and sim_fpu_cflags.
	* configure: Regenerate.
	* device.h (device_find_integer_array_property): Match function definition.
	* gen-icache.c (print_icache_internal_function_declaration): Rename
	INLINE_ICACHE to PSIM_INLINE_ICACHE.
	* gen-idecode.c (print_idecode_run_function_header): Rename INLINE_IDECODE
	to PSIM_INLINE_IDECODE.
	* gen-semantics.c (print_semantic_function_header): Rename
	EXTERN_SEMANTICS to PSIM_EXTERN_SEMANTICS.
	* gen-support.c (print_support_function_name): Rename INLINE_SUPPORT to
	PSIM_INLINE_SUPPORT.
	* igen.c (print_function_name): Also escape `(' and `)'.
	(gen_semantics_h): Rename EXTERN_SEMANTICS to PSIM_EXTERN_SEMANTICS.
	(gen_semantics_c): Likewise.  Also output includes for "sim-fpu.h"
	* inline.h (INLINE_SIM_ENDIAN): Renamed INLINE_PSIM_ENDIAN.
	(EXTERN_SIM_ENDIAN): Renamed EXTERN_PSIM_ENDIAN.
	(STATIC_INLINE_SIM_ENDIAN): Renamed STATIC_INLINE_PSIM_ENDIAN.
	(INLINE_LOCALS): Renamed PSIM_INLINE_LOCALS.
	(EXTERN_SUPPORT): Renamed PSIM_EXTERN_SUPPORT.
	(INLINE_SUPPORT): Renamed PSIM_INLINE_SUPPORT.
	(EXTERN_SEMANTICS): Renamed PSIM_EXTERN_SEMANTICS.
	(INLINE_SEMANTICS): Renamed PSIM_INLINE_SEMANTICS.
	(EXTERN_IDECODE): Renamed PSIM_EXTERN_IDECODE.
	(INLINE_IDECODE): Renamed PSIM_INLINE_IDECODE.
	(EXTERN_ICACHE): Renamed PSIM_EXTERN_ICACHE.
	(INLINE_ICACHE): Renamed PSIM_INLINE_ICACHE.
	* options.c (options_inline): Fix names.
	* sim-endian-n.h: Change INLINE_SIM_ENDIAN to INLINE_PSIM_ENDIAN.
	* sim-endian.h: Likewise.
	* sim-main.h: New file.
	* std-config.h: Rename INLINE_LOCALS to PSIM_INLINE_LOCALS.
2001-12-14 00:22:13 +00:00
Andrew Cagney 7ef2d4e783 * Makefile.in (simops.h, table.c): Delete targets.
(tmp-gencode, gencode.o, gencode): Delete targets.
(simops.h): New file.
($(BUILT_SRC_FROM_IGEN)): Do not depend on simops.h.
* gencode.c: Delete file.
2001-12-02 19:27:29 +00:00
Andrew Cagney 6654b4ae11 From Mark Peek.
* ppc-spr-table: Add SDA and PIR.
2001-12-01 18:56:36 +00:00
Fred Fish 9e52972e45 2001-11-17 Fred Fish <fnf@redhat.com>
* sim-main.h (float_operation): Move enum declaration outside
	of _sim_cpu struct declaration.
2001-11-18 06:00:29 +00:00
Ben Harris 6746a76a70 2001-11-16 Ben Harris <bjh21@netbsd.org>
* Makefile.in (armemu32.o): Replace $< with autoconf recommended
	$(srcdir)/....
	(armemu26.o): Ditto.
2001-11-16 18:56:01 +00:00
Andrew Cagney bebd2b3536 when #size-cells is zero, don't expect a size. 2001-11-14 19:54:59 +00:00
Dave Brolley 378af1d671 2001-11-14 Dave Brolley <brolley@redhat.com>
* arch.c: Regenerate.
	* arch.h: Regenerate.
	* cpu.c: Regenerate.
	* cpu.h: Regenerate.
	* cpuall.h: Regenerate.
	* cpux.c: Regenerate.
	* cpux.h: Regenerate.
	* decode.c: Regenerate.
	* decode.h: Regenerate.
	* decodex.c: Regenerate.
	* decodex.h: Regenerate.
	* model.c: Regenerate.
	* modelx.c: Regenerate.
	* sem-switch.c: Regenerate.
	* sem.c: Regenerate.
	* semx-switch.c: Regenerate.
2001-11-14 19:51:40 +00:00
Dave Brolley 3e43c635d5 2001-11-14 Dave Brolley <brolley@redhat.com>
* arch.c: Regenerate.
	* arch.h: Regenerate.
	* cpu.c: Regenerate.
	* cpu.h: Regenerate.
	* cpuall.h: Regenerate.
	* decode.c: Regenerate.
	* decode.h: Regenerate.
	* model.c: Regenerate.
	* sem-switch.c: Regenerate.
	* sem.c: Regenerate.
2001-11-14 19:50:01 +00:00
Andrew Cagney 560ba567a0 Chirp fixes:
* hw_htab.c (htab_map_binary): Don't try to map the text section
when it is empty.
* emul_chirp.c (map_over_chirp_note): Default load-base to -1 not
CHIRP_LOAD_BASE.
(emul_chirp_create): Map in the interrupt table.
2001-10-26 04:37:54 +00:00
Andrew Cagney 457174f645 Enable PowerPC simulator on native linux and netbsd. 2001-10-20 00:16:44 +00:00
Nick Clifton ff44f8e352 Add support for XScale's coprocessor access check register.
Fix formatting.
2001-10-18 12:20:49 +00:00
John R. Moore 962b3eada2 Removed a section of code that didn't do anything, but left values in
memory. This was labeled as a hack to set r0/r1 with argc/argv.
2001-08-02 00:50:38 +00:00
Ben Elliston f18ee7ef71 2001-07-31 Ben Elliston <bje@redhat.com>
* lib/sim-defs.exp (run_sim_test): Include a description such as
	"assembling" or "linking" that identifies the phase a test fails
	in, for easier analysis of failures.
2001-07-31 04:59:59 +00:00
Stephane Carrez eefde3513e * dv-m68hc11eepr.c (m68hc11eepr_info): Fix print of current write
address.
	(m68hc11eepr_port_event): Fix detach/attach logic.
2001-07-28 19:19:05 +00:00
Stephane Carrez 00d0c012ef * Makefile.in (SIM_OBJS): Remove sim-resume.o
* interp.c (sim_resume): New function from sim-resume.c, install
	the stepping event after having processed the pending ticks.
	(has_stepped): Likewise.
	(sim_info): Produce an output only if verbose or STATE_VERBOSE_P.
2001-07-22 12:33:58 +00:00
Andrew Cagney bf1bef8f1c Regenerate using autoconf 2.13. 2001-07-18 06:20:29 +00:00
Daniel Jacobowitz 54cfd411af Makefile.in: Add dependencies on $(CPU_H). 2001-07-16 18:36:37 +00:00
Andrew Cagney b51c76031a * Makefile.in (gencode): Provide explicit path to gencode.c. 2001-07-10 22:46:59 +00:00
Ben Elliston e3e473dacc 2001-07-05 Ben Elliston <bje@redhat.com>
* Make-common.in (srccgen): Remove.
	(CGEN_CPU_DIR): Define.
	(CGEN_READ_SCM): Redefine without $(srccgen).
	(CGEN_ARCH_SCM): Ditto.
	(CGEN_CPU_SCM): Ditto.
	(CGEN_DECODE_SCM): Ditto.
	(CGEN_DESC_SCM): Ditto.

	* $arch/Makefile.in: Use $(CGEN_CPU_DIR) where applicable.
2001-07-05 13:51:26 +00:00
Stephane Carrez 81e09ed832 Improve HC11 simulator to support HC12 2001-05-20 15:40:27 +00:00
Stephane Carrez 11115521f6 * dv-m68hc11sio.c (m68hc11sio_tx_poll): Always check for
pending interrupts.
	* interrupts.c (interrupts_process): Keep track of the last number
	of masked insn cycles.
	(interrupts_initialize): Clear last number of masked insn cycles.
	(interrupts_info): Report them.
	(interrupts_update_pending): Compute clear and set masks of
	interrupts and clear the interrupt bits before setting them
	(due to SCI interrupt sharing).
	* interrupts.h (struct interrupts): New members last_mask_cycles
	and xirq_last_mask_cycles.
2001-05-20 15:36:29 +00:00
Nick Clifton fb7a8ef0df Fix handling of XScale LDRD and STRD instructions with post indexed addressing modes. 2001-05-11 21:51:07 +00:00
Andrew Cagney d448180670 Don't loose last block during a dma. 2001-05-10 17:48:10 +00:00
Nick Clifton dac07255f9 Check Mode not Bank in order to determine rocesor mode. 2001-05-08 08:28:28 +00:00
Jim Blandy ff88f59d5a *** empty log message *** 2001-05-07 06:10:25 +00:00
Jim Blandy be5fcb106b * mn10300.igen: Doc fixes. 2001-05-07 04:52:00 +00:00
Alexandre Oliva cc274e7c27 * Makefile.in (idecode.o, op_utils.o, semantics.o, simops.o):
Depend on targ-vals.h.
2001-04-26 19:23:16 +00:00
Frank Ch. Eigler 2836ee25d9 * thanks, nickc
2001-04-25  Frank Ch. Eigler  <fche@redhat.com>

	* sim-load.c (sim_load_file): Put it back [...]
2001-04-25 21:14:28 +00:00
Andrew Cagney 5b77812558 Revert call to bfd_cache_close(). 2001-04-21 22:50:55 +00:00
Frank Ch. Eigler 6ec9f4a9be * bug fix
2001-04-19  Frank Ch. Eigler  <fche@redhat.com>

	* sim-utils.c (sim_analyze_program): Call bfd_cache_close after
	we're finished with its immediate use.
	* sim-load.c (sim_load_file): Ditto.
2001-04-19 20:59:30 +00:00
Matthew Green c3ae2f98d0 * XScale coprocessor support.
2001-04-18  matthew green  <mrg@redhat.com>

	* armcopro.c (write_cp15_reg): Set CHANGEMODE if endianness changes.
	(read_cp15_reg): Make non-static.
	(XScale_cp15_LDC): Update for write_cp15_reg() change.
	(XScale_cp15_MCR): Likewise.
	(XScale_cp15_write_reg): Likewise.
	(XScale_check_memacc): New function. Check for breakpoints being
	activated by memory accesses.  Does not support the Branch Target
	Buffer.
	(XScale_set_fsr_far): New function. Set FSR and FAR for XScale.
	(XScale_debug_moe): New function. Set the debug Method Of Entry,
	if configured.
	(write_cp14_reg): Reset count counter if requested.
	* armdefs.h (struct ARMul_State): New members `LastTime' and
	`CP14R0_CCD' used for the timer/counters.
	(ARMul_CP13_R0_FIQ, ARMul_CP13_R0_IRQ, ARMul_CP13_R8_PMUS,
	ARMul_CP14_R0_ENABLE, ARMul_CP14_R0_CLKRST, ARMul_CP14_R0_CCD,
	ARMul_CP14_R0_INTEN0, ARMul_CP14_R0_INTEN1, ARMul_CP14_R0_INTEN2,
	ARMul_CP14_R0_FLAG0, ARMul_CP14_R0_FLAG1, ARMul_CP14_R0_FLAG2,
	ARMul_CP14_R10_MOE_IB, ARMul_CP14_R10_MOE_DB, ARMul_CP14_R10_MOE_BT,
	ARMul_CP15_R1_ENDIAN, ARMul_CP15_R1_ALIGN, ARMul_CP15_R5_X,
	ARMul_CP15_R5_ST_ALIGN, ARMul_CP15_R5_IMPRE, ARMul_CP15_R5_MMU_EXCPT,
	ARMul_CP15_DBCON_M, ARMul_CP15_DBCON_E1, ARMul_CP15_DBCON_E0): New
	defines for XScale registers.
	(XScale_check_memacc, XScale_set_fsr_far, XScale_debug_moe): Prototype.
	(ARMul_Emulate32, ARMul_Emulate26): Clean up function definition.
	(ARMul_Emulate32): Handle the clock counter and hardware instruction
	breakpoints.  Call XScale_set_fsr_far() for software breakpoints and
	software interrupts.
	(LoadMult): Call XScale_set_fsr_far() for data aborts.
	(LoadSMult): Likewise.
	(StoreMult): Likewise.
	(StoreSMult): Likewise.
	* armemu.h (write_cp15_reg): Update prototype.
	* arminit.c (ARMul_NewState): Initialise CP14R0_CCD and LastTime.
	(ARMul_Abort): If XScale, check for FIQ and IRQ being enabled in CP13
	register 0.
	* armvirt.c (GetWord): Call XScale_check_memacc().
	(PutWord): Likewise.
2001-04-18 16:39:37 +00:00
J.T. Conklin d4424adaef * Makefile.in (simops.o): Add simops.h to dependency list. 2001-04-15 19:57:10 +00:00
Jim Blandy c0efbca4a3 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
set of the FCSR.
* sim-main.h (COCIDX): Remove definition; this isn't supported by
PENDING_FILL, and you can get the intended effect gracefully by
calling PENDING_SCHED directly.
2001-04-12 14:53:20 +00:00
Nick Clifton 3cf84db9ef Do not enable alignment checking when loading unaligned thumb instructions. 2001-03-20 17:48:02 +00:00
Frank Ch. Eigler 764f1408a3 * mmap support for common simulators
2001-03-16  Frank Ch. Eigler  <fche@redhat.com>

	Add support for mmap-based memory regions.
	* sim-memopt.c (mmap_next_fd): New global.
	(sim_memory_init): Reinitialize it.
	(OPTION_MEMORY_MAPFILE, memory_option_handler): Support new
	"--memory-mapfile FILE" option.  Check for some errors.
	(do_memopt_add): Conditionally do mmap instead of malloc for
	backing store of simulated memory.  Check for more errors.
	(do_simopt_delete, sim_memory_uninstall): Corresponding cleanup.
	* sim-memopt.h (munmap_length): New member of _sim_memopt.
	* configure.in: Look for mmap/fstat related functions and headers.
	* config.in, configure: Regenerated.
2001-03-20 17:13:39 +00:00
Frank Ch. Eigler 35c209920b * tweak
2001-03-15  Frank Ch. Eigler  <fche@redhat.com>

	* sim-core.c (sim_core_map_attach): Correct overlap-related
	error messages.
2001-03-16 03:20:26 +00:00
Andrew Cagney 1e6cd1593b Link with libintl, needed by libopcodes. 2001-03-14 21:51:31 +00:00
Michael Meissner f6bb7a3bb0 Remove reference to alloca-conf.h 2001-03-07 20:19:41 +00:00
Nick Clifton 4f3c3dbb37 Fix BLX(1) for Thumb 2001-03-06 22:33:47 +00:00
Andrew Cagney c663138840 Fixes for NetBSD 1.5. NetBSD has been renumbering/renaming its
SYS_* interfaces.
2001-03-05 16:22:45 +00:00
Dave Brolley 55552082e8 2001-03-05 Dave Brolley <brolley
arch.c: Regenerate.
        arch.h: Regenerate.
        cpu.c: Regenerate.
        cpu.h: Regenerate.
        cpuall.h: Regenerate.
        cpux.c: Regenerate.
        cpux.h: Regenerate.
        decode.c: Regenerate.
        decode.h: Regenerate.
        decodex.c: Regenerate.
        decodex.h: Regenerate.
        model.c: Regenerate.
        modelx.c: Regenerate.
        sem-switch.c: Regenerate.
        sem.c: Regenerate.
        semx-switch.c: Regenerate.
2001-03-05 16:05:38 +00:00
Dave Brolley 52fa932eab 2001-03-05 Dave Brolley <brolley@
* arch.c: Regenerate.
        * arch.h: Regenerate.
        * cpu.c: Regenerate.
        * cpu.h: Regenerate.
        * cpuall.h: Regenerate.
        * decode.c: Regenerate.
        * decode.h: Regenerate.
        * model.c: Regenerate.
        * sem-switch.c: Regenerate.
        * sem.c: Regenerate.
2001-03-05 16:00:17 +00:00
Nick Clifton 917bca4f21 Add support for disabling alignment checks when performing GDB interface
calls or SWI emulaiton routines.  (Alignment checking code has not yet been
contributed).
2001-02-28 01:04:24 +00:00