* doc/c-mips.texi: Add entries for -march=vr4120,vr4130,vr4181,
vr5400 and vr5500. Add entry for -mfix-vr4122-bugs.
* config/tc-mips.c (CPU_HAS_DROR, CPU_HAS_ROR): New macros.
(hilo_interlocks): True for CPU_VR5500.
(gpr_interlocks, cop_interlocks): True for CPU_VR5400 and CPU_VR5500.
(mips_fix_vr4122_bugs): New.
(append_insn): Work around 4122 errors if mips_fix_vr4122_bugs.
(mips_emit_delays): Likewise.
(macro2) [M_DROLI]: Use dror or dror32 if CPU_HAS_DROR.
[M_ROLI]: Likewise ror if CPU_HAS_ROR.
(validate_mips_insn, mips_ip): Handle '[', ']', 'e' and '%'.
(OPTION_FIX_VR4122, OPTION_NO_FIX_VR4122): New options.
(md_longopts): Add -mfix-vr4122-bugs and -no-mfix-vr4122-bugs.
(OPTION_ELF_BASE): Bump.
(md_parse_option): Handle the new options.
(mips_cpu_info_table): Add entries for vr4120, vr4130, vr4181,
vr5400 and vr5500.
[gas/testsuite/]
* gas/mips/mips4100.[sd]: Move dmadd16 and madd16 checks to...
* gas/mips/vr4111.[sd]: ...this new test.
* gas/mips/vr4120.[sd],
* gas/mips/vr4122.[sd],
* gas/mips/vr5400.[sd],
* gas/mips/vr5500.[sd]: New tests.
* mips.exp: Run them.
* config/tc-sh.c (sh_force_relocation): Return 0 for
some PC relative relocations when not relaxing.
* testsuite/gas/sh/pcrel2.s: New.
* testsuite/gas/sh/pcrel2.d: New.
* testsuite/gas/sh/basic.exp: Add pcrel2 test.
* reloc.c (BFD_RELOC_386_TLS_TPOFF, BFD_RELOC_386_TLS_IE,
BFD_RELOC_386_TLS_GOTIE): Add.
* bfd-in2.h, libbfd.h: Rebuilt.
* elf32-i386.c (elf_howto_table): Add R_386_TLS_TPOFF, R_386_TLS_IE
and R_386_TLS_GOTIE.
(elf_i386_reloc_type_lookup): Handle it.
(struct elf_i386_link_hash_entry): Change tls_type type to unsigned
char instead of enum, change GOT_* into defines.
(GOT_TLS_IE_POS, GOT_TLS_IE_NEG, GOT_TLS_IE_BOTH): Define.
(elf_i386_tls_transition): Handle R_386_TLS_IE and R_386_TLS_GOTIE.
(elf_i386_check_relocs): Likewise. Avoid crash if local symbol is
accessed both as normal and TLS symbol. Move R_386_TLS_LDM and
R_386_PLT32 cases so that R_386_TLS_IE can fall through.
Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs.
(elf_i386_gc_sweep_hook): Handle R_386_TLS_IE and R_386_TLS_GOTIE.
Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs.
(allocate_dynrelocs): Allocate 2 .got and 2 .rel.got entries if
tls_type is GOT_TLS_IE_BOTH.
(elf_i386_size_dynamic_sections): Likewise.
(elf_i386_relocate_section): Handle R_386_TLS_IE and R_386_TLS_GOTIE.
Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs.
(elf_i386_finish_dynamic_symbol): Use tls_type & GOT_TLS_IE to catch
all 4 GOT_TLS_* TLS types.
gas/
* config/tc-i386.c (tc_i386_fix_adjustable): Handle
BFD_RELOC_386_TLS_IE and BFD_RELOC_386_TLS_GOTIE.
(BFD_RELOC_386_TLS_IE, BFD_RELOC_386_TLS_GOTIE): Define to 0
if not defined.
(lex_got): Handle @GOTNTPOFF and @INDNTPOFF.
(md_apply_fix3, tc_gen_reloc): Handle BFD_RELOC_386_TLS_IE and
BFD_RELOC_386_TLS_GOTIE.
gas/testsuite/
* gas/i386/tlspic.s: Add tests.
* gas/i386/tlspic.d: Regenerated.
* gas/i386/tlsnopic.s: Add tests.
* gas/i386/tlsnopic.d: Regenerated.
include/
* elf/i386.h (R_386_TLS_TPOFF, R_386_TLS_IE, R_386_TLS_GOTIE):
Define.
ld/testsuite/
* ld-i386/i386.exp: New.
* ld-i386/tlsbin.dd: New test.
* ld-i386/tlsbinpic.s: New test.
* ld-i386/tlsbin.rd: New test.
* ld-i386/tlsbin.s: New test.
* ld-i386/tlsbin.sd: New test.
* ld-i386/tlsbin.td: New test.
* ld-i386/tlslib.s: New test.
* ld-i386/tlsnopic1.s: New test.
* ld-i386/tlsnopic2.s: New test.
* ld-i386/tlsnopic.dd: New test.
* ld-i386/tlsnopic.rd: New test.
* ld-i386/tlsnopic.sd: New test.
* ld-i386/tlspic1.s: New test.
* ld-i386/tlspic2.s: New test.
* ld-i386/tlspic.dd: New test.
* ld-i386/tlspic.rd: New test.
* ld-i386/tlspic.sd: New test.
* ld-i386/tlspic.td: New test.
branch type relocs.
(alpha_force_relocation): Don't special-case branch type relocs.
* gas/alpha/elf-reloc-7.s: New.
* gas/alpha/elf-reloc-7.d: New.
* gas/alpha/alpha.exp: Run it.
2002-09-18 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (IS_SEXT_32BIT_NUM): Move closer to top of file.
(IS_SEXT_16BIT_NUM): New macro.
(macro_build_ldst_constoffset): New function, to build a set of
instructions to do a load or store from a constant offset relative
to a given register.
(macro, s_cprestore): Use macro_build_ldst_constoffset to implement
.cprestore pseudo-op.
[ gas/testsuite/ChangeLog ]
2002-09-18 Chris Demetriou <cgd@broadcom.com>
* gas/mips/mips-abi32-pic2.s: New file.
* gas/mips/mips-abi32-pic2.d: New file.
* gas/mips/mips.exp: Run new test.
[ plus, fixed date on prev. gas/testsuite/ChangeLog entry. ]
2002-09-18 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (md_apply_fix3): Just return for BFD_RELOC_8.
[ gas/testsuite/ChangeLog ]
2002-09-18 Chris Demetriou <cgd@broadcom.com>
* gas/mips/baddata1.s: New file.
* gas/mips/baddata1.l: New file.
* gas/mips/mips.exp: Run new test.
(macro): Likewise for la. Likewise for ld.
(mips_after_parse_args): Make -xgot optional, not the default.
(md_apply_fix3): Allow composite relocation to set up gp.
(tc_gen_reloc): Allow relaxing for newabi.
Relax R_MIPS_CALL16 to R_MIPS_GOT_PAGE/R_MIPS_GOT_OFST if local.
Relax R_MIPS_GOT16/R_MIPS_LO16 to R_MIPS_GOT_DISP if local.
Do not issue reloc number of unimplemented BFD_RELOC_ARM_IMMEDIATE and
BFD_RELOC_ARM_OFFSET_IMM relocs - their name is already in the error message
- plus remove them from the default case.
Warn about unpredictable behavior of LDM and STM instructions.
* elf32-i386.c: Don't defined ELF_ARCH etc. if this file is included
by a target variant implementation.
* elf64-alpha.c: Likewise.
* elf32-i386-fbsd.c: New file.
* elf64-alpha-fbsd.c: New file.
* targets.c: Support bfd_elf32_i386_freebsd_vec and
bfd_elf64_alpha_freebsd_vec.
* configure.in: Accept the vectors bfd_elf32_i386_freebsd_vec,
bfd_elf64_alpha_freebsd_vec.
* Makefile.am (BFD32_BACKENDS): Add elf32-i386-fbsd.lo.
(BFD32_BACKENDS_CFILES): Add elf32-i386-fbsd.c.
(BFD64_BACKENDS): Add elf64-alpha-fbsd.lo.
(BFD64_BACKENDS_CFILES): Add elf64-alpha-fbsd.c.
(elf32-i386-fbsd.lo, elf64-alpha-fbsd.lo): Add dependencies.
* config.bfd: For FreeBSD targets, set targ_defvec to a FreeBSD
specific targets. Define OLD_FREEBSD_ABI_LABEL if appropriate.
* config/tc-i386.h (ELF_TARGET_FORMAT): New macro.
(TARGET_FORMAT): Use ELF_TARGET_FORMAT instead of "elf32-i386".
* config/tc-i386.c (i386_target_format): Likewise.
* config/tc-alpha.h (ELF_TARGET_FORMAT): New macro.
(TARGET_FORMAT): Use ELF_TARGET_FORMAT instead of "elf64-alpha".
* emulparams/elf_i386_fbsd.sh: Set OUTPUT_FORMAT to
elf32-i386-freebsd.
* emulparams/elf64alpha_fbsd.sh: Set OUTPUT_FORMAT to
elf64-alpha-freebsd.
Approved by: Alan Modra <amodra@bigpond.net.au>
Message-ID: <20020715021113.GJ30362@bubble.sa.bigpond.net.au>
* config/tc-ppc.c (ppc_cleanup): Do something only if format
is ELF.
(ppc_apuinfo_section_add): Define only if format is ELF.
(md_assemble): Emit APUinfo section only if format is ELF.
Fix formatting.
* config/tc-mips.c (macro2): Implement rotates by zero using shifts
by zero.
[gas/testsuite]
* gas/mips/rol.s: Add rotate by zero tests.
* gas/mips/rol.d: Update accordingly.
* gas/mips/rol64.d: Expect rotates by zero to use dsrl.
From matthew green <mrg@redhat.com>
* config/tc-ppc.c (PPC_OPCODE_CLASSIC): Enable this everywhere
PPC_OPCODE_PPC is, except for BookE architectures.
(md_parse_option): Add support for -mspe.
(md_show_usage): Add -mspe.
(md_parse_option): Add support for -me500 and
-me500x2 to generate code for Motorola e500 core complex.
(md_show_usage): Add -me500 and -me500x2.
(PPC_APUINFO_ISEL, PPC_APUINFO_PMR, PPC_APUINFO_RFMCI,
PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE, PPC_APUINFO_EFS,
PPC_APUINFO_BRLOCK): New macros.
(ppc_cleanup): New function.
(ppc_apuinfo_section_add): New function.
(APUID): New macro.
(md_assemble): Collect info and write the APUinfo section.
* config/tc-ppc.h (md_cleanup): Define.
(ppc_cleanup): Export.
(ELF_TC_SPECIAL_SECTIONS): Add .PPC.EMB.apuinfo section.
the fix-up against on the right frag.
(s_cpsetup): Likewise. Parse third argument as expression, to
handle global symbols and forward/backward labels correctly.
(TC_HANDLES_FX_DONE): Define to let md_apply_fix3 set fx_done flag
according to the reloc.
(tc_fix_adjustable, tc_m68hc11_fix_adjustable): Define.
(TC_FORCE_RELOCATION): Define.
(tc_m68hc11_force_relocation): Declare.
* config/tc-m68hc11.c (md_pseudo_table): Add relax command.
(s_m68hc11_relax): New function for relax group.
(build_insn, build_jump_insn): Emit a M68HC11_RL_JUMP reloc at
beginning of jump instruction.
(md_pcrel_from): Rename from md_pcrel_from_section and fix
address computation.
(tc-gen_reloc): Update.
(md_estimate_size_before_relax): Create the BFD_RELOC_16_PCREL as
PC-relative fixup.
(tc_m68hc11_force_relocation): New function, handle new relocs.
(tc_m68hc11_fix_adjustable): New to make sure there are enough
reloc for the linker relax pass.
(md_apply_fix3): Handle M68HC11_RL_JUMP, M68HC11_RL_GROUP
and VTABLE relocs.
(md_pseudo_table): Add .mode, .far and .interrupt pseudo op.
(s_m68hc11_mode): New function for .mode pseudo op.
(s_m68hc11_mark_symbol): New function for .far and .interrupt
pseudo op.
* config/tc-m68hc11.h (elf_tc_final_processing): Define.
(m68hc11_elf_final_processing): Declare.
page operand for call instruction.
(print_opcode_format): Likewise.
(check_range): Likewise for page range checking.
(get_operand): Don't skip a possible comma in operands.
(fixup8): Generate BFD_RELOC_M68HC11_PAGE reloc.
(fixup16): Likwise with BFD_RELOC_M68HC11_LO16.
(fixup24): New to handle call reloc.
(build_insn): Handle missing page operand for call instruction.
(find): Likewise.
(md_apply_fix3): Take into account new relocs.
(get_operand): Fix the mode for indexed indirect addressing.
(build_indexed_byte): Fix post index byte for indexed indirect mode.