Commit Graph

2284 Commits

Author SHA1 Message Date
H.J. Lu 0f550b3df1 Update symbol version for symbol from linker script
We need to update symbol version for symbols from linker script.

bfd/

	PR ld/19698
	* elflink.c (bfd_elf_record_link_assignment): Set versioned if
	symbol version is unknown.

ld/

	PR ld/19698
	* testsuite/ld-elf/pr19698.d: New file.
	* testsuite/ld-elf/pr19698.s: Likewise.
	* testsuite/ld-elf/pr19698.t: Likewise.
2016-02-24 15:13:48 -08:00
Renlin Li 92d77487b3 Revert "ABS32"
This reverts commit 30bdf5c82e.
2016-02-24 15:01:07 +00:00
Renlin Li 30bdf5c82e ABS32 2016-02-24 14:01:48 +00:00
H.J. Lu 6b3b0ab896 Make linker assigned symbol dynamic only for shared object
Linker assigned symbols should be made dynamic by default only when
creating shared object or relocatable executable.

bfd/

	* elflink.c (bfd_elf_record_link_assignment): Check for shared
	library, instead of PIC, and don't check PDE when making linker
	assigned symbol dynamic.

ld/

	* testsuite/ld-frv/fdpic-pie-6.d: Updated.
	* testsuite/ld-mips-elf/pie-n32.d: Likewise.
	* testsuite/ld-mips-elf/pie-n64.d: Likewise.
	* testsuite/ld-mips-elf/pie-o32.d: Likewise.
2016-02-23 05:19:03 -08:00
H.J. Lu de818c22b6 Skip pr19539 test for cris*-*-* targets
cris*-*-* targets doesn't support PIE with relocation in pr19539 test.

	* testsuite/ld-elf/pr19539.d: Skip cris*-*-* targets.
2016-02-20 14:45:25 -08:00
H.J. Lu c304e18e5c Enable PR ld/19617 tests only for Linux/GNU/Solaris
Since PR ld/19617 tests require share library support, enable them
only for Linux/GNU/Solaris targets.

	* testsuite/ld-elf/pr19617a.d: Enable only for *-*-linux*,
	*-*-gnu* and *-*-solaris*.
	* testsuite/ld-elf/pr19617b.d: Likewise.
	* testsuite/ld-elf/pr19617c.d: Likewise.
2016-02-18 07:48:57 -08:00
H.J. Lu bf89386a86 Always create dynamic sections for -E/--dynamic-list
In embedded environments, including boot loaders, the non-PIC executable
needs to export its symbols to modules loaded in the future.  We should
always create dynamic sections for -E/--dynamic-list.

bfd/

	PR ld/19617
	* elflink.c (elf_link_add_object_symbols): Always create dynamic
	sections for -E/--dynamic-list.

ld/

	PR ld/19617
	* testsuite/ld-elf/pr19617.s: New file.
	* testsuite/ld-elf/pr19617a.d: Likewise.
	* testsuite/ld-elf/pr19617b.d: Likewise.
	* testsuite/ld-elf/pr19617c.d: Likewise.
2016-02-18 03:13:51 -08:00
H.J. Lu b27ab9ad1c Update IFUNC tests for x32
* testsuite/ld-ifunc/ifunc-1-local-x86.d: Updated.
	* testsuite/ld-ifunc/ifunc-1-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-3a-x86.d: Likewise.
2016-02-17 13:05:06 -08:00
H.J. Lu 8f79b794ce [x86-64] Omit dynamic sections symbols
Define elf_backend_omit_section_dynsym to bfd_true for x86-64, similar
to i386, x86-64 doesn't need dynamic sections symbols.

bfd/

	* elf64-x86-64.c (elf_backend_omit_section_dynsym): New.  Defined
	to bfd_true.

ld/

	* testsuite/ld-ifunc/ifunc-1-local-x86.d: Updated.
	* testsuite/ld-ifunc/ifunc-1-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-2-local-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-2-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-3a-x86.d: Likewise.
	* testsuite/ld-ifunc/pr17154-x86-64.d: Likewise.
	* testsuite/ld-x86-64/bnd-ifunc-1.d: Likewise.
	* testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise.
	* testsuite/ld-x86-64/bnd-plt-1.d: Likewise.
	* testsuite/ld-x86-64/ilp32-4-nacl.d: Likewise.
	* testsuite/ld-x86-64/ilp32-4.d: Likewise.
	* testsuite/ld-x86-64/load1c-nacl.d: Likewise.
	* testsuite/ld-x86-64/load1c.d: Likewise.
	* testsuite/ld-x86-64/load1d-nacl.d: Likewise.
	* testsuite/ld-x86-64/load1d.d: Likewise.
	* testsuite/ld-x86-64/pr14207.d: Likewise.
	* testsuite/ld-x86-64/pr19162.d: Likewise.
	* testsuite/ld-x86-64/tlsdesc-nacl.rd: Likewise.
	* testsuite/ld-x86-64/tlsdesc.rd: Likewise.
	* testsuite/ld-x86-64/tlsgdesc-nacl.rd: Likewise.
	* testsuite/ld-x86-64/tlsgdesc.rd: Likewise.
	* testsuite/ld-x86-64/tlspic-nacl.rd: Likewise.
	* testsuite/ld-x86-64/tlspic.rd: Likewise.
2016-02-17 11:19:04 -08:00
Nick Clifton b3e3e0b781 Skip eh-frame-hdr test for arc-elf targets.
ld	* testsuite/ld-elf/eh-frame-hdr.d: Skip for ARC ELF targets.
2016-02-17 10:20:53 +00:00
Nick Clifton 9fb71ee49f Enhance GAS's .section directive so that it can take numeric values for the flags and type fields. (ELF only)
gas	* doc/as.texinfo (.section): Document that numeric values can now
	be used for the flags and type fields of the ELF target's .section
	directive.  Add notes about the restrictions on setting flags and
	types.
	* config/obj-elf.c (obj_elf_change_section): Allow known sections
	to be given processor specific section types.  Allow processor and
	application specific flags of a section to be set after
	definition.
	(obj_elf_parse_section_letters): Handle parsing numeric values.
	(obj_elf_section_type): Handle parsing numeric values.
	(obj_elf_section): Allow numeric type values.
	* config/obj-elf.h (obj_elf_change_section): Update prototype.
	* testsuite/gas/elf/section10.d: New test.
	* testsuite/gas/elf/section10.s: Source file for new test.
	* testsuite/gas/elf/elf.exp: Run the new test.
	* testsuite/gas/i386/ilp32/x86-64-unwind.d: Remove dependency upon
	the description of the flags produced by readelf.
	* testsuite/gas/tic6x/scomm-directive-4.d: Likewise.
	* NEWS: Mention the new feature.

bfd	* elf-bfd.h (struct bfd_elf_special_section): Use unsigned values
	for length and type fields.  Use a signed value for the
	suffix_length field.

binutils* readelf.c (get_section_type_name): Add hex prefix to offsets
	printed for LOPROC and LOOS values.  Ensure that a result is
	always returned for the V850 target, even when an unrecognised
	processor specific value is encountered.
	(process_section_headers): Display key values in the order in
	which they appear to the user.  Add the "C (compressed)" value to
	the list.

ld	* testsuite/ld-i386/pr12718.d: Remove dependency upon the
	description of the flags produced by readelf.
	* testsuite/ld-i386/pr12921.d: Likewise.
	* testsuite/ld-i386/tlsbin-nacl.rd: Likewise.
	* testsuite/ld-i386/tlsbin.rd: Likewise.
	* testsuite/ld-i386/tlsbindesc-nacl.rd: Likewise.
	* testsuite/ld-i386/tlsbindesc.rd: Likewise.
	* testsuite/ld-i386/tlsdesc-nacl.rd: Likewise.
	* testsuite/ld-i386/tlsdesc.rd: Likewise.
	* testsuite/ld-i386/tlsgdesc-nacl.rd: Likewise.
	* testsuite/ld-i386/tlsgdesc.rd: Likewise.
	* testsuite/ld-i386/tlsnopic-nacl.rd: Likewise.
	* testsuite/ld-i386/tlsnopic.rd: Likewise.
	* testsuite/ld-i386/tlspic-nacl.rd: Likewise.
	* testsuite/ld-i386/tlspic.rd: Likewise.
	* testsuite/ld-s390/tlsbin.rd: Likewise.
	* testsuite/ld-s390/tlsbin_64.rd: Likewise.
	* testsuite/ld-s390/tlspic.rd: Likewise.
	* testsuite/ld-s390/tlspic_64.rd: Likewise.
	* testsuite/ld-sh/tlsbin-2.d: Likewise.
	* testsuite/ld-sh/tlspic-2.d: Likewise.
	* testsuite/ld-tic6x/common.d: Likewise.
	* testsuite/ld-tic6x/shlib-1.rd: Likewise.
	* testsuite/ld-tic6x/shlib-1b.rd: Likewise.
	* testsuite/ld-tic6x/shlib-1r.rd: Likewise.
	* testsuite/ld-tic6x/shlib-1rb.rd: Likewise.
	* testsuite/ld-tic6x/shlib-app-1.rd: Likewise.
	* testsuite/ld-tic6x/shlib-app-1b.rd: Likewise.
	* testsuite/ld-tic6x/shlib-app-1r.rd: Likewise.
	* testsuite/ld-tic6x/shlib-app-1rb.rd: Likewise.
	* testsuite/ld-tic6x/shlib-noindex.rd: Likewise.
	* testsuite/ld-tic6x/static-app-1.rd: Likewise.
	* testsuite/ld-tic6x/static-app-1b.rd: Likewise.
	* testsuite/ld-tic6x/static-app-1r.rd: Likewise.
	* testsuite/ld-tic6x/static-app-1rb.rd: Likewise.
	* testsuite/ld-x86-64/ilp32-4-nacl.d: Likewise.
	* testsuite/ld-x86-64/ilp32-4.d: Likewise.
	* testsuite/ld-x86-64/pr12718.d: Likewise.
	* testsuite/ld-x86-64/pr12921.d: Likewise.
	* testsuite/ld-x86-64/split-by-file-nacl.rd: Likewise.
	* testsuite/ld-x86-64/split-by-file.rd: Likewise.
	* testsuite/ld-x86-64/tlsbin-nacl.rd: Likewise.
	* testsuite/ld-x86-64/tlsbin.rd: Likewise.
	* testsuite/ld-x86-64/tlsbindesc-nacl.rd: Likewise.
	* testsuite/ld-x86-64/tlsbindesc.rd: Likewise.
	* testsuite/ld-x86-64/tlsdesc-nacl.rd: Likewise.
	* testsuite/ld-x86-64/tlsdesc.rd: Likewise.
	* testsuite/ld-x86-64/tlsgdesc-nacl.rd: Likewise.
	* testsuite/ld-x86-64/tlsgdesc.rd: Likewise.
	* testsuite/ld-x86-64/tlspic-nacl.rd: Likewise.
	* testsuite/ld-x86-64/tlspic.rd: Likewise.
	* testsuite/ld-xtensa/tlsbin.rd: Likewise.
	* testsuite/ld-xtensa/tlspic.rd: Likewise.
2016-02-15 11:11:46 +00:00
H.J. Lu e20365c5d0 Enable -Bsymbolic and -Bsymbolic-functions to PIE
Before binutils 2.26, -Bsymbolic and -Bsymbolic-functions were also
applied to PIE so that "ld -pie -Bsymbolic -E" can be used to export
symbols in PIE with local binding.  This patch re-enables -Bsymbolic
and -Bsymbolic-functions for PIE.

	PR ld/19615
	* ld.texinfo: Document -Bsymbolic and -Bsymbolic-functions for
	PIE.
	* lexsup.c (parse_args): Enable -Bsymbolic and
	-Bsymbolic-functions for PIE.
	* testsuite/ld-i386/i386.exp: Run pr19175.
	* testsuite/ld-i386/pr19615.d: New file.
	* testsuite/ld-i386/pr19615.s: Likewise.
	* testsuite/ld-x86-64/pr19615.d: Likewise.
	* testsuite/ld-x86-64/pr19615.s: Likewise.
2016-02-11 15:20:13 -08:00
Nick Clifton 027e9c750c Add a more helpful warning message to explain why some AArch64 relocations can overflow.
bfd	* elfnn-aarch64.c (elfNN_aarch64_relocate_section): Add a more
	helpful warning message to explain why certain AArch64 relocs
	might overflow.

ld	* testsuite/ld-aarch64/reloc-overflow-bad.d: New test.
	* testsuite/ld-aarch64/reloc-overflow-1.s: New source file.
	* testsuite/ld-aarch64/reloc-overflow-2.s: New source file.
	* testsuite/ld-aarch64/aarch64-elf.exp: Run the new test.
2016-02-09 10:47:54 +00:00
Walfred Tedeschi 0635c87593 Revert "Add a more helpful warning message to explain why some AArch64 relocations can overflow."
This reverts commit 2ea53e0031.
2016-02-09 11:36:15 +01:00
Nick Clifton 2ea53e0031 Add a more helpful warning message to explain why some AArch64 relocations can overflow.
bfd	* elfnn-aarch64.c (elfNN_aarch64_relocate_section): Add a more
	helpful warning message to explain why certain AArch64 relocs
	might overflow.

ld	* testsuite/ld-aarch64/reloc-overflow-bad.d: New test.
	* testsuite/ld-aarch64/reloc-overflow-1.s: New source file.
	* testsuite/ld-aarch64/reloc-overflow-2.s: New source file.
	* testsuite/ld-aarch64/aarch64-elf.exp: Run the new test.
2016-02-09 09:56:21 +00:00
Nick Clifton 3930612461 Remove support for creating ARM NOREAD sections.
gas	* config/obj-elf.c (obj_elf_change_section): Remove support for
	ARM NOREAD sections.
	* config/tc-arm.c (arm_elf_section_letter): Delete.
	* config/tc-arm.h (md_elf_section_letter): Delete.
	* doc/c-arm.texi (ARM Section Attribute): Delete section.
	* testsuite/gas/arm/section-execute-only.d: Delete.
	* testsuite/gas/arm/section-execute-only.s: Delete.

ld	* testsuite/ld-arm/arm-elf.exp: Remove ARM NOREAD section tests.
	* testsuite/ld-arm/thumb1-input-section-flag-match.d: Delete.
	* testsuite/ld-arm/thumb1-input-section-flag-match.s: Delete.
	* testsuite/ld-arm/thumb1-noread-not-present-mixing-two-section.d: Delete.
	* testsuite/ld-arm/thumb1-noread-not-present-mixing-two-section.s: Delete.
	* testsuite/ld-arm/thumb1-noread-present-one-section.d: Delete.
	* testsuite/ld-arm/thumb1-noread-present-one-section.s: Delete.
	* testsuite/ld-arm/thumb1-noread-present-two-section.d: Delete.
	* testsuite/ld-arm/thumb1-noread-present-two-section.s: Delete.
2016-02-04 11:57:57 +00:00
H.J. Lu 0cb4071ef9 Add -mrelax-relocations= to x86 assembler
The x86 relax relocations introduced in binutils 2.26 aren't supported
by linker on Solaris older than Solaris 12.  To use x86 assembler with
older Solaris linker, this patch adds

1. A command line option -mrelax-relocations= to x86 assembler to
control whether to generate relax relocations.
2. A configure option --enable-x86-relax-relocations to decide whether
x86 assembler should generate relax relocations by default.  It is
defaulted to yes, except for x86 Solaris targets older than Solaris 12.

gas/

	PR gas/19520
	* NEWS: Mention new command line option -mrelax-relocations and
	new configure option --enable-x86-relax-relocations for x86
	target.
	* config.in: Regenerated.
	* configure.ac: Add --enable-x86-relax-relocations.
	(ac_default_x86_relax_relocations): New.  Default to 1 except
	for x86 Solaris targets older than Solaris 12.
	(DEFAULT_GENERATE_X86_RELAX_RELOCATIONS): Define.
	* configure: Likewise.
	* config/tc-i386.c (generate_relax_relocations): New.
	(OPTION_MRELAX_RELOCATIONS): Likewise.
	(output_disp): Don't generate relax relocations if
	generate_relax_relocations is 0.
	(md_longopts): Add -mrelax-relocations.
	(md_show_usage): Likewise.
	(md_parse_option): Handle OPTION_MRELAX_RELOCATIONS.
	* doc/c-i386.texi: Document -mrelax-relocations=.
	* testsuite/gas/i386/got-no-relax.d: New file.
	* testsuite/gas/i386/x86-64-gotpcrel-no-relax.d: Likewise.
	* testsuite/gas/i386/got.d: Pass -mrelax-relocations=yes to as.
	* testsuite/gas/i386/localpic.d: Likewise.
	* testsuite/gas/i386/mixed-mode-reloc32.d: Likewise.
	* testsuite/gas/i386/reloc32.d: Likewise.
	* testsuite/gas/i386/x86-64-gotpcrel.d: Likewise.
	* testsuite/gas/i386/x86-64-localpic.d: Likewise.
	* testsuite/gas/i386/ilp32/x86-64-gotpcrel.d: Likewise.
	* testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.
	* testsuite/gas/i386/i386.exp: Run got-no-relax and
	x86-64-gotpcrel-no-relax.

ld/

	PR gas/19520
	* testsuite/ld-i386/branch1.d: Pass -mrelax-relocations=yes to as.
	* testsuite/ld-i386/call1.d: Likewise.
	* testsuite/ld-i386/call2.d: Likewise.
	* testsuite/ld-i386/call3a.d: Likewise.
	* testsuite/ld-i386/call3b.d: Likewise.
	* testsuite/ld-i386/call3c.d: Likewise.
	* testsuite/ld-i386/call3d.d: Likewise.
	* testsuite/ld-i386/call3e.d: Likewise.
	* testsuite/ld-i386/call3f.d: Likewise.
	* testsuite/ld-i386/call3g.d: Likewise.
	* testsuite/ld-i386/call3h.d: Likewise.
	* testsuite/ld-i386/jmp1.d: Likewise.
	* testsuite/ld-i386/jmp2.d: Likewise.
	* testsuite/ld-i386/lea1c.d: Likewise.
	* testsuite/ld-i386/load1.d: Likewise.
	* testsuite/ld-i386/load2.d: Likewise.
	* testsuite/ld-i386/load3.d: Likewise.
	* testsuite/ld-i386/load4a.d: Likewise.
	* testsuite/ld-i386/load5a.d: Likewise.
	* testsuite/ld-i386/mov2b.d: Likewise.
	* testsuite/ld-i386/mov3.d: Likewise.
	* testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-5r-local-x86-64.d: Likewise.
	* testsuite/ld-x86-64/call1a.d: Likewise.
	* testsuite/ld-x86-64/call1b.d: Likewise.
	* testsuite/ld-x86-64/call1c.d: Likewise.
	* testsuite/ld-x86-64/call1d.d: Likewise.
	* testsuite/ld-x86-64/call1e.d: Likewise.
	* testsuite/ld-x86-64/call1f.d: Likewise.
	* testsuite/ld-x86-64/call1h.d: Likewise.
	* testsuite/ld-x86-64/call1i.d: Likewise.
	* testsuite/ld-x86-64/load1a.d: Likewise.
	* testsuite/ld-x86-64/load1b.d: Likewise.
	* testsuite/ld-i386/got1a.S: Load GOT into %ecx and use it.
	* testsuite/ld-i386/got1.dd: Updated.
	* testsuite/ld-i386/got1d.S (1): Removed.
	* testsuite/ld-i386/i386.exp: Add -Wa,-mrelax-relocations=yes.
	* testsuite/ld-x86-64/x86-64.exp: Likewise.
2016-02-03 08:25:15 -08:00
H.J. Lu 6ba2af251c Add a testcase for PR ld/18591
PR ld/18591
	* testsuite/ld-x86-64/pr18591.d: New file.
	* testsuite/ld-x86-64/pr18591.s: Likewise.
	* testsuite/ld-x86-64/x86-64.exp: Run pr18591.
2016-02-02 06:36:52 -08:00
H.J. Lu aef2898990 Don't add DT_NEEDED for unmatched symbol
Don't add DT_NEEDED if a symbol from a library loaded via DT_NEEDED
doesn't match the symbol referenced by regular object.

bfd/

	PR ld/19553
	* elflink.c (elf_link_add_object_symbols): Don't add DT_NEEDED
	if a symbol from a library loaded via DT_NEEDED doesn't match
	the symbol referenced by regular object.

ld/testsuite/

	PR ld/19553
	* testsuite/ld-elf/indirect.exp: Run tests for PR ld/19553.
	* testsuite/ld-elf/pr19553.map: New file.
	* testsuite/ld-elf/pr19553.map: Likewise.
	* testsuite/ld-elf/pr19553a.c: Likewise.
	* testsuite/ld-elf/pr19553b.c: Likewise.
	* testsuite/ld-elf/pr19553b.out: Likewise.
	* testsuite/ld-elf/pr19553c.c: Likewise.
	* testsuite/ld-elf/pr19553c.out: Likewise.
	* testsuite/ld-elf/pr19553d.c: Likewise.
	* testsuite/ld-elf/pr19553d.out: Likewise.
2016-02-01 15:49:52 -08:00
H.J. Lu d9e3b59069 Check reloc against IFUNC symbol only with dynamic symbols
There is no need to check relocation IFUNC symbol if there are no
dynamic symbols.

bfd/

	PR ld/19539
	* elf32-i386.c (elf_i386_reloc_type_class): Check relocation
	against STT_GNU_IFUNC symbol only with dynamic symbols.
	* elf64-x86-64.c (elf_x86_64_reloc_type_class): Likewise.

ld/

	PR ld/19539
	* testsuite/ld-elf/pr19539.d: New file.
	* testsuite/ld-elf/pr19539.s: Likewise.
	* testsuite/ld-elf/pr19539.t: Likewise.
2016-01-30 16:08:20 -08:00
Nick Clifton dfc4394024 Fix linker testsuite failures for ARM netbsdelf target.
PR ld/19453
	* testsuite/ld-arm/arm-elf.exp: Skip tests that do not work for
	the arm-netbsdelf target.
2016-01-21 15:20:57 +00:00
Nick Clifton aebf9be708 Fix unexpected failures in the linker testsuite for ARM VxWorks targets.
PR ld/19455
	* elf32-arm.c (elf32_arm_create_dynamic_sections): Set the ELF
	class of the linker stub bfd.
	(elf32_arm_check_relocs): Skip check for pic format after
	processing a vxWorks R_ARM_ABS12 reloc.
	* elflink.c (bfd_elf_final_link): Check for ELFCLASSNONE when
	reporting a class mismatch.

	* testsuite/ld-arm/vxworks1-lib.dd: Update for current
	disassmebler output.
	* testsuite/ld-arm/vxworks1-lib.rd: Likewise.
	* testsuite/ld-arm/vxworks1.dd: Likewise.
	* testsuite/ld-arm/vxworks1.rd: Likewise.
	* testsuite/ld-arm/vxworks1.ld: Set the output format.
2016-01-21 10:51:25 +00:00
Jiong Wang 2f340668a9 [AArch64] Relax long branch veneer insertion for non STT_FUNC symbol
As defined at AArch64 ELF Specification (4.6.7 Call and Jump
  relocations), symbol with type of non STT_FUNC but in different input
  section with relocation place should insert long branch veneer also.

  Meanwhile the current long branch veneer infrastructure havn't considered
  the situation where the branch destination is "sym_value + rela->addend".

  This was OK because we only insert veneer for long call destination is
  STT_FUNC symbol for which the addend is always zero. But as we relax the
  support to other situations by this patch, we need to handle addend be
  non-zero value. For example, for static function, relocation against
  "local symbol" are turned into relocation against "section symbol + offset"
  where there is a valid addend.

  bfd/
	* elfnn-aarch64.c (aarch64_type_of_stub): Allow insert long branch
	veneer for sym_sec != input_sec.
	(elfNN_aarch64_size_stub): Support STT_SECTION symbol.
	(elfNN_aarch64_final_link_relocate): Take rela addend into account when
	calculation destination.

  ld/
	* testsuite/ld-aarch64/farcall-section.d: Delete.
	* testsuite/ld-aarch64/farcall-section.s: Delete.
	* testsuite/ld-aarch64/farcall-b-section.d: New expectation file.
	* testsuite/ld-aarch64/farcall-bl-section.d: Likewise.
	* testsuite/ld-aarch64/farcall-b-section.s: New testcase.
	* testsuite/ld-aarch64/farcall-bl-section.s: Likewise.
	* testsuite/ld-aarch64/aarch64-elf.exp: Likewise.
2016-01-21 09:57:09 +00:00
Nick Clifton fdbd3e95ee Fix linker testsuite failures for arm-pe targets.
PR 19457
	* testsuite/ld-scripts/script.exp (extract_symbol_test): Stop test
	early for PE based targets.
	* testsuite/ld-scripts/align.t: Use 0x1000 as VMA alignment.
	* testsuite/ld-pe/tlssec32.d: Allow for relocatable output.
2016-01-20 15:41:06 +00:00
Mickael Guene 91f68a68f9 Add support for an ARM specific 'y' section attribute flag to mark the section as NOREAD.
bfd/ChangeLog:
      * elf32-arm.c ((elf32_arm_special_sections): Remove catch of noread
      section using '.text.noread' pattern.

gas/ChangeLog:
      * config/obj-elf.c (obj_elf_change_section) : Allow arm section with
      SHF_ARM_NOREAD section flag.
      * config/tc-arm.h (md_elf_section_letter) : Implement this hook to
      handle letter 'y'.
     (arm_elf_section_letter) : Declare it.
      * config/tc-arm.c (arm_elf_section_letter): Handle letter 'y' to set
      SHF_ARM_NOREAD section flag.
      * doc/c-arm.texi (ARM section attribute 'y'): Document it.

gas/testsuite/ChangeLog:
      * gas/arm/section-execute-only.s: New test case.
      * gas/arm/section-execute-only.d: Expected output.

ld/testsuite/ChangeLog:
      * ld-arm/thumb1-noread-not-present-mixing-two-section.s: Add 'y'
      attribute usage.
      * ld-arm/thumb1-noread-present-one-section.s: Likewise.
      * ld-arm/thumb1-noread-present-two-section.s: Likewise.
      * ld-arm/thumb1-input-section-flag-match.s: Likewise.

binutils/ChangeLog:
      * readelf.c (get_elf_section_flags): Display y letter for section
      with SHF_ARM_NOREAD section flag in readelf section output.
      (process_section_headers): Add y letter in readelf section output
      key mapping for ARM architecture.
2016-01-20 12:53:50 +00:00
Nick Clifton a4af960aef Fix PR18735 test for RL78.
* testsuite/ld-elf/pr18735.d: Allow for extra symbols between
	foo@FOO and bar@@FOO.
2016-01-19 09:57:03 +00:00
Nick Clifton 24f03d4ecf Re-enable rgn-at11 test for MIPS targets with adjusted section alignment.
* testsuite/ld-scripts/rgn-at11.s: New file - based on rgn-at10.s
	but with 16 byte section alignment.
	* testsuite/ld-scripts/rgn-at11.d: Use new source file.  Reenable
	test for MIPS targets.
2016-01-18 13:00:33 +00:00
Nick Clifton 760f6ee894 Skip linker plugin tests if the linker has not been configured to support plugins.
* ld-plugin/plugin.exp: Skip plugin tests if the linker is not
	configured to support plugins.
2016-01-18 11:23:44 +00:00
Alan Modra b3066ae825 m68hc11/12 and xgate config.sub weirdness
Oddly, config.sub converts a duple ending in -elf for these target to
-unknown-none, which means they aren't seen as elf targets by
binutils.  So, counter that.  This exposes a number of testsuite
issues (ones you would have seen if configuring with a full triple,
say m68hc11-unknown-elf).

binutils/
	* testsuite/lib/binutils-common.exp (is_elf_format): Return true
	for m68hc11/12 and xgate triples.
gas/
	* testsuite/gas/cfi/cfi.exp: Exclude m68hc11/12 from m68k test.
ld/
	* testsuite/lib/ld-lib.exp (check_shared_lib_support): Exclude xgate.
	* testsuite/ld-elf/endsym.d: xfail m68hc11/12 and xgate.
	* testsuite/ld-elf/pr14156a.d: Likewise.
	* testsuite/ld-elf/pr14926.d: Don't run for m68hc11/12 and xgate.
	* testsuite/ld-elf/sec64k.exp: Likewise.
2016-01-17 12:13:43 +10:30
Thomas Preud'homme 4c4ac9642a Fix Thumb-Thumb farcall v6-M (no profile) test
2016-01-14  Thomas Preud'homme  <thomas.preudhomme@arm.com>

ld/
    * testsuite/ld-arm/arm-elf.exp (Thumb-Thumb farcall v6-M (no profile)):
    Set address of .foo section when linking.
    * testsuite/ld-arm/farcall-thumb-thumb-m-no-profile-b.s: Place myfunc
    in .foo section.
    * testsuite/ld-arm/farcall-thumb-thumb-m-no-profile.d: Adapt expected
    output to the above changes.
2016-01-14 18:00:55 +08:00
Nick Clifton 8405419985 Mark the linker's -Bsymbolic-functions test as an expected failure for MIPS targets.
* ld-elf/elf.exp (-Bymsolic-functions): Expect to fail
	for MIPS targets.
2016-01-13 10:00:49 +00:00
Nick Clifton 13ce3603be Mark the linker's extract symbols test as an expected failure for MIPS targets.
* testsuite/ld-scripts/script.exp (extract_symbol_test): Expect to
	fail for MIPS targets.
2016-01-13 09:40:11 +00:00
Nick Clifton 1bce3adf99 Mark the rgn-at11 test as an expected failure for MIPS targets.
* ld-scripts/rgn-at11.d: Expect this test to fail for
	MIPS targets.
2016-01-13 09:26:22 +00:00
Yury Usishchev ac06903dcf Add cantunwind when unwind info does not match start of section.
bfd     * elf32-arm.c (elf32_arm_fix_exidx_coverage): Insert cantunwind when
        address in first unwind entry does not match start of section.

tests   * ld-arm/arm-elf.exp: New test.
        * ld-arm/unwind-mix.d: New file.
        * ld-arm/unwind-mix1.s: New file.
        * ld-arm/unwind-mix2.s: New file.
2016-01-12 16:35:49 +00:00
Jiong Wang 109575d7eb [ARM] PR ld/19368: Add missing relocation type class for R_ARM_IRELATIVE
2016-01-08  Richard Sandiford  <richard.sandiford@arm.com>
	    Jiong Wang  <jiong.wang@arm.com>

	PR ld/19368
	bfd/
	* elf32-arm.c (elf32_arm_reloc_type_class): Map R_ARM_IRELATIVE to
	reloc_class_ifunc.

	ld/
	* testsuite/ld-arm/ifunc-3.rd: Update expected result.
	* testsuite/ld-arm/ifunc-4.rd: Likewise.
	* testsuite/ld-arm/ifunc-9.rd: Likewise.
	* testsuite/ld-arm/ifunc-10.rd: Likewise.
	* testsuite/ld-arm/ifunc-12.rd: Likewise.
	* testsuite/ld-arm/ifunc-13.rd: Likewise.
2016-01-08 09:49:03 +00:00
Maciej W. Rozycki d537eeb527 MIPS/BFD: Move attribute check after ELF file header flag check
We have a problem in that in making compatibility checks while merging
private BFD data on the MIPS target we give priority to the attribute
check, which may fail and cause the function to abort early on.  The
problem with this is the ABI compatibility aspect recorded in the
attributes is relatively minor compared to aspects recorded in the ELF
file header.  However the premature exit causes any more important
compatibility aspect violated to be masked and not reported to the user
once a problem with attributes has been noticed.

So move the attribute check after the ELF file header flag check in
`_bfd_mips_elf_merge_private_bfd_data', and do not return prematurely
there.  Take advantage of the resulting grouping of ELF file header
handling together and remove the premature success return point for the
first input object being handled, letting the code later on figure out
output ABI flags even for this object.

Update LD test cases according to messages from ELF file header checks
now preceding ones from attribute checks.

	bfd/
	* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Move
	attribute check after ELF file header flag check.

	ld/
	* testsuite/ld-mips-elf/attr-gnu-4-14.d: Update the order of
	messages expected according to MIPS BFD private data merge
	changes.
	* testsuite/ld-mips-elf/attr-gnu-4-24.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-34.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-41.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-42.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-43.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-45.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-46.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-47.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-48.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-49.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-54.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-64.d: Likewise.
	* testsuite/ld-mips-elf/attr-gnu-4-74.d: Likewise.
2016-01-04 23:30:00 +00:00
Alan Modra 6f2750feaf Copyright update for binutils 2016-01-01 23:00:01 +10:30
Alan Modra 4120fa118f binutils ChangeLog rotation 2016-01-01 22:59:17 +10:30
Alan Modra 331e61312e Fix assorted ChangeLog errors 2015-12-30 11:44:35 +10:30
Thomas Preud'homme 3e1a8f9569 Add test for ARMv6-M farcall with no profile info
2015-12-24  Thomas Preud'homme  <thomas.preudhomme@arm.com>

ld/testsuite/
    * ld-arm/arm-elf.exp: Run new test "Thumb-Thumb farcall v6-M (no
    profile)".
    * ld-arm/farcall-thumb-thumb-m-no-profile-a.s: New file.
    * ld-arm/farcall-thumb-thumb-m-no-profile-b.s: Likewise.
    * ld-arm/farcall-thumb-thumb-m-no-profile.d: Likewise.
2015-12-26 10:24:58 +08:00
Thomas Preud'homme 2fd158eb7b Add support for linking ARMv8-M object files
2015-12-24  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
    * elf32-arm.c (using_thumb_only): Check that profile is 'M' and update
    logic around Tag_CPU_arch values to return TRUE for ARMv8-M
    architectures.
    (tag_cpu_arch_combine): Define v8m_baseline and v8m_mainline and update
    v4t_plus_v6_m and comb to deal with ARMv8-M Tag_CPU_arch merging logic.
    (elf32_arm_merge_eabi_attributes): Add Tag_CPU_name values for
    ARMv8-M.

bfd/testsuite/
    * ld-arm/arm-elf.exp (armeabitests_common): Run new tests
    "Thumb-Thumb farcall v8-M", "EABI attribute merging 8",
    "EABI attribute merging 9" and "EABI attribute merging 10".
    (Thumb-Thumb farcall v8-M): Renamed to ...
    (Thumb-Thumb farcall v8-M Mainline): This.
    (Thumb-Thumb farcall v8-M Baseline): New test.
    * ld-arm/attr-merge-8a.s: New file.
    * ld-arm/attr-merge-8b.s: Likewise.
    * ld-arm/attr-merge-8.attr: Likewise.
    * ld-arm/attr-merge-9a.s: Likewise.
    * ld-arm/attr-merge-9b.s: Likewise.
    * ld-arm/attr-merge-9.out: Likewise.
    * ld-arm/attr-merge-10a.s: Likewise.
    * ld-arm/attr-merge-10b.s: Likewise.
    * ld-arm/attr-merge-10.attr: Likewise.
2015-12-24 17:33:17 +08:00
Yury Usishchev 491d01d3da ARM: Fix exidx coverage for relocatable builds.
bfd  * elf-bfd.h: Add callback to count additional relocations.
     * elf32-arm.c (_arm_elf_section_data): Add new counter.
     (insert_cantunwind_after): Increment relocations counter.
     (elf32_arm_fix_exidx_coverage): Remove exidx entries and add
     terminating CANTUNWIND entry only in final builds.
     (elf32_arm_add_relocation): New function.
     (elf32_arm_write_section): Add relocations in relocatable builds.
     (elf32_arm_count_additional_relocs): New function.
     (elf_backend_count_additional_relocs): New define.
     * bfd/elflink.c (bfd_elf_final_link): Use callback and adjust size of
     .rel section.
     * bfd/elfxx-target.h (elf_backend_count_additional_relocs): New define.

ld   * emultempl/armelf.em (gld${EMULATION_NAME}_after_allocation): Call
     elf32_arm_fix_exidx_coverage for relocatable builds.

ld/testsuite
     * ld-arm/arm-elf.exp: New test.
     * ld-arm/unwind-rel.d: New file.
     * ld-arm/unwind-rel1.s: New file.
     * ld-arm/unwind-rel2.s: New file.
     * ld-arm/unwind-rel3.s: New file.
2015-12-22 15:50:13 +00:00
Mickael Guene ac4c9b0459 Add support for ARM's NOREAD section flag.
include/elf
     * arm.h: Add arm SHF_ARM_NOREAD section flag.

bfd  * bfd-in2.h: Regenerate.
     * section.c: Add SEC_ELF_NOREAD.
     * elf32-arm.c (elf32_arm_post_process_headers): Only set
     PF_X attribute if a segment only contains section with
     SHF_ARM_NOREAD flag.
     (elf32_arm_fake_sections): Add SEC_ELF_NOREAD conversion.
     (elf32_arm_section_flags): New function to convert SHF_ARM_NOREAD
     to bfd flag.
     (elf32_arm_lookup_section_flags): New function to allow
     INPUT_SECTION_FLAGS directive with SHF_ARM_NOREAD flag.
     (elf32_arm_special_sections): Add special sections array
     to catch section prefix by '.text.noread' pattern.

ld/testsuite
     * ld-arm/arm-elf.exp: New tests.
     * ld-arm/thumb1-input-section-flag-match.d: New
     * ld-arm/thumb1-input-section-flag-match.s: New
     * ld-arm/thumb1-noread-not-present-mixing-two-section.d: New
     * ld-arm/thumb1-noread-not-present-mixing-two-section.s: New
     * ld-arm/thumb1-noread-present-one-section.d: New
     * ld-arm/thumb1-noread-present-one-section.s: New
     * ld-arm/thumb1-noread-present-two-section.d: New
     * ld-arm/thumb1-noread-present-two-section.s: New

binutils
	* readelf.c (get_elf_section_flags): Add support for ARM specific
	section flags.
2015-12-22 14:12:35 +00:00
Christophe Lyon 0bef041426 Add forgotten ChangeLog updates for 72d98d16ed09584660d0cbb759d90f8dfeef2343:
2015-12-16  Mickael Guene <mickael.guene@st.com>

	bfd/
	* bfd-in2.h: Regenerate.
	* reloc.c: Add new relocations.
	* libbfd.h (bfd_reloc_code_real_names): Add new relocations
	display names.
	* elf32-arm.c (elf32_arm_howto_table_1): Add HOWTO for new
	relocations.
	(elf32_arm_reloc_map): Add bfd/arm mapping for new relocations.
	(elf32_arm_final_link_relocate): Implement new relocations
	resolution.

	gas/
	* doc/c-arm.texi: Add documentation about new directives
	* config/tc-arm.c (group_reloc_table): Add mapping between gas
	syntax and new relocations.
	(do_t_add_sub): Keep new relocations for add operand.
	(do_t_mov_cmp): Keep new relocations for mov operand.
	(insns): Use 'shifter operand with possible group relocation'
	operand parse code for movs operand.
	(md_apply_fix): Implement mov and add encoding when new
	relocations on them.
	(tc_gen_reloc): Add new relocations.
	(arm_fix_adjustable): Since offset has a limited range ([0:255])
	we disable adjust_reloc_syms() for new relocations.

	gas/testsuite/
	* gas/arm/adds-thumb1-reloc-local.d: New
	* gas/arm/adds-thumb1-reloc-local.s: New
	* gas/arm/movs-thumb1-reloc-local.d: New
	* gas/arm/movs-thumb1-reloc-local.s: New

	include/
	* elf/arm.h: Add new arm relocations.

	ld/testsuite/
	* ld-arm/arm-elf.exp (armelftests_common): Add new relocations
	tests.
	* ld-arm/thumb1-adds.d: New
	* ld-arm/thumb1-adds.s: New
	* ld-arm/thumb1-movs.d: New
	* ld-arm/thumb1-movs.s: New
2015-12-17 11:14:37 +01:00
Mickael Guene 72d98d16ed [ARM] Add support for thumb1 pcrop relocations.
To support thumb1 execute-only code we need to support four new
relocations (R_ARM_THM_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G1_NC,
R_ARM_THM_ALU_ABS_G2_NC and  R_ARM_THM_ALU_ABS_G3_NC).
These relocations allow the static linker to finalize construction
of symbol address.
Typical sequence of code to get address of the symbol foo is then
the following :
	movs	r3, #:upper8_15:#foo
	lsls	r3, #8
	adds	r3, #:upper0_7:#foo
	lsls	r3, #8
	adds	r3, #:lower8_15:#foo
	lsls	r3, #8
	adds	r3, #:lower0_7:#foo
This will give following sequence of text and relocations after
assembly :
   4:	2300      	movs	r3, #0
			4: R_ARM_THM_ALU_ABS_G3_NC	foo
   6:	021b      	lsls	r3, r3, #8
   8:	3300      	adds	r3, #0
			8: R_ARM_THM_ALU_ABS_G2_NC	foo
   a:	021b      	lsls	r3, r3, #8
   c:	3300      	adds	r3, #0
			c: R_ARM_THM_ALU_ABS_G1_NC	foo
   e:	021b      	lsls	r3, r3, #8
  10:	3300      	adds	r3, #0
			10: R_ARM_THM_ALU_ABS_G0_NC	foo
2015-12-16 10:19:51 +01:00
H.J. Lu c5847ba726 ld -r doesn't need plugin for slim lto object
Plugin isn't required on slim lto object for relocatable link.

bfd/

	PR ld/19317
	* linker.c (_bfd_generic_link_add_one_symbol): Don't complain
	plugin needed to handle slim lto object for relocatable link.

ld/testsuite/

	PR ld/19317
	* ld-plugin/lto.exp (lto_no_fat): New.
	(lto_link_tests): Add a test for PR ld/19317.
	(lto_run_tests): Likewise.
	(run_ld_link_tests): Likewise.
2015-12-10 12:35:50 -08:00
Jan Beulich 1e550d79b1 ld: relax alignment requirements of compressed .debug_* section checks
This fixes a failure of the gabinormal linking test on some distros
(where e.g. crt1.o has a .debug_aranges section with larger alignment).
2015-12-07 17:52:25 +01:00
H.J. Lu 02e2aef89b Optimize R_386_GOT32/R_386_GOT32X only if addend is 0
Linker can't optimize R_386_GOT32 and R_386_GOT32X relocations if addend
isn't 0.  It isn't valid to convert

movl	foo@GOT+1(%ecx), %eax

to

leal	foo@GOTOFF+1(%ecx), %eax

nor to convert

movq	foo@GOTPCREL+1(%rip), %rax

to

leaq	foo(%rip), %rax

for x86-64.  We should check if addend is 0 before optimizing R_386_GOT32
and R_386_GOT32X relocations.  Testcases are added for i386 and x86-64.

bfd/

	* elf32-i386.c (elf_i386_convert_load): Skip if addend isn't 0.
	(elf_i386_relocate_section): Skip R_386_GOT32X optimization if
	addend isn't 0.

ld/testsuite/

	* ld-i386/i386.exp: Run mov2a, mov2b and mov3.
	* ld-i386/mov2.s: New file.
	* ld-i386/mov2a.d: Likewise.
	* ld-i386/mov2b.d: Likewise.
	* ld-i386/mov3.d: Likewise.
	* ld-i386/mov3.s: Likewise.
	* ld-x86-64/mov2.s: Likewise.
	* ld-x86-64/mov2a.d: Likewise.
	* ld-x86-64/mov2b.d: Likewise.
	* ld-x86-64/mov2c.d: Likewise.
	* ld-x86-64/mov2d.d: Likewise.
	* ld-x86-64/x86-64.exp: Run mov2a, mov2b, mov2c and mov2d.
2015-12-04 09:03:04 -08:00
H.J. Lu ead3d5427a Properly check symbol defined by assignment in linker script
Symbol defined by a linker assignment may have type bfd_link_hash_new
or bfd_link_hash_undefined.  And h->def_regular is always set.
elf_i386_convert_load and elf_x86_64_convert_load should check
h->def_regular as well as bfd_link_hash_undefined and bfd_link_hash_new
to see if a symbol is defined by a linker script.

bfd/

	PR ld/19319
	* elf32-i386.c (elf_i386_convert_load): Check h->def_regular
	instead of bfd_link_hash_new.
	* elf64-x86-64.c (elf_x86_64_convert_load): Likewise.  Skip
	relocation overflow for bfd_link_hash_undefined and
	bfd_link_hash_new if h->def_regular is set.

ld/testsuite/

	PR ld/19319
	* ld-i386/i386.exp: Run pr19319 test.
	* ld-x86-64/x86-64.exp: Likewise.
	* ld-i386/pr19319.dd: New file.
	* ld-i386/pr19319a.S: Likewise.
	* ld-i386/pr19319b.S: Likewise.
	* ld-x86-64/pr19319.dd: Likewise.
	* ld-x86-64/pr19319a.S: Likewise.
	* ld-x86-64/pr19319b.S: Likewise.
2015-12-01 14:45:51 -08:00
Marcus Shawcroft 06d2788cef Revert "[LD][AARCH64]Add TLSIE relaxation support under large memory model."
This reverts commit 3ebe65c0ff.

Reverted due to PR19188
2015-11-12 15:16:40 +00:00