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15 Commits

Author SHA1 Message Date
Nick Clifton 922c5db5e7 Fix the disassembly of the AArch64 SIMD EXT instruction. 
PR 18800
	* aarch64-tbl.h (aarch64_opcode_table): Fix mask for SIMD EXT
	instruction.
 2015-08-11 18:00:36 +01:00
Matthew Wahab 9e1f0fa7f3 [AArch64] Support for ARMv8.1a Adv.SIMD instructions 
2015-06-02  Matthew Wahab  <matthew.wahab@arm.com>

gas/
  * config/tc-aarch64.c (aarch64_features): Add "rdma".
  * doc/c-aarch64.texi (AArch64 Extensions): Add "rdma".

gas/testsuite/
  * rdma-directive.d: New.
  * rdma.d: New.
  * rdma.s: New.

include/opcode/
  * aarch64.h (AARCH64_FEATURE_RDMA): New.

opcode/
  * aarch64-tbl.h (aarch64_feature_rdma): New.
  (RDMA): New.
  (aarch64_opcode_table): Add "sqrmlah" and "sqrdmlsh" instructions.
  * aarch64-asm-2.c: Regenerate.
  * aarch64-dis-2.c: Regenerate.
  * aarch64-opc-2.c: Regenerate.
 2015-06-02 12:20:00 +01:00
Matthew Wahab 290806fd94 [AArch64] Support for ARMv8.1a Limited Ordering Regions extension 
2015-06-02  Matthew Wahab  <matthew.wahab@arm.com>
include/
  * aarch64.h (AARCH64_FEATURE_LOR): New.

opcodes/
  * aarch64-tbl.h (aarch64_feature_lor): New.
  (LOR): New.
  (aarch64_opdocde_table): Add "ldlar", "ldlarb", "ldlarh", "stllr",
  "stllrb", "stllrh".
  * aarch64-asm-2.c: Regenerate.
  * aarch64-dis-2.c: Regenerate.
  * aarch64-opc-2.c: Regenerate.

gas/
  * config/tc-aarch64.c (aarch64_features): Add "lor".
  * doc/c-aarch64.c (Aarch64 Extensions): Add "lor" to list of
  architecture extensions.

gas/testsuite/
  * lor-directive.d: New.
  * lor.d: New.
  * lor.s: New.
 2015-06-02 11:30:12 +01:00
Jiong Wang c8f89a3423 [AARCH64] Remove Load/Store register (unscaled immediate) alias. 
opcodes/ChangeLog:

2015-03-10  Renlin Li  <renlin.li@arm.com>

	* aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb,
         stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and
         related alias.
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Likewise.
	* aarch64-opc-2.c: Likewise.

gas/testsuite/ChangeLog:

2015-03-10  Renlin Li  <renlin.li@arm.com>

	* gas/aarch64/ldst-reg-uns-imm.d: Adjust expected output.
	* gas/aarch64/ldst-reg-unscaled-imm.d: Likewise.
	* gas/aarch64/reloc-insn.d: Likewise.
 2015-03-10 11:27:56 +00:00
Alan Modra b90efa5b79 ChangeLog rotatation and copyright year update 2015-01-02 00:53:45 +10:30
Jiong Wang df7b4545b2 [PATCH/AArch64] Generic support for all system registers using mrs and msr 
2014-09-03  Jiong Wang  <jiong.wang@arm.com>

  opcode/
    * aarch64-tbl.h (aarch64_opcode_table): Update encoding for mrs/msr.
    * aarch64-dis-2.c: Update auto-generated file.

  gas/
    * config/tc-aarch64.c (parse_sys_reg): Remove the restriction on op0 field.

  gas/testsuite/
    * gas/aarch64/illegal.s: Update testcase.
    * gas/aarch64/illegal.d: Likewise.
    * gas/aarch64/sysreg-1.s: Likewise.
    * gas/aarch64/sysreg-1.d: Likewise.
 2014-09-03 14:53:53 +01:00
Jiong Wang ee804238f0 [PATCH/AArch64] Implement LSE feature 
2014-09-03  Jiong Wang  <jiong.wang@arm.com>

  gas/
	* config/tc-aarch64.c (parse_operands): Recognize PAIRREG.
	(aarch64_features): Add entry for lse extension.

  include/opcode/
	* aarch64.h (AARCH64_FEATURE_LSE): New feature added.
	(aarch64_opnd): Add AARCH64_OPND_PAIRREG.
	(aarch64_insn_class): Add lse_atomic.
	(F_LSE_SZ): New field added.
	(opcode_has_special_coder): Recognize F_LSE_SZ.

  opcode/
	* aarch64-tbl.h (QL_R4NIL): New qualifiers.
	(aarch64_feature_lse): New feature added.
	(LSE): New Added.
	(aarch64_opcode_table): New LSE instructions added.  Improve
	descriptions for ldarb/ldarh/ldar.
	(aarch64_opcode_table): Describe PAIRREG.
	* aarch64-opc.h (aarch64_field_kind): Add FLD_lse_sz.
	* aarch64-opc.c (fields): Add entry for F_LSE_SZ.
	(aarch64_print_operand): Recognize PAIRREG.
	(operand_general_constraint_met_p): Check reg pair constraints for CASP
	instructions.
	* aarch64-dis.c (aarch64_ext_regno_pair): New extractor for paired reg.
	(do_special_decoding): Recognize F_LSE_SZ.
	* aarch64-asm.c (do_special_encoding): Recognize F_LSE_SZ.

  gas/testsuite/
	* gas/aarch64/lse-atomic.d: New.
	* gas/aarch64/lse-atomic.s: Likewise.
	* gas/aarch64/illegal-lse.d: Likewise.
	* gas/aarch64/illegal-lse.l: Likewise.
	* gas/aarch64/illegal-lse.s: Likewise.
	* gas/aarch64/diagnostic.s: Check processor feature detect for lse
	instruction.
	* gas/aarch64/diagnostic.l: Likewise.
 2014-09-03 14:53:53 +01:00
Alan Modra 4b95cf5c0c Update copyright years 2014-03-05 22:16:15 +10:30
Yufeng Zhang f17c8bfcc8 opcodes/ 
* aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
	FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.

gas/testsuite/

	* gas/aarch64/fp-const0-parsing.s: New test.
	* gas/aarch64/fp-const0-parsing.d: Likewise.
 2014-02-27 15:06:56 +00:00
Yufeng Zhang 68a6428382 gas/ 
* config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.

gas/testsuite/

	* gas/aarch64/alias.s: Add tests.
	* gas/aarch64/alias.d: Update.
	* gas/aarch64/no-aliases.d: Update.
	* gas/aarch64/diagnostic.s: Add tests.
	* gas/aarch64/diagnostic.l: Update.
	* gas/aarch64/illegal.s: Add tests.
	* gas/aarch64/illegal.l: Update.

include/opcode/

	* aarch64.h (enum aarch64_operand_class): Add AARCH64_OPND_CLASS_COND.
	(enum aarch64_opnd): Add AARCH64_OPND_COND1.

opcodes/

	* aarch64-dis.c (convert_ubfm_to_lsl): Check for cond != '111x'.
	(convert_from_csel): Likewise.
	* aarch64-opc.c (operand_general_constraint_met_p): Handle
	AARCH64_OPND_CLASS_COND and AARCH64_OPND_COND1.
	(aarch64_print_operand): Handle AARCH64_OPND_COND1.
	* aarch64-tbl.h (aarch64_opcode_table): Use COND1 instead of
	COND for cinc, cset, cinv, csetm and cneg.
	(AARCH64_OPERANDS): Add entry for AARCH64_OPND_COND1.
	* aarch64-asm-2.c: Re-generated.
	* aarch64-dis-2.c: Ditto.
	* aarch64-opc-2.c: Ditto.
 2013-11-05 20:50:18 +00:00
Yufeng Zhang e60bb1dd35 include/opcode/ 
* aarch64.h (AARCH64_FEATURE_CRC): New macro.

opcodes/

	* aarch64-tbl.h (QL_I3SAMEW, QL_I3WWX): New macros.
	(aarch64_feature_crc): New static.
	(CRC): New macro.
	(aarch64_opcode_table): Add entries for the crc32b, crc32h, crc32w,
	crc32x, crc32cb, crc32ch, crc32cw and crc32cx instructions.
	* aarch64-asm-2.c: Re-generate.
	* aarch64-dis-2.c: Ditto.
	* aarch64-opc-2.c: Ditto.

gas/

	* config/tc-aarch64.c (aarch64_features): Add the 'crc' option.

gas/testsuite/

	* gas/aarch64/crc32.s: New test.
	* gas/aarch64/crc32.d: Ditto.
 2013-02-28 19:18:40 +00:00
Yufeng Zhang e30181a58d include/opcode/ 
2013-01-30  Yufeng Zhang  <yufeng.zhang@arm.com>

	* aarch64.h (aarch64_op): Add OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2.

opcodes/

2013-01-30  Yufeng Zhang  <yufeng.zhang@arm.com>

	* aarch64-tbl.h (aarch64_opcode_table): Flag sshll, sshll2, ushll and
	ushll2 with F_HAS_ALIAS.  Add entries for sxtl, sxtl2, uxtl and uxtl2.
	* aarch64-asm.c (convert_xtl_to_shll): New function.
	(convert_to_real): Handle OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2 by
	calling convert_xtl_to_shll.
	* aarch64-dis.c (convert_shll_to_xtl): New function.
	(convert_to_alias): Handle OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2 by
	calling convert_shll_to_xtl.
	* aarch64-gen.c: Update copyright year.
	* aarch64-asm-2.c: Re-generate.
	* aarch64-dis-2.c: Re-generate.
	* aarch64-opc-2.c: Re-generate.

gas/testsuite/

2013-01-30  Yufeng Zhang  <yufeng.zhang@arm.com>

	* gas/aarch64/alias.s: Add new tests.
	* gas/aarch64/alias.d: Update.
	* gas/aarch64/no-aliases.d: Update.
 2013-01-30 15:43:32 +00:00
Yufeng Zhang f5555712ba include/opcode/ 
2013-01-17  Yufeng Zhang  <yufeng.zhang@arm.com>

	* aarch64.h (aarch64_op): Remove OP_V_MOVI_B.

opcodes/

2013-01-17  Yufeng Zhang  <yufeng.zhang@arm.com>

	* aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Handle 8-bit MOVI.
	* aarch64-dis.c (aarch64_ext_advsimd_imm_modified): Likewise.
	* aarch64-opc.c (operand_general_constraint_met_p): For
	AARCH64_MOD_LSL, move the range check on the shift amount before the
	alignment check; change to call set_sft_amount_out_of_range_error
	instead of set_imm_out_of_range_error.
	* aarch64-tbl.h (QL_SIMD_IMM_B): Replace NIL with LSL.
	(aarch64_opcode_table): Remove the OP enumerator from the asimdimm
	8-bit MOVI entry; change the 2nd operand from SIMD_IMM to
	SIMD_IMM_SFT.

gas/

2013-01-17  Yufeng Zhang  <yufeng.zhang@arm.com>

	* config/tc-aarch64.c (output_operand_error_record): Change to output
	the out-of-range error message as value-expected message if there is
	only one single value in the expected range.
	(programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
	LSL #0 as a programmer-friendly feature.

gas/testsuite/

2013-01-17  Yufeng Zhang  <yufeng.zhang@arm.com>

	* gas/aarch64/diagnostic.l: Update.
	* gas/aarch64/movi.s: Add tests.
	* gas/aarch64/movi.d: Update.
	* gas/aarch64/programmer-friendly.s: Add comment.
 2013-01-17 16:09:44 +00:00
Yufeng Zhang fb098a1efc opcodes/ 
2013-01-04  Yufeng Zhang  <yufeng.zhang@arm.com>

	* aarch64-opc.c (aarch64_print_operand): Change to print
	AARCH64_OPND_IMM_MOV in hexadecimal in the instruction and in decimal
	in comment.
	* aarch64-tbl.h (aarch64_opcode_table): Remove the 'F_PSEUDO' flag
	from the opcode entries of OP_MOV_IMM_LOG, OP_MOV_IMM_WIDEN and
	OP_MOV_IMM_WIDE.

gas/testsuite/

2013-01-04  Yufeng Zhang  <yufeng.zhang@arm.com>

	* gas/aarch64/int-insns.d: Update.
	* gas/aarch64/mov.d: Update.
	* gas/aarch64/reloc-insn.d: Update.

ld/testsuite/

2013-01-04  Yufeng Zhang  <yufeng.zhang@arm.com>

	* ld-aarch64/emit-relocs-264.d: Append the '-Mno-aliases' option to
	the objdump directive.
	* ld-aarch64/emit-relocs-266.d: Ditto.
	* ld-aarch64/emit-relocs-268.d: Ditto.
	* ld-aarch64/emit-relocs-269.d: Ditto.
	* ld-aarch64/emit-relocs-270.d: Ditto.
	* ld-aarch64/emit-relocs-271.d: Ditto.
	* ld-aarch64/emit-relocs-272.d: Ditto.
 2013-01-04 14:59:33 +00:00
Nick Clifton a06ea96464 Add support for 64-bit ARM architecture: AArch64 2012-08-13 14:52:54 +00:00