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binutils-gdb/sim/bfin
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Mike Frysinger e10d6db33d sim: bfin: respect the port level on signals to the SIC 
The SIC latches ints from peripherals to the CEC, but the peripherals
need to be able to tell the SIC when to stop.  So use the incoming level
to figure out when to set the int bits and when to clear it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 05:23:26 +00:00
..
bfroms
sim: bfin: fix brace style
2011-03-15 20:44:11 +00:00
aclocal.m4
…
bfin-sim.c
sim: bfin: fix sign extension with 16bit acc add insns
2011-03-29 01:41:49 +00:00
bfin-sim.h
…
ChangeLog
sim: bfin: respect the port level on signals to the SIC
2011-04-11 05:23:26 +00:00
config.in
sim: bfin: check for kill/pread
2011-03-17 19:03:30 +00:00
configure
sim: bfin: regen configure to include new cfi device
2011-03-29 18:39:51 +00:00
configure.ac
sim: bfin: check for kill/pread
2011-03-17 19:03:30 +00:00
devices.c
…
devices.h
sim: bfin: fix inverted W1C logic
2011-03-24 03:17:14 +00:00
dv-bfin_cec.c
sim: bfin: fix inverted W1C logic
2011-03-24 03:17:14 +00:00
dv-bfin_cec.h
…
dv-bfin_ctimer.c
sim: bfin: fix brace style
2011-03-15 20:55:11 +00:00
dv-bfin_ctimer.h
…
dv-bfin_dma.c
sim: bfin: fix brace style
2011-03-15 20:55:11 +00:00
dv-bfin_dma.h
…
dv-bfin_dmac.c
sim: bfin: fix brace style
2011-03-15 20:55:11 +00:00
dv-bfin_dmac.h
…
dv-bfin_ebiu_amc.c
sim: bfin: fix brace style
2011-03-15 20:55:11 +00:00
dv-bfin_ebiu_amc.h
…
dv-bfin_ebiu_ddrc.c
sim: bfin: fix brace style
2011-03-15 20:55:11 +00:00
dv-bfin_ebiu_ddrc.h
…
dv-bfin_ebiu_sdc.c
sim: bfin: fix brace style
2011-03-15 20:55:11 +00:00
dv-bfin_ebiu_sdc.h
…
dv-bfin_emac.c
sim: bfin: fix inverted W1C logic
2011-03-24 03:17:14 +00:00
dv-bfin_emac.h
…
dv-bfin_eppi.c
sim: bfin: fix inverted W1C logic
2011-03-24 03:17:14 +00:00
dv-bfin_eppi.h
…
dv-bfin_evt.c
sim: bfin: fix brace style
2011-03-15 20:55:11 +00:00
dv-bfin_evt.h
…
dv-bfin_gpio.c
sim: bfin: add missing GPIO pin 15
2011-04-11 05:22:23 +00:00
dv-bfin_gpio.h
sim: bfin: add GPIO device simulation
2011-03-15 21:01:45 +00:00
dv-bfin_gptimer.c
sim: bfin: fix brace style
2011-03-15 20:55:11 +00:00
dv-bfin_gptimer.h
…
dv-bfin_jtag.c
sim: bfin: fix inverted W1C logic
2011-03-24 03:17:14 +00:00
dv-bfin_jtag.h
…
dv-bfin_mmu.c
sim: bfin: fix brace style
2011-03-15 20:55:11 +00:00
dv-bfin_mmu.h
…
dv-bfin_nfc.c
sim: bfin: fix inverted W1C logic
2011-03-24 03:17:14 +00:00
dv-bfin_nfc.h
…
dv-bfin_otp.c
sim: bfin: add OTP output port
2011-04-01 22:32:04 +00:00
dv-bfin_otp.h
…
dv-bfin_pll.c
sim: bfin: fix brace style
2011-03-15 20:55:11 +00:00
dv-bfin_pll.h
…
dv-bfin_ppi.c
sim: bfin: fix inverted W1C logic
2011-03-24 03:17:14 +00:00
dv-bfin_ppi.h
…
dv-bfin_rtc.c
sim: bfin: fix inverted W1C logic
2011-03-24 03:17:14 +00:00
dv-bfin_rtc.h
…
dv-bfin_sic.c
sim: bfin: respect the port level on signals to the SIC
2011-04-11 05:23:26 +00:00
dv-bfin_sic.h
…
dv-bfin_spi.c
sim: bfin: fix inverted W1C logic
2011-03-24 03:17:14 +00:00
dv-bfin_spi.h
…
dv-bfin_trace.c
sim: bfin: fix brace style
2011-03-15 20:55:11 +00:00
dv-bfin_trace.h
…
dv-bfin_twi.c
sim: bfin: fix inverted W1C logic
2011-03-24 03:17:14 +00:00
dv-bfin_twi.h
sim: bfin: fix typo in TWI stat reg
2011-03-24 03:16:22 +00:00
dv-bfin_uart2.c
sim: bfin: fix inverted W1C logic
2011-03-24 03:17:14 +00:00
dv-bfin_uart2.h
…
dv-bfin_uart.c
sim: bfin: fix brace style
2011-03-15 20:55:11 +00:00
dv-bfin_uart.h
sim: bfin: define more UART LSR bits
2011-03-24 03:16:50 +00:00
dv-bfin_wdog.c
sim: bfin: fix brace style
2011-03-15 20:55:11 +00:00
dv-bfin_wdog.h
…
dv-bfin_wp.c
sim: bfin: fix brace style
2011-03-15 20:55:11 +00:00
dv-bfin_wp.h
…
dv-eth_phy.c
sim: bfin: fix brace style
2011-03-15 20:55:11 +00:00
gui.c
sim: bfin: fix brace style
2011-03-15 20:44:11 +00:00
gui.h
…
insn_list.def
…
interp.c
sim: bfin: check for kill/pread
2011-03-17 19:03:30 +00:00
linux-fixed-code.h
sim: bfin: fix brace style
2011-03-15 20:44:11 +00:00
linux-fixed-code.s
…
linux-targ-map.h
sim: bfin: fix brace style
2011-03-15 20:44:11 +00:00
machs.c
sim: bfin: fix thinko in bfin_gpio bus addresses
2011-03-24 03:07:33 +00:00
machs.h
…
Makefile.in
sim: bfin: add GPIO device simulation
2011-03-15 21:01:45 +00:00
proc_list.def
…
sim-main.h
…
tconfig.in
…
TODO
sim: bfin: document SIC limitation
2011-03-24 03:18:17 +00:00