* m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing. (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl, indexld, indexls): .w variants have `1' bit. (rot32.b): QI, not SI. (rot32.w): HI, not SI. (xchg16): HI for .w variant. [opcodes] * m32c-asm.c: Regenerate. * m32c-desc.c: Regenerate. * m32c-desc.h: Regenerate. * m32c-dis.c: Regenerate. * m32c-ibld.c: Regenerate. * m32c-opc.c: Regenerate. * m32c-opc.h: Regenerate. |
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.. | ||
ChangeLog | ||
cris.cpu | ||
frv.cpu | ||
frv.opc | ||
iq10.cpu | ||
iq2000.cpu | ||
iq2000.opc | ||
iq2000m.cpu | ||
m32c.cpu | ||
m32c.opc | ||
m32r.cpu | ||
m32r.opc | ||
ms1.cpu | ||
ms1.opc | ||
sh.cpu | ||
sh.opc | ||
sh64-compact.cpu | ||
sh64-media.cpu | ||
simplify.inc |