binutils-gdb/sim
Jim Blandy c0efbca4a3 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
set of the FCSR.
* sim-main.h (COCIDX): Remove definition; this isn't supported by
PENDING_FILL, and you can get the intended effect gracefully by
calling PENDING_SCHED directly.
2001-04-12 14:53:20 +00:00
..
arm Do not enable alignment checking when loading unaligned thumb instructions. 2001-03-20 17:48:02 +00:00
common * mmap support for common simulators 2001-03-20 17:13:39 +00:00
d10v
d30v
erc32
fr30 2001-03-05 Dave Brolley <brolley@ 2001-03-05 16:00:17 +00:00
h8300 2000-08-10 Kazu Hirata <kazu@hxi.com> 2000-08-11 02:03:02 +00:00
h8500
i960 * i960-desc.c: Update all the A macro definitions to the new 2001-02-07 01:16:05 +00:00
igen
m32r 2001-03-05 Dave Brolley <brolley 2001-03-05 16:05:38 +00:00
m68hc11 Preliminary support for 68HC12 2000-11-26 21:41:31 +00:00
mcore
mips * mips.igen (CFC1, CTC1): Pass the correct register numbers to 2001-04-12 14:53:20 +00:00
mn10200
mn10300 * am33.igen: Warning clean-up. 2000-08-09 18:42:04 +00:00
ppc Fixes for NetBSD 1.5. NetBSD has been renumbering/renaming its 2001-03-05 16:22:45 +00:00
sh * interp.c (sim_create_inferior): Record program arguments for 2001-01-30 23:03:56 +00:00
testsuite 2000-11-01 Dave Brolley <brolley@cygnus.com> 2000-11-01 15:40:35 +00:00
tic80
v850 Link with libintl, needed by libopcodes. 2001-03-14 21:51:31 +00:00
w65
z8k
ChangeLog 2001-02-16 Ben Elliston <bje@redhat.com> 2001-02-15 23:03:41 +00:00
configure Add support for ARM's v5TE architecture and Intel's XScale extenstions 2000-11-30 01:55:12 +00:00
configure.in Add support for ARM's v5TE architecture and Intel's XScale extenstions 2000-11-30 01:55:12 +00:00
MAINTAINERS 2001-02-16 Ben Elliston <bje@redhat.com> 2001-02-15 23:03:41 +00:00
Makefile.in
README-HACKING