Jim Blandy c0efbca4a3 * mips.igen (CFC1, CTC1): Pass the correct register numbers to ...

PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
set of the FCSR.
* sim-main.h (COCIDX): Remove definition; this isn't supported by
PENDING_FILL, and you can get the intended effect gracefully by
calling PENDING_SCHED directly.

2001-04-12 14:53:20 +00:00

..

acconfig.h

…

ChangeLog

* mips.igen (CFC1, CTC1): Pass the correct register numbers to

2001-04-12 14:53:20 +00:00

config.in

…

configure

…

configure.in

…

dv-tx3904cpu.c

…

dv-tx3904irc.c

…

dv-tx3904sio.c

…

dv-tx3904tmr.c

…

interp.c

2001-02-19 Ben Elliston <bje@redhat.com>

2001-02-19 21:57:03 +00:00

m16.dc

…

m16.igen

…

m16run.c

…

Makefile.in

…

mips.dc

…

mips.igen

* mips.igen (CFC1, CTC1): Pass the correct register numbers to

2001-04-12 14:53:20 +00:00

sim-main.c

2001-02-08 Ben Elliston <bje@redhat.com>

2001-02-08 05:22:04 +00:00

sim-main.h

* mips.igen (CFC1, CTC1): Pass the correct register numbers to

2001-04-12 14:53:20 +00:00

tconfig.in

…

tx.igen

…

vr.igen

…