binutils-gdb/include/opcode
Tamar Christina d0f7791c66 Add new AArch64 FP16 FM{A|S} instructions.
This patch separates the new FP16 instructions backported from Armv8.4-a to Armv8.2-a
into a new flag order to distinguish them from the rest of the already existing optional
FP16 instructions in Armv8.2-a.

The new flag "+fp16fml" is available from Armv8.2-a and implies +fp16 and is mandatory on
Armv8.4-a.

gas/

	* config/tc-aarch64.c (fp16fml): New.
	* doc/c-aarch64.texi (fp16fml): New.
	* testsuite/gas/aarch64/armv8_2-a-crypto-fp16.d (fp16): Make fp16fml.
	* testsuite/gas/aarch64/armv8_3-a-crypto-fp16.d (fp16): Make fp16fml.

include/

	* opcode/aarch64.h: (AARCH64_FEATURE_F16_FML): New.
	(AARCH64_ARCH_V8_4): Enable AARCH64_FEATURE_F16_FML by default.

opcodes/

	* aarch64-tbl.h (aarch64_feature_fp_16_v8_2): Require AARCH64_FEATURE_F16_FML
	and AARCH64_FEATURE_F16.
2017-11-16 16:27:35 +00:00
..
aarch64.h Add new AArch64 FP16 FM{A|S} instructions. 2017-11-16 16:27:35 +00:00
alpha.h
arc-attrs.h [ARC] Object attributes. 2017-05-10 14:42:22 +02:00
arc-func.h [ARC] Add JLI support. 2017-07-19 09:56:55 +02:00
arc.h [ARC] Add SJLI instruction. 2017-07-19 09:56:55 +02:00
arm.h Separate the new FP16 instructions backported from Armv8.4-a to Armv8.2-a into a new flag order to distinguish them from the rest of the already existing optional FP16 instructions in Armv8.2-a. 2017-11-15 15:56:23 +00:00
avr.h Add support for a __gcc_isr pseudo isntruction to the AVR assembler. 2017-06-30 16:37:39 +01:00
bfin.h
cgen.h
ChangeLog-0415
ChangeLog-9103
convex.h
cr16.h PR22348, conflicting global vars in crx and cr16 2017-10-25 22:14:58 +10:30
cris.h
crx.h PR22348, conflicting global vars in crx and cr16 2017-10-25 22:14:58 +10:30
d10v.h
d30v.h
dlx.h
ft32.h FT32: support for FT32B processor - part 1 2017-10-12 18:41:29 -07:00
h8300.h
hppa.h Fix match and mask for 64-bit bb opcode. 2017-05-14 16:06:06 -04:00
i370.h
i386.h x86: Add NOTRACK prefix support 2017-05-22 11:02:58 -07:00
i860.h
i960.h
ia64.h
m68hc11.h
m68k.h
m88k.h
metag.h
mips.h MIPS: Fix XPA base and Virtualization ASE instruction handling 2017-06-30 07:21:55 +01:00
mmix.h
mn10200.h
mn10300.h
moxie.h
msp430-decode.h
msp430.h
nds32.h nds32: Rename __BIT() to N32_BIT(). 2017-09-11 13:46:27 +08:00
nios2.h
nios2r1.h
nios2r2.h
np1.h
ns32k.h
pdp11.h
pj.h
pn.h
ppc.h [PowerPC VLE] Add SPE2 and EFS2 instructions support 2017-08-24 17:30:31 +09:30
pru.h
pyr.h
riscv-opc.h RISC-V: Add satp as an alias for sptbr 2017-11-07 09:00:37 -08:00
riscv.h RISC-V: Only relax to C.LUI when imm != 0 and rd != 0/2 2017-10-24 08:02:46 -07:00
rl78.h
rx.h
s390.h S/390: Improve error checking for optional operands 2017-05-30 10:22:25 +02:00
score-datadep.h
score-inst.h
sparc.h binutils: support for the SPARC M8 processor 2017-05-19 09:27:08 -07:00
spu-insns.h
spu.h
tahoe.h
tic4x.h
tic6x-control-registers.h
tic6x-insn-formats.h
tic6x-opcode-table.h
tic6x.h
tic30.h
tic54x.h
tic80.h
tilegx.h
tilepro.h
v850.h Fix spelling typos. 2017-07-18 16:58:14 +01:00
vax.h
visium.h
wasm.h
xgate.h