2019-02-13 07:57:38 +01:00
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2019-02-13 Martin Liska <mliska@suse.cz>
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PR lto/88858
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* cfgrtl.c (remove_barriers_from_footer): New function.
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(try_redirect_by_replacing_jump): Use it.
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(cfg_layout_redirect_edge_and_branch): Likewise.
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rs6000: Add support for the vec_sbox_be, vec_cipher_be etc. builtins.
The 5 new builtins vec_sbox_be, vec_cipher_be, vec_cipherlast_be, vec_ncipher_be
and vec_ncipherlast_be only support vector unsigned char type parameters.
Add new instruction crypto_vsbox_<mode> and crypto_<CR_insn>_<mode> to handle
them accordingly, where the new mode CR_vqdi can be expanded to vector unsigned
long long for none _be postfix builtins or vector unsigned char for _be postfix
builtins.
gcc/ChangeLog
2019-02-13 Xiong Hu Luo <luoxhu@linux.vnet.ibm.com>
* config/rs6000/altivec.h (vec_sbox_be, vec_cipher_be,
vec_cipherlast_be, vec_ncipher_be, vec_ncipherlast_be): New #defines.
* config/rs6000/crypto.md (CR_vqdi): New define_mode_iterator.
(crypto_vsbox_<mode>, crypto_<CR_insn>_<mode>): New define_insns.
* config/rs6000/rs6000-builtin.def (VSBOX_BE): New BU_CRYPTO_1.
(VCIPHER_BE, VCIPHERLAST_BE, VNCIPHER_BE, VNCIPHERLAST_BE):
New BU_CRYPTO_2.
* config/rs6000/rs6000.c (builtin_function_type)
<CRYPTO_BUILTIN_VSBOX_BE, CRYPTO_BUILTIN_VCIPHER_BE,
CRYPTO_BUILTIN_VCIPHERLAST_BE, CRYPTO_BUILTIN_VNCIPHER_BE,
CRYPTO_BUILTIN_VNCIPHERLAST_BE>: New switch options.
* doc/extend.texi (vec_sbox_be, vec_cipher_be, vec_cipherlast_be,
vec_ncipher_be, vec_ncipherlast_be): New builtin functions.
gcc/testsuite/ChangeLog
2019-02-13 Xiong Hu Luo <luoxhu@linux.vnet.ibm.com>
* gcc.target/powerpc/crypto-builtin-1.c
(crypto1_be, crypto2_be, crypto3_be, crypto4_be, crypto5_be):
New testcases.
From-SVN: r268834
2019-02-13 07:31:01 +01:00
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2019-02-13 Xiong Hu Luo <luoxhu@linux.vnet.ibm.com>
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* config/rs6000/altivec.h (vec_sbox_be, vec_cipher_be,
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vec_cipherlast_be, vec_ncipher_be, vec_ncipherlast_be): New #defines.
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* config/rs6000/crypto.md (CR_vqdi): New define_mode_iterator.
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(crypto_vsbox_<mode>, crypto_<CR_insn>_<mode>): New define_insns.
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* config/rs6000/rs6000-builtin.def (VSBOX_BE): New BU_CRYPTO_1.
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(VCIPHER_BE, VCIPHERLAST_BE, VNCIPHER_BE, VNCIPHERLAST_BE):
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New BU_CRYPTO_2.
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* config/rs6000/rs6000.c (builtin_function_type)
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<CRYPTO_BUILTIN_VSBOX_BE, CRYPTO_BUILTIN_VCIPHER_BE,
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CRYPTO_BUILTIN_VCIPHERLAST_BE, CRYPTO_BUILTIN_VNCIPHER_BE,
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CRYPTO_BUILTIN_VNCIPHERLAST_BE>: New switch options.
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* doc/extend.texi (vec_sbox_be, vec_cipher_be, vec_cipherlast_be,
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vec_ncipher_be, vec_ncipherlast_be): New builtin functions.
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2019-02-12 23:03:00 +01:00
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2019-02-12 Pat Haugen <pthaugen@us.ibm.com>
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* doc/invoke.texi (RS/6000 and PowerPC Options): Remove duplicate
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-maltivec. Delete -maltivec=be and -maltivec=le documentation.
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i386: Revert revision 268678 and revision 268657
i386 backend has
INT_MODE (OI, 32);
INT_MODE (XI, 64);
So, XI_MODE represents 64 INTEGER bytes = 64 * 8 = 512 bit operation,
in case of const_1, all 512 bits set.
We can load zeros with narrower instruction, (e.g. 256 bit by inherent
zeroing of highpart in case of 128 bit xor), so TImode in this case.
Some targets prefer V4SF mode, so they will emit float xorps for zeroing
Then the introduction of AVX512F fubared everything by overloading the
meaning of insn mode.
How should we use INSN mode, MODE_XI, in standard_sse_constant_opcode
and patterns which use standard_sse_constant_opcode? 2 options:
1. MODE_XI should only used to check if EXT_REX_SSE_REG_P is true
in any register operand. The operand size must be determined by operand
itself , not by MODE_XI. The operand encoding size should be determined
by the operand size, EXT_REX_SSE_REG_P and AVX512VL.
2. MODE_XI should be used to determine the operand encoding size.
EXT_REX_SSE_REG_P and AVX512VL should be checked for encoding
instructions.
gcc/
PR target/89229
* config/i386/i386.md (*movoi_internal_avx): Revert revision
268678 and revision 268657.
(*movti_internal): Likewise.
gcc/testsuite/
PR target/89229
* gcc.target/i386/pr89229-1.c: New test.
From-SVN: r268811
2019-02-12 20:00:35 +01:00
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2019-02-12 H.J. Lu <hongjiu.lu@intel.com>
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PR target/89229
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* config/i386/i386.md (*movoi_internal_avx): Revert revision
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268678 and revision 268657.
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(*movti_internal): Likewise.
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2019-02-12 15:51:39 +01:00
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2019-02-12 Ilya Leoshkevich <iii@linux.ibm.com>
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PR target/89233
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* config/s390/s390.c (s390_decompose_address): Update comment.
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(s390_check_qrst_address): Reject invalid address forms after
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LRA.
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2019-02-12 14:46:41 +01:00
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2019-02-12 Martin Liska <mliska@suse.cz>
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PR lto/88876
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* ipa-pure-const.c (propagate_pure_const): Revert hunk as
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we need default values of funct_state for a function that
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is not optimized.
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2019-02-12 13:23:08 +01:00
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2019-02-12 Eric Botcazou <ebotcazou@adacore.com>
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* asan.c (asan_expand_mark_ifn): Take into account the alignment of
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the object to pick the size of stores on strict-alignment platforms.
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* config/sparc/sparc.md (*movsi_insn): Minor tweak.
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(*movdi_insn_sp32): Likewise.
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(*movdi_insn_sp64): Likewise.
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2019-02-12 12:25:11 +01:00
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2019-02-12 Jan Hubicka <hubicka@ucw.cz>
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PR lto/88777
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* cgraphunit.c (analyze_functions): Clear READONLY flag for external
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types that needs constructiong.
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* tree.h (may_be_aliased): Do not check TYPE_NEEDS_CONSTRUCTING.
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2019-02-12 10:29:39 +01:00
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2019-02-12 Richard Biener <rguenther@suse.de>
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PR tree-optimization/89253
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* tree-ssa-loop-split.c (tree_ssa_split_loops): Check we can
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duplicate the loop.
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linemap_line_start: protect against location_t overflow (PR lto/88147)
PR lto/88147 reports an assertion failure due to a bogus location_t value
when adding a line to a pre-existing line map, when there's a large
difference between the two line numbers.
For some "large differences", this leads to a location_t value that exceeds
LINE_MAP_MAX_LOCATION, in which case linemap_line_start returns 0. This
isn't ideal, but at least should lead to safe degradation of location
information.
However, if the difference is very large, it's possible for the line
number offset (relative to the start of the map) to be sufficiently large
that overflow occurs when left-shifted by the column-bits, and hence
the check against the LINE_MAP_MAX_LOCATION limit fails, leading to
a seemingly-valid location_t value, but encoding the wrong location. This
triggers the assertion failure:
linemap_assert (SOURCE_LINE (map, r) == to_line);
The fix (thanks to Martin) is to check for overflow when determining
whether to reuse an existing map, and to not reuse it if it would occur.
gcc/ChangeLog: David Malcolm <dmalcolm@redhat.com>
PR lto/88147
* input.c (selftest::test_line_offset_overflow): New selftest.
(selftest::input_c_tests): Call it.
libcpp/ChangeLog: Martin Liska <mliska@suse.cz>
PR lto/88147
* line-map.c (linemap_line_start): Don't reuse the existing line
map if the line offset is sufficiently large to cause overflow
when computing location_t values.
From-SVN: r268789
2019-02-12 02:09:31 +01:00
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2019-02-11 David Malcolm <dmalcolm@redhat.com>
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PR lto/88147
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* input.c (selftest::test_line_offset_overflow): New selftest.
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(selftest::input_c_tests): Call it.
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2019-02-11 18:44:05 +01:00
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2019-02-11 Martin Sebor <msebor@redhat.com>
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PR tree-optimization/88771
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* gimple-ssa-warn-restrict.c (pass_wrestrict::gate): Also enable
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when -Wstringop-overflow is set.
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(builtin_memref::builtin_memref): Adjust excessive upper bound
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only when lower bound is not excessive.
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(maybe_diag_overlap): Detect and diagnose excessive bounds via
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-Wstringop-ovefflow.
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(maybe_diag_offset_bounds): Rename...
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(maybe_diag_access_bounds): ...to this.
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(check_bounds_or_overlap): Adjust for name change above.
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2019-02-11 18:35:17 +01:00
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2019-02-11 Martin Sebor <msebor@redhat.com>
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PR c++/87996
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* builtins.c (max_object_size): Move from here...
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* builtins.h (max_object_size): ...and here...
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* tree.c (max_object_size): ...to here...
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* tree.h (max_object_size): ...and here.
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2019-02-11 17:50:33 +01:00
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2019-02-11 Bill Schmidt <wschmidt@linux.ibm.com>
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* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Shift-right
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and shift-left vector built-ins need to include a TRUNC_MOD_EXPR
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for correct semantics.
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[RS6000] No inline PLT for V4 bss-plt, implement -mno-pltseq
Inline PLT calls need PLT to be an array of addresses. PowerPC 32-bit
bss-plt works differently, so this patch disables inline PLT calls
when -mbss-plt. The patch also adds support for a new -mno-pltseq
option, which may be required when linking with -mbss-plt code.
* doc/invoke.texi (man page RS/6000 and PowerPC Options): Mention
-mlongcall and -mpltseq.
(RS/6000 and PowerPC Options <-mlongcall>): Mention inline PLT calls.
(RS/6000 and PowerPC Options <-mpltseq>): Document.
* config/rs6000/rs6000.h (TARGET_PLTSEQ): Define.
* config/rs6000/sysv4.opt (mpltseq): New option.
* config/rs6000/sysv4.h (TARGET_PLTSEQ): Redefine.
(SUBTARGET_OVERRIDE_OPTIONS): Error if given -mpltseq when assembler
support is lacking. Don't allow -mpltseq with -mbss-plt.
* config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Warn if
-mpltseq given for ELFv1.
* config/rs6000/rs6000.c (rs6000_call_aix): Comment on UNSPEC_PLTSEQ.
Only use UNSPEC_PLTSEQ for inline PLT calls.
(rs6000_call_sysv, rs6000_sibcall_sysv): Expand comments. Only
use UNSPEC_PLTSEQ for inline PLT calls.
(rs6000_indirect_call_template_1, rs6000_longcall_ref),
(rs6000_call_aix, rs6000_call_sysv, rs6000_sibcall_sysv): Replace
uses of HAVE_AS_PLTSEQ with TARGET_PLTSEQ, simplifying.
* config/rs6000/rs6000.md (pltseq_tocsave_<mode>),
(pltseq_plt16_ha_<mode>, pltseq_plt16_lo_<mode>),
(pltseq_mtctr_<mode>): Likewise.
From-SVN: r268770
2019-02-11 16:19:59 +01:00
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2019-02-11 Alan Modra <amodra@gmail.com>
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* doc/invoke.texi (man page RS/6000 and PowerPC Options): Mention
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-mlongcall and -mpltseq.
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(RS/6000 and PowerPC Options <-mlongcall>): Mention inline PLT calls.
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(RS/6000 and PowerPC Options <-mpltseq>): Document.
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* config/rs6000/rs6000.h (TARGET_PLTSEQ): Define.
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* config/rs6000/sysv4.opt (mpltseq): New option.
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* config/rs6000/sysv4.h (TARGET_PLTSEQ): Redefine.
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(SUBTARGET_OVERRIDE_OPTIONS): Error if given -mpltseq when assembler
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support is lacking. Don't allow -mpltseq with -mbss-plt.
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* config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Warn if
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-mpltseq given for ELFv1.
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* config/rs6000/rs6000.c (rs6000_call_aix): Comment on UNSPEC_PLTSEQ.
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Only use UNSPEC_PLTSEQ for inline PLT calls.
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(rs6000_call_sysv, rs6000_sibcall_sysv): Expand comments. Only
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use UNSPEC_PLTSEQ for inline PLT calls.
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(rs6000_indirect_call_template_1, rs6000_longcall_ref),
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(rs6000_call_aix, rs6000_call_sysv, rs6000_sibcall_sysv): Replace
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uses of HAVE_AS_PLTSEQ with TARGET_PLTSEQ, simplifying.
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* config/rs6000/rs6000.md (pltseq_tocsave_<mode>),
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(pltseq_plt16_ha_<mode>, pltseq_plt16_lo_<mode>),
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(pltseq_mtctr_<mode>): Likewise.
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2019-02-11 13:06:19 +01:00
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2019-02-11 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
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* acinclude.m4 (gcc_AC_INITFINI_ARRAY): Use 8-byte strings with
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Solaris ld.
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* configure: Regenerate.
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2019-02-11 11:39:59 +01:00
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2019-02-11 Jakub Jelinek <jakub@redhat.com>
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PR bootstrap/88714
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* config/arm/ldrdstrd.md (*arm_ldrd, *arm_strd): Use q constraint
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instead of r.
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2019-02-11 10:03:51 +01:00
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2019-02-11 Hans-Peter Nilsson <hp@axis.com>
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* function.c (assign_parm_setup_block): Use the stored
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size, not the passed size, when allocating stack-space,
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also for a parameter with alignment larger than
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MAX_SUPPORTED_STACK_ALIGNMENT.
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2019-02-11 09:13:03 +01:00
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2019-02-11 Martin Liska <mliska@suse.cz>
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PR ipa/89009
|
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* ipa-cp.c (build_toporder_info): Remove usage of a param.
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* ipa-inline.c (inline_small_functions): Likewise.
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* ipa-pure-const.c (propagate_pure_const): Likewise.
|
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(propagate_nothrow): Likewise.
|
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* ipa-reference.c (propagate): Likewise.
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* ipa-utils.c (struct searchc_env): Remove unused field.
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(searchc): Always search across AVAIL_INTERPOSABLE.
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(ipa_reduced_postorder): Always allow AVAIL_INTERPOSABLE as
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the only called IPA pure const can properly not propagate
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across interposable boundary.
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* ipa-utils.h (ipa_reduced_postorder): Remove param.
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2019-02-11 08:04:00 +01:00
|
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2019-02-11 Chung-Ju Wu <jasonwucj@gmail.com>
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* config/nds32/nds32.md (call_internal, call_value_internal,
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sibcall_internal, sibcall_value_internal): Use SImode for mem rtx.
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2019-02-11 03:04:02 +01:00
|
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2019-02-11 Hans-Peter Nilsson <hp@axis.com>
|
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* config/cris/cris.c (cris_preferred_minimum_alignment): Fix name
|
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typo.
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2019-02-11 02:39:54 +01:00
|
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2019-02-10 H.J. Lu <hongjiu.lu@intel.com>
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* config/i386/constraints.md (Yd): Replace AVX512BW with AVX512DQ
|
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in comments
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2019-02-10 13:27:01 +01:00
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2019-02-10 Chung-Ju Wu <jasonwucj@gmail.com>
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* config.gcc (with_nds32_lib): Set default --with-nds32-lib correctly.
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|
2019-02-10 12:06:58 +01:00
|
|
|
|
2019-02-10 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/89268
|
|
|
|
|
|
* tree-if-conv.c (version_loop_for_if_conversion): Push to preds only
|
|
|
|
|
|
if preds is non-NULL.
|
|
|
|
|
|
|
2019-02-10 11:46:43 +01:00
|
|
|
|
2019-02-09 Jan Hubicka <hubicka@ucw.cz>
|
|
|
|
|
|
|
|
|
|
|
|
PR lto/89272
|
|
|
|
|
|
* tree.c (fld_simplified_type_name): Also keep TYPE_DECL for
|
|
|
|
|
|
polymorphic types.
|
|
|
|
|
|
|
2019-02-10 10:45:55 +01:00
|
|
|
|
2019-02-10 Monk Chiang <sh.chiang04@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nds32/nds32.md (trap): New pattern.
|
|
|
|
|
|
|
2019-02-10 10:09:19 +01:00
|
|
|
|
2019-02-10 Monk Chiang <sh.chiang04@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nds32/nds32.c (nds32_dwarf_register_span): Refine register
|
|
|
|
|
|
dwarf span.
|
|
|
|
|
|
|
2019-02-10 10:00:43 +01:00
|
|
|
|
2019-02-10 Chung-Ju Wu <jasonwucj@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nds32/nds32-md-auxiliary.c (nds32_spilt_doubleword): Support
|
|
|
|
|
|
to split POST_INC.
|
|
|
|
|
|
|
2019-02-09 22:54:28 +01:00
|
|
|
|
2019-02-09 Jan Hubicka <hubicka@ucw.cz>
|
|
|
|
|
|
|
|
|
|
|
|
* ipa-visibility.c (localize_node): Also do not localize
|
|
|
|
|
|
LDPR_PREVAILING_DEF_IRONLY_EXP.
|
|
|
|
|
|
|
2019-02-09 19:01:03 +01:00
|
|
|
|
2019-02-09 Jan Hubicka <hubicka@ucw.cz>
|
|
|
|
|
|
|
2019-02-09 19:07:12 +01:00
|
|
|
|
PR lto/87957
|
2019-02-09 19:01:03 +01:00
|
|
|
|
* tree.c (fld_simplified_type_name): Use DECL_ASSEMBLER_NAME_SET_P
|
|
|
|
|
|
instead of type_with_linkage.
|
|
|
|
|
|
|
2019-02-09 18:56:22 +01:00
|
|
|
|
2019-02-09 Jan Hubicka <hubicka@ucw.cz>
|
|
|
|
|
|
|
|
|
|
|
|
PR ipa/88755
|
|
|
|
|
|
* params.def (uninlined-function-insns, uninlined-function-time,
|
|
|
|
|
|
uninlined-thunk-insns, uninlined-thunk-time): Add artificial upper
|
|
|
|
|
|
bound so we don't get overflows.
|
|
|
|
|
|
|
2019-02-09 18:06:12 +01:00
|
|
|
|
2019-02-09 Aaron Sawdey <acsawdey@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/rs6000/rs6000-string.c (expand_compare_loop,
|
|
|
|
|
|
expand_block_compare): Insert REG_BR_PROB notes in inline expansion of
|
|
|
|
|
|
memcmp/strncmp.
|
|
|
|
|
|
|
2019-02-09 09:55:39 +01:00
|
|
|
|
2019-02-09 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR middle-end/89246
|
|
|
|
|
|
* config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
|
|
|
|
|
|
If !node->definition and TYPE_ARG_TYPES is non-NULL, use
|
|
|
|
|
|
TYPE_ARG_TYPES instead of DECL_ARGUMENTS.
|
|
|
|
|
|
|
2019-02-08 23:20:58 +01:00
|
|
|
|
2019-02-09 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88343
|
|
|
|
|
|
* config/rs6000/rs6000.c (save_reg_p): Correct calls_eh_return
|
|
|
|
|
|
case. Match logic in rs6000_emit_prologue emitting pic_offset_table
|
|
|
|
|
|
setup.
|
|
|
|
|
|
|
2019-02-08 20:01:10 +01:00
|
|
|
|
2019-02-08 Vladimir Makarov <vmakarov@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR middle-end/88560
|
|
|
|
|
|
* lra-constraints.c (process_alt_operands): Don't increase reject
|
|
|
|
|
|
for memory when offset memory is required.
|
|
|
|
|
|
|
2019-02-08 15:25:48 +01:00
|
|
|
|
2019-02-08 Robin Dapp <rdapp@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/s390/vector.md: Implement vector copysign.
|
|
|
|
|
|
|
2019-02-08 15:19:09 +01:00
|
|
|
|
2019-02-08 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* expr.c (expand_constructor): Correct indentations.
|
|
|
|
|
|
|
2019-02-08 14:21:36 +01:00
|
|
|
|
2019-02-08 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/89247
|
|
|
|
|
|
* tree-if-conv.c: Include tree-cfgcleanup.h.
|
|
|
|
|
|
(version_loop_for_if_conversion): Record LOOP_VECTORIZED call.
|
|
|
|
|
|
(tree_if_conversion): Pass through predicate vector.
|
|
|
|
|
|
(pass_if_conversion::execute): Do CFG cleanup and SSA update
|
|
|
|
|
|
inline, see if any if-converted loops we refrece in
|
|
|
|
|
|
LOOP_VECTORIZED calls vanished and fixup.
|
|
|
|
|
|
* tree-if-conv.h (tree_if_conversion): Adjust prototype.
|
|
|
|
|
|
|
S/390: Introduce jdd constraint
Implementation of section anchors in S/390 back-end added in r266741
broke jump labels in S/390 Linux kernel [1]. Currently jump labels
pass global variable addresses to .quad directive in inline assembly
using "X" constraint. In the past this used to produce regular symbol
references, however, after r266741 we sometimes get values like
(plus (reg) (const_int)), where (reg) points to a section anchor.
Strictly speaking, this is still correct, since "X" accepts anything.
Thus, now we need another way to support jump labels.
The existing "i" constraint cannot be used, since with -fPIC it must
not accept non-local symbols, however, jump labels do require that,
e.g. __tracepoint_xdp_exception from kernel proper might be referenced
from kernel modules.
The existing "ZL" constraint cannot be used for the same reason.
The existing "b" constraint cannot be used because of the way
expand_asm_stmt works. It deduces whether the constraint allows
regs, subregs or mems, and processes asm operands differently based on
that. "b" is supposed to accept values like (mem (symbol_ref)), and
there appears to be no way to explain to expand_asm_stmt that for "b"
mem's address must not be in a register.
This patch introduces the new machine-specific constraint named "jdd" -
"j" prefix is already used for constants, and "d" stands for "data".
It accepts anything that fits into the data section, whether or not
this might require a relocation, that is, anything that passes
CONSTANT_P check.
[1] https://lkml.org/lkml/2019/1/23/346
gcc/ChangeLog:
2019-02-08 Ilya Leoshkevich <iii@linux.ibm.com>
* config/s390/constraints.md (jdd): New constraint.
gcc/testsuite/ChangeLog:
2019-02-08 Ilya Leoshkevich <iii@linux.ibm.com>
* gcc.target/s390/jump-label.c: New test.
From-SVN: r268688
2019-02-08 13:39:27 +01:00
|
|
|
|
2019-02-08 Ilya Leoshkevich <iii@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/s390/constraints.md (jdd): New constraint.
|
|
|
|
|
|
|
2019-02-08 12:30:53 +01:00
|
|
|
|
2019-02-08 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/89229
|
|
|
|
|
|
* config/i386/i386.md (*movoi_internal_avx): Set mode to XI for
|
|
|
|
|
|
upper 16 vector registers without TARGET_AVX512VL.
|
|
|
|
|
|
(*movti_internal): Likewise.
|
|
|
|
|
|
|
2019-02-08 11:26:33 +01:00
|
|
|
|
2019-02-08 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR rtl-optimization/89234
|
|
|
|
|
|
* except.c (copy_reg_eh_region_note_forward): Return if note_or_insn
|
|
|
|
|
|
is a NOTE, CODE_LABEL etc. - rtx_insn * other than INSN_P.
|
|
|
|
|
|
(copy_reg_eh_region_note_backward): Likewise.
|
|
|
|
|
|
|
2019-02-08 09:18:09 +01:00
|
|
|
|
2019-02-08 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR middle-end/89223
|
|
|
|
|
|
* tree-data-ref.c (initialize_matrix_A): Fail if constant
|
|
|
|
|
|
doesn't fit in HWI.
|
|
|
|
|
|
(analyze_subscript_affine_affine): Handle failure from
|
|
|
|
|
|
initialize_matrix_A.
|
|
|
|
|
|
|
2019-02-08 08:14:57 +01:00
|
|
|
|
2019-02-08 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* cfganal.c (pre_and_rev_post_order_compute_fn): Use fn instead of
|
|
|
|
|
|
cfun everywhere.
|
|
|
|
|
|
|
2019-02-08 00:00:18 +01:00
|
|
|
|
2019-02-07 David Malcolm <dmalcolm@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/86637
|
|
|
|
|
|
PR tree-optimization/89235
|
|
|
|
|
|
* tree-vect-loop.c (optimize_mask_stores): Add an
|
|
|
|
|
|
auto_purge_vect_location sentinel to ensure that vect_location is
|
|
|
|
|
|
purged on exit.
|
|
|
|
|
|
* tree-vectorizer.c
|
|
|
|
|
|
(auto_purge_vect_location::~auto_purge_vect_location): New dtor.
|
|
|
|
|
|
(try_vectorize_loop_1): Add an auto_purge_vect_location sentinel
|
|
|
|
|
|
to ensure that vect_location is purged on exit.
|
|
|
|
|
|
(pass_slp_vectorize::execute): Likewise, replacing the manual
|
|
|
|
|
|
reset.
|
|
|
|
|
|
* tree-vectorizer.h (class auto_purge_vect_location): New class.
|
|
|
|
|
|
|
2019-02-07 19:18:16 +01:00
|
|
|
|
2019-02-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/aarch64/iterators.md (max_opp): New code_attr.
|
|
|
|
|
|
(USMAX): New code iterator.
|
|
|
|
|
|
* config/aarch64/predicates.md (aarch64_smin): New predicate.
|
|
|
|
|
|
(aarch64_smax): Likewise.
|
|
|
|
|
|
* config/aarch64/aarch64-simd.md (abd<mode>_3): Rename to...
|
|
|
|
|
|
(*aarch64_<su>abd<mode>_3): ... Change RTL representation to
|
|
|
|
|
|
MINUS (MAX MIN).
|
|
|
|
|
|
|
2019-02-07 18:58:19 +01:00
|
|
|
|
2019-02-07 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/89229
|
|
|
|
|
|
* config/i386/i386.md (*movoi_internal_avx): Set mode to OI
|
|
|
|
|
|
for TARGET_AVX512VL.
|
|
|
|
|
|
(*movti_internal): Set mode to TI for TARGET_AVX512VL.
|
|
|
|
|
|
|
2019-02-07 16:53:38 +01:00
|
|
|
|
2019-02-07 Andreas Krebbel <krebbel@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/s390/s390-builtin-types.def: Add new types.
|
|
|
|
|
|
* config/s390/s390-builtins.def: (s390_vec_xl, s390_vec_xld2)
|
|
|
|
|
|
(s390_vec_xlw4): Make the memory operand into a const pointer.
|
|
|
|
|
|
(s390_vec_xld2, s390_vec_xlw4): Add a variant for single precision
|
|
|
|
|
|
float.
|
|
|
|
|
|
* config/s390/s390-c.c (s390_expand_overloaded_builtin): Generate
|
|
|
|
|
|
a new vector type with the alignment of the scalar memory operand.
|
|
|
|
|
|
|
2019-02-07 15:54:15 +01:00
|
|
|
|
2019-02-07 Matthew Malcomson <matthew.malcomson@arm.com>
|
|
|
|
|
|
Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR bootstrap/88714
|
|
|
|
|
|
* config/arm/arm-protos.h (valid_operands_ldrd_strd,
|
|
|
|
|
|
arm_count_ldrdstrd_insns): New declarations.
|
|
|
|
|
|
* config/arm/arm.c (mem_ok_for_ldrd_strd): Remove broken handling of
|
|
|
|
|
|
MINUS.
|
|
|
|
|
|
(valid_operands_ldrd_strd): New function.
|
|
|
|
|
|
(arm_count_ldrdstrd_insns): New function.
|
|
|
|
|
|
* config/arm/ldrdstrd.md: Change peepholes to generate PARALLEL SImode
|
|
|
|
|
|
sets instead of single DImode set and define new insns to match this.
|
|
|
|
|
|
|
2019-02-07 12:05:22 +01:00
|
|
|
|
2019-02-07 Tamar Christina <tamar.christina@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/aarch64/aarch64-builtins.c (aarch64_fcmla_lane_builtin_data):
|
|
|
|
|
|
Make it a C initializer.
|
|
|
|
|
|
|
2019-02-07 11:05:57 +01:00
|
|
|
|
2019-02-07 Tamar Christina <tamar.christina@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR/target 88850
|
|
|
|
|
|
* config/arm/neon.md (*neon_mov<mode>): Add r -> r case.
|
|
|
|
|
|
|
2019-02-07 10:32:46 +01:00
|
|
|
|
2019-02-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/arm/neon.md (neon_<sup>dot<vsi2qi>):
|
|
|
|
|
|
Use neon_dot<q> for type.
|
|
|
|
|
|
(neon_<sup>dot_lane<vsi2qi>): Likewise.
|
|
|
|
|
|
|
2019-02-07 10:31:33 +01:00
|
|
|
|
2019-02-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/aarch64/aarch64-simd.md (aarch64_<sur>dot<vsi2qi>):
|
|
|
|
|
|
Use neon_dot<q> for type.
|
|
|
|
|
|
(aarch64_<sur>dot_lane<vsi2qi>): Likewise.
|
|
|
|
|
|
(aarch64_<sur>dot_laneq<vsi2qi>): Likewise.
|
|
|
|
|
|
|
2019-02-06 22:48:45 +01:00
|
|
|
|
2019-02-06 Vladimir Makarov <vmakarov@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR rtl-optimization/89225
|
|
|
|
|
|
* lra-constaints.c (simplify_operand_subreg): Add subreg mode
|
|
|
|
|
|
sizes check.
|
|
|
|
|
|
|
2019-02-06 22:03:03 +01:00
|
|
|
|
2019-02-06 Eric Botcazou <ebotcazou@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/i386/i386.c (ix86_expand_prologue): Emit a memory blockage
|
|
|
|
|
|
after restoring registers saved to allocate the frame on Windows.
|
|
|
|
|
|
|
2019-02-06 12:18:33 +01:00
|
|
|
|
2019-02-06 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/89182
|
|
|
|
|
|
* graphite.h (cached_scalar_evolution_in_region): Declare.
|
|
|
|
|
|
* graphite.c (struct seir_cache_key): New.
|
|
|
|
|
|
(struct sese_scev_hash): Likewise.
|
|
|
|
|
|
(seir_cache): New global.
|
|
|
|
|
|
(cached_scalar_evolution_in_region): New function.
|
|
|
|
|
|
(graphite_transform_loops): Allocate and release seir_cache.
|
|
|
|
|
|
* graphite-isl-ast-to-gimple.c (get_rename_from_scev): Use
|
|
|
|
|
|
cached_scalar_evolution_in_region.
|
|
|
|
|
|
* graphite-scop-detection.c (scop_detection::can_represent_loop):
|
|
|
|
|
|
Simplify.
|
|
|
|
|
|
(scop_detection::graphite_can_represent_expr: Use
|
|
|
|
|
|
cached_scalar_evolution_in_region.
|
|
|
|
|
|
(scop_detection::stmt_simple_for_scop_p): Likewise.
|
|
|
|
|
|
(find_params_in_bb): Likewise.
|
|
|
|
|
|
(gather_bbs::before_dom_children): Likewise.
|
|
|
|
|
|
* graphite-sese-to-poly.c (create_pw_aff_from_tree): Likewise.
|
|
|
|
|
|
(add_loop_constraints): Likewise.
|
|
|
|
|
|
|
2019-02-06 10:16:19 +01:00
|
|
|
|
2019-02-06 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR middle-end/89210
|
|
|
|
|
|
* fold-const-call.c (fold_const_vec_convert): Pass true as last
|
|
|
|
|
|
operand to new_unary_operation only if both element types are integral
|
|
|
|
|
|
and it isn't a widening conversion. Return NULL_TREE if
|
|
|
|
|
|
new_unary_operation failed.
|
|
|
|
|
|
|
2019-02-05 18:14:11 +01:00
|
|
|
|
2019-02-05 Andreas Krebbel <krebbel@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88856
|
|
|
|
|
|
* config/s390/s390.md: Remove load and test FP splitter.
|
|
|
|
|
|
|
2019-02-05 17:32:06 +01:00
|
|
|
|
2019-02-05 Aaron Sawdey <acsawdey@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/89112
|
|
|
|
|
|
* config/rs6000/rs6000-string.c (do_ifelse, expand_cmp_vec_sequence,
|
|
|
|
|
|
expand_compare_loop, expand_block_compare_gpr,
|
|
|
|
|
|
expand_strncmp_align_check, expand_strncmp_gpr_sequence): Insert
|
|
|
|
|
|
REG_BR_PROB notes in inline expansion of memcmp/strncmp. Add
|
|
|
|
|
|
#include "profile-count.h" and "predict.h" for types and functions
|
|
|
|
|
|
needed to work with REG_BR_PROB notes.
|
|
|
|
|
|
|
2019-02-05 17:30:45 +01:00
|
|
|
|
2019-02-05 Aaron Sawdey <acsawdey@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/89112
|
|
|
|
|
|
* config/rs6000/rs6000.md (<bd>tf_<mode>): Generate a local label
|
|
|
|
|
|
for the long branch case.
|
|
|
|
|
|
|
2019-02-05 16:38:57 +01:00
|
|
|
|
2019-02-05 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
2019-02-05 17:21:36 +01:00
|
|
|
|
PR target/89188
|
|
|
|
|
|
* dce.c (delete_unmarked_insns): Don't remove no-op moves if they
|
|
|
|
|
|
can throw, non-call exceptions are enabled and we can't delete
|
|
|
|
|
|
dead exceptions or alter cfg. Set must_clean if
|
|
|
|
|
|
delete_insn_and_edges returns true, don't set it blindly for calls.
|
|
|
|
|
|
Assert that delete_unreachable_blocks is called only if can_alter_cfg.
|
|
|
|
|
|
|
2019-02-05 16:38:57 +01:00
|
|
|
|
PR rtl-optimization/89195
|
|
|
|
|
|
* combine.c (make_extraction): For MEMs, don't extract bytes outside
|
|
|
|
|
|
of the original MEM.
|
|
|
|
|
|
|
2019-02-05 13:17:45 +01:00
|
|
|
|
2019-02-05 Martin Liska <mliska@suse.cz>
|
|
|
|
|
|
|
|
|
|
|
|
PR gcov-profile/89000
|
|
|
|
|
|
* gcov.c (function_summary): Remove argument.
|
|
|
|
|
|
(file_summary): New function.
|
|
|
|
|
|
(print_usage): Replace tabs with spaces.
|
|
|
|
|
|
(generate_results): Use new function file_summary.
|
|
|
|
|
|
|
2019-02-05 10:17:18 +01:00
|
|
|
|
2019-02-05 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/89186
|
|
|
|
|
|
* optabs.c (prepare_cmp_insn): Pass x and y to
|
|
|
|
|
|
emit_block_comp_via_libcall rather than XEXP (x, 0) and XEXP (y, 0).
|
|
|
|
|
|
|
2019-02-05 09:32:16 +01:00
|
|
|
|
2019-02-05 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR middle-end/89150
|
|
|
|
|
|
* bitmap.h (struct bitmap_obstack): Do not mark GTY.
|
|
|
|
|
|
(struct bitmap_element): Drop chain_prev so we properly recurse on
|
|
|
|
|
|
the prev member, supporting tree views.
|
|
|
|
|
|
(struct bitmap_head): GTY skip the obstack member.
|
|
|
|
|
|
|
2019-02-04 16:00:41 +01:00
|
|
|
|
2019-02-04 Alexander Monakov <amonakov@ispras.ru>
|
|
|
|
|
|
|
|
|
|
|
|
PR c/88698
|
|
|
|
|
|
* doc/extend.texi (Vector Extensions): Add an example of using vector
|
|
|
|
|
|
types together with x86 intrinsics.
|
|
|
|
|
|
|
2019-02-04 14:19:49 +01:00
|
|
|
|
2019-02-04 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/rs6000/rs6000.c (rs6000_indirect_call_template_1): Increase
|
|
|
|
|
|
str[] size to 160, and comment.
|
|
|
|
|
|
|
[RS6000] Emit inline PLT when -mno-tls-markers
I restricted output of inline PLT sequences to when TLS marker relocs
were also available, which is obviously true when just considering
assembler support. However, there is a -mno-tls-markers option to
disable emitting the marker relocs. Currently that option also
disables inline PLT sequences, which is a bug (*). This patch fixes
that problem.
*) To be honest, it was a deliberate bug. I didn't want to have to
deal with inline PLT __tls_get_addr sequences lacking the marker
relocs in the linker, but it turns out the existing linker support for
old-style __tls_get_addr calls works reasonably well.
* config/rs6000/rs6000.c (rs6000_indirect_call_template_1),
(rs6000_pltseq_template): Guard output of TLS markers with
TARGET_TLS_MARKERS.
(rs6000_longcall_ref, rs6000_call_aix, rs6000_call_sysv),
(rs6000_sibcall_sysv): Ignore TARGET_TLS_MARKERS when deciding
to use inline PLT sequences.
* config/rs6000/rs6000.md (pltseq_tocsave_<mode>),
(pltseq_plt16_ha_<mode>, pltseq_plt16_lo_<mode>),
(pltseq_mtctr_<mode>): Don't test TARGET_TLS_MARKERS in predicate.
From-SVN: r268519
2019-02-04 14:18:14 +01:00
|
|
|
|
2019-02-04 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/rs6000/rs6000.c (rs6000_indirect_call_template_1),
|
|
|
|
|
|
(rs6000_pltseq_template): Guard output of TLS markers with
|
|
|
|
|
|
TARGET_TLS_MARKERS.
|
|
|
|
|
|
(rs6000_longcall_ref, rs6000_call_aix, rs6000_call_sysv),
|
|
|
|
|
|
(rs6000_sibcall_sysv): Ignore TARGET_TLS_MARKERS when deciding
|
|
|
|
|
|
to use inline PLT sequences.
|
|
|
|
|
|
* config/rs6000/rs6000.md (pltseq_tocsave_<mode>),
|
|
|
|
|
|
(pltseq_plt16_ha_<mode>, pltseq_plt16_lo_<mode>),
|
|
|
|
|
|
(pltseq_mtctr_<mode>): Don't test TARGET_TLS_MARKERS in predicate.
|
|
|
|
|
|
|
2019-02-04 13:19:48 +01:00
|
|
|
|
2019-02-04 Martin Liska <mliska@suse.cz>
|
|
|
|
|
|
|
2019-02-04 13:26:14 +01:00
|
|
|
|
PR ipa/88985
|
2019-02-04 13:19:48 +01:00
|
|
|
|
* ipa-fnsummary.c (estimate_edge_devirt_benefit): Bail
|
|
|
|
|
|
out when ipa_fn_summaries does not contain entry for callee.
|
|
|
|
|
|
|
2019-02-04 12:12:29 +01:00
|
|
|
|
2019-02-04 Eric Botcazou <ebotcazou@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/sparc/sparc.h: Remove superfluous blank lines.
|
|
|
|
|
|
* config/sparc/sparc.c (global_offset_table_rtx): Rename into...
|
|
|
|
|
|
(got_register_rtx): ...this.
|
|
|
|
|
|
(sparc_got): Adjust to above renaming.
|
|
|
|
|
|
(sparc_tls_got): Likewise.
|
|
|
|
|
|
(sparc_delegitimize_address): Likewise.
|
|
|
|
|
|
(sparc_output_mi_thunk): Likewise.
|
|
|
|
|
|
(sparc_init_pic_reg): Likewise.
|
|
|
|
|
|
(save_local_or_in_reg_p): Fix test on the GOT register.
|
|
|
|
|
|
(USE_HIDDEN_LINKONCE): Move around.
|
|
|
|
|
|
(get_pc_thunk_name): Likewise.
|
|
|
|
|
|
(gen_load_pcrel_sym): Likewise.
|
|
|
|
|
|
(load_got_register): Likewise.
|
|
|
|
|
|
|
2019-02-04 10:00:24 +01:00
|
|
|
|
2019-02-04 Kito Cheng <kito.cheng@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nds32/linux.h (GLIBC_DYNAMIC_LINKER): Define the naming rule
|
|
|
|
|
|
of the dynamic linker: "ld-linux-nds32[le|be][f].so.1".
|
|
|
|
|
|
|
2019-02-04 08:31:45 +01:00
|
|
|
|
2019-02-04 Chung-Ju Wu <jasonwucj@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nds32/nds32.c (nds32_legitimate_address_p): Add TLS model
|
|
|
|
|
|
into consideration.
|
|
|
|
|
|
|
2019-02-04 08:17:36 +01:00
|
|
|
|
2019-02-04 Chung-Ju Wu <jasonwucj@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config.gcc (with_nds32_lib, glibc):
|
|
|
|
|
|
Remove TARGET_DEFAULT_TLSDESC_TRAMPOLINE=0 setting.
|
|
|
|
|
|
* config/nds32/linux.h (TARGET_DEFAULT_TLSDESC_TRAMPOLINE): Delete.
|
|
|
|
|
|
(NDS32_TLSDESC_TRAMPOLINE_SPEC): Delete.
|
|
|
|
|
|
|
2019-02-03 17:48:41 +01:00
|
|
|
|
2019-02-03 Uroš Bizjak <ubizjak@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/89071
|
|
|
|
|
|
* config/i386/i386.md (*sqrt<mode>2_sse): Add (v,0) alternative.
|
|
|
|
|
|
Do not prefer (v,v) alternative for non-AVX targets and (m,v)
|
|
|
|
|
|
alternative for speed when TARGET_SSE_PARTIAL_REG_DEPENDENCY is set.
|
|
|
|
|
|
(*rcpsf2_sse): Ditto.
|
|
|
|
|
|
(*rsqrtsf2_sse): Ditto.
|
|
|
|
|
|
(sse4_1_round<mode<2): Ditto.
|
|
|
|
|
|
|
2019-02-03 11:53:01 +01:00
|
|
|
|
2019-02-03 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR debug/87295
|
|
|
|
|
|
* dwarf2out.c (copy_ancestor_tree): Register non-stubs as
|
|
|
|
|
|
orig.
|
|
|
|
|
|
|
2019-02-02 01:04:39 +01:00
|
|
|
|
2019-02-02 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR middle-end/87887
|
|
|
|
|
|
* config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
|
|
|
|
|
|
Punt with warning on aggregate return or argument types. Ignore
|
|
|
|
|
|
type/mode checking for uniform arguments.
|
|
|
|
|
|
|
2019-02-01 17:26:48 +01:00
|
|
|
|
2019-02-01 Segher Boessenkool <segher@kernel.crashing.org>
|
|
|
|
|
|
|
|
|
|
|
|
* combine.c (try_combine): Do not print "Can't combine" messages unless
|
|
|
|
|
|
printing failed combination attempts.
|
|
|
|
|
|
|
2019-02-01 17:22:13 +01:00
|
|
|
|
2019-02-01 Martin Jambor <mjambor@suse.cz>
|
|
|
|
|
|
|
|
|
|
|
|
PR hsa/87863
|
|
|
|
|
|
* omp-grid.c (grid_mark_variable_segment): Set assembler name of group
|
|
|
|
|
|
segment and global segment variables before making them static.
|
|
|
|
|
|
|
2019-02-01 17:15:36 +01:00
|
|
|
|
2019-02-01 Martin Jambor <mjambor@suse.cz>
|
|
|
|
|
|
|
|
|
|
|
|
* omp-grid.c (grid_target_follows_gridifiable_pattern): Guard two
|
|
|
|
|
|
missed optimization dump with dump_enabled_p.
|
|
|
|
|
|
|
2019-02-01 14:41:43 +01:00
|
|
|
|
2019-02-01 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR middle-end/88597
|
|
|
|
|
|
* tree-scalar-evolution.c (analyze_scalar_evolution): Set up
|
|
|
|
|
|
the instantiate cache.
|
|
|
|
|
|
(instantiate_scev_binary): Elide second operand procesing
|
|
|
|
|
|
if equal to the first.
|
|
|
|
|
|
* tree-chrec.c (chrec_contains_symbols): Add visited set.
|
|
|
|
|
|
(chrec_contains_undetermined): Likewise.
|
|
|
|
|
|
(tree_contains_chrecs): Likewise.
|
|
|
|
|
|
|
2019-02-01 11:46:36 +01:00
|
|
|
|
2019-02-01 Jan Hubicka <hubicka@ucw.cz>
|
|
|
|
|
|
|
|
|
|
|
|
* parms.def (MAX_INLINE_INSNS_SINGLE): Reduce from 400 to 200.
|
|
|
|
|
|
|
2019-02-01 09:43:02 +01:00
|
|
|
|
2019-02-01 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
2019-02-01 09:44:23 +01:00
|
|
|
|
PR tree-optimization/89143
|
|
|
|
|
|
* wide-int-range.h (wide_int_range_absu): Declare.
|
|
|
|
|
|
* wide-int-range.cc (wide_int_range_absu): New function.
|
|
|
|
|
|
* tree-vrp.c (extract_range_from_unary_expr): Handle ABSU_EXPR.
|
|
|
|
|
|
|
2019-02-01 09:43:02 +01:00
|
|
|
|
PR tree-optimization/88107
|
|
|
|
|
|
* tree-cfg.c (find_outermost_region_in_block): Add ALL argument,
|
|
|
|
|
|
instead of assertion that eh_region_outermost is non-NULL, if it
|
|
|
|
|
|
is NULL, set *ALL to true and return NULL.
|
|
|
|
|
|
(move_sese_region_to_fn): Adjust caller, if all is set, call
|
|
|
|
|
|
duplicate_eh_regions with NULL region.
|
|
|
|
|
|
|
2019-02-01 09:07:35 +01:00
|
|
|
|
2019-02-01 Richard Biener <rguenth@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR rtl-optimization/88593
|
|
|
|
|
|
* mode-switching.c (optimize_mode_switching): Free dominators before
|
|
|
|
|
|
calling cleanup_cfg.
|
|
|
|
|
|
|
2019-02-01 03:39:52 +01:00
|
|
|
|
2019-02-01 Bin Cheng <bin.cheng@linux.alibaba.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/88932
|
|
|
|
|
|
* tree-predcom.c (try_combine_chains): Get loop bbs in dom order.
|
|
|
|
|
|
|
2019-02-01 00:05:01 +01:00
|
|
|
|
2019-01-31 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR middle-end/89137
|
|
|
|
|
|
* omp-low.c (lower_omp_task_reductions): Drop redundant test to avoid
|
|
|
|
|
|
bogus clang warning.
|
|
|
|
|
|
|
2019-01-31 21:06:42 +01:00
|
|
|
|
2019-01-31 Uroš Bizjak <ubizjak@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/89071
|
|
|
|
|
|
* config/i386/i386.md (*extendsfdf2): Split out reg->reg
|
|
|
|
|
|
alternative to avoid partial SSE register stall for TARGET_AVX.
|
|
|
|
|
|
(truncdfsf2): Ditto.
|
|
|
|
|
|
(sse4_1_round<mode>2): Ditto.
|
|
|
|
|
|
|
2019-01-31 14:53:06 +01:00
|
|
|
|
2018-01-31 Bill Schmidt <wschmidt@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/89008
|
|
|
|
|
|
* gimple-ssa-strength-reduction.c (slsr_process_mul): Don't
|
|
|
|
|
|
process anything of the form X * 0.
|
|
|
|
|
|
|
2019-01-31 12:51:59 +01:00
|
|
|
|
2019-01-31 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/89135
|
|
|
|
|
|
* tree-ssa-phiprop.c (pass_phiprop::execute): Skip blocks
|
|
|
|
|
|
with abnormal preds.
|
|
|
|
|
|
|
2019-01-31 09:20:45 +01:00
|
|
|
|
2019-01-31 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR sanitizer/89124
|
|
|
|
|
|
* ipa-inline.c (sanitize_attrs_match_for_inline_p): Allow inlining
|
|
|
|
|
|
always_inline callees into no_sanitize_address callers.
|
|
|
|
|
|
|
2019-01-31 09:09:59 +01:00
|
|
|
|
2019-01-31 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR rtl-optimization/89115
|
|
|
|
|
|
* lra.c (lra_rtx_hash): Properly hash CONST_INT values.
|
|
|
|
|
|
|
2019-01-31 03:33:58 +01:00
|
|
|
|
2019-01-30 Martin Sebor <msebor@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR other/89106
|
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|
|
|
|
* doc/extend.texi (cast to a union): Correct and expand.
|
|
|
|
|
|
|
2019-01-30 22:49:23 +01:00
|
|
|
|
2019-01-30 Vladimir Makarov <vmakarov@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR rtl-optimization/87246
|
|
|
|
|
|
* lra-constraints.c (simplify_operand_subreg): Reload memory
|
|
|
|
|
|
in subreg if the address became invalid.
|
|
|
|
|
|
|
2019-01-30 21:52:08 +01:00
|
|
|
|
2019-01-30 Bill Schmidt <wschmidt@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/87064
|
|
|
|
|
|
* config/rs6000/vsx.md (*vsx_reduc_<VEC_reduc_name>_v4sf_scalar):
|
|
|
|
|
|
Disable for little-endian.
|
|
|
|
|
|
|
2019-01-30 16:11:04 +01:00
|
|
|
|
2019-01-30 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR rtl-optimization/89115
|
|
|
|
|
|
* opts.c (default_options_optimization): Reduce
|
|
|
|
|
|
PARAM_MAX_DSE_ACTIVE_LOCAL_STORES by a factor of 10 at -O1.
|
|
|
|
|
|
Make PARAM_LOOP_INVARIANT_MAX_BBS_IN_LOOP reduction relative
|
|
|
|
|
|
to the default.
|
|
|
|
|
|
|
2019-01-30 16:01:40 +01:00
|
|
|
|
2019-01-30 Kelvin Nilsen <kelvin@gcc.gnu.org>
|
|
|
|
|
|
|
|
|
|
|
|
* config/rs6000/rs6000-c.c (altivec-resolve_overloaded_builtin):
|
|
|
|
|
|
Change handling of ALTIVEC_BUILTIN_VEC_EXTRACT. Coerce result to
|
|
|
|
|
|
type of vector element when vec_extract is implemented by direct
|
|
|
|
|
|
move.
|
|
|
|
|
|
|
2019-01-30 15:40:10 +01:00
|
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|
|
2019-01-30 Thomas Schwinge <thomas@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/invoke.texi (C Language Options): List "-fopenacc-dim".
|
|
|
|
|
|
|
2019-01-30 13:41:13 +01:00
|
|
|
|
2019-01-30 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/89111
|
|
|
|
|
|
* tree-ssa-loop-im.c (gather_mem_refs_stmt): Restrict
|
|
|
|
|
|
canonicalization to appropriately sized access types.
|
|
|
|
|
|
|
2019-01-30 08:51:24 +01:00
|
|
|
|
2019-01-30 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR c++/89105
|
|
|
|
|
|
* config/i386/i386.c (ix86_warn_parameter_passing_abi): Don't warn
|
|
|
|
|
|
for arguments to functions that are TU-local and shouldn't be
|
|
|
|
|
|
referenced by assembly.
|
|
|
|
|
|
|
2019-01-30 08:18:22 +01:00
|
|
|
|
2019-01-30 Ulrich Drepper <drepper@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* dumpfile.c (opt_info_switch_p_1): Ignore '-' if it appears
|
|
|
|
|
|
after '='.
|
|
|
|
|
|
|
2019-01-30 04:04:14 +01:00
|
|
|
|
2019-01-29 Martin Sebor <msebor@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR c/88956
|
|
|
|
|
|
* gimple-fold.c (fold_array_ctor_reference): Avoid zero-length arrays.
|
|
|
|
|
|
|
2019-01-29 22:09:41 +01:00
|
|
|
|
2019-01-29 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR c++/66676
|
|
|
|
|
|
PR ipa/89104
|
|
|
|
|
|
* omp-simd-clone.c (simd_clone_clauses_extract)
|
|
|
|
|
|
<case OMP_CLAUSE_ALIGNED>: Ignore clauses with NULL
|
|
|
|
|
|
OMP_CLAUSE_ALIGNED_ALIGNMENT.
|
|
|
|
|
|
|
2019-01-29 16:08:16 +01:00
|
|
|
|
2019-01-29 Vineet Gupta <vgupta@synopsys.com>
|
|
|
|
|
|
|
2019-01-29 22:09:41 +01:00
|
|
|
|
* config.gcc: Force .init_array for ARC.
|
2019-01-29 16:08:16 +01:00
|
|
|
|
|
2019-01-29 09:12:02 +01:00
|
|
|
|
2019-01-29 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR debug/87295
|
|
|
|
|
|
* dwarf2out.c (collect_skeleton_dies): New helper.
|
|
|
|
|
|
(copy_decls_for_unworthy_types): Call it.
|
|
|
|
|
|
(build_abbrev_table): Assert we do not try to replace
|
|
|
|
|
|
DW_AT_signature refs with local refs.
|
|
|
|
|
|
|
2019-01-28 23:33:33 +01:00
|
|
|
|
2019-01-28 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR middle-end/89002
|
|
|
|
|
|
* gimplify.c (gimplify_omp_for): When adding OMP_CLAUSE_*_GIMPLE_SEQ
|
|
|
|
|
|
for lastprivate/linear IV, push gimplify context around gimplify_assign
|
|
|
|
|
|
and, if it needed any temporaries, pop it into a gimple bind around the
|
|
|
|
|
|
sequence.
|
|
|
|
|
|
|
2019-01-28 14:10:29 +01:00
|
|
|
|
2019-01-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
|
|
|
|
|
|
|
|
|
|
|
|
* common.opt (-Wattribute-alias): Remove "no-" from name.
|
|
|
|
|
|
Make -Wattribute-alias command line option and
|
|
|
|
|
|
#pragma GCC diagnostic ignored "-Wattribute-alias" work again.
|
|
|
|
|
|
|
re PR target/89073 (x86 __attribute__ ((target("sha"))) not documented)
PR target/89073
* doc/invoke.texi (-mclwb, -mprfchw, -mrdpid, -mrdseed, -msgx,
-madx, -mhle, -mavx5124fmaps, -mavx512vnni, -mavx5124vnniw): Document
x86 ISA options.
(bmi2): Add missing @opindex.
* doc/extend.texi (x86 target attribute): Move fma4, lwp, ssse3
options alphabetically. Add missing 3dnow, 3dnowa, adx, avx, avx2,
avx5124fmaps, avx5124vnniw, avx512bitalg, avx512bw, avx512cd,
avx512dq, avx512er, avx512f, avx512ifma, avx512pf, avx512vbmi,
avx512vbmi2, avx512vl, avx512vnni, avx512vpopcntdq, bmi, bmi2,
cldemote, clflushopt, clwb, clzero, crc32, cx16, f16c, fma, fsgsbase,
fxsr, gfni, hle, lzcnt, movbe, movdir64b, movdiri, mwaitx, pconfig,
pku, prefetchwt1, prfchw, ptwrite, rdpid, rdrnd, rdseed, rtm, sahf,
sgx, sha, shstk, tbm, vaes, vpclmulqdq, waitpkg, wbnoinvd, xsave,
xsavec, xsaveopt and xsaves options.
From-SVN: r268335
2019-01-28 11:38:29 +01:00
|
|
|
|
2019-01-28 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/89073
|
|
|
|
|
|
* doc/invoke.texi (-mclwb, -mprfchw, -mrdpid, -mrdseed, -msgx,
|
|
|
|
|
|
-madx, -mhle, -mavx5124fmaps, -mavx512vnni, -mavx5124vnniw): Document
|
|
|
|
|
|
x86 ISA options.
|
|
|
|
|
|
(bmi2): Add missing @opindex.
|
|
|
|
|
|
* doc/extend.texi (x86 target attribute): Move fma4, lwp, ssse3
|
|
|
|
|
|
options alphabetically. Add missing 3dnow, 3dnowa, adx, avx, avx2,
|
|
|
|
|
|
avx5124fmaps, avx5124vnniw, avx512bitalg, avx512bw, avx512cd,
|
|
|
|
|
|
avx512dq, avx512er, avx512f, avx512ifma, avx512pf, avx512vbmi,
|
|
|
|
|
|
avx512vbmi2, avx512vl, avx512vnni, avx512vpopcntdq, bmi, bmi2,
|
|
|
|
|
|
cldemote, clflushopt, clwb, clzero, crc32, cx16, f16c, fma, fsgsbase,
|
|
|
|
|
|
fxsr, gfni, hle, lzcnt, movbe, movdir64b, movdiri, mwaitx, pconfig,
|
|
|
|
|
|
pku, prefetchwt1, prfchw, ptwrite, rdpid, rdrnd, rdseed, rtm, sahf,
|
|
|
|
|
|
sgx, sha, shstk, tbm, vaes, vpclmulqdq, waitpkg, wbnoinvd, xsave,
|
|
|
|
|
|
xsavec, xsaveopt and xsaves options.
|
|
|
|
|
|
|
2019-01-28 10:36:50 +01:00
|
|
|
|
2019-01-28 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR debug/89076
|
|
|
|
|
|
* dwarf2out.c (gen_subprogram_die): Remove leftover from MPX
|
|
|
|
|
|
support removal.
|
|
|
|
|
|
|
2019-01-28 09:15:42 +01:00
|
|
|
|
2019-01-28 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/88739
|
|
|
|
|
|
* tree-cfg.c (verify_types_in_gimple_reference): Verify
|
|
|
|
|
|
BIT_FIELD_REFs only are applied to mode-precision operands
|
|
|
|
|
|
when they are integral.
|
|
|
|
|
|
(verify_gimple_assign_ternary): Likewise for BIT_INSERT_EXPR.
|
|
|
|
|
|
* tree-ssa-sccvn.c (vn_reference_lookup_3): Avoid generating
|
|
|
|
|
|
BIT_FIELD_REFs of non-mode-precision integral operands.
|
|
|
|
|
|
|
2019-01-27 12:56:44 +01:00
|
|
|
|
2019-01-27 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/87214
|
|
|
|
|
|
* config/i386/sse.md
|
|
|
|
|
|
(<mask_codefor>avx512dq_shuf_<shuffletype>64x2_1<mask_name>,
|
|
|
|
|
|
avx512f_shuf_<shuffletype>64x2_1<mask_name>): Ensure the
|
|
|
|
|
|
first constants in pairs are multiples of 2. Formatting fixes.
|
|
|
|
|
|
(avx512vl_shuf_<shuffletype>32x4_1<mask_name>,
|
|
|
|
|
|
avx512vl_shuf_<shuffletype>32x4_1<mask_name>): Ensure the
|
|
|
|
|
|
first constants in each quadruple are multiples of 4. Formatting fixes.
|
|
|
|
|
|
|
2019-01-26 23:19:17 +01:00
|
|
|
|
2019-01-26 Martin Jambor <mjambor@suse.cz>
|
|
|
|
|
|
|
|
|
|
|
|
PR ipa/88933
|
|
|
|
|
|
* tree-inline.c: Include tree-cfgcleanup.h.
|
|
|
|
|
|
(delete_unreachable_blocks_update_callgraph): Move...
|
|
|
|
|
|
* tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
|
|
|
|
|
|
...here, make externally visible, make second argument bool, adjust
|
|
|
|
|
|
all callers.
|
|
|
|
|
|
* tree-cfgcleanup.c: Include cgraph.h.
|
|
|
|
|
|
* tree-cfgcleanup.h (delete_unreachable_blocks_update_callgraph):
|
|
|
|
|
|
Declare.
|
|
|
|
|
|
* ipa-prop.c: Include tree-cfgcleanup.h.
|
|
|
|
|
|
(ipcp_transform_function): Call
|
|
|
|
|
|
delete_unreachable_blocks_update_callgraph instead of cleaning uo CFG.
|
|
|
|
|
|
|
2019-01-25 23:13:43 +01:00
|
|
|
|
2019-01-25 Vladimir Makarov <vmakarov@redhat.com>
|
|
|
|
|
|
|
2019-01-25 23:24:43 +01:00
|
|
|
|
PR rtl-optimization/88846
|
2019-01-25 23:13:43 +01:00
|
|
|
|
* ira.c (process_set_for_memref_referenced_p): New.
|
|
|
|
|
|
(memref_referenced_p): Add new param. Use
|
|
|
|
|
|
process_set_for_memref_referenced_p. Add new switch cases.
|
|
|
|
|
|
(memref_used_between_p): Pass new arg to memref_referenced_p.
|
|
|
|
|
|
|
2019-01-25 18:09:33 +01:00
|
|
|
|
2019-01-25 Richard Earnshaw <rearnsha@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88469
|
|
|
|
|
|
* config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add new
|
|
|
|
|
|
argument ABI_BREAK. Set to true if the calculated alignment has
|
|
|
|
|
|
changed in gcc-9. Check bit-fields for their base type alignment.
|
|
|
|
|
|
(aarch64_layout_arg): Warn if argument passing has changed in gcc-9.
|
|
|
|
|
|
(aarch64_function_arg_boundary): Likewise.
|
|
|
|
|
|
(aarch64_gimplify_va_arg_expr): Likewise.
|
|
|
|
|
|
|
2019-01-25 17:57:32 +01:00
|
|
|
|
2019-01-25 Richard Sandiford <richard.sandiford@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR middle-end/89037
|
|
|
|
|
|
* varasm.c (output_constructor_bitfield): Use wi::extract_uhwi
|
|
|
|
|
|
instead of accessing TREE_INT_CST_ELT directly.
|
|
|
|
|
|
|
2019-01-25 14:36:37 +01:00
|
|
|
|
2019-01-25 Christophe Lyon <christophe.lyon@linaro.org>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/sourcebuild.texi (Environment attributes): Add fenv and
|
|
|
|
|
|
fenv_exceptions description.
|
|
|
|
|
|
|
2019-01-25 14:29:06 +01:00
|
|
|
|
2019-01-25 Wilco Dijkstra <wdijkstr@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR rtl-optimization/87763
|
|
|
|
|
|
* config/aarch64/aarch64.c (aarch64_select_cc_mode):
|
|
|
|
|
|
Allow SUBREG when matching CC_NZmode compare.
|
|
|
|
|
|
|
2019-01-25 13:46:24 +01:00
|
|
|
|
2019-01-25 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/89049
|
|
|
|
|
|
* tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
|
|
|
|
|
|
Look at the pattern stmt to determine if the stmt is vectorized.
|
|
|
|
|
|
|
2019-01-25 13:26:49 +01:00
|
|
|
|
2019-01-25 Richard Sandiford <richard.sandiford@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/aarch64/aarch64-sve.md (*pred_mov<mode>)
|
|
|
|
|
|
(pred_mov<mode>): Handle all-register forms using both a new
|
|
|
|
|
|
alternative and a split.
|
|
|
|
|
|
|
2019-01-25 09:13:34 +01:00
|
|
|
|
2019-01-25 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/86865
|
|
|
|
|
|
* graphite-scop-detection.c (scop_detection::can_represent_loop):
|
|
|
|
|
|
Reject non-do-while loops.
|
|
|
|
|
|
|
altivec.md (build_vector_mask_for_load): Use MEM_P.
* config/rs6000/altivec.md (build_vector_mask_for_load): Use MEM_P.
* config/rs6000/constraints.md (Q constraint): Use REG_P.
* config/rs6000/darwin.h (PREFERRED_RELOAD_CLASS): Use SYMBOL_REF_P.
* config/rs6000/freebsd64.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Use
SYMBOL_REF_P, CONST_INT_P and CONST_DOUBLE_P.
* config/rs6000/linux64.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Likewise.
* config/rs6000/predicates.md (altivec_register_operand, vint_operand,
vsx_register_operand, vsx_reg_sfsubreg_ok, vfloat_operand,
vlogical_operand, gpc_reg_operand, int_reg_operand,
int_reg_operand_not_pseudo): Use SUBREG_P and HARD_REGISTER_P.
(ca_operand, base_reg_operand, htm_spr_reg_operand, cc_reg_operand,
cc_reg_not_cr0_operand, input_operand): Use SUBREG_P.
(save_world_operation, restore_world_operation, lmw_operation,
stmw_operation): Use MEM_P and REG_P.
(tie_operand): Use MEM_P.
(vrsave_operation, crsave_operation): Use REG_P.
(mfcr_operation, mtcrf_operation): Use REG_P and CONST_INT_P.
(fpr_reg_operand): Use SUBREG_P and HARD_REGISTER_NUM_P.
(quad_int_reg_operand): Use HARD_REGISTER_NUM_P.
(call_operand): Use HARD_REGISTER_P.
(indexed_or_indirect_operand, altivec_indexed_or_indirect_operand):
Use CONST_INT_P.
(lwa_operand): Use SUBREG_P, REG_P and CONST_INT_P.
* config/rs6000/rs6000-p8swap.c (insn_is_load_p, insn_is_store_p,
quad_aligned_load_p, replace_swapped_aligned_store,
recombine_lvx_pattern, replace_swapped_aligned_load,
recombine_stvx_pattern): Use MEM_P.
(const_load_sequence_p, adjust_vperm, replace_swapped_load_constant):
Use MEM_P and SYMBOL_REF_P.
(rtx_is_swappable_p): Use REG_P and CONST_INT_P.
(insn_is_swappable_p): Use REG_P and MEM_P.
(insn_is_swap_p, (alignment_mask): Use CONST_INT_P.
* config/rs6000/rs6000-string.c (expand_block_clear, expand_block_move):
Use CONST_INT_P.
* config/rs6000/rs6000.c (rs6000_secondary_reload, rs6000_emit_cmove):
Use CONST_DOUBLE_P.
(rs6000_output_move_128bit): Use CONST_DOUBLE_P, CONST_INT_P and
CONST_WIDE_INT_P.
(rs6000_legitimize_address): Use CONST_DOUBLE_P, CONST_INT_P,
CONST_WIDE_INT_P, REG_P and SYMBOL_REF_P.
(rs6000_emit_move): Use CONST_DOUBLE_P, CONST_INT_P, HARD_REGISTER_P,
HARD_REGISTER_NUM_P, MEM_P, REG_P, SUBREG_P, SYMBOL_REF_P and
reg_or_subregno:
(output_toc): Use CONST_DOUBLE_P, CONST_INT_P and SYMBOL_REF_P.
(easy_altivec_constant, rs6000_legitimate_offset_address_p,
rs6000_mode_dependent_address, rs6000_expand_mtfsf_builtin,
rs6000_expand_set_fpscr_rn_builtin, rs6000_expand_set_fpscr_drn_builtin,
rs6000_expand_unop_builtin, INT_P, rs6000_generate_compare,
rs6000_machopic_legitimize_pic_address, rs6000_split_logical_inner,
rs6000_split_logical_di): Use CONST_INT_P.
(rs6000_legitimize_reload_address): Use CONST_INT_P, HARD_REGISTER_P,
REG_P and SYMBOL_REF_P.
(setup_incoming_varargs, rs6000_rtx_costs): Use CONST_INT_P and MEM_P.
(print_operand): Use CONST_INT_P, MEM_P and REG_P.
(virtual_stack_registers_memory_p, rs6000_legitimate_address_p,
mems_ok_for_quad_peep): Use CONST_INT_P and REG_P.
(rs6000_secondary_reload_memory): Use CONST_INT_P and SUBREG_P.
(small_data_operand, print_operand_address): Use CONST_INT_P and
SYMBOL_REF_P.
(split_stack_arg_pointer_used_p): Use HARD_REGISTER_P.
(rs6000_init_hard_regno_mode_ok, direct_move_p):
Use HARD_REGISTER_NUM_P.
(rs6000_secondary_reload_gpr): Use HARD_REGISTER_NUM_P and MEM_P.
(rs6000_secondary_reload_class): Use HARD_REGISTER_NUM_P, REG_P,
SUBREG_P and SYMBOL_REF_P.
(register_to_reg_type, rs6000_secondary_reload_inner): Use SUBREG_P
and HARD_REGISTER_NUM_P.
(rs6000_adjust_vec_address): Use HARD_REGISTER_NUM_P and
reg_or_subregno.
(rs6000_adjust_cost, find_mem_ref): Use MEM_P.
(macho_lo_sum_memory_operand, rs6000_eliminate_indexed_memrefs): Use
MEM_P and REG_P.
(legitimate_indirect_address_p, legitimate_lo_sum_address_p,
registers_ok_for_quad_peep, rs6000_output_function_epilogue,
find_addr_reg): Use REG_P.
(altivec_expand_vec_perm_const): Use REG_P and SUBREG_P.
(rs6000_emit_le_vsx_move): Use SUBREG_P.
(offsettable_ok_by_alignment, constant_pool_expr_p,
legitimate_small_data_p, rs6000_output_dwarf_dtprel,
rs6000_delegitimize_address, rs6000_const_not_ok_for_debug_p,
rs6000_cannot_force_const_mem, rs6000_output_addr_const_extra,
rs6000_assemble_integer, create_TOC_reference,
rs6000_emit_allocate_stack, rs6000_xcoff_encode_section_info,
rs6000_call_aix, rs6000_call_aix): Use SYMBOL_REF_P.
(rs6000_split_vec_extract_var): Use reg_or_subregno.
* config/rs6000/rtems.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Use
CONST_DOUBLE_P, CONST_INT_P and SYMBOL_REF_P.
* config/rs6000/sysv4.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Likewise.
* config/rs6000/xcoff.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Likewise.
* config/rs6000/rs6000.h (RS6000_SYMBOL_REF_TLS_P): Use SYMBOL_REF_P.
(REGNO_OK_FOR_INDEX_P, REGNO_OK_FOR_BASE_P): Use HARD_REGISTER_NUM_P.
(INT_REG_OK_FOR_INDEX_P, INT_REG_OK_FOR_BASE_P): Use HARD_REGISTER_P.
(CONSTANT_ADDRESS_P): Use CONST_INT_P and SYMBOL_REF_P.
* config/rs6000/rs6000.md (define_expands strlensi, mod<mode>3
and cbranch<mode>4): Use CONST_INT_P.
(multiple define_splits): Use REG_P and SUBREG_P.
(define_expands call, call_value): Use MEM_P.
(define_expands sibcall, sibcall_value): Use CONST_INT_P and MEM_P.
(define insn *mtcrfsi): Use CONST_INT_P and REG_P.
* config/rs6000/vsx.md (*vsx_le_perm_load_<mode>,
*vsx_le_perm_load_v8hi, *vsx_le_perm_load_v16qi): Use HARD_REGISTER_P
and HARD_REGISTER_NUM_P.
(multiple define_splits): Use HARD_REGISTER_NUM_P.
From-SVN: r268253
2019-01-24 23:48:06 +01:00
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2019-01-24 Peter Bergner <bergner@linux.ibm.com>
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* config/rs6000/altivec.md (build_vector_mask_for_load): Use MEM_P.
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* config/rs6000/constraints.md (Q constraint): Use REG_P.
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* config/rs6000/darwin.h (PREFERRED_RELOAD_CLASS): Use SYMBOL_REF_P.
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* config/rs6000/freebsd64.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Use
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SYMBOL_REF_P, CONST_INT_P and CONST_DOUBLE_P.
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* config/rs6000/linux64.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Likewise.
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* config/rs6000/predicates.md (altivec_register_operand, vint_operand,
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vsx_register_operand, vsx_reg_sfsubreg_ok, vfloat_operand,
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vlogical_operand, gpc_reg_operand, int_reg_operand,
|
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int_reg_operand_not_pseudo): Use SUBREG_P and HARD_REGISTER_P.
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(ca_operand, base_reg_operand, htm_spr_reg_operand, cc_reg_operand,
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cc_reg_not_cr0_operand, input_operand): Use SUBREG_P.
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(save_world_operation, restore_world_operation, lmw_operation,
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stmw_operation): Use MEM_P and REG_P.
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(tie_operand): Use MEM_P.
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(vrsave_operation, crsave_operation): Use REG_P.
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(mfcr_operation, mtcrf_operation): Use REG_P and CONST_INT_P.
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(fpr_reg_operand): Use SUBREG_P and HARD_REGISTER_NUM_P.
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(quad_int_reg_operand): Use HARD_REGISTER_NUM_P.
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(call_operand): Use HARD_REGISTER_P.
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(indexed_or_indirect_operand, altivec_indexed_or_indirect_operand):
|
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Use CONST_INT_P.
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(lwa_operand): Use SUBREG_P, REG_P and CONST_INT_P.
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* config/rs6000/rs6000-p8swap.c (insn_is_load_p, insn_is_store_p,
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quad_aligned_load_p, replace_swapped_aligned_store,
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recombine_lvx_pattern, replace_swapped_aligned_load,
|
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recombine_stvx_pattern): Use MEM_P.
|
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(const_load_sequence_p, adjust_vperm, replace_swapped_load_constant):
|
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Use MEM_P and SYMBOL_REF_P.
|
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|
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(rtx_is_swappable_p): Use REG_P and CONST_INT_P.
|
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(insn_is_swappable_p): Use REG_P and MEM_P.
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(insn_is_swap_p, (alignment_mask): Use CONST_INT_P.
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* config/rs6000/rs6000-string.c (expand_block_clear, expand_block_move):
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Use CONST_INT_P.
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* config/rs6000/rs6000.c (rs6000_secondary_reload, rs6000_emit_cmove):
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Use CONST_DOUBLE_P.
|
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(rs6000_output_move_128bit): Use CONST_DOUBLE_P, CONST_INT_P and
|
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CONST_WIDE_INT_P.
|
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(rs6000_legitimize_address): Use CONST_DOUBLE_P, CONST_INT_P,
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CONST_WIDE_INT_P, REG_P and SYMBOL_REF_P.
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(rs6000_emit_move): Use CONST_DOUBLE_P, CONST_INT_P, HARD_REGISTER_P,
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HARD_REGISTER_NUM_P, MEM_P, REG_P, SUBREG_P, SYMBOL_REF_P and
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reg_or_subregno:
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(output_toc): Use CONST_DOUBLE_P, CONST_INT_P and SYMBOL_REF_P.
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(easy_altivec_constant, rs6000_legitimate_offset_address_p,
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|
|
|
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rs6000_mode_dependent_address, rs6000_expand_mtfsf_builtin,
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rs6000_expand_set_fpscr_rn_builtin, rs6000_expand_set_fpscr_drn_builtin,
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rs6000_expand_unop_builtin, INT_P, rs6000_generate_compare,
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rs6000_machopic_legitimize_pic_address, rs6000_split_logical_inner,
|
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|
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rs6000_split_logical_di): Use CONST_INT_P.
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(rs6000_legitimize_reload_address): Use CONST_INT_P, HARD_REGISTER_P,
|
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REG_P and SYMBOL_REF_P.
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(setup_incoming_varargs, rs6000_rtx_costs): Use CONST_INT_P and MEM_P.
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(print_operand): Use CONST_INT_P, MEM_P and REG_P.
|
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(virtual_stack_registers_memory_p, rs6000_legitimate_address_p,
|
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mems_ok_for_quad_peep): Use CONST_INT_P and REG_P.
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(rs6000_secondary_reload_memory): Use CONST_INT_P and SUBREG_P.
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(small_data_operand, print_operand_address): Use CONST_INT_P and
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SYMBOL_REF_P.
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(split_stack_arg_pointer_used_p): Use HARD_REGISTER_P.
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(rs6000_init_hard_regno_mode_ok, direct_move_p):
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Use HARD_REGISTER_NUM_P.
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(rs6000_secondary_reload_gpr): Use HARD_REGISTER_NUM_P and MEM_P.
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(rs6000_secondary_reload_class): Use HARD_REGISTER_NUM_P, REG_P,
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SUBREG_P and SYMBOL_REF_P.
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(register_to_reg_type, rs6000_secondary_reload_inner): Use SUBREG_P
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and HARD_REGISTER_NUM_P.
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(rs6000_adjust_vec_address): Use HARD_REGISTER_NUM_P and
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reg_or_subregno.
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(rs6000_adjust_cost, find_mem_ref): Use MEM_P.
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(macho_lo_sum_memory_operand, rs6000_eliminate_indexed_memrefs): Use
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MEM_P and REG_P.
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(legitimate_indirect_address_p, legitimate_lo_sum_address_p,
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registers_ok_for_quad_peep, rs6000_output_function_epilogue,
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find_addr_reg): Use REG_P.
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(altivec_expand_vec_perm_const): Use REG_P and SUBREG_P.
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(rs6000_emit_le_vsx_move): Use SUBREG_P.
|
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|
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(offsettable_ok_by_alignment, constant_pool_expr_p,
|
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|
|
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legitimate_small_data_p, rs6000_output_dwarf_dtprel,
|
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rs6000_delegitimize_address, rs6000_const_not_ok_for_debug_p,
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rs6000_cannot_force_const_mem, rs6000_output_addr_const_extra,
|
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rs6000_assemble_integer, create_TOC_reference,
|
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rs6000_emit_allocate_stack, rs6000_xcoff_encode_section_info,
|
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|
|
|
|
rs6000_call_aix, rs6000_call_aix): Use SYMBOL_REF_P.
|
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|
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(rs6000_split_vec_extract_var): Use reg_or_subregno.
|
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|
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* config/rs6000/rtems.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Use
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CONST_DOUBLE_P, CONST_INT_P and SYMBOL_REF_P.
|
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* config/rs6000/sysv4.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Likewise.
|
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* config/rs6000/xcoff.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P): Likewise.
|
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|
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* config/rs6000/rs6000.h (RS6000_SYMBOL_REF_TLS_P): Use SYMBOL_REF_P.
|
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(REGNO_OK_FOR_INDEX_P, REGNO_OK_FOR_BASE_P): Use HARD_REGISTER_NUM_P.
|
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(INT_REG_OK_FOR_INDEX_P, INT_REG_OK_FOR_BASE_P): Use HARD_REGISTER_P.
|
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(CONSTANT_ADDRESS_P): Use CONST_INT_P and SYMBOL_REF_P.
|
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|
|
|
* config/rs6000/rs6000.md (define_expands strlensi, mod<mode>3
|
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|
|
|
|
and cbranch<mode>4): Use CONST_INT_P.
|
|
|
|
|
|
(multiple define_splits): Use REG_P and SUBREG_P.
|
|
|
|
|
|
(define_expands call, call_value): Use MEM_P.
|
|
|
|
|
|
(define_expands sibcall, sibcall_value): Use CONST_INT_P and MEM_P.
|
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|
|
|
|
(define insn *mtcrfsi): Use CONST_INT_P and REG_P.
|
|
|
|
|
|
* config/rs6000/vsx.md (*vsx_le_perm_load_<mode>,
|
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|
|
|
|
*vsx_le_perm_load_v8hi, *vsx_le_perm_load_v16qi): Use HARD_REGISTER_P
|
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|
|
and HARD_REGISTER_NUM_P.
|
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|
(multiple define_splits): Use HARD_REGISTER_NUM_P.
|
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|
|
|
|
2019-01-24 21:48:01 +01:00
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|
2019-01-24 Uroš Bizjak <ubizjak@gmail.com>
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|
2019-01-24 21:51:25 +01:00
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PR rtl-optimization/88948
|
2019-01-24 21:48:01 +01:00
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* rtl.h (prepare_copy_insn): New prototype.
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* gcse.c (prepare_copy_insn): New function, split out from
|
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|
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process_insert_insn.
|
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(process_insert_insn): Use prepare_copy_insn.
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* store-motion.c (replace_store_insn): Use prepare_copy_insn
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instead of gen_move_insn.
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|
2019-01-24 20:14:51 +01:00
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|
2019-01-24 Jakub Jelinek <jakub@redhat.com>
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|
2019-01-24 21:20:47 +01:00
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|
PR debug/89006
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|
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* config/i386/i386.c (ix86_pic_register_p): Return true for
|
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|
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UNSPEC_SET_GOT too.
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|
2019-01-24 20:49:09 +01:00
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|
PR tree-optimization/88964
|
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|
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* gimple-loop-interchange.cc (loop_cand::analyze_induction_var): Also
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|
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punt if HONOR_SNANS (chrec).
|
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|
2019-01-24 20:17:13 +01:00
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|
PR middle-end/89015
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|
|
|
* tree-nested.c (convert_nonlocal_reference_stmt,
|
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|
|
|
|
convert_local_reference_stmt, convert_tramp_reference_stmt,
|
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|
|
|
|
convert_gimple_call) <case GIMPLE_OMP_TEAMS>: Treat
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|
|
gimple_omp_teams_host teams stmts like GIMPLE_OMP_PARALLEL
|
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or GIMPLE_OMP_TASK.
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|
2019-01-24 20:14:51 +01:00
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|
PR tree-optimization/89027
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|
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* tree-inline.c (add_clobbers_to_eh_landing_pad): Don't add clobbers
|
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|
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for "omp simd array" variables.
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|
2019-01-24 17:06:34 +01:00
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|
2019-01-24 Richard Earnshaw <rearnsha@arm.com>
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PR target/88469
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|
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* profile-count.h (profile_count): On ARM systems using GCC 6/7/8
|
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|
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force the alignment of m_val.
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|
2019-01-24 13:36:14 +01:00
|
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|
|
2019-01-24 Richard Biener <rguenther@suse.de>
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|
|
PR lto/87187
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|
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* tree-streamer-out.c (write_ts_decl_common_tree_pointers):
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When in "legacy" debug mode make sure to reset self-origins.
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|
2019-01-24 09:27:39 +01:00
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|
|
2019-01-24 Martin Liska <mliska@suse.cz>
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|
|
PR gcov-profile/88994
|
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|
|
|
|
* gcov-io.c (mangle_path): Do not allocate a bigger buffer,
|
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|
|
result will be always smaller or equal to the original.
|
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|
* gcov.c (mangle_name): Fix else branch where we should
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also copy to PTR and shift the pointer.
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|
2019-01-24 03:18:16 +01:00
|
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|
2019-01-24 Xiong Hu Luo <luoxhu@linux.vnet.ibm.com>
|
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|
|
|
|
|
2019-01-25 17:20:40 +01:00
|
|
|
|
* tree-ssa-dom.c (test_for_singularity): Fix a comment typo.
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|
|
* vr-values.c (find_case_label_ranges): Fix a comment typo.
|
2019-01-24 03:18:16 +01:00
|
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|
|
2019-01-23 23:43:42 +01:00
|
|
|
|
2019-01-23 Bin Cheng <bin.cheng@arm.com>
|
|
|
|
|
|
Steve Ellcey <sellcey@marvell.com>
|
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|
|
|
|
|
|
|
|
|
|
PR target/85711
|
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|
|
|
* recog.c (address_operand): Return false on wrong mode for address.
|
|
|
|
|
|
(constrain_operands): Check for mode with 'p' constraint.
|
|
|
|
|
|
|
2019-01-23 20:10:58 +01:00
|
|
|
|
2019-01-23 Uroš Bizjak <ubizjak@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88998
|
|
|
|
|
|
* config/i386/sse.md (sse2_cvtpi2pd): Add SSE alternatives.
|
|
|
|
|
|
Disparage MMX alternative.
|
|
|
|
|
|
(sse2_cvtpd2pi): Ditto.
|
|
|
|
|
|
(sse2_cvttpd2pi): Ditto.
|
|
|
|
|
|
|
2019-01-23 17:36:46 +01:00
|
|
|
|
2019-01-23 David Malcolm <dmalcolm@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR driver/89014
|
|
|
|
|
|
* config/aarch64/driver-aarch64.c (host_detect_local_cpu): Fix
|
|
|
|
|
|
use-after-free of the result of
|
|
|
|
|
|
aarch64_get_extension_string_for_isa_flags.
|
|
|
|
|
|
|
2019-01-23 15:41:16 +01:00
|
|
|
|
2019-01-23 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR c/44715
|
|
|
|
|
|
* doc/extend.texi: Document break and continue behavior in
|
|
|
|
|
|
statement expressions.
|
|
|
|
|
|
|
2019-01-23 15:02:13 +01:00
|
|
|
|
2019-01-23 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/89008
|
|
|
|
|
|
* tree-ssa-reassoc.c (eliminate_using_constants): For * 0 do
|
|
|
|
|
|
not leave another stray operand.
|
|
|
|
|
|
|
2019-01-23 14:34:35 +01:00
|
|
|
|
2019-01-23 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* BASE-VER: Bump to 9.0.1.
|
|
|
|
|
|
|
2019-01-23 12:07:56 +01:00
|
|
|
|
2019-01-23 Eric Botcazou <ebotcazou@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* cgraphunit.c (cgraph_node::expand_thunk): When expanding a GIMPLE
|
|
|
|
|
|
thunk that returns by reference, use the type of the return object
|
|
|
|
|
|
of the thunk instead of that of the alias to build the dereference.
|
|
|
|
|
|
|
2019-01-23 12:04:19 +01:00
|
|
|
|
2019-01-23 Vineet Gupta <vgupta@synopsys.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/arc/atomic.md: Add operand to DMB instruction.
|
|
|
|
|
|
|
2019-01-23 09:35:38 +01:00
|
|
|
|
2019-01-23 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/88964
|
|
|
|
|
|
* gimple-loop-interchange.cc (loop_cand::analyze_induction_var): Use
|
|
|
|
|
|
build_zero_cst instead of build_int_cst. Return false for loop
|
|
|
|
|
|
invariants which honor signed zeros.
|
|
|
|
|
|
|
2019-01-23 00:29:39 +01:00
|
|
|
|
2019-01-22 Segher Boessenkool <segher@kernel.crashing.org>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/invoke.texi (-fsplit-paths): This is enabled by default at -O3.
|
|
|
|
|
|
|
2019-01-22 23:27:32 +01:00
|
|
|
|
2019-01-22 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
2019-01-22 23:30:44 +01:00
|
|
|
|
PR target/88965
|
|
|
|
|
|
* config/rs6000/rs6000.c: Include tree-vrp.h and tree-ssanames.h.
|
|
|
|
|
|
(rs6000_gimple_fold_builtin): If MEM_REF address doesn't satisfy
|
|
|
|
|
|
is_gimple_mem_ref_addr predicate, force it into a SSA_NAME first.
|
|
|
|
|
|
|
2019-01-22 23:28:42 +01:00
|
|
|
|
PR middle-end/88968
|
|
|
|
|
|
* gimplify.c (gimplify_omp_atomic): Handle bitfield atomics with
|
|
|
|
|
|
non-integral DECL_BIT_FIELD_REPRESENTATIVEs.
|
|
|
|
|
|
|
2019-01-22 23:27:32 +01:00
|
|
|
|
PR target/87064
|
|
|
|
|
|
* config/rs6000/vsx.md (*vsx_reduc_<VEC_reduc_name>_v2df_scalar):
|
|
|
|
|
|
Disable for little endian.
|
|
|
|
|
|
|
2019-01-22 18:56:02 +01:00
|
|
|
|
2019-01-22 Richard Earnshaw <rearnsha@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88469
|
|
|
|
|
|
* config/arm/arm.c (arm_needs_double_word_align): Check
|
|
|
|
|
|
DECL_BIT_FIELD_TYPE.
|
|
|
|
|
|
|
2019-01-22 17:20:25 +01:00
|
|
|
|
2019-01-22 Hongtao Liu <hongtao.liu@intel.com>
|
|
|
|
|
|
H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88909
|
|
|
|
|
|
* config/i386/i386-builtin.def: Add mask2 to all builtin
|
|
|
|
|
|
initializations. Merge ARGS2 and SPECIAL_ARGS2 into ARGS and
|
|
|
|
|
|
SPECIAL_ARGS.
|
|
|
|
|
|
* config/i386/i386.c (BDESC): Add mask2 to the definition.
|
|
|
|
|
|
(BDESC_FIRST): Likewise.
|
|
|
|
|
|
(define_builtin): Add an argument for mask2. Updated to handle
|
|
|
|
|
|
both ix86_isa_flags and ix86_isa_flags2.
|
|
|
|
|
|
(define_builtin_const): Likewise.
|
|
|
|
|
|
(define_builtin_pure): Likewise.
|
|
|
|
|
|
(define_builtin2): Deleted.
|
|
|
|
|
|
(define_builtin_const2): Likewise.
|
|
|
|
|
|
(builtin_description): Add a member, mask2.
|
|
|
|
|
|
(bdesc_*): Add mask2 to builtin initializations.
|
|
|
|
|
|
(ix86_init_mmx_sse_builtins): Update calls to def_builtin,
|
|
|
|
|
|
def_builtin_const and def_builtin_pure. Remove SPECIAL_ARGS2
|
|
|
|
|
|
support.
|
|
|
|
|
|
(ix86_get_builtin_func_type): Remove SPECIAL_ARGS2 support.
|
|
|
|
|
|
|
2019-01-22 15:53:41 +01:00
|
|
|
|
2019-01-22 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88954
|
|
|
|
|
|
* config/i386/i386.c (ix86_force_load_from_GOT_p): Also check
|
|
|
|
|
|
noplt attribute.
|
|
|
|
|
|
|
2019-01-22 15:03:22 +01:00
|
|
|
|
2019-01-22 Richard Earnshaw <rearnsha@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88469
|
|
|
|
|
|
* config/arm/arm.c (arm_needs_doubleword_align): Return 2 if a record's
|
|
|
|
|
|
alignment is dominated by a bitfield with 64-bit aligned base type.
|
|
|
|
|
|
(arm_function_arg): Emit a warning if the alignment has changed since
|
|
|
|
|
|
earlier GCC releases.
|
|
|
|
|
|
(arm_function_arg_boundary): Likewise.
|
|
|
|
|
|
(arm_setup_incoming_varargs): Likewise.
|
|
|
|
|
|
|
2019-01-22 12:28:56 +01:00
|
|
|
|
2019-01-22 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/88862
|
|
|
|
|
|
* graphite-scop-detection.c
|
|
|
|
|
|
(scop_detection::graphite_can_represent_scev): Reject ADDR_EXPR.
|
|
|
|
|
|
|
2019-01-22 11:51:22 +01:00
|
|
|
|
2019-01-22 Andrew Stubbs <ams@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/extend.tex (AMD GCN Function Attributes): New section.
|
|
|
|
|
|
* doc/install.texi (amdgcn-unknown-amdhsa): New instructions.
|
|
|
|
|
|
* doc/invoke.texi (AMD GCN Options): New section.
|
|
|
|
|
|
* doc/md.texi (Constraints for Particular Machines): Add AMD GCN.
|
|
|
|
|
|
|
2019-01-22 11:20:00 +01:00
|
|
|
|
2019-01-22 Eric Botcazou <ebotcazou@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/sparc/sparc.c (parc_delegitimize_address): Recognize the GOT
|
|
|
|
|
|
register and decoded HIGH/LO_SUM combinations for labels in PIC mode.
|
|
|
|
|
|
|
2019-01-22 10:10:25 +01:00
|
|
|
|
2019-01-22 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
2019-01-22 10:58:23 +01:00
|
|
|
|
PR tree-optimization/88044
|
|
|
|
|
|
* tree-ssa-loop-niter.c (number_of_iterations_cond): If condition
|
|
|
|
|
|
is false in the first iteration, but !every_iteration, return false
|
|
|
|
|
|
instead of true with niter->niter zero.
|
|
|
|
|
|
|
2019-01-22 10:12:31 +01:00
|
|
|
|
PR rtl-optimization/88904
|
|
|
|
|
|
* cfgcleanup.c (thread_jump): Verify cond2 doesn't mention
|
|
|
|
|
|
any nonequal registers before processing BB_END (b).
|
|
|
|
|
|
|
2019-01-22 10:11:35 +01:00
|
|
|
|
PR target/88905
|
|
|
|
|
|
* optabs.c (add_equal_note): Add op0_mode argument, use it instead of
|
|
|
|
|
|
GET_MODE (op0).
|
|
|
|
|
|
(expand_binop_directly, expand_doubleword_clz,
|
|
|
|
|
|
expand_doubleword_popcount, expand_ctz, expand_ffs,
|
|
|
|
|
|
expand_unop_direct, maybe_emit_unop_insn): Adjust callers.
|
|
|
|
|
|
|
2019-01-22 10:10:25 +01:00
|
|
|
|
PR rtl-optimization/49429
|
|
|
|
|
|
PR target/49454
|
|
|
|
|
|
PR rtl-optimization/86334
|
|
|
|
|
|
PR target/88906
|
|
|
|
|
|
* expr.c (emit_block_move_hints): Move marking of MEM_EXPRs
|
|
|
|
|
|
addressable from here...
|
|
|
|
|
|
(emit_block_op_via_libcall): ... to here.
|
|
|
|
|
|
|
2019-01-22 09:30:51 +01:00
|
|
|
|
2019-01-22 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* tree-vect-loop.c (vect_analyze_loop_operations): Use
|
|
|
|
|
|
auto_vec for cost vector to fix memleak.
|
|
|
|
|
|
(vectorize_fold_left_reduction): Properly gather SLP defs.
|
|
|
|
|
|
(vectorizable_comparison): Do not swap operands to properly
|
|
|
|
|
|
gather SLP defs.
|
|
|
|
|
|
|
[RS6000] PR88614, output_operand: invalid %z value
The direct cause of this PR is the fact that tls_gdld_nomark didn't
handle indirect calls. Also, most indirect calls were being optimised
back to direct calls anyway, due to tls_gdld_nomark not checking any
of the parallel elements except the first (plus the extra element that
distinguishes this call from normal calls). There were other unwanted
substitutions too.
So this patch attacks the problem of handling special calls in a
different way. Rather than adding another element to the call insn
parallel to distinguish -mno-tls-markers __tls_get_addr calls from any
other calls, we now inspect the second CALL arg. Each
call_value_nonlocal and call_value_indirect insn now checks for the
tlsgd/ld unspecs when !TARGET_TLS_MARKERS and emits the arg setup
insns. I disallow the local call patterns since we'll only see local
calls to __tls_get_addr in testcases, and it doesn't seem a good idea
to complicate the patterns just for a minor optimisation. Sibling
call insns aren't used for libcalls, so none of these insns need to
change.
The patch also fixes a minor problem with -mno-tls-markers
__tls_get_addr calls causing a "li 3,0" instruction to be emitted
prior to the arg setup instructions, due to using a libcall with one
arg. That isn't correct when the call insn itself sets up its arg.
Also, I've tidied the V4 secure-plt calls, generating them in
rs6000_call_sysv rather than by splitting in rs6000.md. The
CALL_INSN_FUNCTION_USAGE added in edit_tls_call_insn is no longer
needed (since git commit 0a4b5c66df9).
On the subject of unwanted substitutions, I also saw a
_GLOBAL_OFFSET_TABLE_ symbol_ref being substituted for the GOT reg,
resulting in code like "addi 3,_GLOBAL_OFFSET_TABLE_,tls_ld@got@tlsld".
Fixed by the unspec_tls change.
PR target/88614
* config/rs6000/predicates.md (unspec_tls): Ensure GOT reg
stays a reg. Allow a const_int.
* config/rs6000/rs6000-protos.h (rs6000_output_tlsargs): Declare.
* config/rs6000/rs6000.h (IS_V4_FP_ARGS): Define.
(IS_NOMARK_TLSGETADDR): Define.
* config/rs6000/rs6000.c (edit_tls_call_insn): Delete.
(rs6000_output_tlsargs): New function.
(rs6000_legitimize_tls_address): Don't say a !TARGET_TLS_MARKERS
__tls_get_addr call takes an arg.
(rs6000_call_sysv): Generate sysv4 secure plt call pattern here..
* config/rs6000/rs6000.md (call_nonlocal_sysv): ..rather than here,
delete split..
(call_value_nonlocal_sysv): ..or here, delete split.
(tls_gdld_nomark): Delete.
(call_value_indirect_nonlocal_sysv): Use unspec_tls as operand2
predicate. Call rs6000_output_tlsargs. Adjust length to suit.
(call_value_nonlocal_sysv): Likewise.
(call_value_nonlocal_sysv_secure): Likewise.
(call_value_nonlocal_aix): Likewise.
(call_value_indirect_aix): Likewise.
(call_value_indirect_elfv2): Likewise.
(call_value_local32, call_value_local64): Disable for no-mark tls.
(call_value_local_aix): Likewise.
From-SVN: r268135
2019-01-22 03:29:47 +01:00
|
|
|
|
2019-01-22 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88614
|
|
|
|
|
|
* config/rs6000/predicates.md (unspec_tls): Ensure GOT reg
|
|
|
|
|
|
stays a reg. Allow a const_int.
|
|
|
|
|
|
* config/rs6000/rs6000-protos.h (rs6000_output_tlsargs): Declare.
|
|
|
|
|
|
* config/rs6000/rs6000.h (IS_V4_FP_ARGS): Define.
|
|
|
|
|
|
(IS_NOMARK_TLSGETADDR): Define.
|
|
|
|
|
|
* config/rs6000/rs6000.c (edit_tls_call_insn): Delete.
|
|
|
|
|
|
(rs6000_output_tlsargs): New function.
|
|
|
|
|
|
(rs6000_legitimize_tls_address): Don't say a !TARGET_TLS_MARKERS
|
|
|
|
|
|
__tls_get_addr call takes an arg.
|
|
|
|
|
|
(rs6000_call_sysv): Generate sysv4 secure plt call pattern here..
|
|
|
|
|
|
* config/rs6000/rs6000.md (call_nonlocal_sysv): ..rather than here,
|
|
|
|
|
|
delete split..
|
|
|
|
|
|
(call_value_nonlocal_sysv): ..or here, delete split.
|
|
|
|
|
|
(tls_gdld_nomark): Delete.
|
|
|
|
|
|
(call_value_indirect_nonlocal_sysv): Use unspec_tls as operand2
|
|
|
|
|
|
predicate. Call rs6000_output_tlsargs. Adjust length to suit.
|
|
|
|
|
|
(call_value_nonlocal_sysv): Likewise.
|
|
|
|
|
|
(call_value_nonlocal_sysv_secure): Likewise.
|
|
|
|
|
|
(call_value_nonlocal_aix): Likewise.
|
|
|
|
|
|
(call_value_indirect_aix): Likewise.
|
|
|
|
|
|
(call_value_indirect_elfv2): Likewise.
|
|
|
|
|
|
(call_value_local32, call_value_local64): Disable for no-mark tls.
|
|
|
|
|
|
(call_value_local_aix): Likewise.
|
|
|
|
|
|
|
2019-01-21 21:14:40 +01:00
|
|
|
|
2019-01-21 Uroš Bizjak <ubizjak@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88938
|
|
|
|
|
|
* config/i386/i386.c (ix86_expand_builtin) [case IX86_BUILTIN_BEXTRI32,
|
|
|
|
|
|
case IX86_BUILTIN_BEXTRI64]: Sanitize operands.
|
|
|
|
|
|
|
2019-01-21 20:04:04 +01:00
|
|
|
|
2019-01-21 Michael Ploujnikov <michael.ploujnikov@oracle.com>
|
|
|
|
|
|
|
|
|
|
|
|
* hash-map-tests.c (test_map_of_strings_to_int): Show how to use
|
|
|
|
|
|
string contents as hash_map keys.
|
|
|
|
|
|
|
2019-01-21 18:12:09 +01:00
|
|
|
|
2019-01-21 Bernd Edlinger <bernd.edlinger@hotmail.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR c/88928
|
|
|
|
|
|
* c-warn.c (check_alignment_of_packed_member): Add a boolean parameter
|
|
|
|
|
|
for rvalue context. Handle rvalues correctly. Use min_align_of_type
|
|
|
|
|
|
instead of TYPE_ALIGN.
|
|
|
|
|
|
(check_address_or_pointer_of_packed_member): Handle rvalues coorrectly.
|
|
|
|
|
|
Use min_align_of_type instead of TYPE_ALIGN_UNIT. Check for NULL
|
|
|
|
|
|
pointer from TYPE_STUB_DECL.
|
|
|
|
|
|
|
2019-01-21 15:49:42 +01:00
|
|
|
|
2019-01-21 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/88934
|
|
|
|
|
|
* tree-vect-slp.c (vect_mask_constant_operand_p): Always look
|
|
|
|
|
|
at the possibly non-constant operand.
|
|
|
|
|
|
(vect_get_constant_vectors): Adjust.
|
|
|
|
|
|
|
i386: Move Intel intrinsics head files to <immintrin.h>
According to Intel Intrinsics Guide:
https://software.intel.com/sites/landingpage/IntrinsicsGuide/
Intel intrinsics should be available by including <immintrin.h>. This
patch moves remaining Intel intrinsics head files from <x86intrin.h> to
<immintrin.h>.
PR target/71659
* config/i386/adxintrin.h: Just check _IMMINTRIN_H_INCLUDED.
* config/i386/clflushoptintrin.h: Check _IMMINTRIN_H_INCLUDED
instead of _X86INTRIN_H_INCLUDED.
* onfig/i386/clwbintrin.h: Likewise.
* config/i386/pkuintrin.h: Likewise.
* config/i386/prfchwintrin.h: Likewise.
* config/i386/rdseedintrin.h: Likewise.
* config/i386/wbnoinvdintrin.h: Likewise.
* config/i386/xsavecintrin.h: Likewise.
* config/i386/xsavesintrin.h: Likewise.
* config/i386/fxsrintrin.h: Enable _IMMINTRIN_H_INCLUDED check.
* config/i386/xsaveintrin.h: Likewise.
* config/i386/xsaveoptintrin.h: Likewise.
* config/i386/x86intrin.h: Move "#include" <rdseedintrin.h>,
<prfchwintrin.h>, <fxsrintrin.h>, <xsaveintrin.h>,
<xsaveoptintrin.h>, <adxintrin.h>, <clwbintrin.h>,
<clflushoptintrin.h>, <xsavesintrin.h>, <xsavecintrin.h>,
<wbnoinvdintrin.h> and <pkuintrin.h> to ...
* config/i386/immintrin.h: Here.
From-SVN: r268113
2019-01-21 13:23:49 +01:00
|
|
|
|
2019-01-21 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/71659
|
|
|
|
|
|
* config/i386/adxintrin.h: Just check _IMMINTRIN_H_INCLUDED.
|
|
|
|
|
|
* config/i386/clflushoptintrin.h: Check _IMMINTRIN_H_INCLUDED
|
|
|
|
|
|
instead of _X86INTRIN_H_INCLUDED.
|
|
|
|
|
|
* onfig/i386/clwbintrin.h: Likewise.
|
|
|
|
|
|
* config/i386/pkuintrin.h: Likewise.
|
|
|
|
|
|
* config/i386/prfchwintrin.h: Likewise.
|
|
|
|
|
|
* config/i386/rdseedintrin.h: Likewise.
|
|
|
|
|
|
* config/i386/wbnoinvdintrin.h: Likewise.
|
|
|
|
|
|
* config/i386/xsavecintrin.h: Likewise.
|
|
|
|
|
|
* config/i386/xsavesintrin.h: Likewise.
|
|
|
|
|
|
* config/i386/fxsrintrin.h: Enable _IMMINTRIN_H_INCLUDED check.
|
|
|
|
|
|
* config/i386/xsaveintrin.h: Likewise.
|
|
|
|
|
|
* config/i386/xsaveoptintrin.h: Likewise.
|
|
|
|
|
|
* config/i386/x86intrin.h: Move "#include" <rdseedintrin.h>,
|
|
|
|
|
|
<prfchwintrin.h>, <fxsrintrin.h>, <xsaveintrin.h>,
|
|
|
|
|
|
<xsaveoptintrin.h>, <adxintrin.h>, <clwbintrin.h>,
|
|
|
|
|
|
<clflushoptintrin.h>, <xsavesintrin.h>, <xsavecintrin.h>,
|
|
|
|
|
|
<wbnoinvdintrin.h> and <pkuintrin.h> to ...
|
|
|
|
|
|
* config/i386/immintrin.h: Here.
|
|
|
|
|
|
|
Limit AA walking in IPA summary generation
2019-01-20 Martin Jambor <mjambor@suse.cz>
PR ipa/87615
* ipa-prop.h (struct ipa_func_body_info): Replaced field aa_walked
with aa_walk_budget.
* cgraph.h (ipa_polymorphic_call_context::get_dynamic_type): Add
aa_walk_budget_p parameter.
* ipa-fnsummary.c (unmodified_parm_1): New parameter fbi. Limit AA
walk. Updated all callers.
(unmodified_parm): New parameter fbi, pass it to unmodified_parm_1.
(eliminated_by_inlining_prob): New parameter fbi, pass it on to
unmodified_parm.
(will_be_nonconstant_expr_predicate): New parameter fbi, removed
parameter info. Extract info from fbi. Pass fbi to recursive calls
and to unmodified_parm.
(phi_result_unknown_predicate): New parameter fbi, removed parameter
info, updated call to will_be_nonconstant_expr_predicate.
(param_change_prob): New parameter fbi, limit AA walking.
(analyze_function_body): Initialize aa_walk_budget in fbi. Update
calls to various above functions.
* ipa-polymorphic-call.c (get_dynamic_type): Add aa_walk_budget_p
parameter. Use it to limit AA walking.
* ipa-prop.c (detect_type_change_from_memory_writes): New parameter
fbi, limit AA walk.
(detect_type_change): New parameter fbi, pass it on to
detect_type_change_from_memory_writes.
(detect_type_change_ssa): Likewise.
(aa_overwalked): Removed.
(parm_preserved_before_stmt_p): Assume fbi is never NULL, stream line
accordingly, adjust to the neew AA limiting scheme.
(parm_ref_data_preserved_p): Likewise.
(ipa_compute_jump_functions_for_edge): Adjust call to
get_dynamic_type.
(ipa_analyze_call_uses): Likewise.
(ipa_analyze_virtual_call_uses): Pass fbi to detect_type_change_ssa.
(ipa_analyze_node): Initialize aa_walk_budget.
(ipcp_transform_function): Likewise.
* tree-ssa-sccvn.c (eliminate_dom_walker::eliminate_stmt): Update call
to get_dynamic_type.
From-SVN: r268107
2019-01-20 21:17:02 +01:00
|
|
|
|
2019-01-20 Martin Jambor <mjambor@suse.cz>
|
|
|
|
|
|
|
|
|
|
|
|
PR ipa/87615
|
|
|
|
|
|
* ipa-prop.h (struct ipa_func_body_info): Replaced field aa_walked
|
|
|
|
|
|
with aa_walk_budget.
|
|
|
|
|
|
* cgraph.h (ipa_polymorphic_call_context::get_dynamic_type): Add
|
|
|
|
|
|
aa_walk_budget_p parameter.
|
|
|
|
|
|
* ipa-fnsummary.c (unmodified_parm_1): New parameter fbi. Limit AA
|
|
|
|
|
|
walk. Updated all callers.
|
|
|
|
|
|
(unmodified_parm): New parameter fbi, pass it to unmodified_parm_1.
|
|
|
|
|
|
(eliminated_by_inlining_prob): New parameter fbi, pass it on to
|
|
|
|
|
|
unmodified_parm.
|
|
|
|
|
|
(will_be_nonconstant_expr_predicate): New parameter fbi, removed
|
|
|
|
|
|
parameter info. Extract info from fbi. Pass fbi to recursive calls
|
|
|
|
|
|
and to unmodified_parm.
|
|
|
|
|
|
(phi_result_unknown_predicate): New parameter fbi, removed parameter
|
|
|
|
|
|
info, updated call to will_be_nonconstant_expr_predicate.
|
|
|
|
|
|
(param_change_prob): New parameter fbi, limit AA walking.
|
|
|
|
|
|
(analyze_function_body): Initialize aa_walk_budget in fbi. Update
|
|
|
|
|
|
calls to various above functions.
|
|
|
|
|
|
* ipa-polymorphic-call.c (get_dynamic_type): Add aa_walk_budget_p
|
|
|
|
|
|
parameter. Use it to limit AA walking.
|
|
|
|
|
|
* ipa-prop.c (detect_type_change_from_memory_writes): New parameter
|
|
|
|
|
|
fbi, limit AA walk.
|
|
|
|
|
|
(detect_type_change): New parameter fbi, pass it on to
|
|
|
|
|
|
detect_type_change_from_memory_writes.
|
|
|
|
|
|
(detect_type_change_ssa): Likewise.
|
|
|
|
|
|
(aa_overwalked): Removed.
|
|
|
|
|
|
(parm_preserved_before_stmt_p): Assume fbi is never NULL, stream line
|
|
|
|
|
|
accordingly, adjust to the neew AA limiting scheme.
|
|
|
|
|
|
(parm_ref_data_preserved_p): Likewise.
|
|
|
|
|
|
(ipa_compute_jump_functions_for_edge): Adjust call to
|
|
|
|
|
|
get_dynamic_type.
|
|
|
|
|
|
(ipa_analyze_call_uses): Likewise.
|
|
|
|
|
|
(ipa_analyze_virtual_call_uses): Pass fbi to detect_type_change_ssa.
|
|
|
|
|
|
(ipa_analyze_node): Initialize aa_walk_budget.
|
|
|
|
|
|
(ipcp_transform_function): Likewise.
|
|
|
|
|
|
* tree-ssa-sccvn.c (eliminate_dom_walker::eliminate_stmt): Update call
|
|
|
|
|
|
to get_dynamic_type.
|
|
|
|
|
|
|
2019-01-19 18:28:29 +01:00
|
|
|
|
2019-01-19 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/aarch64/aarch64.c (aarch64_stack_protect_guard): Move
|
|
|
|
|
|
outside of #if CHECKING_P code.
|
|
|
|
|
|
|
2019-01-19 13:59:51 +01:00
|
|
|
|
2019-01-19 Richard Sandiford <richard.sandiford@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gimple-loop-versioning.cc (loop_versioning::dump_inner_likelihood):
|
|
|
|
|
|
New function, split out from...
|
|
|
|
|
|
(loop_versioning::analyze_stride): ...here.
|
|
|
|
|
|
(loop_versioning::find_per_loop_multiplication): Use gassign.
|
|
|
|
|
|
(loop_versioning::analyze_term_using_scevs): Return a success code.
|
|
|
|
|
|
(loop_versioning::analyze_arbitrary_term): New function.
|
|
|
|
|
|
(loop_versioning::analyze_address_fragment): Use
|
|
|
|
|
|
analyze_arbitrary_term if all else fails.
|
|
|
|
|
|
|
2019-01-18 19:01:56 +01:00
|
|
|
|
2019-01-18 Segher Boessenkool <segher@kernel.crashing.org>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88892
|
|
|
|
|
|
* config/rs6000/rs6000.md (*movsi_from_df): Allow only register
|
|
|
|
|
|
operands.
|
|
|
|
|
|
|
2019-01-18 14:13:21 +01:00
|
|
|
|
2019-01-18 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/88903
|
|
|
|
|
|
* tree-vect-stmts.c (vectorizable_shift): Verify we see all
|
|
|
|
|
|
scalar stmts a SLP shift amount is composed of when detecting
|
|
|
|
|
|
shifts by scalars.
|
|
|
|
|
|
|
2019-01-18 12:49:56 +01:00
|
|
|
|
2019-01-18 Richard Earnshaw <rearnsha@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88799
|
|
|
|
|
|
* config/arm/arm-cpus.in (mp): New feature.
|
|
|
|
|
|
(sec): New feature.
|
|
|
|
|
|
(fgroup ARMv7ve): Add mp and sec features.
|
|
|
|
|
|
(arch armv7-a): Add options to allow mp and sec extensions.
|
|
|
|
|
|
(cpu generic-armv7-a): Add options to allow mp and sec extensions.
|
|
|
|
|
|
(cpu cortex-a5, cpu cortex-7, cpu cortex-a9): Add mp and sec
|
|
|
|
|
|
extenstions to the base architecture.
|
|
|
|
|
|
(cpu cortex-a8): Add sec extension to the base architecture.
|
|
|
|
|
|
(cpu marvell-pj4): Add mp and sec extensions to the base architecture.
|
|
|
|
|
|
* config/arm/t-aprofile (MULTILIB_MATCHES): Map all armv7-a arch
|
|
|
|
|
|
variants down to the base v7-a varaint.
|
|
|
|
|
|
* config/arm/t-multilib (v7_a_arch_variants): New variable.
|
|
|
|
|
|
* doc/invoke.texi (ARM Options): Add +mp and +sec to the list
|
|
|
|
|
|
of permitted extensions for -march=armv7-a and for
|
|
|
|
|
|
-mcpu=generic-armv7-a.
|
|
|
|
|
|
|
2019-01-18 12:32:53 +01:00
|
|
|
|
2019-01-18 Martin Liska <mliska@suse.cz>
|
|
|
|
|
|
|
|
|
|
|
|
* params.def: Fix comment.
|
|
|
|
|
|
* tree-profile.c (gimple_init_gcov_profiler): Bump function
|
|
|
|
|
|
name.
|
|
|
|
|
|
(gimple_gen_ic_func_profiler): Likewise.
|
|
|
|
|
|
|
2019-01-18 11:32:40 +01:00
|
|
|
|
2019-01-18 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/aarch64/aarch64-opts.h (enum stack_protector_guard): New
|
|
|
|
|
|
* config/aarch64/aarch64.c (aarch64_override_options_internal): Handle
|
|
|
|
|
|
and put in error checks for stack protector guard options.
|
|
|
|
|
|
(aarch64_stack_protect_guard): New.
|
|
|
|
|
|
(TARGET_STACK_PROTECT_GUARD): Define.
|
|
|
|
|
|
* config/aarch64/aarch64.md (UNSPEC_SSP_SYSREG): New.
|
|
|
|
|
|
(reg_stack_protect_address<mode>): New.
|
|
|
|
|
|
(stack_protect_set): Adjust for SSP_GLOBAL.
|
|
|
|
|
|
(stack_protect_test): Likewise.
|
|
|
|
|
|
* config/aarch64/aarch64.opt (-mstack-protector-guard-reg): New.
|
|
|
|
|
|
(-mstack-protector-guard): Likewise.
|
|
|
|
|
|
(-mstack-protector-guard-offset): Likewise.
|
|
|
|
|
|
|
2019-01-18 11:07:27 +01:00
|
|
|
|
2019-01-18 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/86214
|
|
|
|
|
|
* tree-inline.h (struct copy_body_data): Add
|
|
|
|
|
|
add_clobbers_to_eh_landing_pads member.
|
|
|
|
|
|
* tree-inline.c (add_clobbers_to_eh_landing_pad): New function.
|
|
|
|
|
|
(copy_edges_for_bb): Call it if EH edge destination is <
|
|
|
|
|
|
id->add_clobbers_to_eh_landing_pads. Fix a comment typo.
|
|
|
|
|
|
(expand_call_inline): Set id->add_clobbers_to_eh_landing_pads
|
|
|
|
|
|
if flag_stack_reuse != SR_NONE and clear it afterwards.
|
|
|
|
|
|
|
2019-01-18 10:20:41 +01:00
|
|
|
|
2019-01-18 Christophe Lyon <christophe.lyon@linaro.org>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/85596
|
|
|
|
|
|
* doc/install.texi (with-multilib-list): Document for aarch64.
|
|
|
|
|
|
|
2019-01-18 10:15:36 +01:00
|
|
|
|
2019-01-18 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88734
|
|
|
|
|
|
* config/arm/arm_neon.h: Fix #pragma GCC target syntax - replace
|
|
|
|
|
|
(("..."))) with ("...").
|
|
|
|
|
|
|
2019-01-18 09:38:06 +01:00
|
|
|
|
2019-01-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/extend.texi (Built-in Functions for Memory Model Aware
|
|
|
|
|
|
Atomic Operations): Document atomic fetch and nand.
|
|
|
|
|
|
|
2019-01-18 08:41:05 +01:00
|
|
|
|
2019-01-18 Martin Liska <mliska@suse.cz>
|
|
|
|
|
|
Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR middle-end/88587
|
|
|
|
|
|
* cgraph.h (create_version_clone_with_body): Add new argument
|
|
|
|
|
|
with attributes.
|
|
|
|
|
|
* cgraphclones.c (cgraph_node::create_version_clone): Add
|
|
|
|
|
|
DECL_ATTRIBUTES to a newly created decl. And call
|
|
|
|
|
|
valid_attribute_p so that proper cl_target_optimization_node
|
|
|
|
|
|
is set for the newly created declaration.
|
|
|
|
|
|
* multiple_target.c (create_target_clone): Set DECL_ATTRIBUTES
|
|
|
|
|
|
for declaration.
|
|
|
|
|
|
(expand_target_clones): Do not call valid_attribute_p, it must
|
|
|
|
|
|
be already done.
|
|
|
|
|
|
* tree-inline.c (copy_decl_for_dup_finish): Reset mode for
|
|
|
|
|
|
vector types.
|
|
|
|
|
|
|
2019-01-18 00:34:42 +01:00
|
|
|
|
2019-01-17 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88734
|
|
|
|
|
|
* config/aarch64/arm_neon.h: Fix #pragma GCC target syntax - replace
|
|
|
|
|
|
(("..."))) with ("..."). Use arch=armv8.2-a+sha3 instead of
|
|
|
|
|
|
arch=armv8.2-a+crypto for vsha512hq_u64 etc. intrinsics.
|
|
|
|
|
|
|
2019-01-17 23:52:47 +01:00
|
|
|
|
2019-01-17 Martin Sebor <msebor@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR middle-end/88273
|
|
|
|
|
|
* gimple-ssa-warn-restrict.c (builtin_memref::extend_offset_range):
|
|
|
|
|
|
Handle anti-ranges the same as no range at all.
|
|
|
|
|
|
|
2019-01-17 20:06:37 +01:00
|
|
|
|
2018-01-17 Steve Ellcey <sellcey@cavium.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/aarch64/aarch64.c (cgraph.h): New include.
|
|
|
|
|
|
(intl.h): New include.
|
|
|
|
|
|
(supported_simd_type): New function.
|
|
|
|
|
|
(currently_supported_simd_type): Ditto.
|
|
|
|
|
|
(aarch64_simd_clone_compute_vecsize_and_simdlen): Ditto.
|
|
|
|
|
|
(aarch64_simd_clone_adjust): Ditto.
|
|
|
|
|
|
(aarch64_simd_clone_usable): Ditto.
|
|
|
|
|
|
(TARGET_SIMD_CLONE_COMPUTE_VECSIZE_AND_SIMDLEN): New macro.
|
|
|
|
|
|
(TARGET_SIMD_CLONE_ADJUST): Ditto.
|
|
|
|
|
|
(TARGET_SIMD_CLONE_USABLE): Ditto.
|
|
|
|
|
|
* config/i386/i386.c (ix86_simd_clone_adjust): Add definition check.
|
|
|
|
|
|
* omp-simd-clone.c (expand_simd_clones): Add targetm.simd_clone.adjust
|
|
|
|
|
|
call.
|
|
|
|
|
|
|
2019-01-17 17:33:55 +01:00
|
|
|
|
2019-01-17 Martin Sebor <msebor@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/88800
|
|
|
|
|
|
* gimple-fold.c (gimple_fold_builtin_memory_op): Avoid checking
|
|
|
|
|
|
NO_WARNING bit here. Avoid folding out-of-bounds calls.
|
|
|
|
|
|
* gimple-ssa-warn-restrict.c (maybe_diag_offset_bounds): Remove
|
|
|
|
|
|
redundant argument. Add new argument and issue diagnostics under
|
|
|
|
|
|
its control. Detect out-of-bounds access even with warnings
|
|
|
|
|
|
disabled.
|
|
|
|
|
|
(check_bounds_or_overlap): Change return type. Add argument.
|
|
|
|
|
|
(wrestrict_dom_walker::check_call): Adjust.
|
|
|
|
|
|
* gimple-ssa-warn-restrict.h (check_bounds_or_overlap): Add argument.
|
|
|
|
|
|
* tree-ssa-strlen.c (handle_builtin_strcpy): Adjust to change in
|
|
|
|
|
|
check_bounds_or_overlap's return value.
|
|
|
|
|
|
(handle_builtin_stxncpy): Same.
|
|
|
|
|
|
(handle_builtin_strcat): Same.
|
|
|
|
|
|
|
2019-01-17 13:37:57 +01:00
|
|
|
|
2019-01-17 Andrew Stubbs <ams@codesourcery.com>
|
|
|
|
|
|
Kwok Cheung Yeung <kcy@codesourcery.com>
|
|
|
|
|
|
Julian Brown <julian@codesourcery.com>
|
|
|
|
|
|
Tom de Vries <tom@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/sourcebuild.texi: Document dg-add-options sqrt_insn.
|
|
|
|
|
|
|
2019-01-17 13:36:49 +01:00
|
|
|
|
2019-01-17 Andrew Stubbs <ams@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/sourcebuild.texi: Document dg-require-effective-target
|
|
|
|
|
|
llvm_binutils and offload_gcn.
|
|
|
|
|
|
|
2019-01-17 13:35:28 +01:00
|
|
|
|
2019-01-17 Andrew Stubbs <ams@codesourcery.com>
|
|
|
|
|
|
Kwok Cheung Yeung <kcy@codesourcery.com>
|
|
|
|
|
|
Julian Brown <julian@codesourcery.com>
|
|
|
|
|
|
Tom de Vries <tom@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/sourcebuild.texi: Document dg-required-effective-target
|
|
|
|
|
|
exceptions.
|
|
|
|
|
|
|
2019-01-17 13:34:28 +01:00
|
|
|
|
2019-01-17 Andrew Stubbs <ams@codesourcery.com>
|
|
|
|
|
|
Kwok Cheung Yeung <kcy@codesourcery.com>
|
|
|
|
|
|
Julian Brown <julian@codesourcery.com>
|
|
|
|
|
|
Tom de Vries <tom@codesourcery.com>
|
|
|
|
|
|
Jan Hubicka <hubicka@ucw.cz>
|
|
|
|
|
|
Martin Jambor <mjambor@suse.cz>
|
|
|
|
|
|
|
|
|
|
|
|
* config.gcc: Add amdgcn*-*-amdhsa configuration.
|
|
|
|
|
|
* configure.ac: Check for dlopen.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
|
2019-01-17 13:33:19 +01:00
|
|
|
|
2019-01-17 Andrew Stubbs <ams@codesourcery.com>
|
|
|
|
|
|
Kwok Cheung Yeung <kcy@codesourcery.com>
|
|
|
|
|
|
Julian Brown <julian@codesourcery.com>
|
|
|
|
|
|
Tom de Vries <tom@codesourcery.com>
|
|
|
|
|
|
Jan Hubicka <hubicka@ucw.cz>
|
|
|
|
|
|
Martin Jambor <mjambor@suse.cz>
|
|
|
|
|
|
|
|
|
|
|
|
* common/config/gcn/gcn-common.c: New file.
|
|
|
|
|
|
* config/gcn/driver-gcn.c: New file.
|
|
|
|
|
|
* config/gcn/gcn-builtins.def: New file.
|
|
|
|
|
|
* config/gcn/gcn-hsa.h: New file.
|
|
|
|
|
|
* config/gcn/gcn-modes.def: New file.
|
|
|
|
|
|
* config/gcn/gcn-opts.h: New file.
|
|
|
|
|
|
* config/gcn/gcn-passes.def: New file.
|
|
|
|
|
|
* config/gcn/gcn-protos.h: New file.
|
|
|
|
|
|
* config/gcn/gcn-run.c: New file.
|
|
|
|
|
|
* config/gcn/gcn-tree.c: New file.
|
|
|
|
|
|
* config/gcn/gcn.c: New file.
|
|
|
|
|
|
* config/gcn/gcn.h: New file.
|
|
|
|
|
|
* config/gcn/gcn.opt: New file.
|
|
|
|
|
|
* config/gcn/t-gcn-hsa: New file.
|
|
|
|
|
|
|
2019-01-17 13:31:28 +01:00
|
|
|
|
2019-01-17 Andrew Stubbs <ams@codesourcery.com>
|
|
|
|
|
|
Kwok Cheung Yeung <kcy@codesourcery.com>
|
|
|
|
|
|
Julian Brown <julian@codesourcery.com>
|
|
|
|
|
|
Tom de Vries <tom@codesourcery.com>
|
|
|
|
|
|
Jan Hubicka <hubicka@ucw.cz>
|
|
|
|
|
|
Martin Jambor <mjambor@suse.cz>
|
|
|
|
|
|
|
|
|
|
|
|
* config/gcn/constraints.md: New file.
|
|
|
|
|
|
* config/gcn/gcn-valu.md: New file.
|
|
|
|
|
|
* config/gcn/gcn.md: New file.
|
|
|
|
|
|
* config/gcn/predicates.md: New file.
|
|
|
|
|
|
|
2019-01-17 13:12:58 +01:00
|
|
|
|
2019-01-17 Eric Botcazou <ebotcazou@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gimple-ssa-isolate-paths.c (stmt_uses_name_in_undefined_way): Replace
|
|
|
|
|
|
flag_non_call_exceptions with cfun->can_throw_non_call_exceptions.
|
|
|
|
|
|
(stmt_uses_0_or_null_in_undefined_way): Likewise.
|
|
|
|
|
|
* tree-ssa-alias.c (same_addr_size_stores_p): Likewise.
|
|
|
|
|
|
|
2019-01-17 13:06:04 +01:00
|
|
|
|
2019-01-17 Tamar Christina <tamar.christina@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88851
|
|
|
|
|
|
* config/aarch64/aarch64.md (STACK_CLASH_SVE_CFA_REGNUM): New.
|
|
|
|
|
|
* config/aarch64/aarch64.c (aarch64_allocate_and_probe_stack_space): Use
|
|
|
|
|
|
it and document registers.
|
|
|
|
|
|
|
2019-01-17 11:08:55 +01:00
|
|
|
|
2019-01-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/aarch64/aarch64.c (ares_tunings): Define.
|
|
|
|
|
|
* config/aarch64/aarch64-cores.def (ares): Use the above.
|
|
|
|
|
|
|
2019-01-17 10:54:56 +01:00
|
|
|
|
2019-01-17 Wei Xiao <wei3.xiao@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88794
|
|
|
|
|
|
Revert:
|
|
|
|
|
|
2018-11-06 Wei Xiao <wei3.xiao@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/i386/avx512fintrin.h: Update VFIXUPIMM* intrinsics.
|
|
|
|
|
|
(_mm512_fixupimm_round_pd): Update parameters and builtin.
|
|
|
|
|
|
(_mm512_maskz_fixupimm_round_pd): Ditto.
|
|
|
|
|
|
(_mm512_fixupimm_round_ps): Ditto.
|
|
|
|
|
|
(_mm512_maskz_fixupimm_round_ps): Ditto.
|
|
|
|
|
|
(_mm_fixupimm_round_sd): Ditto.
|
|
|
|
|
|
(_mm_maskz_fixupimm_round_sd): Ditto.
|
|
|
|
|
|
(_mm_fixupimm_round_ss): Ditto.
|
|
|
|
|
|
(_mm_maskz_fixupimm_round_ss): Ditto.
|
|
|
|
|
|
(_mm512_fixupimm_pd): Ditto.
|
|
|
|
|
|
(_mm512_maskz_fixupimm_pd): Ditto.
|
|
|
|
|
|
(_mm512_fixupimm_ps): Ditto.
|
|
|
|
|
|
(_mm512_maskz_fixupimm_ps): Ditto.
|
|
|
|
|
|
(_mm_fixupimm_sd): Ditto.
|
|
|
|
|
|
(_mm_maskz_fixupimm_sd): Ditto.
|
|
|
|
|
|
(_mm_fixupimm_ss): Ditto.
|
|
|
|
|
|
(_mm_maskz_fixupimm_ss): Ditto.
|
|
|
|
|
|
(_mm512_mask_fixupimm_round_pd): Update builtin.
|
|
|
|
|
|
(_mm512_mask_fixupimm_round_ps): Ditto.
|
|
|
|
|
|
(_mm_mask_fixupimm_round_sd): Ditto.
|
|
|
|
|
|
(_mm_mask_fixupimm_round_ss): Ditto.
|
|
|
|
|
|
(_mm512_mask_fixupimm_pd): Ditto.
|
|
|
|
|
|
(_mm512_mask_fixupimm_ps): Ditto.
|
|
|
|
|
|
(_mm_mask_fixupimm_sd): Ditto.
|
|
|
|
|
|
(_mm_mask_fixupimm_ss): Ditto.
|
|
|
|
|
|
* config/i386/avx512vlintrin.h:
|
|
|
|
|
|
(_mm256_fixupimm_pd): Update parameters and builtin.
|
|
|
|
|
|
(_mm256_maskz_fixupimm_pd): Ditto.
|
|
|
|
|
|
(_mm256_fixupimm_ps): Ditto.
|
|
|
|
|
|
(_mm256_maskz_fixupimm_ps): Ditto.
|
|
|
|
|
|
(_mm_fixupimm_pd): Ditto.
|
|
|
|
|
|
(_mm_maskz_fixupimm_pd): Ditto.
|
|
|
|
|
|
(_mm_fixupimm_ps): Ditto.
|
|
|
|
|
|
(_mm_maskz_fixupimm_ps): Ditto.
|
|
|
|
|
|
(_mm256_mask_fixupimm_pd): Update builtin.
|
|
|
|
|
|
(_mm256_mask_fixupimm_ps): Ditto.
|
|
|
|
|
|
(_mm_mask_fixupimm_pd): Ditto.
|
|
|
|
|
|
(_mm_mask_fixupimm_ps): Ditto.
|
|
|
|
|
|
* config/i386/i386-builtin-types.def: Add new types and remove useless ones.
|
|
|
|
|
|
* config/i386/i386-builtin.def: Update builtin definitions.
|
|
|
|
|
|
* config/i386/i386.c: Handle new builtin types and remove useless ones.
|
|
|
|
|
|
* config/i386/sse.md: Update VFIXUPIMM* patterns.
|
|
|
|
|
|
(<avx512>_fixupimm<mode>_maskz<round_saeonly_expand_name>): Update.
|
|
|
|
|
|
(<avx512>_fixupimm<mode><sd_maskz_name><round_saeonly_name>): Update.
|
|
|
|
|
|
(<avx512>_fixupimm<mode>_mask<round_saeonly_name>): Update.
|
|
|
|
|
|
(avx512f_sfixupimm<mode>_maskz<round_saeonly_expand_name>): Update.
|
|
|
|
|
|
(avx512f_sfixupimm<mode><sd_maskz_name><round_saeonly_name>): Update.
|
|
|
|
|
|
(avx512f_sfixupimm<mode>_mask<round_saeonly_name>): Update.
|
|
|
|
|
|
* config/i386/subst.md:
|
|
|
|
|
|
(round_saeonly_sd_mask_operand4): Add new subst_attr.
|
|
|
|
|
|
(round_saeonly_sd_mask_op4): Ditto.
|
|
|
|
|
|
(round_saeonly_expand_operand5): Ditto.
|
|
|
|
|
|
(round_saeonly_expand): Update.
|
|
|
|
|
|
|
2019-01-17 10:34:00 +01:00
|
|
|
|
2019-01-17 Wei Xiao <wei3.xiao@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88794
|
|
|
|
|
|
Revert:
|
|
|
|
|
|
2018-11-12 Wei Xiao <wei3.xiao@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/i386/sse.md: Combine VFIXUPIMM* patterns
|
|
|
|
|
|
(<avx512>_fixupimm<mode>_maskz<round_saeonly_expand_name>): Update.
|
|
|
|
|
|
(<avx512>_fixupimm<mode><sd_maskz_name><round_saeonly_name>): Update.
|
|
|
|
|
|
(<avx512>_fixupimm<mode>_mask<round_saeonly_name>): Remove.
|
|
|
|
|
|
(avx512f_sfixupimm<mode>_maskz<round_saeonly_expand_name>): Update.
|
|
|
|
|
|
(avx512f_sfixupimm<mode><sd_maskz_name><round_saeonly_name>): Update.
|
|
|
|
|
|
(avx512f_sfixupimm<mode>_mask<round_saeonly_name>): Remove.
|
|
|
|
|
|
|
2019-01-17 09:51:01 +01:00
|
|
|
|
2019-01-17 Wei Xiao <wei3.xiao@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88794
|
|
|
|
|
|
Revert:
|
|
|
|
|
|
2018-12-15 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88489
|
|
|
|
|
|
* config/i386/sse.md (UNSPEC_SFIXUPIMM): New unspec enumerator.
|
|
|
|
|
|
(avx512f_sfixupimm<mode><mask_name><round_saeonly_name>): Use it
|
|
|
|
|
|
instead of UNSPEC_FIXUPIMM.
|
|
|
|
|
|
|
2019-01-17 09:45:00 +01:00
|
|
|
|
2019-01-17 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR lto/86736
|
|
|
|
|
|
* dwarf2out.c (want_pubnames): Never generate pubnames sections
|
|
|
|
|
|
and friends for the LTO part of debug info.
|
|
|
|
|
|
|
2019-01-17 09:04:28 +01:00
|
|
|
|
2019-01-17 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
2019-01-17 09:05:12 +01:00
|
|
|
|
PR tree-optimization/86214
|
|
|
|
|
|
* cfgexpand.c (add_stack_var_conflict): Don't add any conflicts
|
|
|
|
|
|
if x == y.
|
|
|
|
|
|
|
2019-01-17 09:04:28 +01:00
|
|
|
|
PR rtl-optimization/88870
|
|
|
|
|
|
* dce.c (deletable_insn_p): Never delete const/pure calls that can
|
|
|
|
|
|
throw if we can't alter the cfg or delete dead exceptions.
|
|
|
|
|
|
(mark_insn): Don't call find_call_stack_args for such calls.
|
|
|
|
|
|
|
2019-01-17 08:49:24 +01:00
|
|
|
|
2019-01-17 Kewen Lin <linkw@gcc.gnu.org>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/extend.texi: Add four new prototypes for vec_ld and seven new
|
|
|
|
|
|
prototypes for vec_st.
|
|
|
|
|
|
* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add entries
|
|
|
|
|
|
for scalar address type variants of altivec_vec_ld/altivec_vec_st,
|
|
|
|
|
|
mainly on signed/unsigned long long and double.
|
|
|
|
|
|
|
Fix ICE due to "combine" creating unreachable EH blocks (PR target/88861)
PR target/88861 reports an ICE in "ce2" due to an unreachable
basic block.
The block becomes unreachable in "combine" when delete_noop_moves
deletes an insn with a REG_EH_REGION, deleting the EH edge, the
only edge leading to the basic block.
Normally, rest_of_handle_combine would call cleanup_cfg, deleting
unreachable blocks, if combine_instructions returns true, and
combine_instructions does return true for some cases of edge-removal,
but it doesn't for this case, leading to the ICE.
This patch updates delete_noop_moves so that it returns true if
it deletes any edges, and passes that through to combine_instructions,
so that it too will return true if any edges were deleted, ensuring that
cleanup_cfg will be called by rest_of_handle_combine for this case,
deleting the now-unreachable block, and fixing the ICE.
gcc/ChangeLog:
PR target/88861
* combine.c (delete_noop_moves): Convert to "bool" return,
returning true if any edges are eliminated.
(combine_instructions): Also return true if delete_noop_moves
returns true.
gcc/testsuite/ChangeLog:
PR target/88861
* g++.dg/torture/pr88861.C: New test.
From-SVN: r267984
2019-01-16 21:13:23 +01:00
|
|
|
|
2019-01-16 David Malcolm <dmalcolm@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88861
|
|
|
|
|
|
* combine.c (delete_noop_moves): Convert to "bool" return,
|
|
|
|
|
|
returning true if any edges are eliminated.
|
|
|
|
|
|
(combine_instructions): Also return true if delete_noop_moves
|
|
|
|
|
|
returns true.
|
|
|
|
|
|
|
2019-01-16 19:29:00 +01:00
|
|
|
|
2019-01-16 Tamar Christina <tamar.christina@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
|
|
|
|
|
|
correct max nunits for endian swap.
|
|
|
|
|
|
(aarch64_expand_fcmla_builtin): Correct subreg code.
|
|
|
|
|
|
* config/aarch64/aarch64-simd.md (aarch64_fcmla_lane<rot><mode>,
|
|
|
|
|
|
aarch64_fcmla_laneq<rot>v4hf, aarch64_fcmlaq_lane<rot><mode>): Correct
|
|
|
|
|
|
lane endianness.
|
|
|
|
|
|
|
2019-01-16 16:33:34 +01:00
|
|
|
|
2019-01-16 Uroš Bizjak <ubizjak@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/alpha/alpha.c (alpha_gimplify_va_arg):
|
|
|
|
|
|
Handle split indirect COMPLEX_TYPE arguments.
|
|
|
|
|
|
|
2019-01-16 16:22:08 +01:00
|
|
|
|
2019-01-16 Richard Earnshaw <rearnsha@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/86891
|
|
|
|
|
|
* config/aarch64/aarch64-modes.def: Add comment about how the carry
|
|
|
|
|
|
bit is set by add and compare.
|
|
|
|
|
|
(CC_ADC): New CC_MODE.
|
|
|
|
|
|
* config/aarch64/aarch64.c (aarch64_select_cc_mode): Use variables
|
|
|
|
|
|
to cache the code and mode of X. Adjust the shape of a CC_Cmode
|
|
|
|
|
|
comparison. Add detection for CC_ADCmode.
|
|
|
|
|
|
(aarch64_get_condition_code_1): Update code support for CC_Cmode. Add
|
|
|
|
|
|
CC_ADCmode.
|
|
|
|
|
|
* config/aarch64/aarch64.md (uaddv<mode>4): Use LTU with CCmode.
|
|
|
|
|
|
(uaddvti4): Comparison result is in CC_ADCmode and the condition is GEU.
|
|
|
|
|
|
(add<mode>3_compareC_cconly_imm): Delete. Merge into...
|
|
|
|
|
|
(add<mode>3_compareC_cconly): ... this. Restructure the comparison
|
|
|
|
|
|
to eliminate the need for zero-extending the operands.
|
|
|
|
|
|
(add<mode>3_compareC_imm): Delete. Merge into ...
|
|
|
|
|
|
(add<mode>3_compareC): ... this. Restructure the comparison to
|
|
|
|
|
|
eliminate the need for zero-extending the operands.
|
|
|
|
|
|
(add<mode>3_carryin): Use LTU for the overflow detection.
|
|
|
|
|
|
(add<mode>3_carryinC): Use CC_ADCmode for the result of the carry out.
|
|
|
|
|
|
Reexpress comparison for overflow.
|
|
|
|
|
|
(add<mode>3_carryinC_zero): Update for change to add<mode>3_carryinC.
|
|
|
|
|
|
(add<mode>3_carryinC): Likewise.
|
|
|
|
|
|
(add<mode>3_carryinV): Use LTU for carry between partials.
|
|
|
|
|
|
* config/aarch64/predicates.md (aarch64_carry_operation): Update
|
|
|
|
|
|
handling of CC_Cmode and add CC_ADCmode.
|
|
|
|
|
|
(aarch64_borrow_operation): Likewise.
|
|
|
|
|
|
|
2019-01-16 12:25:10 +01:00
|
|
|
|
2019-01-16 Tamar Christina <tamar.christina@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/arm/arm-protos.h (neon_vcmla_lane_prepare_operands): Remove patternmode.
|
|
|
|
|
|
* config/arm/arm.c (neon_vcmla_lane_prepare_operands): Likewise.
|
|
|
|
|
|
* config/arm/neon.md (neon_vcmla_lane<rot><mode>, neon_vcmla_laneq<rot><mode>,
|
|
|
|
|
|
neon_vcmlaq_lane<rot><mode>): Remove endianness conversion.
|
|
|
|
|
|
|
2019-01-16 10:38:21 +01:00
|
|
|
|
2019-01-16 Martin Liska <mliska@suse.cz>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.in: Set TOOL_INCLUDE_DIR and NATIVE_SYSTEM_HEADER_DIR
|
|
|
|
|
|
for GCC driver.
|
|
|
|
|
|
* config/gnu-user.h (TARGET_F951_OPTIONS): Add 'finclude%s/' as
|
|
|
|
|
|
a new argument.
|
|
|
|
|
|
* gcc.c (add_sysrooted_hdrs_prefix): New function.
|
|
|
|
|
|
(path_prefix_reset): Move up in the source file.
|
|
|
|
|
|
(find_fortran_preinclude_file): Make complex search for the
|
|
|
|
|
|
fortran header files.
|
|
|
|
|
|
|
2019-01-16 00:54:37 +01:00
|
|
|
|
2019-01-15 Nikhil Benesch <nikhil.benesch@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* godump.c (go_output_typedef): When outputting a typedef, refer
|
|
|
|
|
|
to the underlying type by its name and not its structure.
|
|
|
|
|
|
|
2019-01-16 00:29:15 +01:00
|
|
|
|
2019-01-15 David Malcolm <dmalcolm@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR c++/88795
|
|
|
|
|
|
* tree.c (build_function_type): Assert that arg_types is not
|
|
|
|
|
|
error_mark_node.
|
|
|
|
|
|
|
2019-01-15 17:46:54 +01:00
|
|
|
|
2019-01-15 Richard Sandiford <richard.sandiford@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR inline-asm/52813
|
|
|
|
|
|
* doc/extend.texi: Document that listing the stack pointer in the
|
|
|
|
|
|
clobber list of an asm is a deprecated feature.
|
|
|
|
|
|
* common.opt (Wdeprecated): Moved from c-family/c.opt.
|
|
|
|
|
|
* cfgexpand.c (asm_clobber_reg_is_valid): Issue a -Wdeprecated
|
|
|
|
|
|
warning instead of an error for clobbers of the stack pointer.
|
|
|
|
|
|
Add a note explaining why.
|
|
|
|
|
|
|
2019-01-15 17:06:42 +01:00
|
|
|
|
2019-01-15 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR debug/88046
|
|
|
|
|
|
* dwarf2out.c (gen_member_die): Do not generate inheritance
|
|
|
|
|
|
DIEs late.
|
|
|
|
|
|
|
2019-01-15 16:37:29 +01:00
|
|
|
|
2019-01-15 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/88855
|
|
|
|
|
|
* tree-if-conv.c (combine_blocks): Collect
|
|
|
|
|
|
SSA_NAME_OCCURS_IN_ABNORMAL_PHI from propagated out virtuals.
|
|
|
|
|
|
|
2019-01-15 11:11:16 +01:00
|
|
|
|
2019-01-15 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/80547
|
|
|
|
|
|
* config/nvptx/nvptx.c (nvptx_goacc_reduction_init): Handle
|
|
|
|
|
|
lhs == NULL_TREE for gang-level reduction.
|
|
|
|
|
|
|
2019-01-15 10:37:22 +01:00
|
|
|
|
2019-01-15 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
|
|
|
|
|
|
|
|
|
|
|
|
PR ipa/88788
|
|
|
|
|
|
* ipa-pure-const.c (malloc_candidate_p_1): Add parameter visited and
|
|
|
|
|
|
return true if SSA_NAME is already marked in visited bitmap.
|
|
|
|
|
|
(malloc_candidate_p): Pass visited to malloc_candidate_p_1.
|
|
|
|
|
|
|
2019-01-15 09:11:00 +01:00
|
|
|
|
2019-01-15 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/88775
|
|
|
|
|
|
* match.pd (cmp (convert1?@2 addr@0) (convert2? addr@1)): Optimize
|
|
|
|
|
|
equal == 0 equality pointer comparisons some more if compared in
|
|
|
|
|
|
integral types and either one points to an automatic var and the
|
|
|
|
|
|
other to a global, or we can prove at least one points to the middle
|
|
|
|
|
|
or both point to start or both point to end.
|
|
|
|
|
|
|
2019-01-15 04:49:45 +01:00
|
|
|
|
2019-01-14 Andi Kleen <ak@linux.intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.in: Lower autofdo sampling rate by 10x.
|
|
|
|
|
|
* Makefile.tpl: Dito.
|
|
|
|
|
|
|
2019-01-14 20:55:51 +01:00
|
|
|
|
2019-01-14 Tom Honermann <tom@honermann.net>
|
|
|
|
|
|
|
|
|
|
|
|
* defaults.h: Define CHAR8_TYPE.
|
|
|
|
|
|
|
2019-01-14 19:44:00 +01:00
|
|
|
|
2019-01-14 Martin Sebor <msebor@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88638
|
|
|
|
|
|
* doc/extend.texi (Darwin Format Checks): Clarify.
|
|
|
|
|
|
|
2019-01-14 14:11:43 +01:00
|
|
|
|
2019-01-14 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* genmatch.c (dt_simplify::gen_1): Change dumping dependent on
|
|
|
|
|
|
whether we are in (simplify ...) or (match ...) context.
|
|
|
|
|
|
|
2019-01-14 13:01:01 +01:00
|
|
|
|
2019-01-14 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR rtl-optimization/88796
|
|
|
|
|
|
* emit-rtl.h (struct rtl_data): Add stack_protect_guard_decl field.
|
|
|
|
|
|
* cfgexpand.c (stack_protect_prologue): Initialize
|
|
|
|
|
|
crtl->stack_protect_guard_decl.
|
|
|
|
|
|
* function.c (stack_protect_epilogue): Use it instead of calling
|
|
|
|
|
|
targetm.stack_protect_guard again.
|
|
|
|
|
|
* dse.c (check_mem_read_rtx): Ignore MEM_VOLATILE_P reads from
|
|
|
|
|
|
MEMs with MEM_EXPR equal to crtl->stack_protect_guard or
|
|
|
|
|
|
crtl->stack_protect_guard_decl.
|
|
|
|
|
|
* config/i386/i386.c (ix86_stack_protect_guard): Set TREE_THIS_VOLATILE
|
|
|
|
|
|
on the returned MEM_EXPR.
|
|
|
|
|
|
|
2019-01-12 23:19:15 +01:00
|
|
|
|
2019-01-12 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Alow setting
|
|
|
|
|
|
vector length using -fopenacc-dim.
|
|
|
|
|
|
|
2019-01-12 23:17:42 +01:00
|
|
|
|
2019-01-12 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nvptx/nvptx.c (nvptx_goacc_validate_dims): Take larger vector
|
|
|
|
|
|
lengths into account.
|
|
|
|
|
|
|
2019-01-12 22:17:56 +01:00
|
|
|
|
2019-01-12 Svante Signell <svante.signell@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/i386/gnu.h (TARGET_THREAD_SSP_OFFSET): Define.
|
|
|
|
|
|
(TARGET_CAN_SPLIT_STACK): Define.
|
|
|
|
|
|
(TARGET_THREAD_SPLIT_STACK_OFFSET): Define.
|
|
|
|
|
|
|
2019-01-12 19:18:23 +01:00
|
|
|
|
2019-01-05 Jan Hubicka <hubicka@ucw.cz>
|
|
|
|
|
|
|
|
|
|
|
|
* params.def (inline-unit-growth): Set to 40.
|
|
|
|
|
|
|
2019-01-12 17:55:45 +01:00
|
|
|
|
2019-01-12 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* tree-ssa-loop-ivopts.c (find_inv_vars): Fix a comment typo.
|
|
|
|
|
|
|
2019-01-12 11:27:34 +01:00
|
|
|
|
2019-01-12 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): In offloading
|
|
|
|
|
|
region calling vector-partitionable routine, set default_vector_length
|
|
|
|
|
|
to WARP_SIZE.
|
|
|
|
|
|
|
2019-01-12 11:27:23 +01:00
|
|
|
|
2019-01-12 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Add an use new
|
|
|
|
|
|
variable default_vector_length.
|
|
|
|
|
|
|
2019-01-12 11:27:12 +01:00
|
|
|
|
2019-01-12 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR middle-end/88703
|
|
|
|
|
|
* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Apply defaults
|
|
|
|
|
|
from oacc_default_dims, as oacc_validate_dims would do it, and apply
|
|
|
|
|
|
dimensions limits.
|
|
|
|
|
|
|
2019-01-12 11:27:00 +01:00
|
|
|
|
2019-01-12 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1)
|
|
|
|
|
|
(nvptx_goacc_validate_dims): Add used parameter.
|
|
|
|
|
|
* doc/tm.texi: Regenerate.
|
|
|
|
|
|
* omp-offload.c (oacc_parse_default_dims, oacc_validate_dims): Add
|
|
|
|
|
|
argument to call to targetm.goacc.validate_dims.
|
|
|
|
|
|
(default_goacc_validate_dims): Add used
|
|
|
|
|
|
parameter.
|
|
|
|
|
|
* target.def (validate_dims): Add used parameter in DEFHOOK.
|
|
|
|
|
|
* targhooks.h (default_goacc_validate_dims): Add used parameter.
|
|
|
|
|
|
|
2019-01-11 22:03:53 +01:00
|
|
|
|
2019-01-11 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR middle-end/85956
|
|
|
|
|
|
PR lto/88733
|
|
|
|
|
|
* tree-inline.h (struct copy_body_data): Add adjust_array_error_bounds
|
|
|
|
|
|
field.
|
|
|
|
|
|
* tree-inline.c (remap_type_1): Formatting fix. If TYPE_MAX_VALUE of
|
|
|
|
|
|
ARRAY_TYPE's TYPE_DOMAIN is newly error_mark_node, replace it with
|
|
|
|
|
|
a dummy "omp dummy var" variable if id->adjust_array_error_bounds.
|
|
|
|
|
|
* omp-low.c (new_omp_context): Set cb.adjust_array_error_bounds.
|
|
|
|
|
|
|
2019-01-11 20:25:31 +01:00
|
|
|
|
2019-01-11 Vladimir Makarov <vmakarov@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR rtl-optimization/87305
|
|
|
|
|
|
* lra-assigns.c
|
|
|
|
|
|
(setup_live_pseudos_and_spill_after_risky_transforms): Add code
|
|
|
|
|
|
for little endian pseudos used as paradoxical subreg.
|
|
|
|
|
|
|
2019-01-11 20:04:32 +01:00
|
|
|
|
2019-01-11 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/88693
|
|
|
|
|
|
* tree-ssa-strlen.c (get_min_string_length): Don't set *full_string_p
|
|
|
|
|
|
for STRING_CSTs that don't contain any NUL characters in the first
|
|
|
|
|
|
TREE_STRING_LENGTH bytes.
|
|
|
|
|
|
|
2019-01-11 19:44:00 +01:00
|
|
|
|
2019-01-11 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 88777
|
|
|
|
|
|
PR 88614
|
|
|
|
|
|
* genattrtab.c (min_fn): Don't translate values.
|
|
|
|
|
|
(min_attr_value): Return INT_MAX when the value can't be calculated.
|
|
|
|
|
|
Return minimum among any values that can be calculated.
|
|
|
|
|
|
(max_attr_value): Adjust.
|
|
|
|
|
|
|
2019-01-11 18:01:25 +01:00
|
|
|
|
2019-01-11 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.in (PLUGIN_HEADERS): Add $(INSN_ATTR_H).
|
|
|
|
|
|
|
2019-01-11 17:50:17 +01:00
|
|
|
|
2019-01-11 Steve Ellcey <sellcey@marvell.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/aarch64/aarch64.c (aarch64_simd_call_p): New function.
|
|
|
|
|
|
(aarch64_hard_regno_call_part_clobbered): Add insn argument.
|
|
|
|
|
|
(aarch64_return_call_with_max_clobbers): New function.
|
|
|
|
|
|
(TARGET_RETURN_CALL_WITH_MAX_CLOBBERS): New macro.
|
|
|
|
|
|
* config/avr/avr.c (avr_hard_regno_call_part_clobbered): Add insn
|
|
|
|
|
|
argument.
|
|
|
|
|
|
* config/i386/i386.c (ix86_hard_regno_call_part_clobbered): Ditto.
|
|
|
|
|
|
* config/mips/mips.c (mips_hard_regno_call_part_clobbered): Ditto.
|
|
|
|
|
|
* config/rs6000/rs6000.c (rs6000_hard_regno_call_part_clobbered): Ditto.
|
|
|
|
|
|
* config/s390/s390.c (s390_hard_regno_call_part_clobbered): Ditto.
|
|
|
|
|
|
* cselib.c (cselib_process_insn): Add argument to
|
|
|
|
|
|
targetm.hard_regno_call_part_clobbered call.
|
|
|
|
|
|
* ira-conflicts.c (ira_build_conflicts): Ditto.
|
|
|
|
|
|
* ira-costs.c (ira_tune_allocno_costs): Ditto.
|
|
|
|
|
|
* lra-constraints.c (inherit_reload_reg): Ditto.
|
|
|
|
|
|
* lra-int.h (struct lra_reg): Add call_insn field, remove call_p field.
|
|
|
|
|
|
* lra-lives.c (check_pseudos_live_through_calls): Add call_insn
|
|
|
|
|
|
argument. Call targetm.return_call_with_max_clobbers.
|
|
|
|
|
|
Add argument to targetm.hard_regno_call_part_clobbered call.
|
|
|
|
|
|
(calls_have_same_clobbers_p): New function.
|
|
|
|
|
|
(process_bb_lives): Add call_insn and last_call_insn variables.
|
|
|
|
|
|
Pass call_insn to check_pseudos_live_through_calls.
|
|
|
|
|
|
Modify if stmt to check targetm.return_call_with_max_clobbers.
|
|
|
|
|
|
Update setting of flush variable.
|
|
|
|
|
|
(lra_create_live_ranges_1): Set call_insn to NULL instead of call_p
|
|
|
|
|
|
to false.
|
|
|
|
|
|
* lra.c (initialize_lra_reg_info_element): Set call_insn to NULL.
|
|
|
|
|
|
* regcprop.c (copyprop_hardreg_forward_1): Add argument to
|
|
|
|
|
|
targetm.hard_regno_call_part_clobbered call.
|
|
|
|
|
|
* reginfo.c (choose_hard_reg_mode): Ditto.
|
|
|
|
|
|
* regrename.c (check_new_reg_p): Ditto.
|
|
|
|
|
|
* reload.c (find_equiv_reg): Ditto.
|
|
|
|
|
|
* reload1.c (emit_reload_insns): Ditto.
|
|
|
|
|
|
* sched-deps.c (deps_analyze_insn): Ditto.
|
|
|
|
|
|
* sel-sched.c (init_regs_for_mode): Ditto.
|
|
|
|
|
|
(mark_unavailable_hard_regs): Ditto.
|
|
|
|
|
|
* targhooks.c (default_dwarf_frame_reg_mode): Ditto.
|
|
|
|
|
|
* target.def (hard_regno_call_part_clobbered): Add insn argument.
|
|
|
|
|
|
(return_call_with_max_clobbers): New target function.
|
|
|
|
|
|
* doc/tm.texi: Regenerate.
|
|
|
|
|
|
* doc/tm.texi.in (TARGET_RETURN_CALL_WITH_MAX_CLOBBERS): New hook.
|
|
|
|
|
|
* hooks.c (hook_bool_uint_mode_false): Change to
|
|
|
|
|
|
hook_bool_insn_uint_mode_false.
|
|
|
|
|
|
* hooks.h (hook_bool_uint_mode_false): Ditto.
|
|
|
|
|
|
|
2019-01-11 16:53:02 +01:00
|
|
|
|
2019-01-11 Steve Ellcey <sellcey@marvell.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/aarch64/aarch64.c (aarch64_simd_call_p): New function.
|
|
|
|
|
|
(aarch64_remove_extra_call_preserved_regs): New function.
|
|
|
|
|
|
(TARGET_REMOVE_EXTRA_CALL_PRESERVED_REGS): New macro.
|
|
|
|
|
|
* doc/tm.texi.in (TARGET_REMOVE_EXTRA_CALL_PRESERVED_REGS): New hook.
|
|
|
|
|
|
* doc/tm.texi: Regenerate.
|
|
|
|
|
|
* final.c (get_call_reg_set_usage): Call new hook.
|
|
|
|
|
|
* target.def (remove_extra_call_preserved_regs): New hook.
|
|
|
|
|
|
* targhooks.c (default_remove_extra_call_preserved_regs): New function.
|
|
|
|
|
|
* targhooks.h (default_remove_extra_call_preserved_regs): New function.
|
|
|
|
|
|
|
2019-01-11 13:05:54 +01:00
|
|
|
|
2019-01-11 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR bootstrap/88714
|
|
|
|
|
|
* passes.c (finish_optimization_passes): Call print_combine_total_stats
|
|
|
|
|
|
inside of pass_combine_1 dump rather than pass_profile_1.
|
|
|
|
|
|
|
[nvptx] Don't allow vector_length 64 with num_workers 16
When using a compiler build with:
...
+#define PTX_DEFAULT_VECTOR_LENGTH PTX_CTA_SIZE
...
consider a test-case:
...
int
main (void)
{
#pragma acc parallel vector_length (64)
#pragma acc loop worker
for (unsigned int i = 0; i < 32; i++)
#pragma acc loop vector
for (unsigned int j = 0; j < 64; j++)
;
return 0;
}
...
If num_workers is 16, either because:
- we add a "num_workers (16)" clause on the parallel directive, or
- we set "GOMP_OPENACC_DIM=:16:", or
- the libgomp plugin chooses 16 num_workers
we run into an illegal instruction at runtime, because a bar.sync instruction
tries to use a barrier 16. The instruction is illegal, because ptx supports
only 16 barriers per CTA, and the valid range is 0..15.
The problem is that with a warp-multiple vector length, we use a code generation
scheme with a per-worker barrier. And because barrier zero is reserved for
per-cta barrier, only the remaining 15 barriers can be used as per-worker
barrier, and consequently we can't use num_workers larger than 15.
This problem occurs only for vector_length 64. For vector_length 32, we use a
different code generation scheme, and for vector_length >= 96, the maximum
num_workers is not big enough not to trigger this problem.
Also, this problem only occurs for num_workers 16. As explained above,
num_workers 15 is safe to use, and 16 is already the maximum num_workers for
vector_length 64.
This patch fixes the problem in both the compiler (handling "num_workers (16)")
and in the libgomp nvptx plugin (with and without "GOMP_OPENACC_DIM=:16:").
2019-01-11 Tom de Vries <tdevries@suse.de>
* config/nvptx/nvptx.c (PTX_CTA_NUM_BARRIERS, PTX_PER_CTA_BARRIER)
(PTX_NUM_PER_CTA_BARRIER, PTX_FIRST_PER_WORKER_BARRIER)
(PTX_NUM_PER_WORKER_BARRIERS): Define.
(nvptx_apply_dim_limits): Prevent vector_length 64 and
num_workers 16.
* plugin/plugin-nvptx.c (nvptx_exec): Prevent vector_length 64 and
num_workers 16.
From-SVN: r267838
2019-01-11 12:46:43 +01:00
|
|
|
|
2019-01-11 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nvptx/nvptx.c (PTX_CTA_NUM_BARRIERS, PTX_PER_CTA_BARRIER)
|
|
|
|
|
|
(PTX_NUM_PER_CTA_BARRIER, PTX_FIRST_PER_WORKER_BARRIER)
|
|
|
|
|
|
(PTX_NUM_PER_WORKER_BARRIERS): Define.
|
|
|
|
|
|
(nvptx_apply_dim_limits): Prevent vector_length 64 and
|
|
|
|
|
|
num_workers 16.
|
|
|
|
|
|
|
2019-01-11 12:46:31 +01:00
|
|
|
|
2019-01-11 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nvptx/nvptx.c (PTX_CTA_SIZE): Move up.
|
|
|
|
|
|
|
2019-01-11 12:20:40 +01:00
|
|
|
|
2019-01-11 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/i386/i386.md (rex64suffix): Add L suffix for SI.
|
|
|
|
|
|
* config/i386/sse.md (cvtusi2<ssescalarmodesuffix>32<round_name>,
|
|
|
|
|
|
sse2_cvtsi2sd): Add {l}.
|
|
|
|
|
|
(sse2_cvtsi2sdq<round_name>): Make q conditional upon AT&T
|
|
|
|
|
|
syntax.
|
|
|
|
|
|
|
2019-01-11 00:20:19 +01:00
|
|
|
|
2019-01-10 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88785
|
|
|
|
|
|
* config/i386/sse.md (float<floatunssuffix>v2div2sf2): Turn into
|
|
|
|
|
|
define_expand.
|
|
|
|
|
|
(*float<floatunssuffix>v2div2sf2): New define_insn.
|
|
|
|
|
|
(float<floatunssuffix>v2div2sf2_mask): Turn into define_expand.
|
|
|
|
|
|
(*float<floatunssuffix>v2div2sf2_mask): New define_insn.
|
|
|
|
|
|
(*float<floatunssuffix>v2div2sf2_mask_1): Replace
|
|
|
|
|
|
subrtxes (const_vector:V2SF [(const_int 0) (const_int 0)]) with
|
|
|
|
|
|
match_operands with "const0_operand" "C".
|
|
|
|
|
|
|
2019-01-10 23:28:00 +01:00
|
|
|
|
2019-01-10 Tamar Christina <tamar.christina@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/aarch64/aarch64-builtins.c
|
|
|
|
|
|
(aarch64_init_builtins): Move aarch64_init_fcmla_laneq_builtins...
|
|
|
|
|
|
(aarch64_init_simd_builtins): ...Here
|
|
|
|
|
|
|
2019-01-10 22:02:50 +01:00
|
|
|
|
2019-01-10 Vladimir Makarov <vmakarov@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR rtl-optimization/87305
|
|
|
|
|
|
* lra-assigns.c
|
|
|
|
|
|
(setup_live_pseudos_and_spill_after_risky_transforms): Check
|
|
|
|
|
|
allocation for big endian pseudos used as paradoxical subregs and
|
|
|
|
|
|
spill them if it is wrong.
|
|
|
|
|
|
* lra-constraints.c (lra_constraints): Add a comment.
|
|
|
|
|
|
|
2019-01-10 19:58:08 +01:00
|
|
|
|
2019-01-10 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/88792
|
|
|
|
|
|
* tree-ssa-pre.c (get_representative_for): Do not return a
|
|
|
|
|
|
value-number here.
|
|
|
|
|
|
|
2019-01-10 16:44:16 +01:00
|
|
|
|
2019-01-10 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR middle-end/84877
|
|
|
|
|
|
PR bootstrap/88450
|
|
|
|
|
|
* function.c (assign_stack_local_1): Revert the 2018-11-21 changes.
|
|
|
|
|
|
(assign_parm_setup_block): Do the argument slot realignment here
|
|
|
|
|
|
instead.
|
|
|
|
|
|
|
2019-01-10 12:36:42 +01:00
|
|
|
|
2019-01-10 Stefan Agner <stefan@agner.ch>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88648
|
|
|
|
|
|
* config/arm/arm.c (arm_option_override_internal): Force
|
|
|
|
|
|
opts->x_inline_asm_unified to true only if TARGET_THUMB2_P.
|
|
|
|
|
|
|
2019-01-10 11:44:46 +01:00
|
|
|
|
2019-01-10 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR c/88568
|
|
|
|
|
|
* attribs.c (handle_dll_attribute): Clear TREE_STATIC after setting
|
|
|
|
|
|
DECL_EXTERNAL.
|
|
|
|
|
|
|
arm-builtins.c (enum arm_type_qualifiers): Add qualifier_lane_pair_index.
2019-01-10 Tamar Christina <tamar.christina@arm.com>
* config/arm/arm-builtins.c
(enum arm_type_qualifiers): Add qualifier_lane_pair_index.
(MAC_LANE_PAIR_QUALIFIERS): New.
(arm_expand_builtin_args): Use it.
(arm_expand_builtin_1): Likewise.
* config/arm/arm-protos.h (neon_vcmla_lane_prepare_operands): New.
* config/arm/arm.c (neon_vcmla_lane_prepare_operands): New.
* config/arm/arm-c.c (arm_cpu_builtins): Add __ARM_FEATURE_COMPLEX.
* config/arm/arm_neon.h:
(vcadd_rot90_f16): New.
(vcaddq_rot90_f16): New.
(vcadd_rot270_f16): New.
(vcaddq_rot270_f16): New.
(vcmla_f16): New.
(vcmlaq_f16): New.
(vcmla_lane_f16): New.
(vcmla_laneq_f16): New.
(vcmlaq_lane_f16): New.
(vcmlaq_laneq_f16): New.
(vcmla_rot90_f16): New.
(vcmlaq_rot90_f16): New.
(vcmla_rot90_lane_f16): New.
(vcmla_rot90_laneq_f16): New.
(vcmlaq_rot90_lane_f16): New.
(vcmlaq_rot90_laneq_f16): New.
(vcmla_rot180_f16): New.
(vcmlaq_rot180_f16): New.
(vcmla_rot180_lane_f16): New.
(vcmla_rot180_laneq_f16): New.
(vcmlaq_rot180_lane_f16): New.
(vcmlaq_rot180_laneq_f16): New.
(vcmla_rot270_f16): New.
(vcmlaq_rot270_f16): New.
(vcmla_rot270_lane_f16): New.
(vcmla_rot270_laneq_f16): New.
(vcmlaq_rot270_lane_f16): New.
(vcmlaq_rot270_laneq_f16): New.
(vcadd_rot90_f32): New.
(vcaddq_rot90_f32): New.
(vcadd_rot270_f32): New.
(vcaddq_rot270_f32): New.
(vcmla_f32): New.
(vcmlaq_f32): New.
(vcmla_lane_f32): New.
(vcmla_laneq_f32): New.
(vcmlaq_lane_f32): New.
(vcmlaq_laneq_f32): New.
(vcmla_rot90_f32): New.
(vcmlaq_rot90_f32): New.
(vcmla_rot90_lane_f32): New.
(vcmla_rot90_laneq_f32): New.
(vcmlaq_rot90_lane_f32): New.
(vcmlaq_rot90_laneq_f32): New.
(vcmla_rot180_f32): New.
(vcmlaq_rot180_f32): New.
(vcmla_rot180_lane_f32): New.
(vcmla_rot180_laneq_f32): New.
(vcmlaq_rot180_lane_f32): New.
(vcmlaq_rot180_laneq_f32): New.
(vcmla_rot270_f32): New.
(vcmlaq_rot270_f32): New.
(vcmla_rot270_lane_f32): New.
(vcmla_rot270_laneq_f32): New.
(vcmlaq_rot270_lane_f32): New.
(vcmlaq_rot270_laneq_f32): New.
* config/arm/arm_neon_builtins.def (vcadd90, vcadd270, vcmla0, vcmla90,
vcmla180, vcmla270, vcmla_lane0, vcmla_lane90, vcmla_lane180, vcmla_lane270,
vcmla_laneq0, vcmla_laneq90, vcmla_laneq180, vcmla_laneq270,
vcmlaq_lane0, vcmlaq_lane90, vcmlaq_lane180, vcmlaq_lane270): New.
* config/arm/neon.md (neon_vcmla_lane<rot><mode>,
neon_vcmla_laneq<rot><mode>, neon_vcmlaq_lane<rot><mode>): New.
* config/arm/arm.c (arm_arch8_3, arm_arch8_4): New.
* config/arm/arm.h (TARGET_COMPLEX, arm_arch8_3, arm_arch8_4): New.
(arm_option_reconfigure_globals): Use them.
* config/arm/iterators.md (VDF, VQ_HSF): New.
(VCADD, VCMLA): New.
(VF_constraint, rot, rotsplit1, rotsplit2): Add V4HF and V8HF.
* config/arm/neon.md (neon_vcadd<rot><mode>, neon_vcmla<rot><mode>): New.
* config/arm/unspecs.md (UNSPEC_VCADD90, UNSPEC_VCADD270,
UNSPEC_VCMLA, UNSPEC_VCMLA90, UNSPEC_VCMLA180, UNSPEC_VCMLA270): New.
gcc/testsuite/ChangeLog:
2019-01-10 Tamar Christina <tamar.christina@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/vector-complex.c: Add AArch32 regexpr.
* gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c: Likewise.
From-SVN: r267796
2019-01-10 04:34:06 +01:00
|
|
|
|
2019-01-10 Tamar Christina <tamar.christina@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/arm/arm-builtins.c
|
|
|
|
|
|
(enum arm_type_qualifiers): Add qualifier_lane_pair_index.
|
|
|
|
|
|
(MAC_LANE_PAIR_QUALIFIERS): New.
|
|
|
|
|
|
(arm_expand_builtin_args): Use it.
|
|
|
|
|
|
(arm_expand_builtin_1): Likewise.
|
|
|
|
|
|
* config/arm/arm-protos.h (neon_vcmla_lane_prepare_operands): New.
|
|
|
|
|
|
* config/arm/arm.c (neon_vcmla_lane_prepare_operands): New.
|
|
|
|
|
|
* config/arm/arm-c.c (arm_cpu_builtins): Add __ARM_FEATURE_COMPLEX.
|
|
|
|
|
|
* config/arm/arm_neon.h:
|
|
|
|
|
|
(vcadd_rot90_f16): New.
|
|
|
|
|
|
(vcaddq_rot90_f16): New.
|
|
|
|
|
|
(vcadd_rot270_f16): New.
|
|
|
|
|
|
(vcaddq_rot270_f16): New.
|
|
|
|
|
|
(vcmla_f16): New.
|
|
|
|
|
|
(vcmlaq_f16): New.
|
|
|
|
|
|
(vcmla_lane_f16): New.
|
|
|
|
|
|
(vcmla_laneq_f16): New.
|
|
|
|
|
|
(vcmlaq_lane_f16): New.
|
|
|
|
|
|
(vcmlaq_laneq_f16): New.
|
|
|
|
|
|
(vcmla_rot90_f16): New.
|
|
|
|
|
|
(vcmlaq_rot90_f16): New.
|
|
|
|
|
|
(vcmla_rot90_lane_f16): New.
|
|
|
|
|
|
(vcmla_rot90_laneq_f16): New.
|
|
|
|
|
|
(vcmlaq_rot90_lane_f16): New.
|
|
|
|
|
|
(vcmlaq_rot90_laneq_f16): New.
|
|
|
|
|
|
(vcmla_rot180_f16): New.
|
|
|
|
|
|
(vcmlaq_rot180_f16): New.
|
|
|
|
|
|
(vcmla_rot180_lane_f16): New.
|
|
|
|
|
|
(vcmla_rot180_laneq_f16): New.
|
|
|
|
|
|
(vcmlaq_rot180_lane_f16): New.
|
|
|
|
|
|
(vcmlaq_rot180_laneq_f16): New.
|
|
|
|
|
|
(vcmla_rot270_f16): New.
|
|
|
|
|
|
(vcmlaq_rot270_f16): New.
|
|
|
|
|
|
(vcmla_rot270_lane_f16): New.
|
|
|
|
|
|
(vcmla_rot270_laneq_f16): New.
|
|
|
|
|
|
(vcmlaq_rot270_lane_f16): New.
|
|
|
|
|
|
(vcmlaq_rot270_laneq_f16): New.
|
|
|
|
|
|
(vcadd_rot90_f32): New.
|
|
|
|
|
|
(vcaddq_rot90_f32): New.
|
|
|
|
|
|
(vcadd_rot270_f32): New.
|
|
|
|
|
|
(vcaddq_rot270_f32): New.
|
|
|
|
|
|
(vcmla_f32): New.
|
|
|
|
|
|
(vcmlaq_f32): New.
|
|
|
|
|
|
(vcmla_lane_f32): New.
|
|
|
|
|
|
(vcmla_laneq_f32): New.
|
|
|
|
|
|
(vcmlaq_lane_f32): New.
|
|
|
|
|
|
(vcmlaq_laneq_f32): New.
|
|
|
|
|
|
(vcmla_rot90_f32): New.
|
|
|
|
|
|
(vcmlaq_rot90_f32): New.
|
|
|
|
|
|
(vcmla_rot90_lane_f32): New.
|
|
|
|
|
|
(vcmla_rot90_laneq_f32): New.
|
|
|
|
|
|
(vcmlaq_rot90_lane_f32): New.
|
|
|
|
|
|
(vcmlaq_rot90_laneq_f32): New.
|
|
|
|
|
|
(vcmla_rot180_f32): New.
|
|
|
|
|
|
(vcmlaq_rot180_f32): New.
|
|
|
|
|
|
(vcmla_rot180_lane_f32): New.
|
|
|
|
|
|
(vcmla_rot180_laneq_f32): New.
|
|
|
|
|
|
(vcmlaq_rot180_lane_f32): New.
|
|
|
|
|
|
(vcmlaq_rot180_laneq_f32): New.
|
|
|
|
|
|
(vcmla_rot270_f32): New.
|
|
|
|
|
|
(vcmlaq_rot270_f32): New.
|
|
|
|
|
|
(vcmla_rot270_lane_f32): New.
|
|
|
|
|
|
(vcmla_rot270_laneq_f32): New.
|
|
|
|
|
|
(vcmlaq_rot270_lane_f32): New.
|
|
|
|
|
|
(vcmlaq_rot270_laneq_f32): New.
|
|
|
|
|
|
* config/arm/arm_neon_builtins.def (vcadd90, vcadd270, vcmla0, vcmla90,
|
|
|
|
|
|
vcmla180, vcmla270, vcmla_lane0, vcmla_lane90, vcmla_lane180, vcmla_lane270,
|
|
|
|
|
|
vcmla_laneq0, vcmla_laneq90, vcmla_laneq180, vcmla_laneq270,
|
|
|
|
|
|
vcmlaq_lane0, vcmlaq_lane90, vcmlaq_lane180, vcmlaq_lane270): New.
|
|
|
|
|
|
* config/arm/neon.md (neon_vcmla_lane<rot><mode>,
|
|
|
|
|
|
neon_vcmla_laneq<rot><mode>, neon_vcmlaq_lane<rot><mode>): New.
|
|
|
|
|
|
* config/arm/arm.c (arm_arch8_3, arm_arch8_4): New.
|
|
|
|
|
|
* config/arm/arm.h (TARGET_COMPLEX, arm_arch8_3, arm_arch8_4): New.
|
|
|
|
|
|
(arm_option_reconfigure_globals): Use them.
|
|
|
|
|
|
* config/arm/iterators.md (VDF, VQ_HSF): New.
|
|
|
|
|
|
(VCADD, VCMLA): New.
|
|
|
|
|
|
(VF_constraint, rot, rotsplit1, rotsplit2): Add V4HF and V8HF.
|
|
|
|
|
|
* config/arm/neon.md (neon_vcadd<rot><mode>, neon_vcmla<rot><mode>): New.
|
|
|
|
|
|
* config/arm/unspecs.md (UNSPEC_VCADD90, UNSPEC_VCADD270,
|
|
|
|
|
|
UNSPEC_VCMLA, UNSPEC_VCMLA90, UNSPEC_VCMLA180, UNSPEC_VCMLA270): New.
|
|
|
|
|
|
|
aarch64-builtins.c (enum aarch64_type_qualifiers): Add qualifier_lane_pair_index.
gcc/ChangeLog:
2019-01-10 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers): Add qualifier_lane_pair_index.
(emit-rtl.h): Include.
(TYPES_QUADOP_LANE_PAIR): New.
(aarch64_simd_expand_args): Use it.
(aarch64_simd_expand_builtin): Likewise.
(AARCH64_SIMD_FCMLA_LANEQ_BUILTINS, aarch64_fcmla_laneq_builtin_datum): New.
(FCMLA_LANEQ_BUILTIN, AARCH64_SIMD_FCMLA_LANEQ_BUILTIN_BASE,
AARCH64_SIMD_FCMLA_LANEQ_BUILTINS, aarch64_fcmla_lane_builtin_data,
aarch64_init_fcmla_laneq_builtins, aarch64_expand_fcmla_builtin): New.
(aarch64_init_builtins): Add aarch64_init_fcmla_laneq_builtins.
(aarch64_expand_buildin): Add AARCH64_SIMD_BUILTIN_FCMLA_LANEQ0_V2SF,
AARCH64_SIMD_BUILTIN_FCMLA_LANEQ90_V2SF, AARCH64_SIMD_BUILTIN_FCMLA_LANEQ180_V2SF,
AARCH64_SIMD_BUILTIN_FCMLA_LANEQ2700_V2SF, AARCH64_SIMD_BUILTIN_FCMLA_LANEQ0_V4HF,
AARCH64_SIMD_BUILTIN_FCMLA_LANEQ90_V4HF, AARCH64_SIMD_BUILTIN_FCMLA_LANEQ180_V4HF,
AARCH64_SIMD_BUILTIN_FCMLA_LANEQ270_V4HF.
* config/aarch64/iterators.md (FCMLA_maybe_lane): New.
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add __ARM_FEATURE_COMPLEX.
* config/aarch64/aarch64-simd-builtins.def (fcadd90, fcadd270, fcmla0, fcmla90,
fcmla180, fcmla270, fcmla_lane0, fcmla_lane90, fcmla_lane180, fcmla_lane270,
fcmla_laneq0, fcmla_laneq90, fcmla_laneq180, fcmla_laneq270,
fcmlaq_lane0, fcmlaq_lane90, fcmlaq_lane180, fcmlaq_lane270): New.
* config/aarch64/aarch64-simd.md (aarch64_fcmla_lane<rot><mode>,
aarch64_fcmla_laneq<rot>v4hf, aarch64_fcmlaq_lane<rot><mode>,aarch64_fcadd<rot><mode>,
aarch64_fcmla<rot><mode>): New.
* config/aarch64/arm_neon.h:
(vcadd_rot90_f16): New.
(vcaddq_rot90_f16): New.
(vcadd_rot270_f16): New.
(vcaddq_rot270_f16): New.
(vcmla_f16): New.
(vcmlaq_f16): New.
(vcmla_lane_f16): New.
(vcmla_laneq_f16): New.
(vcmlaq_lane_f16): New.
(vcmlaq_rot90_lane_f16): New.
(vcmla_rot90_laneq_f16): New.
(vcmla_rot90_lane_f16): New.
(vcmlaq_rot90_f16): New.
(vcmla_rot90_f16): New.
(vcmlaq_laneq_f16): New.
(vcmla_rot180_laneq_f16): New.
(vcmla_rot180_lane_f16): New.
(vcmlaq_rot180_f16): New.
(vcmla_rot180_f16): New.
(vcmlaq_rot90_laneq_f16): New.
(vcmlaq_rot270_laneq_f16): New.
(vcmlaq_rot270_lane_f16): New.
(vcmla_rot270_laneq_f16): New.
(vcmlaq_rot270_f16): New.
(vcmla_rot270_f16): New.
(vcmlaq_rot180_laneq_f16): New.
(vcmlaq_rot180_lane_f16): New.
(vcmla_rot270_lane_f16): New.
(vcadd_rot90_f32): New.
(vcaddq_rot90_f32): New.
(vcaddq_rot90_f64): New.
(vcadd_rot270_f32): New.
(vcaddq_rot270_f32): New.
(vcaddq_rot270_f64): New.
(vcmla_f32): New.
(vcmlaq_f32): New.
(vcmlaq_f64): New.
(vcmla_lane_f32): New.
(vcmla_laneq_f32): New.
(vcmlaq_lane_f32): New.
(vcmlaq_laneq_f32): New.
(vcmla_rot90_f32): New.
(vcmlaq_rot90_f32): New.
(vcmlaq_rot90_f64): New.
(vcmla_rot90_lane_f32): New.
(vcmla_rot90_laneq_f32): New.
(vcmlaq_rot90_lane_f32): New.
(vcmlaq_rot90_laneq_f32): New.
(vcmla_rot180_f32): New.
(vcmlaq_rot180_f32): New.
(vcmlaq_rot180_f64): New.
(vcmla_rot180_lane_f32): New.
(vcmla_rot180_laneq_f32): New.
(vcmlaq_rot180_lane_f32): New.
(vcmlaq_rot180_laneq_f32): New.
(vcmla_rot270_f32): New.
(vcmlaq_rot270_f32): New.
(vcmlaq_rot270_f64): New.
(vcmla_rot270_lane_f32): New.
(vcmla_rot270_laneq_f32): New.
(vcmlaq_rot270_lane_f32): New.
(vcmlaq_rot270_laneq_f32): New.
* config/aarch64/aarch64.h (TARGET_COMPLEX): New.
* config/aarch64/iterators.md (UNSPEC_FCADD90, UNSPEC_FCADD270,
UNSPEC_FCMLA, UNSPEC_FCMLA90, UNSPEC_FCMLA180, UNSPEC_FCMLA270): New.
(FCADD, FCMLA): New.
(rot): New.
* config/arm/types.md (neon_fcadd, neon_fcmla): New.
gcc/testsuite/ChangeLog:
2019-01-10 Tamar Christina <tamar.christina@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/vector-complex.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c: New test.
From-SVN: r267795
2019-01-10 04:30:59 +01:00
|
|
|
|
2019-01-10 Tamar Christina <tamar.christina@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers): Add qualifier_lane_pair_index.
|
|
|
|
|
|
(emit-rtl.h): Include.
|
|
|
|
|
|
(TYPES_QUADOP_LANE_PAIR): New.
|
|
|
|
|
|
(aarch64_simd_expand_args): Use it.
|
|
|
|
|
|
(aarch64_simd_expand_builtin): Likewise.
|
|
|
|
|
|
(AARCH64_SIMD_FCMLA_LANEQ_BUILTINS, aarch64_fcmla_laneq_builtin_datum): New.
|
|
|
|
|
|
(FCMLA_LANEQ_BUILTIN, AARCH64_SIMD_FCMLA_LANEQ_BUILTIN_BASE,
|
|
|
|
|
|
AARCH64_SIMD_FCMLA_LANEQ_BUILTINS, aarch64_fcmla_lane_builtin_data,
|
|
|
|
|
|
aarch64_init_fcmla_laneq_builtins, aarch64_expand_fcmla_builtin): New.
|
|
|
|
|
|
(aarch64_init_builtins): Add aarch64_init_fcmla_laneq_builtins.
|
|
|
|
|
|
(aarch64_expand_buildin): Add AARCH64_SIMD_BUILTIN_FCMLA_LANEQ0_V2SF,
|
|
|
|
|
|
AARCH64_SIMD_BUILTIN_FCMLA_LANEQ90_V2SF, AARCH64_SIMD_BUILTIN_FCMLA_LANEQ180_V2SF,
|
|
|
|
|
|
AARCH64_SIMD_BUILTIN_FCMLA_LANEQ2700_V2SF, AARCH64_SIMD_BUILTIN_FCMLA_LANEQ0_V4HF,
|
|
|
|
|
|
AARCH64_SIMD_BUILTIN_FCMLA_LANEQ90_V4HF, AARCH64_SIMD_BUILTIN_FCMLA_LANEQ180_V4HF,
|
|
|
|
|
|
AARCH64_SIMD_BUILTIN_FCMLA_LANEQ270_V4HF.
|
|
|
|
|
|
* config/aarch64/iterators.md (FCMLA_maybe_lane): New.
|
|
|
|
|
|
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add __ARM_FEATURE_COMPLEX.
|
|
|
|
|
|
* config/aarch64/aarch64-simd-builtins.def (fcadd90, fcadd270, fcmla0, fcmla90,
|
|
|
|
|
|
fcmla180, fcmla270, fcmla_lane0, fcmla_lane90, fcmla_lane180, fcmla_lane270,
|
|
|
|
|
|
fcmla_laneq0, fcmla_laneq90, fcmla_laneq180, fcmla_laneq270,
|
|
|
|
|
|
fcmlaq_lane0, fcmlaq_lane90, fcmlaq_lane180, fcmlaq_lane270): New.
|
|
|
|
|
|
* config/aarch64/aarch64-simd.md (aarch64_fcmla_lane<rot><mode>,
|
|
|
|
|
|
aarch64_fcmla_laneq<rot>v4hf, aarch64_fcmlaq_lane<rot><mode>,aarch64_fcadd<rot><mode>,
|
|
|
|
|
|
aarch64_fcmla<rot><mode>): New.
|
|
|
|
|
|
* config/aarch64/arm_neon.h:
|
|
|
|
|
|
(vcadd_rot90_f16): New.
|
|
|
|
|
|
(vcaddq_rot90_f16): New.
|
|
|
|
|
|
(vcadd_rot270_f16): New.
|
|
|
|
|
|
(vcaddq_rot270_f16): New.
|
|
|
|
|
|
(vcmla_f16): New.
|
|
|
|
|
|
(vcmlaq_f16): New.
|
|
|
|
|
|
(vcmla_lane_f16): New.
|
|
|
|
|
|
(vcmla_laneq_f16): New.
|
|
|
|
|
|
(vcmlaq_lane_f16): New.
|
|
|
|
|
|
(vcmlaq_rot90_lane_f16): New.
|
|
|
|
|
|
(vcmla_rot90_laneq_f16): New.
|
|
|
|
|
|
(vcmla_rot90_lane_f16): New.
|
|
|
|
|
|
(vcmlaq_rot90_f16): New.
|
|
|
|
|
|
(vcmla_rot90_f16): New.
|
|
|
|
|
|
(vcmlaq_laneq_f16): New.
|
|
|
|
|
|
(vcmla_rot180_laneq_f16): New.
|
|
|
|
|
|
(vcmla_rot180_lane_f16): New.
|
|
|
|
|
|
(vcmlaq_rot180_f16): New.
|
|
|
|
|
|
(vcmla_rot180_f16): New.
|
|
|
|
|
|
(vcmlaq_rot90_laneq_f16): New.
|
|
|
|
|
|
(vcmlaq_rot270_laneq_f16): New.
|
|
|
|
|
|
(vcmlaq_rot270_lane_f16): New.
|
|
|
|
|
|
(vcmla_rot270_laneq_f16): New.
|
|
|
|
|
|
(vcmlaq_rot270_f16): New.
|
|
|
|
|
|
(vcmla_rot270_f16): New.
|
|
|
|
|
|
(vcmlaq_rot180_laneq_f16): New.
|
|
|
|
|
|
(vcmlaq_rot180_lane_f16): New.
|
|
|
|
|
|
(vcmla_rot270_lane_f16): New.
|
|
|
|
|
|
(vcadd_rot90_f32): New.
|
|
|
|
|
|
(vcaddq_rot90_f32): New.
|
|
|
|
|
|
(vcaddq_rot90_f64): New.
|
|
|
|
|
|
(vcadd_rot270_f32): New.
|
|
|
|
|
|
(vcaddq_rot270_f32): New.
|
|
|
|
|
|
(vcaddq_rot270_f64): New.
|
|
|
|
|
|
(vcmla_f32): New.
|
|
|
|
|
|
(vcmlaq_f32): New.
|
|
|
|
|
|
(vcmlaq_f64): New.
|
|
|
|
|
|
(vcmla_lane_f32): New.
|
|
|
|
|
|
(vcmla_laneq_f32): New.
|
|
|
|
|
|
(vcmlaq_lane_f32): New.
|
|
|
|
|
|
(vcmlaq_laneq_f32): New.
|
|
|
|
|
|
(vcmla_rot90_f32): New.
|
|
|
|
|
|
(vcmlaq_rot90_f32): New.
|
|
|
|
|
|
(vcmlaq_rot90_f64): New.
|
|
|
|
|
|
(vcmla_rot90_lane_f32): New.
|
|
|
|
|
|
(vcmla_rot90_laneq_f32): New.
|
|
|
|
|
|
(vcmlaq_rot90_lane_f32): New.
|
|
|
|
|
|
(vcmlaq_rot90_laneq_f32): New.
|
|
|
|
|
|
(vcmla_rot180_f32): New.
|
|
|
|
|
|
(vcmlaq_rot180_f32): New.
|
|
|
|
|
|
(vcmlaq_rot180_f64): New.
|
|
|
|
|
|
(vcmla_rot180_lane_f32): New.
|
|
|
|
|
|
(vcmla_rot180_laneq_f32): New.
|
|
|
|
|
|
(vcmlaq_rot180_lane_f32): New.
|
|
|
|
|
|
(vcmlaq_rot180_laneq_f32): New.
|
|
|
|
|
|
(vcmla_rot270_f32): New.
|
|
|
|
|
|
(vcmlaq_rot270_f32): New.
|
|
|
|
|
|
(vcmlaq_rot270_f64): New.
|
|
|
|
|
|
(vcmla_rot270_lane_f32): New.
|
|
|
|
|
|
(vcmla_rot270_laneq_f32): New.
|
|
|
|
|
|
(vcmlaq_rot270_lane_f32): New.
|
|
|
|
|
|
(vcmlaq_rot270_laneq_f32): New.
|
|
|
|
|
|
* config/aarch64/aarch64.h (TARGET_COMPLEX): New.
|
|
|
|
|
|
* config/aarch64/iterators.md (UNSPEC_FCADD90, UNSPEC_FCADD270,
|
|
|
|
|
|
UNSPEC_FCMLA, UNSPEC_FCMLA90, UNSPEC_FCMLA180, UNSPEC_FCMLA270): New.
|
|
|
|
|
|
(FCADD, FCMLA): New.
|
|
|
|
|
|
(rot): New.
|
|
|
|
|
|
* config/arm/types.md (neon_fcadd, neon_fcmla): New.
|
|
|
|
|
|
|
2019-01-09 22:44:56 +01:00
|
|
|
|
2019-01-09 Sandra Loosemore <sandra@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR other/16615
|
|
|
|
|
|
|
|
|
|
|
|
* config/pa/pa.c: Change "can not" to "cannot".
|
|
|
|
|
|
* gimple-ssa-evrp-analyze.c: Likewise.
|
|
|
|
|
|
* ipa-icf.c: Likewise.
|
|
|
|
|
|
* ipa-polymorphic-call.c: Likewise.
|
|
|
|
|
|
* ipa-pure-const.c: Likewise.
|
|
|
|
|
|
* lra-constraints.c: Likewise.
|
|
|
|
|
|
* lra-remat.c: Likewise.
|
|
|
|
|
|
* reload1.c: Likewise.
|
|
|
|
|
|
* reorg.c: Likewise.
|
|
|
|
|
|
* tree-ssa-uninit.c: Likewise.
|
|
|
|
|
|
|
2019-01-09 22:37:45 +01:00
|
|
|
|
2019-01-09 Sandra Loosemore <sandra@codesourcery.com>
|
|
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PR other/16615
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* Makefile.in: Mechanically replace "can not" with "cannot".
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* alias.c: Likewise.
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* builtins.c: Likewise.
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* calls.c: Likewise.
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* cgraph.c: Likewise.
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* cgraph.h: Likewise.
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* cgraphclones.c: Likewise.
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* cgraphunit.c: Likewise.
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* combine-stack-adj.c: Likewise.
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* combine.c: Likewise.
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* common/config/i386/i386-common.c: Likewise.
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* config/aarch64/aarch64.c: Likewise.
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* config/alpha/sync.md: Likewise.
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* config/arc/arc.c: Likewise.
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* config/arc/predicates.md: Likewise.
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* config/arm/arm-c.c: Likewise.
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* config/arm/arm.c: Likewise.
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* config/arm/arm.h: Likewise.
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* config/arm/arm.md: Likewise.
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* config/arm/cortex-r4f.md: Likewise.
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* config/csky/csky.c: Likewise.
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* config/csky/csky.h: Likewise.
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* config/darwin-f.c: Likewise.
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* config/epiphany/epiphany.md: Likewise.
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* config/i386/i386.c: Likewise.
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* config/i386/sol2.h: Likewise.
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* config/m68k/m68k.c: Likewise.
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* config/mcore/mcore.h: Likewise.
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* config/microblaze/microblaze.md: Likewise.
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* config/mips/20kc.md: Likewise.
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* config/mips/sb1.md: Likewise.
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* config/nds32/nds32.c: Likewise.
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* config/nds32/predicates.md: Likewise.
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* config/pa/pa.c: Likewise.
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* config/rs6000/e300c2c3.md: Likewise.
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* config/rs6000/rs6000.c: Likewise.
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* config/s390/s390.h: Likewise.
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* config/sh/sh.c: Likewise.
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* config/sh/sh.md: Likewise.
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* config/spu/vmx2spu.h: Likewise.
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* cprop.c: Likewise.
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* dbxout.c: Likewise.
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* df-scan.c: Likewise.
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* doc/cfg.texi: Likewise.
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* doc/extend.texi: Likewise.
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* doc/fragments.texi: Likewise.
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* doc/gty.texi: Likewise.
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* doc/invoke.texi: Likewise.
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* doc/lto.texi: Likewise.
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* doc/md.texi: Likewise.
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* doc/objc.texi: Likewise.
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* doc/rtl.texi: Likewise.
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* doc/tm.texi: Likewise.
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* dse.c: Likewise.
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* emit-rtl.c: Likewise.
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* emit-rtl.h: Likewise.
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* except.c: Likewise.
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* expmed.c: Likewise.
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* expr.c: Likewise.
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* fold-const.c: Likewise.
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* genautomata.c: Likewise.
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* gimple-fold.c: Likewise.
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* hard-reg-set.h: Likewise.
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* ifcvt.c: Likewise.
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* ipa-comdats.c: Likewise.
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* ipa-cp.c: Likewise.
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* ipa-devirt.c: Likewise.
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* ipa-fnsummary.c: Likewise.
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* ipa-icf.c: Likewise.
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* ipa-inline-transform.c: Likewise.
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* ipa-inline.c: Likewise.
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* ipa-polymorphic-call.c: Likewise.
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* ipa-profile.c: Likewise.
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* ipa-prop.c: Likewise.
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* ipa-pure-const.c: Likewise.
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* ipa-reference.c: Likewise.
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* ipa-split.c: Likewise.
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* ipa-visibility.c: Likewise.
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* ipa.c: Likewise.
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* ira-build.c: Likewise.
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* ira-color.c: Likewise.
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* ira-conflicts.c: Likewise.
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* ira-costs.c: Likewise.
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* ira-int.h: Likewise.
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* ira-lives.c: Likewise.
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* ira.c: Likewise.
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* ira.h: Likewise.
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* loop-invariant.c: Likewise.
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* loop-unroll.c: Likewise.
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* lower-subreg.c: Likewise.
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* lra-assigns.c: Likewise.
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* lra-constraints.c: Likewise.
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* lra-eliminations.c: Likewise.
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* lra-lives.c: Likewise.
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* lra-remat.c: Likewise.
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* lra-spills.c: Likewise.
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* lra.c: Likewise.
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* lto-cgraph.c: Likewise.
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* lto-streamer-out.c: Likewise.
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* postreload-gcse.c: Likewise.
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* predict.c: Likewise.
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* profile-count.h: Likewise.
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* profile.c: Likewise.
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* recog.c: Likewise.
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* ree.c: Likewise.
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* reload.c: Likewise.
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* reload1.c: Likewise.
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* reorg.c: Likewise.
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* resource.c: Likewise.
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* rtl.def: Likewise.
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* rtl.h: Likewise.
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* rtlanal.c: Likewise.
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* sched-deps.c: Likewise.
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* sched-ebb.c: Likewise.
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* sched-rgn.c: Likewise.
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* sel-sched-ir.c: Likewise.
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* sel-sched.c: Likewise.
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* shrink-wrap.c: Likewise.
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* simplify-rtx.c: Likewise.
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* symtab.c: Likewise.
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* target.def: Likewise.
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* toplev.c: Likewise.
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* tree-call-cdce.c: Likewise.
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* tree-cfg.c: Likewise.
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* tree-complex.c: Likewise.
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* tree-core.h: Likewise.
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* tree-eh.c: Likewise.
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* tree-inline.c: Likewise.
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* tree-loop-distribution.c: Likewise.
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* tree-nrv.c: Likewise.
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* tree-profile.c: Likewise.
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* tree-sra.c: Likewise.
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* tree-ssa-alias.c: Likewise.
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* tree-ssa-dce.c: Likewise.
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* tree-ssa-dom.c: Likewise.
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* tree-ssa-forwprop.c: Likewise.
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* tree-ssa-loop-im.c: Likewise.
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* tree-ssa-loop-ivcanon.c: Likewise.
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* tree-ssa-loop-ivopts.c: Likewise.
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* tree-ssa-loop-niter.c: Likewise.
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* tree-ssa-phionlycprop.c: Likewise.
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* tree-ssa-phiopt.c: Likewise.
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* tree-ssa-propagate.c: Likewise.
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* tree-ssa-threadedge.c: Likewise.
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* tree-ssa-threadupdate.c: Likewise.
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* tree-ssa-uninit.c: Likewise.
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* tree-ssanames.c: Likewise.
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* tree-streamer-out.c: Likewise.
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* tree.c: Likewise.
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* tree.h: Likewise.
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* vr-values.c: Likewise.
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2019-01-09 20:16:02 +01:00
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2019-01-09 Uroš Bizjak <ubizjak@gmail.com>
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* config/i386/i386-protos.h (ix86_expand_xorsign): New prototype.
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(ix86_split_xorsign): Ditto.
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* config/i386/i386.c (ix86_expand_xorsign): New function.
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(ix86_split_xorsign): Ditto.
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* config/i386/i386.md (UNSPEC_XORSIGN): New unspec.
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(xorsign<mode>3): New expander.
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(xorsign<mode>3_1): New insn_and_split pattern.
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* config/i386/sse.md (xorsign<mode>3): New expander.
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2019-01-09 15:47:32 +01:00
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2019-01-09 Eric Botcazou <ebotcazou@adacore.com>
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* config/sparc/sparc.md (*tablejump_sp32): Merge into...
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(*tablejump_sp64): Likewise.
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(*tablejump<P:mode>): ...this.
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(*call_address_sp32): Merge into...
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(*call_address_sp64): Likewise.
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(*call_address<P:mode>): ...this.
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(*call_symbolic_sp32): Merge into...
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(*call_symbolic_sp64): Likewise.
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(*call_symbolic<P:mode>): ...this.
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(call_value): Remove constraint and add predicate.
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(*call_value_address_sp32): Merge into...
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(*call_value_address_sp64): Likewise.
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(*call_value_address<P:mode>): ...this.
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(*call_value_symbolic_sp32): Merge into...
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(*call_value_symbolic_sp64): Likewise.
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(*call_value_symbolic<P:mode>): ...this.
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(*sibcall_symbolic_sp32): Merge into...
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(*sibcall_symbolic_sp64): Likewise.
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(*sibcall_symbolic<P:mode>): ...this.
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(sibcall_value): Remove constraint and add predicate.
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(*sibcall_value_symbolic_sp32): Merge into...
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(*sibcall_value_symbolic_sp64): Likewise.
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(*sibcall_value_symbolic<P:mode>): ...this.
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(window_save): Minor tweak.
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(*branch_sp32): Merge into...
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(*branch_sp64): Likewise.
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(*branch<P:mode>): ...this.
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2019-01-09 15:34:20 +01:00
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2019-01-09 Eric Botcazou <ebotcazou@adacore.com>
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James Clarke <jrtc27@jrtc27.com>
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PR target/84010
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* config/sparc/sparc.c (sparc_legitimize_tls_address): Only use Pmode
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consistently in TLS address generation and adjust code to the renaming
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of patterns. Mark calls to __tls_get_addr as const.
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* config/sparc/sparc.md (tgd_hi22): Turn into...
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(tgd_hi22<P:mode>): ...this and use Pmode throughout.
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(tgd_lo10): Turn into...
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(tgd_lo10<P:mode>): ...this and use Pmode throughout.
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(tgd_add32): Merge into...
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(tgd_add64): Likewise.
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(tgd_add<P:mode>): ...this and use Pmode throughout.
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(tldm_hi22): Turn into...
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(tldm_hi22<P:mode>): ...this and use Pmode throughout.
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(tldm_lo10): Turn into...
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(tldm_lo10<P:mode>): ...this and use Pmode throughout.
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(tldm_add32): Merge into...
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(tldm_add64): Likewise.
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(tldm_add<P:mode>): ...this and use Pmode throughout.
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(tldm_call32): Merge into...
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(tldm_call64): Likewise.
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(tldm_call<P:mode>): ...this and use Pmode throughout.
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(tldo_hix22): Turn into...
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(tldo_hix22<P:mode>): ...this and use Pmode throughout.
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(tldo_lox10): Turn into...
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(tldo_lox10<P:mode>): ...this and use Pmode throughout.
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(tldo_add32): Merge into...
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(tldo_add64): Likewise.
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(tldo_add<P:mode>): ...this and use Pmode throughout.
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(tie_hi22): Turn into...
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(tie_hi22<P:mode>): ...this and use Pmode throughout.
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(tie_lo10): Turn into...
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(tie_lo10<P:mode>): ...this and use Pmode throughout.
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(tie_ld64): Use DImode throughout.
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(tie_add32): Merge into...
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(tie_add64): Likewise.
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(tie_add<P:mode>): ...this and use Pmode throughout.
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(tle_hix22_sp32): Merge into...
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(tle_hix22_sp64): Likewise.
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(tle_hix22<P:mode>): ...this and use Pmode throughout.
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(tle_lox22_sp32): Merge into...
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(tle_lox22_sp64): Likewise.
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(tle_lox22<P:mode>): ...this and use Pmode throughout.
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(*tldo_ldub_sp32): Merge into...
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(*tldo_ldub_sp64): Likewise.
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(*tldo_ldub<P:mode>): ...this and use Pmode throughout.
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(*tldo_ldub1_sp32): Merge into...
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(*tldo_ldub1_sp64): Likewise.
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(*tldo_ldub1<P:mode>): ...this and use Pmode throughout.
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(*tldo_ldub2_sp32): Merge into...
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(*tldo_ldub2_sp64): Likewise.
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(*tldo_ldub2<P:mode>): ...this and use Pmode throughout.
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(*tldo_ldsb1_sp32): Merge into...
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(*tldo_ldsb1_sp64): Likewise.
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(*tldo_ldsb1<P:mode>): ...this and use Pmode throughout.
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(*tldo_ldsb2_sp32): Merge into...
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|
|
(*tldo_ldsb2_sp64): Likewise.
|
|
|
|
|
|
(*tldo_ldsb2<P:mode>): ...this and use Pmode throughout.
|
|
|
|
|
|
(*tldo_ldub3_sp64): Use DImode throughout.
|
|
|
|
|
|
(*tldo_ldsb3_sp64): Likewise.
|
|
|
|
|
|
(*tldo_lduh_sp32): Merge into...
|
|
|
|
|
|
(*tldo_lduh_sp64): Likewise.
|
|
|
|
|
|
(*tldo_lduh<P:mode>): ...this and use Pmode throughout.
|
|
|
|
|
|
(*tldo_lduh1_sp32): Merge into...
|
|
|
|
|
|
(*tldo_lduh1_sp64): Likewise.
|
|
|
|
|
|
(*tldo_lduh1<P:mode>): ...this and use Pmode throughout.
|
|
|
|
|
|
(*tldo_ldsh1_sp32): Merge into...
|
|
|
|
|
|
(*tldo_ldsh1_sp64): Likewise.
|
|
|
|
|
|
(*tldo_ldsh1<P:mode>): ...this and use Pmode throughout.
|
|
|
|
|
|
(*tldo_lduh2_sp64): Use DImode throughout.
|
|
|
|
|
|
(*tldo_ldsh2_sp64): Likewise.
|
|
|
|
|
|
(*tldo_lduw_sp32): Merge into...
|
|
|
|
|
|
(*tldo_lduw_sp64): Likewise.
|
|
|
|
|
|
(*tldo_lduw<P:mode>): ...this and use Pmode throughout.
|
|
|
|
|
|
(*tldo_lduw1_sp64): Use DImode throughout.
|
|
|
|
|
|
(*tldo_ldsw1_sp64): Likewise.
|
|
|
|
|
|
(*tldo_ldx_sp64): Likewise.
|
|
|
|
|
|
(*tldo_stb_sp32): Merge into...
|
|
|
|
|
|
(*tldo_stb_sp64): Likewise.
|
|
|
|
|
|
(*tldo_stb<P:mode>): ...this and use Pmode throughout.
|
|
|
|
|
|
(*tldo_sth_sp32): Merge into...
|
|
|
|
|
|
(*tldo_sth_sp64): Likewise.
|
|
|
|
|
|
(*tldo_sth<P:mode>): ...this and use Pmode throughout.
|
|
|
|
|
|
(*tldo_stw_sp32): Merge into...
|
|
|
|
|
|
(*tldo_stw_sp64): Likewise.
|
|
|
|
|
|
(*tldo_stw<P:mode>): ...this and use Pmode throughout.
|
|
|
|
|
|
(*tldo_stx_sp64): Use DImode throughout.
|
|
|
|
|
|
|
2019-01-09 15:32:06 +01:00
|
|
|
|
2018-01-09 Sudakshina Das <sudi.das@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/aarch64/aarch64.c (aarch64_override_options): Add case to
|
|
|
|
|
|
check configure option to set BTI and Return Address Signing.
|
|
|
|
|
|
* configure.ac: Add --enable-standard-branch-protection and
|
|
|
|
|
|
--disable-standard-branch-protection.
|
|
|
|
|
|
* configure: Regenerated.
|
|
|
|
|
|
* doc/install.texi: Document the same.
|
|
|
|
|
|
|
[AArch64, 5/6] Enable BTI : Add new pass for BTI.
This patch is part of a series that enables ARMv8.5-A in GCC and
adds Branch Target Identification Mechanism.
This patch adds a new pass called "bti" which is triggered by the command
line argument -mbranch-protection whenever "bti" is turned on.
The pass iterates through the instructions and adds appropriated BTI
instructions based on the following:
* Add a new "BTI C" at the beginning of a function, unless its already
protected by a "PACIASP". We exempt the functions that are only called
directly.
* Add a new "BTI J" for every target of an indirect jump, jump table
targets, non-local goto targets or labels that might be referenced by
variables, constant pools, etc (NOTE_INSN_DELETED_LABEL).
Since we have already changed the use of indirect tail calls to only x16 and
x17, we do not have to use "BTI JC".
(check patch 3/6).
*** gcc/ChangeLog ***
2018-01-09 Sudakshina Das <sudi.das@arm.com>
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* config.gcc (aarch64*-*-*): Add aarch64-bti-insert.o.
* gcc/config/aarch64/aarch64.h: Update comment for TRAMPOLINE_SIZE.
* config/aarch64/aarch64.c (aarch64_asm_trampoline_template): Update
if bti is enabled.
* config/aarch64/aarch64-bti-insert.c: New file.
* config/aarch64/aarch64-passes.def (INSERT_PASS_BEFORE): Insert bti
pass.
* config/aarch64/aarch64-protos.h (make_pass_insert_bti): Declare the
new bti pass.
* config/aarch64/aarch64.md (unspecv): Add UNSPECV_BTI_NOARG,
UNSPECV_BTI_C, UNSPECV_BTI_J and UNSPECV_BTI_JC.
(bti_noarg, bti_j, bti_c, bti_jc): New define_insns.
* config/aarch64/t-aarch64: Add rule for aarch64-bti-insert.o.
*** gcc/testsuite/ChangeLog ***
2018-01-09 Sudakshina Das <sudi.das@arm.com>
* gcc.target/aarch64/bti-1.c: New test.
* gcc.target/aarch64/bti-2.c: New test.
* gcc.target/aarch64/bti-3.c: New test.
* lib/target-supports.exp
(check_effective_target_aarch64_bti_hw): Add new check for BTI hw.
Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
From-SVN: r267769
2019-01-09 15:21:22 +01:00
|
|
|
|
2018-01-09 Sudakshina Das <sudi.das@arm.com>
|
|
|
|
|
|
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config.gcc (aarch64*-*-*): Add aarch64-bti-insert.o.
|
2019-01-09 15:34:20 +01:00
|
|
|
|
* config/aarch64/aarch64.h: Update comment for TRAMPOLINE_SIZE.
|
[AArch64, 5/6] Enable BTI : Add new pass for BTI.
This patch is part of a series that enables ARMv8.5-A in GCC and
adds Branch Target Identification Mechanism.
This patch adds a new pass called "bti" which is triggered by the command
line argument -mbranch-protection whenever "bti" is turned on.
The pass iterates through the instructions and adds appropriated BTI
instructions based on the following:
* Add a new "BTI C" at the beginning of a function, unless its already
protected by a "PACIASP". We exempt the functions that are only called
directly.
* Add a new "BTI J" for every target of an indirect jump, jump table
targets, non-local goto targets or labels that might be referenced by
variables, constant pools, etc (NOTE_INSN_DELETED_LABEL).
Since we have already changed the use of indirect tail calls to only x16 and
x17, we do not have to use "BTI JC".
(check patch 3/6).
*** gcc/ChangeLog ***
2018-01-09 Sudakshina Das <sudi.das@arm.com>
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* config.gcc (aarch64*-*-*): Add aarch64-bti-insert.o.
* gcc/config/aarch64/aarch64.h: Update comment for TRAMPOLINE_SIZE.
* config/aarch64/aarch64.c (aarch64_asm_trampoline_template): Update
if bti is enabled.
* config/aarch64/aarch64-bti-insert.c: New file.
* config/aarch64/aarch64-passes.def (INSERT_PASS_BEFORE): Insert bti
pass.
* config/aarch64/aarch64-protos.h (make_pass_insert_bti): Declare the
new bti pass.
* config/aarch64/aarch64.md (unspecv): Add UNSPECV_BTI_NOARG,
UNSPECV_BTI_C, UNSPECV_BTI_J and UNSPECV_BTI_JC.
(bti_noarg, bti_j, bti_c, bti_jc): New define_insns.
* config/aarch64/t-aarch64: Add rule for aarch64-bti-insert.o.
*** gcc/testsuite/ChangeLog ***
2018-01-09 Sudakshina Das <sudi.das@arm.com>
* gcc.target/aarch64/bti-1.c: New test.
* gcc.target/aarch64/bti-2.c: New test.
* gcc.target/aarch64/bti-3.c: New test.
* lib/target-supports.exp
(check_effective_target_aarch64_bti_hw): Add new check for BTI hw.
Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
From-SVN: r267769
2019-01-09 15:21:22 +01:00
|
|
|
|
* config/aarch64/aarch64.c (aarch64_asm_trampoline_template): Update
|
|
|
|
|
|
if bti is enabled.
|
|
|
|
|
|
* config/aarch64/aarch64-bti-insert.c: New file.
|
|
|
|
|
|
* config/aarch64/aarch64-passes.def (INSERT_PASS_BEFORE): Insert bti
|
|
|
|
|
|
pass.
|
|
|
|
|
|
* config/aarch64/aarch64-protos.h (make_pass_insert_bti): Declare the
|
|
|
|
|
|
new bti pass.
|
|
|
|
|
|
* config/aarch64/aarch64.md (unspecv): Add UNSPECV_BTI_NOARG,
|
|
|
|
|
|
UNSPECV_BTI_C, UNSPECV_BTI_J and UNSPECV_BTI_JC.
|
|
|
|
|
|
(bti_noarg, bti_j, bti_c, bti_jc): New define_insns.
|
|
|
|
|
|
* config/aarch64/t-aarch64: Add rule for aarch64-bti-insert.o.
|
|
|
|
|
|
|
2019-01-09 15:14:28 +01:00
|
|
|
|
2018-01-09 Sudakshina Das <sudi.das@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/aarch64/aarch64-protos.h (aarch64_bti_enabled): Declare.
|
|
|
|
|
|
* config/aarch64/aarch64.c (aarch64_handle_no_branch_protection):
|
|
|
|
|
|
Disable bti for -mbranch-protection=none.
|
|
|
|
|
|
(aarch64_handle_standard_branch_protection): Enable bti for
|
|
|
|
|
|
-mbranch-protection=standard.
|
|
|
|
|
|
(aarch64_handle_bti_protection): Enable bti for "bti" in the string to
|
|
|
|
|
|
-mbranch-protection.
|
|
|
|
|
|
(aarch64_bti_enabled): Check if bti is enabled.
|
|
|
|
|
|
* config/aarch64/aarch64.opt: Declare target variable.
|
|
|
|
|
|
* doc/invoke.texi: Add bti to the -mbranch-protection documentation.
|
|
|
|
|
|
|
2019-01-09 15:10:58 +01:00
|
|
|
|
2018-01-09 Sudakshina Das <sudi.das@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/aarch64/aarch64.c (aarch64_expand_prologue): Use new
|
|
|
|
|
|
epilogue/prologue scratch registers EP0_REGNUM and EP1_REGNUM.
|
|
|
|
|
|
(aarch64_expand_epilogue): Likewise.
|
|
|
|
|
|
(aarch64_output_mi_thunk): Likewise
|
|
|
|
|
|
* config/aarch64/aarch64.h (REG_CLASS_CONTENTS): Change
|
|
|
|
|
|
TAILCALL_ADDR_REGS to x16 and x17.
|
|
|
|
|
|
* config/aarch64/aarch64.md: Define EP0_REGNUM and EP1_REGNUM.
|
|
|
|
|
|
|
[AArch64, 2/6] Add new arch command line feaures from ARMv8.5-A
This patch is part of a series that enables ARMv8.5-A in GCC and
adds Branch Target Identification Mechanism.
This patch add all the command line feature that are added by ARMv8.5.
Optional extensions to armv8.5-a:
+rng : Random number Generation Instructions.
+memtag : Memory Tagging Extension.
ARMv8.5-A features that are optional to older arch:
+sb : Speculation barrier instruction.
+ssbs: Speculative Store Bypass Safe instruction.
+predres: Execution and Data Prediction Restriction instructions.
All of the above only effect the assembler and have already gone in the
trunk of binutils.
*** gcc/ChangeLog ***
2018-01-09 Sudakshina Das <sudi.das@arm.com>
* config/aarch64/aarch64-option-extensions.def: Define
AARCH64_OPT_EXTENSION for memtag, rng, sb, ssbs and predres.
* gcc/config/aarch64/aarch64.h (AARCH64_FL_RNG): New.
(AARCH64_FL_MEMTAG, ARCH64_FL_SB, AARCH64_FL_SSBS): New.
(AARCH64_FL_PREDRES): New.
(AARCH64_FL_FOR_ARCH8_5): Add AARCH64_FL_SB, AARCH64_FL_SSBS and
AARCH64_FL_PREDRES by default.
* gcc/doc/invoke.texi: Document rng, memtag, sb, ssbs and predres.
From-SVN: r267766
2019-01-09 15:08:01 +01:00
|
|
|
|
2018-01-09 Sudakshina Das <sudi.das@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/aarch64/aarch64-option-extensions.def: Define
|
|
|
|
|
|
AARCH64_OPT_EXTENSION for memtag, rng, sb, ssbs and predres.
|
2019-01-29 22:09:41 +01:00
|
|
|
|
* config/aarch64/aarch64.h (AARCH64_FL_RNG): New.
|
[AArch64, 2/6] Add new arch command line feaures from ARMv8.5-A
This patch is part of a series that enables ARMv8.5-A in GCC and
adds Branch Target Identification Mechanism.
This patch add all the command line feature that are added by ARMv8.5.
Optional extensions to armv8.5-a:
+rng : Random number Generation Instructions.
+memtag : Memory Tagging Extension.
ARMv8.5-A features that are optional to older arch:
+sb : Speculation barrier instruction.
+ssbs: Speculative Store Bypass Safe instruction.
+predres: Execution and Data Prediction Restriction instructions.
All of the above only effect the assembler and have already gone in the
trunk of binutils.
*** gcc/ChangeLog ***
2018-01-09 Sudakshina Das <sudi.das@arm.com>
* config/aarch64/aarch64-option-extensions.def: Define
AARCH64_OPT_EXTENSION for memtag, rng, sb, ssbs and predres.
* gcc/config/aarch64/aarch64.h (AARCH64_FL_RNG): New.
(AARCH64_FL_MEMTAG, ARCH64_FL_SB, AARCH64_FL_SSBS): New.
(AARCH64_FL_PREDRES): New.
(AARCH64_FL_FOR_ARCH8_5): Add AARCH64_FL_SB, AARCH64_FL_SSBS and
AARCH64_FL_PREDRES by default.
* gcc/doc/invoke.texi: Document rng, memtag, sb, ssbs and predres.
From-SVN: r267766
2019-01-09 15:08:01 +01:00
|
|
|
|
(AARCH64_FL_MEMTAG, ARCH64_FL_SB, AARCH64_FL_SSBS): New.
|
|
|
|
|
|
(AARCH64_FL_PREDRES): New.
|
|
|
|
|
|
(AARCH64_FL_FOR_ARCH8_5): Add AARCH64_FL_SB, AARCH64_FL_SSBS and
|
|
|
|
|
|
AARCH64_FL_PREDRES by default.
|
2019-01-29 22:09:41 +01:00
|
|
|
|
* doc/invoke.texi: Document rng, memtag, sb, ssbs and predres.
|
[AArch64, 2/6] Add new arch command line feaures from ARMv8.5-A
This patch is part of a series that enables ARMv8.5-A in GCC and
adds Branch Target Identification Mechanism.
This patch add all the command line feature that are added by ARMv8.5.
Optional extensions to armv8.5-a:
+rng : Random number Generation Instructions.
+memtag : Memory Tagging Extension.
ARMv8.5-A features that are optional to older arch:
+sb : Speculation barrier instruction.
+ssbs: Speculative Store Bypass Safe instruction.
+predres: Execution and Data Prediction Restriction instructions.
All of the above only effect the assembler and have already gone in the
trunk of binutils.
*** gcc/ChangeLog ***
2018-01-09 Sudakshina Das <sudi.das@arm.com>
* config/aarch64/aarch64-option-extensions.def: Define
AARCH64_OPT_EXTENSION for memtag, rng, sb, ssbs and predres.
* gcc/config/aarch64/aarch64.h (AARCH64_FL_RNG): New.
(AARCH64_FL_MEMTAG, ARCH64_FL_SB, AARCH64_FL_SSBS): New.
(AARCH64_FL_PREDRES): New.
(AARCH64_FL_FOR_ARCH8_5): Add AARCH64_FL_SB, AARCH64_FL_SSBS and
AARCH64_FL_PREDRES by default.
* gcc/doc/invoke.texi: Document rng, memtag, sb, ssbs and predres.
From-SVN: r267766
2019-01-09 15:08:01 +01:00
|
|
|
|
|
2019-01-09 15:05:55 +01:00
|
|
|
|
2018-01-09 Sudakshina Das <sudi.das@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/aarch64/aarch64-arches.def: Define AARCH64_ARCH for
|
|
|
|
|
|
ARMv8.5-A.
|
2019-01-29 22:09:41 +01:00
|
|
|
|
* config/aarch64/aarch64.h (AARCH64_FL_V8_5): New.
|
2019-01-09 15:05:55 +01:00
|
|
|
|
(AARCH64_FL_FOR_ARCH8_5, AARCH64_ISA_V8_5): New.
|
2019-01-29 22:09:41 +01:00
|
|
|
|
* doc/invoke.texi: Document ARMv8.5-A.
|
2019-01-09 15:05:55 +01:00
|
|
|
|
|
2019-01-09 14:57:06 +01:00
|
|
|
|
2019-01-09 Alejandro Martinez <alejandro.martinezvicente@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/aarch64/aarch64-sve.md (copysign<mode>3): New define_expand.
|
|
|
|
|
|
(xorsign<mode>3): Likewise.
|
|
|
|
|
|
|
2019-01-09 11:24:43 +01:00
|
|
|
|
2019-01-09 Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR middle-end/88758
|
|
|
|
|
|
* tree.c (initializer_each_zero_or_onep) <case VECTOR_CST>: Use
|
|
|
|
|
|
vector_cst_elt instead of VECTOR_CST_ENCODED_ELT.
|
2019-01-09 11:16:10 +01:00
|
|
|
|
|
|
|
|
|
|
PR rtl-optimization/88331
|
|
|
|
|
|
* function.c (assign_stack_local_1): Don't set dynamic_align_addr if
|
|
|
|
|
|
not currently_expanding_to_rtl.
|
|
|
|
|
|
|
2019-01-09 09:25:14 +01:00
|
|
|
|
2019-01-09 Eric Botcazou <ebotcazou@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/invoke.texi (-Os): Remove trailing spaces.
|
|
|
|
|
|
(-finline-functions): Remove reference to -O2.
|
|
|
|
|
|
|
2019-01-08 22:35:38 +01:00
|
|
|
|
2019-01-08 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
2019-01-08 23:29:56 +01:00
|
|
|
|
PR rtl-optimization/79593
|
|
|
|
|
|
* config/i386/i386.md (reg = mem; mem = reg): New define_peephole2.
|
|
|
|
|
|
|
2019-01-08 22:35:38 +01:00
|
|
|
|
* config/rs6000/rs6000.c (rs6000_delegitimize_address): Delegitimize
|
|
|
|
|
|
UNSPEC_FUSION_GPR to its argument. Formatting fixes.
|
|
|
|
|
|
|
2019-01-08 20:09:52 +01:00
|
|
|
|
2019-01-08 Eric Botcazou <ebotcazou@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR bootstrap/88721
|
|
|
|
|
|
* config/sparc/sparc.c (function_arg_slotno): Set *PPREGNO & *PPADDING
|
|
|
|
|
|
to -1 on entry.
|
|
|
|
|
|
|
|
|
|
|
|
PR debug/88723
|
|
|
|
|
|
* config/sparc/sparc.c (sparc_delegitimize_address): Deal with naked
|
|
|
|
|
|
UNSPECs and UNSPEC_MOVE_GOTDATA specifically.
|
|
|
|
|
|
|
2019-01-08 18:40:18 +01:00
|
|
|
|
2019-01-08 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88717
|
|
|
|
|
|
* config/i386/i386.c (ix86_avx_u128_mode_exit): Call
|
|
|
|
|
|
ix86_avx_u128_mode_entry.
|
|
|
|
|
|
|
2019-01-08 15:45:28 +01:00
|
|
|
|
2019-01-08 Martin Liska <mliska@suse.cz>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/88753
|
|
|
|
|
|
* tree-switch-conversion.c (switch_conversion::build_one_array):
|
|
|
|
|
|
Come up with local variable constructor. Convert first to
|
|
|
|
|
|
type of constructor values.
|
|
|
|
|
|
|
2019-01-08 14:05:47 +01:00
|
|
|
|
2019-01-08 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/86554
|
|
|
|
|
|
* tree-ssa-sccvn.c (eliminate_dom_walker, rpo_elim,
|
|
|
|
|
|
rpo_avail): Move earlier.
|
|
|
|
|
|
(visit_nary_op): When value-numbering to expressions
|
|
|
|
|
|
with different overflow behavior make sure there's an
|
|
|
|
|
|
available expression on the path.
|
|
|
|
|
|
|
[PATCH 2/3][GCC][AARCH64] Add new -mbranch-protection option to combine pointer signing and BTI
gcc/ChangeLog:
2019-01-08 Sam Tebbs <sam.tebbs@arm.com>
* config/aarch64/aarch64.c (BRANCH_PROTECT_STR_MAX,
aarch64_parse_branch_protection,
struct aarch64_branch_protect_type,
aarch64_handle_no_branch_protection,
aarch64_handle_standard_branch_protection,
aarch64_validate_mbranch_protection,
aarch64_handle_pac_ret_protection,
aarch64_handle_attr_branch_protection,
accepted_branch_protection_string,
aarch64_pac_ret_subtypes,
aarch64_branch_protect_types,
aarch64_handle_pac_ret_leaf): Define.
(aarch64_override_options_after_change_1, aarch64_override_options):
Add check for accepted_branch_protection_string.
(aarch64_option_save): Save accepted_branch_protection_string.
(aarch64_option_restore): Save accepted_branch_protection_string.
* config/aarch64/aarch64.c (aarch64_attributes): Add branch-protection.
* config/aarch64/aarch64.opt: Add mbranch-protection. Deprecate
msign-return-address.
* doc/invoke.texi: Add mbranch-protection.
gcc/testsuite/Changelog:
2019-01-08 Sam Tebbs <sam.tebbs@arm.com>
* gcc.target/aarch64/(return_address_sign_1.c,
return_address_sign_2.c, return_address_sign_3.c (__attribute__)):
Change option to -mbranch-protection.
* gcc.target/aarch64/(branch-protection-option.c,
branch-protection-option-2.c, branch-protection-attr.c,
branch-protection-attr-2.c): New file.
From-SVN: r267717
2019-01-08 11:31:11 +01:00
|
|
|
|
2019-01-08 Sam Tebbs <sam.tebbs@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/aarch64/aarch64.c (BRANCH_PROTECT_STR_MAX,
|
|
|
|
|
|
aarch64_parse_branch_protection,
|
|
|
|
|
|
struct aarch64_branch_protect_type,
|
|
|
|
|
|
aarch64_handle_no_branch_protection,
|
|
|
|
|
|
aarch64_handle_standard_branch_protection,
|
|
|
|
|
|
aarch64_validate_mbranch_protection,
|
|
|
|
|
|
aarch64_handle_pac_ret_protection,
|
|
|
|
|
|
aarch64_handle_attr_branch_protection,
|
|
|
|
|
|
accepted_branch_protection_string,
|
|
|
|
|
|
aarch64_pac_ret_subtypes,
|
|
|
|
|
|
aarch64_branch_protect_types,
|
|
|
|
|
|
aarch64_handle_pac_ret_leaf): Define.
|
|
|
|
|
|
(aarch64_override_options_after_change_1, aarch64_override_options):
|
|
|
|
|
|
Add check for accepted_branch_protection_string.
|
|
|
|
|
|
(aarch64_option_save): Save accepted_branch_protection_string.
|
|
|
|
|
|
(aarch64_option_restore): Save accepted_branch_protection_string.
|
|
|
|
|
|
* config/aarch64/aarch64.c (aarch64_attributes): Add branch-protection.
|
|
|
|
|
|
* config/aarch64/aarch64.opt: Add mbranch-protection. Deprecate
|
|
|
|
|
|
msign-return-address.
|
|
|
|
|
|
* doc/invoke.texi: Add mbranch-protection.
|
|
|
|
|
|
|
genattrtab bit-rot, and if_then_else in values
This patch started off just by adding if_then_else support in
write_attr_value to be able to write a saner expression for powerpc
tls_gdld_nomark length. Then I noticed bit-rot in functions used to
calculate insn_default_length, insn_min_length, and length_unit_log
(which are used by the shorten_branches pass). These functions
don't handle a const_int length value and return an "unknown" status
that isn't used, or in the case of or_attr_value, doesn't need to be
used. min_attr_value also attempts to return INT_MAX for the
unhandled rtl case, but this can get lost in recursive calls. I fixed
that problem by returning INT_MIN instead, and translating that to
INT_MAX in the only caller of min_attr_value.
PR target/88614
* genattrtab.c (max_attr_value, min_attr_value, or_attr_value):
Delete "unknownp" parameter. Adjust callers. Handle
CONST_INT, PLUS, MINUS, and MULT.
(attr_value_aligned): Renamed from or_attr_value.
(min_attr_value): Return INT_MIN for unhandled rtl case..
(min_fn): ..and translate to INT_MAX here.
(write_length_unit_log): Modify to cope without "unknown".
(write_attr_value): Handle IF_THEN_ELSE.
From-SVN: r267666
2019-01-07 23:54:40 +01:00
|
|
|
|
2019-01-08 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88614
|
|
|
|
|
|
* genattrtab.c (max_attr_value, min_attr_value, or_attr_value):
|
|
|
|
|
|
Delete "unknownp" parameter. Adjust callers. Handle
|
|
|
|
|
|
CONST_INT, PLUS, MINUS, and MULT.
|
|
|
|
|
|
(attr_value_aligned): Renamed from or_attr_value.
|
|
|
|
|
|
(min_attr_value): Return INT_MIN for unhandled rtl case..
|
|
|
|
|
|
(min_fn): ..and translate to INT_MAX here.
|
|
|
|
|
|
(write_length_unit_log): Modify to cope without "unknown".
|
|
|
|
|
|
(write_attr_value): Handle IF_THEN_ELSE.
|
|
|
|
|
|
|
2019-01-07 19:53:44 +01:00
|
|
|
|
2019-01-07 Richard Sandiford <richard.sandiford@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* tree-vect-stmts.c (vectorizable_store): Don't use the dataref_offset
|
|
|
|
|
|
optimization for masked stores.
|
|
|
|
|
|
|
2019-01-07 17:00:52 +01:00
|
|
|
|
2019-01-07 Richard Sandiford <richard.sandiford@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR middle-end/88567
|
|
|
|
|
|
* tree-vect-loop.c (get_initial_defs_for_reduction): Pass the
|
|
|
|
|
|
output vector directly to duplicate_and_interleave instead of
|
|
|
|
|
|
going through a temporary. Postpone insertion of ctor_seq to
|
|
|
|
|
|
the end of the loop.
|
|
|
|
|
|
|
2019-01-07 15:49:00 +01:00
|
|
|
|
2019-01-07 Richard Earnshaw <rearnsha@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/86891
|
|
|
|
|
|
* config/aarch64/aarch64.c (aarch64_expand_subvti): New parameter
|
|
|
|
|
|
unsigned_p. Handle signed and unsigned overflow correction as
|
|
|
|
|
|
required.
|
|
|
|
|
|
* config/aarch64/aarch64-protos.h (aarch64_expand_subvti): Update
|
|
|
|
|
|
prototype.
|
|
|
|
|
|
* config/aarch64/aarch64.md (addv<mode>4): Use aarch64_plus_operand
|
|
|
|
|
|
for operand 2.
|
|
|
|
|
|
(add<mode>3_compareV_imm): Make this callable for expanding.
|
|
|
|
|
|
(subv<GPI:mode>4): Use register_operand for operand 1. Use
|
|
|
|
|
|
aarch64_plus_operand for operand 2.
|
|
|
|
|
|
(subv<GPI:mode>_insn): New insn pattern.
|
|
|
|
|
|
(subv<GPI:mode>_imm): Likewise.
|
|
|
|
|
|
(negv<GPI:mode>3): New expand pattern.
|
|
|
|
|
|
(negv<GPI:mode>_insn): New insn pattern.
|
|
|
|
|
|
(negv<GPI:mode>_cmp_only): Likewise.
|
|
|
|
|
|
(cmpv<GPI:mode>_insn): Likewise.
|
|
|
|
|
|
(subvti4): Use register_operand for operand 1. Update call to
|
|
|
|
|
|
aarch64_expand_subvti.
|
|
|
|
|
|
(usubvti4): Likewise.
|
|
|
|
|
|
(negvti3): New expand pattern.
|
|
|
|
|
|
(negdi_carryout): New insn pattern.
|
|
|
|
|
|
(negvdi_carryinV): New insn pattern.
|
|
|
|
|
|
(sub<mode3>_compare1_imm): Delete named insn pattern, make anonymous
|
|
|
|
|
|
version the named version.
|
|
|
|
|
|
(peepholes to convert to sub<mode3>_compare1_imm): Adjust order of
|
|
|
|
|
|
operands.
|
|
|
|
|
|
(usub<GPI:mode>3_carryinC, usub<GPI:mode>3_carryinC_z1): New insn
|
|
|
|
|
|
patterns.
|
|
|
|
|
|
(usub<GPI:mode>3_carryinC_z2, usub<GPI:mode>3_carryinC): New insn
|
|
|
|
|
|
patterns.
|
|
|
|
|
|
(sub<mode>3_carryinCV, sub<mode>3_carryinCV_z1_z2): Delete.
|
|
|
|
|
|
(sub<mode>3_carryinCV_z1, sub<mode>3_carryinCV_z2): Delete.
|
|
|
|
|
|
(sub<mode>3_carryinCV): Delete.
|
|
|
|
|
|
(sub<GPI:mode>3_carryinV): New expand pattern.
|
|
|
|
|
|
sub<mode>3_carryinV, sub<mode>3_carryinV_z2): New insn patterns.
|
|
|
|
|
|
|
2019-01-07 15:34:06 +01:00
|
|
|
|
2019-01-07 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* tree-ssa-uncprop.c (ssa_equip_hash_traits): Remove in favor
|
|
|
|
|
|
of tree_operand_hash.
|
|
|
|
|
|
|
2019-01-07 13:17:10 +01:00
|
|
|
|
2019-01-07 Richard Sandiford <richard.sandiford@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/88598
|
|
|
|
|
|
* tree.h (single_nonzero_element): Declare.
|
|
|
|
|
|
* tree.c (single_nonzero_element): New function.
|
|
|
|
|
|
* match.pd: Fold certain reductions of X & CST to X[I] & CST[I]
|
|
|
|
|
|
if I is the only nonzero element of CST.
|
|
|
|
|
|
|
[1/2] PR88598: Optimise x * { 0 or 1, 0 or 1, ... }
The PR has:
vect__6.24_42 = vect__5.23_41 * { 0.0, 1.0e+0, 0.0, 0.0 };
which for -fno-signed-zeros -fno-signaling-nans can be simplified to:
vect__6.24_42 = vect__5.23_41 & { 0, -1, 0, 0 };
I deliberately didn't handle COMPLEX_CST or CONSTRUCTOR in
initializer_each_zero_or_onep since there are no current use cases.
The patch also makes (un)signed_type_for handle floating-point types.
I tried to audit all callers and the few that handle null returns would
be unaffected.
2019-01-07 Richard Sandiford <richard.sandiford@arm.com>
gcc/
PR tree-optimization/88598
* tree.h (initializer_each_zero_or_onep): Declare.
* tree.c (initializer_each_zero_or_onep): New function.
(signed_or_unsigned_type_for): Handle float types too.
(unsigned_type_for, signed_type_for): Update comments accordingly.
* match.pd: Fold x * { 0 or 1, 0 or 1, ...} to
x & { 0 or -1, 0 or -1, ... }.
gcc/testsuite/
PR tree-optimization/88598
* gcc.dg/pr88598-1.c: New test.
* gcc.dg/pr88598-2.c: Likewise.
* gcc.dg/pr88598-3.c: Likewise.
* gcc.dg/pr88598-4.c: Likewise.
* gcc.dg/pr88598-5.c: Likewise.
From-SVN: r267645
2019-01-07 13:16:30 +01:00
|
|
|
|
2019-01-07 Richard Sandiford <richard.sandiford@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/88598
|
|
|
|
|
|
* tree.h (initializer_each_zero_or_onep): Declare.
|
|
|
|
|
|
* tree.c (initializer_each_zero_or_onep): New function.
|
|
|
|
|
|
(signed_or_unsigned_type_for): Handle float types too.
|
|
|
|
|
|
(unsigned_type_for, signed_type_for): Update comments accordingly.
|
|
|
|
|
|
* match.pd: Fold x * { 0 or 1, 0 or 1, ...} to
|
|
|
|
|
|
x & { 0 or -1, 0 or -1, ... }.
|
|
|
|
|
|
|
2019-01-07 11:32:30 +01:00
|
|
|
|
2019-01-07 Jonathan Wakely <jwakely@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/install.texi: Replace references to x86_64-unknown-linux-gnu
|
|
|
|
|
|
with x86_64-pc-linux-gnu.
|
|
|
|
|
|
|
2019-01-07 11:01:49 +01:00
|
|
|
|
2019-01-07 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/85486
|
|
|
|
|
|
* config/nvptx/nvptx.c (has_vector_partitionable_routine_calls_p): New
|
|
|
|
|
|
function.
|
|
|
|
|
|
(nvptx_goacc_validate_dims): Force vl32 if calling vector-partitionable
|
|
|
|
|
|
routines.
|
|
|
|
|
|
|
2019-01-07 09:49:08 +01:00
|
|
|
|
2019-01-07 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
2019-01-07 10:52:29 +01:00
|
|
|
|
* config/i386/sse.md (vec_extract<mode><ssehalfvecmodelower>): Use
|
|
|
|
|
|
V_256_512 iterator instead of V_512 and TARGET_AVX instead of
|
|
|
|
|
|
TARGET_AVX512F as condition.
|
|
|
|
|
|
|
2019-01-07 10:51:46 +01:00
|
|
|
|
PR debug/88723
|
|
|
|
|
|
* dwarf2out.c (const_ok_for_output_1): Remove redundant call to
|
|
|
|
|
|
const_not_ok_for_debug_p target hook.
|
|
|
|
|
|
(mem_loc_descriptor) <case UNSPEC>: Only call const_ok_for_output_1
|
|
|
|
|
|
on UNSPEC and subexpressions thereof if all subexpressions of the
|
|
|
|
|
|
UNSPEC are CONSTANT_P.
|
|
|
|
|
|
|
2019-01-07 09:51:59 +01:00
|
|
|
|
PR tree-optimization/88676
|
|
|
|
|
|
* tree-ssa-phiopt.c (two_value_replacement): New function.
|
|
|
|
|
|
(tree_ssa_phiopt_worker): Call it.
|
|
|
|
|
|
|
2019-01-07 09:50:57 +01:00
|
|
|
|
PR sanitizer/88619
|
|
|
|
|
|
* cfgexpand.c (expand_stack_vars): Only align prev_offset to
|
|
|
|
|
|
ASAN_MIN_RED_ZONE_SIZE, not to maximum of that and alignb.
|
|
|
|
|
|
|
2019-01-07 09:49:08 +01:00
|
|
|
|
PR c++/85052
|
|
|
|
|
|
* tree-vect-generic.c: Include insn-config.h and recog.h.
|
|
|
|
|
|
(expand_vector_piecewise): Add defaulted ret_type argument,
|
|
|
|
|
|
if non-NULL, use that in preference to type for the result type.
|
|
|
|
|
|
(expand_vector_parallel): Formatting fix.
|
|
|
|
|
|
(do_vec_conversion, do_vec_narrowing_conversion,
|
|
|
|
|
|
expand_vector_conversion): New functions.
|
|
|
|
|
|
(expand_vector_operations_1): Call expand_vector_conversion
|
|
|
|
|
|
for VEC_CONVERT ifn calls.
|
|
|
|
|
|
* internal-fn.def (VEC_CONVERT): New internal function.
|
|
|
|
|
|
* internal-fn.c (expand_VEC_CONVERT): New function.
|
|
|
|
|
|
* fold-const-call.c (fold_const_vec_convert): New function.
|
|
|
|
|
|
(fold_const_call): Use it for CFN_VEC_CONVERT.
|
|
|
|
|
|
* doc/extend.texi (__builtin_convertvector): Document.
|
|
|
|
|
|
|
2019-01-07 09:11:06 +01:00
|
|
|
|
2019-01-07 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nvptx/nvptx-protos.h (nvptx_output_red_partition): Declare.
|
|
|
|
|
|
* config/nvptx/nvptx.c (vector_red_size, vector_red_align,
|
|
|
|
|
|
vector_red_partition, vector_red_sym): New global variables.
|
|
|
|
|
|
(nvptx_option_override): Initialize vector_red_sym.
|
|
|
|
|
|
(nvptx_declare_function_name): Restore red_partition register.
|
|
|
|
|
|
(nvptx_file_end): Emit code to declare the vector reduction variables.
|
|
|
|
|
|
(nvptx_output_red_partition): New function.
|
|
|
|
|
|
(nvptx_expand_shared_addr): Add vector argument. Use it to handle
|
|
|
|
|
|
large vector reductions.
|
|
|
|
|
|
(enum nvptx_builtins): Add NVPTX_BUILTIN_VECTOR_ADDR.
|
|
|
|
|
|
(nvptx_init_builtins): Add VECTOR_ADDR.
|
|
|
|
|
|
(nvptx_expand_builtin): Update call to nvptx_expand_shared_addr.
|
|
|
|
|
|
Handle nvptx_expand_shared_addr.
|
|
|
|
|
|
(nvptx_get_shared_red_addr): Add vector argument and handle large
|
|
|
|
|
|
vectors.
|
|
|
|
|
|
(nvptx_goacc_reduction_setup): Add offload_attrs argument and handle
|
|
|
|
|
|
large vectors.
|
|
|
|
|
|
(nvptx_goacc_reduction_init): Likewise.
|
|
|
|
|
|
(nvptx_goacc_reduction_fini): Likewise.
|
|
|
|
|
|
(nvptx_goacc_reduction_teardown): Likewise.
|
|
|
|
|
|
(nvptx_goacc_reduction): Update calls to nvptx_goacc_reduction_{setup,
|
|
|
|
|
|
init,fini,teardown}.
|
|
|
|
|
|
(nvptx_init_axis_predicate): Initialize vector_red_partition.
|
|
|
|
|
|
(nvptx_set_current_function): Init vector_red_partition.
|
|
|
|
|
|
* config/nvptx/nvptx.md (UNSPECV_RED_PART): New unspecv.
|
|
|
|
|
|
(nvptx_red_partition): New insn.
|
|
|
|
|
|
* config/nvptx/nvptx.h (struct machine_function): Add red_partition.
|
|
|
|
|
|
|
2019-01-07 09:10:56 +01:00
|
|
|
|
2019-01-07 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/85381
|
|
|
|
|
|
* config/nvptx/nvptx.c (nvptx_process_pars): Don't emit barriers for
|
|
|
|
|
|
empty loops.
|
|
|
|
|
|
|
2019-01-07 09:10:47 +01:00
|
|
|
|
2019-01-07 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nvptx/nvptx.c (oacc_bcast_partition): Declare.
|
|
|
|
|
|
(nvptx_option_override): Init oacc_bcast_partition.
|
|
|
|
|
|
(nvptx_init_oacc_workers): New function.
|
|
|
|
|
|
(nvptx_declare_function_name): Call nvptx_init_oacc_workers.
|
|
|
|
|
|
(nvptx_needs_shared_bcast): New function.
|
|
|
|
|
|
(nvptx_find_par): Generalize to enable vectors to use shared-memory
|
|
|
|
|
|
to propagate state.
|
|
|
|
|
|
(nvptx_shared_propagate): Initialize vector bcast partition and
|
|
|
|
|
|
synchronization state.
|
|
|
|
|
|
(nvptx_single): Generalize to enable vectors to use shared-memory
|
|
|
|
|
|
to propagate state.
|
|
|
|
|
|
(nvptx_process_pars): Likewise.
|
|
|
|
|
|
(nvptx_set_current_function): Initialize oacc_broadcast_partition.
|
|
|
|
|
|
* config/nvptx/nvptx.h (struct machine_function): Add
|
|
|
|
|
|
bcast_partition and sync_bar members.
|
|
|
|
|
|
|
2019-01-07 09:10:37 +01:00
|
|
|
|
2019-01-07 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nvptx/nvptx.c (nvptx_welformed_vector_length_p)
|
|
|
|
|
|
(nvptx_apply_dim_limits): New function.
|
|
|
|
|
|
(nvptx_goacc_validate_dims_1): Allow PTX_MAX_VECTOR_LENGTH larger than
|
|
|
|
|
|
PTX_WARP_SIZE.
|
|
|
|
|
|
|
2019-01-07 09:10:17 +01:00
|
|
|
|
2019-01-07 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Move warnings to
|
|
|
|
|
|
as late as possible.
|
|
|
|
|
|
|
2019-01-07 09:10:08 +01:00
|
|
|
|
2019-01-07 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nvptx/nvptx.c (PTX_VECTOR_LENGTH): Remove.
|
|
|
|
|
|
(PTX_DEFAULT_VECTOR_LENGTH, PTX_MAX_VECTOR_LENGTH): Define.
|
|
|
|
|
|
(nvptx_goacc_validate_dims_1, nvptx_dim_limit)
|
|
|
|
|
|
(nvptx_goacc_reduction_fini): Use PTX_DEFAULT_VECTOR_LENGTH,
|
|
|
|
|
|
PTX_MAX_VECTOR_LENGTH and PTX_WARP_SIZE instead of PTX_VECTOR_LENGTH.
|
|
|
|
|
|
|
2019-01-07 09:09:58 +01:00
|
|
|
|
2019-01-07 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nvptx/nvptx.c (nvptx_goacc_validate_dims): Add asserts.
|
|
|
|
|
|
|
2019-01-07 09:09:40 +01:00
|
|
|
|
2019-01-07 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* omp-offload.c (oacc_get_min_dim): New function.
|
|
|
|
|
|
* omp-offload.h (oacc_get_min_dim): Declare.
|
|
|
|
|
|
|
2019-01-07 08:31:19 +01:00
|
|
|
|
2018-12-26 Mateusz B <mateuszb@poczta.onet.pl>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88521
|
|
|
|
|
|
* config/i386/i386.c (function_value_ms_64): Return small sturct in
|
|
|
|
|
|
AX_REG and float/double in FIRST_SSE_REG for 4 or 8 byte modes.
|
|
|
|
|
|
|
2019-01-06 18:16:00 +01:00
|
|
|
|
2019-01-05 Jan Hubicka <hubicka@ucw.cz>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-opt/86020
|
|
|
|
|
|
Revert:
|
|
|
|
|
|
2017-05-22 Jan Hubicka <hubicka@ucw.cz>
|
|
|
|
|
|
|
|
|
|
|
|
* ipa-inline.c (edge_badness): Use inlined_time instead of
|
|
|
|
|
|
inline_summaries->get.
|
|
|
|
|
|
|
2019-01-06 17:44:51 +01:00
|
|
|
|
2019-01-05 Jan Hubicka <hubicka@ucw.cz>
|
|
|
|
|
|
|
|
|
|
|
|
* opts.c (enable_fdo_optimizations): Enable
|
|
|
|
|
|
version-loops-for-strides, loop-interchange, unrol-and-jam
|
|
|
|
|
|
and tree-loop-distribution.
|
|
|
|
|
|
* invoke.texi: Document newly enabled options.
|
|
|
|
|
|
|
2019-01-05 23:47:24 +01:00
|
|
|
|
2019-01-05 Jan Hubicka <hubicka@ucw.cz>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/invoke.texi (max-inline-insns-small): New parameters.
|
|
|
|
|
|
* ipa-inline.c (want_early_inline_function_p): simplify.
|
|
|
|
|
|
(want_inline_small_function_p): Fix pasto from previous patch;
|
|
|
|
|
|
use max-inline-insns-small bound.
|
|
|
|
|
|
* params.def (max-inline-insns-small): New param.
|
|
|
|
|
|
* ipa-fnsummary.c (analyze_function_body): Initialize time/size
|
|
|
|
|
|
variables correctly.
|
|
|
|
|
|
|
2019-01-05 19:16:55 +01:00
|
|
|
|
2019-01-05 Jan Hubicka <hubicka@ucw.cz>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/invoke.texi: Document max-inline-insns-size,
|
|
|
|
|
|
uninlined-function-insns, uninlined-function-time,
|
|
|
|
|
|
uninlined-thunk-insns and uninlined-thunk-time.
|
|
|
|
|
|
* params.def: Add max-inline-insns-size,
|
|
|
|
|
|
uninlined-function-insns, uninlined-function-time,
|
|
|
|
|
|
uninlined-thunk-insns and uninlined-thunk-time.
|
|
|
|
|
|
* ipa-fnsummary.c (compute_fn_summary, analyze_function_body): Use
|
|
|
|
|
|
new parameters.
|
|
|
|
|
|
* ipa-inline.c (can_inline_edge_by_limits_p,
|
|
|
|
|
|
want_inline_small_function_p): Use new parameters.
|
|
|
|
|
|
|
2019-01-05 18:47:34 +01:00
|
|
|
|
2019-01-05 Jan Hubicka <hubicka@ucw.cz>
|
|
|
|
|
|
|
|
|
|
|
|
* ipa-fnsummary.c (analyze_function_body): Fix accounting of time.
|
|
|
|
|
|
|
2019-01-05 12:12:35 +01:00
|
|
|
|
2019-01-05 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
2019-01-05 12:14:12 +01:00
|
|
|
|
PR middle-end/82564
|
|
|
|
|
|
PR target/88620
|
|
|
|
|
|
* expr.c (expand_assignment): For calls returning VLA structures
|
|
|
|
|
|
if to_rtx is not a MEM, force it into a stack temporary.
|
|
|
|
|
|
|
2019-01-05 12:12:35 +01:00
|
|
|
|
PR debug/88635
|
|
|
|
|
|
* dwarf2out.c (const_ok_for_output_1): Reject MINUS that contains
|
|
|
|
|
|
SYMBOL_REF, CODE_LABEL or UNSPEC in subexpressions of second argument.
|
|
|
|
|
|
Reject PLUS that contains SYMBOL_REF, CODE_LABEL or UNSPEC in
|
|
|
|
|
|
subexpressions of both operands.
|
|
|
|
|
|
(mem_loc_descriptor): Handle UNSPEC if target hook acks it and all the
|
|
|
|
|
|
subrtxes are CONSTANT_P.
|
|
|
|
|
|
* config/i386/i386.c (ix86_const_not_ok_for_debug_p): Revert
|
|
|
|
|
|
2018-11-09 changes.
|
|
|
|
|
|
|
2019-01-05 01:20:04 +01:00
|
|
|
|
2019-01-04 Jan Hubicka <hubicka@ucw.cz>
|
|
|
|
|
|
|
|
|
|
|
|
* params.def (hot-bb-count-ws-permille): Set to 990.
|
|
|
|
|
|
|
2019-01-05 01:57:30 +01:00
|
|
|
|
2019-01-04 Martin Sebor <msebor@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR c/88546
|
|
|
|
|
|
* attribs.c (decls_mismatched_attributes): Avoid warning for attribute
|
|
|
|
|
|
leaf.
|
|
|
|
|
|
|
2019-01-04 23:48:45 +01:00
|
|
|
|
2019-01-04 Martin Sebor <msebor@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR c/88363
|
|
|
|
|
|
* doc/extend.texi (attribute alloc_align, alloc_size): Update.
|
|
|
|
|
|
|
2019-01-04 18:56:47 +01:00
|
|
|
|
2019-01-04 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gdbinit.in: Turn off pagination for the skip commands, restore
|
|
|
|
|
|
it to previous state afterwards.
|
|
|
|
|
|
|
2019-01-04 10:00:05 +01:00
|
|
|
|
2019-01-04 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/88594
|
|
|
|
|
|
* config/i386/i386.c (ix86_expand_divmod_libfunc): Use mode instead
|
|
|
|
|
|
of GET_MODE (opN) as modes of the libcall arguments.
|
|
|
|
|
|
|
2019-01-04 09:50:56 +01:00
|
|
|
|
2019-01-04 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/i386/sse.md
|
|
|
|
|
|
(<avx512>_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>,
|
|
|
|
|
|
<avx512>_cmp<mode>3<mask_scalar_merge_name>,
|
|
|
|
|
|
<avx512>_ucmp<mode>3<mask_scalar_merge_name>,
|
|
|
|
|
|
<avx512>_ucmp<mode>3<mask_scalar_merge_name>,
|
|
|
|
|
|
avx512f_vmcmp<mode>3<round_saeonly_name>,
|
|
|
|
|
|
avx512f_vmcmp<mode>3_mask<round_saeonly_name>,
|
|
|
|
|
|
avx512f_maskcmp<mode>3,
|
|
|
|
|
|
<avx512>_cvt<ssemodesuffix>2mask<mode>,
|
|
|
|
|
|
<avx512>_cvt<ssemodesuffix>2mask<mode>,
|
|
|
|
|
|
*<avx512>_cvtmask2<ssemodesuffix><mode>,
|
|
|
|
|
|
*<avx512>_cvtmask2<ssemodesuffix><mode>,
|
|
|
|
|
|
<avx512>_eq<mode>3<mask_scalar_merge_name>_1,
|
|
|
|
|
|
<avx512>_eq<mode>3<mask_scalar_merge_name>_1,
|
|
|
|
|
|
<avx512>_gt<mode>3<mask_scalar_merge_name>,
|
|
|
|
|
|
<avx512>_gt<mode>3<mask_scalar_merge_name>,
|
|
|
|
|
|
<avx512>_testm<mode>3<mask_scalar_merge_name>,
|
|
|
|
|
|
<avx512>_testnm<mode>3<mask_scalar_merge_name>,
|
|
|
|
|
|
*<avx512>_testm<VI1248_AVX512VLBW:mode>3_zext,
|
|
|
|
|
|
*<avx512>_testm<VI1248_AVX512VLBW:mode>3_zext_mask,
|
|
|
|
|
|
*<avx512>_testnm<VI1248_AVX512VLBW:mode>3_zext,
|
|
|
|
|
|
*<avx512>_testnm<VI1248_AVX512VLBW:mode>3_zext_mask,
|
|
|
|
|
|
avx512cd_maskb_vec_dup<mode>,
|
|
|
|
|
|
avx512cd_maskw_vec_dup<mode>,
|
|
|
|
|
|
avx512dq_fpclass<mode><mask_scalar_merge_name>,
|
|
|
|
|
|
avx512dq_vmfpclass<mode>,
|
|
|
|
|
|
avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>): Use =k
|
|
|
|
|
|
instead of =Yk.
|
|
|
|
|
|
|
2019-01-04 04:13:33 +01:00
|
|
|
|
2019-01-03 Martin Sebor <msebor@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/88659
|
|
|
|
|
|
* calls.c (maybe_warn_nonstring_arg): Avoid assuming maxlen is set.
|
|
|
|
|
|
|
2019-01-03 20:20:57 +01:00
|
|
|
|
2019-01-03 Aaron Sawdey <acsawdey@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/rs6000/rs6000-string.c (expand_block_move): Don't use
|
|
|
|
|
|
unaligned vsx and avoid lxvd2x/stxvd2x.
|
|
|
|
|
|
(gen_lvx_v4si_move): New function.
|
|
|
|
|
|
|
2019-01-03 16:08:36 +01:00
|
|
|
|
2019-01-03 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nvptx/nvptx.c (MACH_VECTOR_LENGTH, MACH_MAX_WORKERS): Define.
|
|
|
|
|
|
(init_axis_dim, nvptx_mach_max_workers, nvptx_mach_vector_length): New
|
|
|
|
|
|
function.
|
|
|
|
|
|
* config/nvptx/nvptx.h (struct machine_function): Add axis_dims.
|
|
|
|
|
|
|
2019-01-03 16:08:25 +01:00
|
|
|
|
2019-01-03 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nvptx/nvptx.c (struct offload_attrs): New.
|
|
|
|
|
|
(populate_offload_attrs): New function. Factor mask extraction out of
|
|
|
|
|
|
nvptx_reorg. Add extraction of dimensions.
|
|
|
|
|
|
(nvptx_reorg): Use populate_offload_attrs.
|
|
|
|
|
|
|
2019-01-03 16:08:15 +01:00
|
|
|
|
2019-01-03 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): Add early-out
|
|
|
|
|
|
cases for oacc_min_dims_p and routine_p. Add asserts for
|
|
|
|
|
|
oacc_default_dims_p and offload_region_p.
|
|
|
|
|
|
|
2019-01-03 16:08:06 +01:00
|
|
|
|
2019-01-03 Tom de Vries <tdevries@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* config/nvptx/nvptx.c (nvptx_goacc_validate_dims_1): New function,
|
|
|
|
|
|
factored out of ...
|
|
|
|
|
|
(nvptx_goacc_validate_dims): ... here.
|
|
|
|
|
|
|
2019-01-03 13:23:27 +01:00
|
|
|
|
2019-01-03 Jan Hubicka <hubicka@ucw.cz>
|
|
|
|
|
|
|
|
|
|
|
|
PR tree-optimization/85574
|
|
|
|
|
|
* tree-ssa-uncprop.c (struct equiv_hash_elt): Remove unused
|
|
|
|
|
|
structure.
|
|
|
|
|
|
(struct ssa_equip_hash_traits): Declare.
|
|
|
|
|
|
(val_ssa_equiv): Use custom hash traits using operand_equal_p.
|
|
|
|
|
|
|
2019-01-03 12:05:24 +01:00
|
|
|
|
2019-01-03 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR debug/88644
|
|
|
|
|
|
* dwarf2out.c (modified_type_die): If type is equal to sizetype,
|
|
|
|
|
|
change it to qualified_type.
|
|
|
|
|
|
|
2019-01-03 11:19:03 +01:00
|
|
|
|
2019-01-03 Jan Hubicka <hubicka@ucw.cz>
|
|
|
|
|
|
|
|
|
|
|
|
* ipa-utils.c (scale_ipa_profile_for_fn): Break out from ...
|
|
|
|
|
|
(ipa_merge_profiles): ... here; do not ICE on thunks and aliases.
|
|
|
|
|
|
|
2019-01-02 19:30:50 +01:00
|
|
|
|
2019-01-02 Martin Sebor <msebor@redhat.com>
|
|
|
|
|
|
Jeff Law <law@redhat.com>
|
|
|
|
|
|
|
2019-01-03 00:59:51 +01:00
|
|
|
|
* gimple-fold.c (strlen_range_kind): Remove SRK_LENRANGE_2.
|
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|
(get_range_strlen_tree): Update appropriately.
|
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|
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|
(get_range_strlen)
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|
* gimple-fold.h (get_range_strlen): Drop unused last argument.
|
2019-01-02 22:38:56 +01:00
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* gimple-fold.c (gimple_fold_builtin_strlen): Use set_strlen_range
|
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|
rather than set_range_info.
|
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* tree-ssa-strlen.c (set_strlen_range): Extracted from
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|
maybe_set_strlen_range. Handle potentially boundary crossing
|
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|
cases more conservatively.
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(maybe_set_strlen_range): Parts refactored into set_strlen_range.
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Call set_strlen_range.
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* tree-ssa-strlen.h (set_strlen_range): Add prototype.
|
2019-01-04 04:13:33 +01:00
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|
2019-01-02 19:30:50 +01:00
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PR middle-end/88663
|
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* gimple-fold.c (get_range_strlen): Update prototype to no longer
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|
need the flexp argument.
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(get_range_strlen_tree): Drop flexp argument. Drop flexp argument
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|
from calls to get_range_strlen. Update comments. Just update
|
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|
VAL for an unterminated const char array and let the reset of the
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code handle it normally. No longer try to set *flexp. Adjust
|
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|
return value.
|
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|
|
|
(get_range_strlen): Update for the new get_range_strlen API.
|
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|
(get_maxval_strlen): Similarly.
|
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|
|
|
|
(gimple_fold_builtin_strlen): Handle update meaning of return value
|
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|
from get_range_strlen.
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* gimple-ssa-sprintf.c (get_string_length): Update for the new
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|
get_range_strlen API.
|
2019-01-04 04:13:33 +01:00
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|
2019-01-02 16:23:27 +01:00
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|
2019-01-02 Jan Hubicka <hubicka@ucw.cz>
|
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|
|
PR lto/88130
|
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* varpool.c (varpool_node::ctor_useable_for_folding_p): Also return
|
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|
false at WPA time when body was removed.
|
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|
2019-01-02 15:03:53 +01:00
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|
2019-01-02 Martin Liska <mliska@suse.cz>
|
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|
PR tree-optimization/88650
|
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|
* predict.c (set_even_probabilities): Calculate probability
|
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|
|
remainer only when really used.
|
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|
|
2019-01-02 14:52:03 +01:00
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|
2019-01-02 Richard Biener <rguenther@suse.de>
|
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|
|
|
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|
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|
|
PR middle-end/88651
|
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|
|
* tree-data-ref.c (analyze_subscript_affine_affine): Use
|
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|
|
|
|
widest_ints when mangling max_stmt_execution results.
|
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|
|
|
|
2019-01-02 13:19:10 +01:00
|
|
|
|
2019-01-02 Richard Biener <rguenther@suse.de>
|
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|
|
|
|
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|
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|
|
PR tree-optimization/88621
|
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|
* tree-ssa-loop-im.c (gather_mem_refs_stmt): Fix pastos, avoid
|
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|
|
bitfields when canoncalizing.
|
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|
|
|
|
2019-01-02 12:04:45 +01:00
|
|
|
|
2019-01-02 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR target/87545
|
|
|
|
|
|
* config/i386/x86-tune-costs.h (intel_cost): Adjust
|
|
|
|
|
|
cost of cheap SSE instruction.
|
|
|
|
|
|
|
2019-01-02 09:49:07 +01:00
|
|
|
|
2019-01-02 Richard Biener <rguenther@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
PR ipa/85574
|
|
|
|
|
|
* ipa-icf.h (sem_item_optimizer::sort_congruence_split): Declare.
|
|
|
|
|
|
* ipa-icf.c (sem_item_optimizer::sort_congruence_split): New
|
|
|
|
|
|
function.
|
|
|
|
|
|
(sem_item_optimizer::do_congruence_step_f): Sort the congruence
|
|
|
|
|
|
set after UIDs before splitting them.
|
|
|
|
|
|
|
2019-01-01 19:20:13 +01:00
|
|
|
|
2019-01-01 Martin Sebor <msebor@redhat.com>
|
|
|
|
|
|
Jeff Law <law@redhat.com>
|
|
|
|
|
|
|
2019-01-02 07:17:54 +01:00
|
|
|
|
* gimple-fold.c (get_range_strlen_tree): Record if the computed
|
|
|
|
|
|
length is optimistic. If it is, then arrange to compute the
|
|
|
|
|
|
conservative length as well.
|
|
|
|
|
|
|
2019-01-02 07:02:37 +01:00
|
|
|
|
* gimple-fold.h (get_range_strlen): Update prototype.
|
|
|
|
|
|
* builtins.c (check_access): Update call to get_range_strlen to use
|
|
|
|
|
|
c_strlen_data pointer. Change various variable accesses to instead
|
|
|
|
|
|
pull data from the c_strlen_data structure.
|
|
|
|
|
|
(check_strncat_sizes, expand_builtin_strncat): Likewise.
|
|
|
|
|
|
* calls.c (maybe_warn_nonstring_arg): Likewise.
|
|
|
|
|
|
* tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise. Reset
|
|
|
|
|
|
minimum length if maximum lengh is unknown.
|
|
|
|
|
|
* gimple-ssa-sprintf.c (get_string_length): Likewise. Drop code
|
|
|
|
|
|
that used c_strlen, it's no longer needed. Restructure slightly.
|
|
|
|
|
|
(format_string): Set unlikely range appropriately.
|
|
|
|
|
|
* gimple-fold.c (get_range_strlen): Update comments. Fix minor
|
|
|
|
|
|
formatting issues.
|
|
|
|
|
|
(get_range_strlen): Accept c_strlen_data pointer for external
|
|
|
|
|
|
call sites as well. Pass through to call to internal get_range_strlen.
|
|
|
|
|
|
Adjust minlen, maxlen and maxbound as needed.
|
|
|
|
|
|
(get_maxval_strlen): Update comments.
|
|
|
|
|
|
(gimple_fold_builtin_strlen): Update call to get_range_strlen
|
|
|
|
|
|
to use c_strlen_data pointer. Change variable accesses to instead
|
|
|
|
|
|
use c_strlen_data data members.
|
|
|
|
|
|
|
2019-01-01 19:20:13 +01:00
|
|
|
|
* gimple-fold.c (get_range_strlen): Update prototype.
|
|
|
|
|
|
(get_range_strlen_tree): Update prototype. Drop minlen/maxlen
|
|
|
|
|
|
local variables. Use pdata to return information to caller.
|
|
|
|
|
|
Update calls to get_range_strlen. Update pdata->maxbound.
|
|
|
|
|
|
(get_range_strlen -- static version): Similarly.
|
|
|
|
|
|
(get_range_strlen -- extern version): Update for internal
|
|
|
|
|
|
get_range_strlen API change. Convert to external data format.
|
|
|
|
|
|
(get_maxval_strlen): Similarly.
|
|
|
|
|
|
|
2019-01-01 13:49:18 +01:00
|
|
|
|
2019-01-01 Jan Hubicka <hubicka@ucw.cz>
|
|
|
|
|
|
|
|
|
|
|
|
* coverage.c (get_coverage_counts): Use current_function_decl.
|
|
|
|
|
|
* profile.c (read_thunk_profile): New function.
|
|
|
|
|
|
(branch_prob): Add THUNK parameter.
|
|
|
|
|
|
* tree-profile.c (tree_profiling): Handle thunks.
|
|
|
|
|
|
* value-prof.c (init_node_map): Handle thunks.
|
|
|
|
|
|
* value-prof.h (branch_prob): Upate prototype.
|
|
|
|
|
|
(read_thunk_profile): Declare.
|
|
|
|
|
|
|
2019-01-01 12:34:49 +01:00
|
|
|
|
2019-01-01 Jakub Jelinek <jakub@redhat.com>
|
2018-01-03 10:17:54 +01:00
|
|
|
|
|
2019-01-01 13:31:55 +01:00
|
|
|
|
Update copyright years.
|
|
|
|
|
|
|
2018-01-03 10:17:54 +01:00
|
|
|
|
* gcc.c (process_command): Update copyright notice dates.
|
|
|
|
|
|
* gcov-dump.c (print_version): Ditto.
|
|
|
|
|
|
* gcov.c (print_version): Ditto.
|
|
|
|
|
|
* gcov-tool.c (print_version): Ditto.
|
|
|
|
|
|
* gengtype.c (create_file): Ditto.
|
|
|
|
|
|
* doc/cpp.texi: Bump @copying's copyright year.
|
|
|
|
|
|
* doc/cppinternals.texi: Ditto.
|
|
|
|
|
|
* doc/gcc.texi: Ditto.
|
|
|
|
|
|
* doc/gccint.texi: Ditto.
|
|
|
|
|
|
* doc/gcov.texi: Ditto.
|
|
|
|
|
|
* doc/install.texi: Ditto.
|
|
|
|
|
|
* doc/invoke.texi: Ditto.
|
ABOUT-GCC-NLS, [...]: Add copyright and license notices.
* ABOUT-GCC-NLS, ChangeLog, ChangeLog-1997, ChangeLog-1998,
ChangeLog-1999, ChangeLog-2000, ChangeLog-2001, ChangeLog-2002,
ChangeLog-2003, ChangeLog-2004, ChangeLog-2005, ChangeLog-2006,
ChangeLog-2007, ChangeLog-2008, ChangeLog.dataflow, ChangeLog.lib,
ChangeLog.ptr, ChangeLog.tree-ssa, ChangeLog.tuples, FSFChangeLog,
FSFChangeLog.10, FSFChangeLog.11, LANGUAGES, ONEWS, acinclude.m4,
config/alpha/gnu.h, config/alpha/libgcc-alpha-ldbl.ver,
config/alpha/t-osf4, config/alpha/t-vms, config/alpha/va_list.h,
config/alpha/x-vms, config/arc/t-arc,
config/arm/README-interworking, config/arm/arm-c.c,
config/arm/gentune.sh, config/arm/libgcc-bpabi.ver,
config/arm/t-arm, config/arm/t-arm-elf, config/arm/t-arm-softfp,
config/arm/t-bpabi, config/arm/t-linux, config/arm/t-linux-eabi,
config/arm/t-netbsd, config/arm/t-pe, config/arm/t-strongarm-elf,
config/arm/t-symbian, config/arm/t-vxworks, config/arm/t-wince-pe,
config/avr/t-avr, config/bfin/elf.h, config/bfin/libgcc-bfin.ver,
config/bfin/linux.h, config/bfin/t-bfin, config/bfin/t-bfin-elf,
config/bfin/t-bfin-linux, config/bfin/t-bfin-uclinux,
config/bfin/uclinux.h, config/cris/mulsi3.asm, config/cris/t-cris,
config/cris/t-elfmulti, config/crx/t-crx,
config/darwin-ppc-ldouble-patch.def, config/darwin-sections.def,
config/divmod.c, config/fr30/t-fr30, config/frv/libgcc-frv.ver,
config/frv/t-frv, config/frv/t-linux, config/h8300/genmova.sh,
config/h8300/t-h8300, config/i386/athlon.md,
config/i386/darwin-libgcc.10.4.ver,
config/i386/darwin-libgcc.10.5.ver, config/i386/libgcc-glibc.ver,
config/i386/mach.h, config/i386/netbsd.h, config/i386/t-crtpc,
config/i386/t-cygming, config/i386/t-cygwin, config/i386/t-i386,
config/i386/t-linux64, config/i386/t-nwld,
config/i386/t-rtems-i386, config/i386/t-sol2-10,
config/i386/x-mingw32, config/ia64/div.md, config/ia64/elf.h,
config/ia64/ia64.opt, config/ia64/libgcc-glibc.ver,
config/ia64/libgcc-ia64.ver, config/ia64/linux.h,
config/ia64/sysv4.h, config/ia64/t-hpux, config/ia64/t-ia64,
config/iq2000/abi, config/iq2000/lib2extra-funcs.c,
config/iq2000/t-iq2000, config/libgcc-glibc.ver,
config/m32r/libgcc-glibc.ver, config/m32r/t-linux,
config/m32r/t-m32r, config/m68hc11/t-m68hc11,
config/m68k/t-floatlib, config/m68k/t-linux, config/m68k/t-mlibs,
config/m68k/t-uclinux, config/mcore/t-mcore,
config/mcore/t-mcore-pe, config/mips/20kc.md, config/mips/4130.md,
config/mips/5400.md, config/mips/5500.md, config/mips/crti.asm,
config/mips/crtn.asm, config/mips/irix-crti.asm,
config/mips/irix-crtn.asm, config/mips/libgcc-mips16.ver,
config/mips/mips-dsp.md, config/mips/mips-dspr2.md,
config/mips/mips-fixed.md, config/mips/sb1.md,
config/mips/sr71k.md, config/mips/t-elf, config/mips/t-gofast,
config/mips/t-iris6, config/mips/t-isa3264,
config/mips/t-libgcc-mips16, config/mips/t-linux64,
config/mips/t-mips, config/mips/t-r3900, config/mips/t-rtems,
config/mips/t-sb1, config/mips/t-sde, config/mips/t-sdemtk,
config/mips/t-slibgcc-irix, config/mips/t-sr71k, config/mips/t-st,
config/mips/t-vr, config/mips/t-vxworks, config/mmix/t-mmix,
config/mn10300/t-linux, config/mn10300/t-mn10300,
config/pa/pa32-regs.h, config/pa/t-hpux-shlib, config/pa/t-linux,
config/pa/t-linux64, config/pa/t-pa64, config/pdp11/t-pdp11,
config/picochip/libgccExtras/clzsi2.asm,
config/picochip/t-picochip, config/rs6000/darwin-ldouble-format,
config/rs6000/darwin-libgcc.10.4.ver,
config/rs6000/darwin-libgcc.10.5.ver,
config/rs6000/libgcc-ppc-glibc.ver, config/rs6000/ppc-asm.h,
config/rs6000/t-aix43, config/rs6000/t-aix52,
config/rs6000/t-darwin, config/rs6000/t-fprules,
config/rs6000/t-fprules-fpbit, config/rs6000/t-linux64,
config/rs6000/t-lynx, config/rs6000/t-netbsd,
config/rs6000/t-ppccomm, config/rs6000/t-ppcendian,
config/rs6000/t-ppcgas, config/rs6000/t-rs6000,
config/rs6000/t-rtems, config/rs6000/t-spe,
config/rs6000/t-vxworks, config/s390/libgcc-glibc.ver,
config/score/t-score-elf, config/sh/divcost-analysis,
config/sh/libgcc-glibc.ver, config/sh/t-netbsd, config/sh/t-sh,
config/sh/t-sh64, config/sh/t-superh, config/sh/t-symbian,
config/sparc/libgcc-sparc-glibc.ver, config/sparc/sol2-bi.h,
config/sparc/sol2-gas.h, config/sparc/sol2-gld-bi.h,
config/sparc/t-elf, config/sparc/t-linux64, config/sparc/t-sol2,
config/stormy16/stormy-abi, config/stormy16/t-stormy16,
config/t-darwin, config/t-libunwind, config/t-libunwind-elf,
config/t-linux, config/t-lynx, config/t-slibgcc-elf-ver,
config/t-slibgcc-sld, config/t-sol2, config/t-vxworks,
config/udivmod.c, config/udivmodsi4.c, config/v850/t-v850,
config/v850/t-v850e, config/xtensa/t-xtensa, diagnostic.def,
gdbinit.in, glimits.h, gstab.h, gsyms.h, java/ChangeLog,
java/ChangeLog.ptr, java/ChangeLog.tree-ssa, libgcc-std.ver,
limitx.h, version.c, xcoff.h: Add copyright and license notices.
* config/h8300/genmova.sh: Include copyright and license notices
in generated output.
* config/h8300/mova.md: Regenerate.
* doc/install.texi2html: Include word "Copyright" in copyright
notice and use name "Free Software Foundation, Inc.".
* ChangeLog, ChangeLog-2000, ChangeLog-2001, ChangeLog-2002,
ChangeLog-2003, ChangeLog-2004, ChangeLog-2005, ChangeLog-2006,
ChangeLog-2007, ChangeLog-2008: Correct dates.
ada:
* ChangeLog, ChangeLog.ptr, ChangeLog.tree-ssa: Add copyright and
license notices.
cp:
* ChangeLog, ChangeLog-1993, ChangeLog-1994, ChangeLog-1995,
ChangeLog-1996, ChangeLog-1997, ChangeLog-1998, ChangeLog-1999,
ChangeLog-2000, ChangeLog-2001, ChangeLog-2002, ChangeLog-2003,
ChangeLog-2004, ChangeLog-2005, ChangeLog-2006, ChangeLog-2007,
ChangeLog-2008, ChangeLog.ptr, ChangeLog.tree-ssa, NEWS,
cfns.gperf: Add copyright and license notices.
* cfns.h: Regenerate.
* ChangeLog, ChangeLog-2004: Correct dates.
fortran:
* ChangeLog, ChangeLog-2002, ChangeLog-2003, ChangeLog-2004,
ChangeLog-2005, ChangeLog-2006, ChangeLog-2007, ChangeLog-2008,
ChangeLog.ptr, config-lang.in, ioparm.def, mathbuiltins.def: Add
copyright and license notices.
* ChangeLog, ChangeLog-2005, ChangeLog-2006, ChangeLog-2007,
ChangeLog-2008: Correct dates.
java:
* ChangeLog, ChangeLog.ptr, ChangeLog.tree-ssa: Add copyright and
license notices.
objc:
* ChangeLog: Add copyright and license notices.
objcp:
* ChangeLog: Add copyright and license notices.
po:
* ChangeLog, EXCLUDES: Add copyright and license notices.
testsuite:
* ChangeLog, ChangeLog-1993-2007, ChangeLog-2008, ChangeLog.ptr,
ChangeLog.tree-ssa, README, README.QMTEST, README.compat,
README.gcc, g++.dg/README, g++.dg/compat/break/README,
g++.dg/gomp/gomp.exp, g++.old-deja/g++.brendan/README,
g++.old-deja/g++.oliva/ChangeLog, g++.old-deja/g++.robertl/README,
gcc.c-torture/ChangeLog.0,
gcc.c-torture/execute/builtins/builtins.exp, gcc.dg/README,
gcc.dg/gomp/gomp.exp, gcc.target/frv/frv.exp,
gcc.target/i386/math-torture/math-torture.exp,
gcc.target/mips/inter/mips16-inter.exp,
gcc.target/mips/mips-nonpic/README,
gcc.target/x86_64/abi/README.gcc,
gcc.target/xstormy16/xstormy16.exp, gcc.test-framework/README,
gfortran.dg/g77/README, gfortran.dg/gomp/gomp.exp,
gfortran.fortran-torture/ChangeLog.g95: Add copyright and license
notices.
* ChangeLog-1993-2007, ChangeLog: Correct dates.
From-SVN: r146533
2009-04-21 21:03:23 +02:00
|
|
|
|
|
2019-01-01 12:34:49 +01:00
|
|
|
|
Copyright (C) 2019 Free Software Foundation, Inc.
|
ABOUT-GCC-NLS, [...]: Add copyright and license notices.
* ABOUT-GCC-NLS, ChangeLog, ChangeLog-1997, ChangeLog-1998,
ChangeLog-1999, ChangeLog-2000, ChangeLog-2001, ChangeLog-2002,
ChangeLog-2003, ChangeLog-2004, ChangeLog-2005, ChangeLog-2006,
ChangeLog-2007, ChangeLog-2008, ChangeLog.dataflow, ChangeLog.lib,
ChangeLog.ptr, ChangeLog.tree-ssa, ChangeLog.tuples, FSFChangeLog,
FSFChangeLog.10, FSFChangeLog.11, LANGUAGES, ONEWS, acinclude.m4,
config/alpha/gnu.h, config/alpha/libgcc-alpha-ldbl.ver,
config/alpha/t-osf4, config/alpha/t-vms, config/alpha/va_list.h,
config/alpha/x-vms, config/arc/t-arc,
config/arm/README-interworking, config/arm/arm-c.c,
config/arm/gentune.sh, config/arm/libgcc-bpabi.ver,
config/arm/t-arm, config/arm/t-arm-elf, config/arm/t-arm-softfp,
config/arm/t-bpabi, config/arm/t-linux, config/arm/t-linux-eabi,
config/arm/t-netbsd, config/arm/t-pe, config/arm/t-strongarm-elf,
config/arm/t-symbian, config/arm/t-vxworks, config/arm/t-wince-pe,
config/avr/t-avr, config/bfin/elf.h, config/bfin/libgcc-bfin.ver,
config/bfin/linux.h, config/bfin/t-bfin, config/bfin/t-bfin-elf,
config/bfin/t-bfin-linux, config/bfin/t-bfin-uclinux,
config/bfin/uclinux.h, config/cris/mulsi3.asm, config/cris/t-cris,
config/cris/t-elfmulti, config/crx/t-crx,
config/darwin-ppc-ldouble-patch.def, config/darwin-sections.def,
config/divmod.c, config/fr30/t-fr30, config/frv/libgcc-frv.ver,
config/frv/t-frv, config/frv/t-linux, config/h8300/genmova.sh,
config/h8300/t-h8300, config/i386/athlon.md,
config/i386/darwin-libgcc.10.4.ver,
config/i386/darwin-libgcc.10.5.ver, config/i386/libgcc-glibc.ver,
config/i386/mach.h, config/i386/netbsd.h, config/i386/t-crtpc,
config/i386/t-cygming, config/i386/t-cygwin, config/i386/t-i386,
config/i386/t-linux64, config/i386/t-nwld,
config/i386/t-rtems-i386, config/i386/t-sol2-10,
config/i386/x-mingw32, config/ia64/div.md, config/ia64/elf.h,
config/ia64/ia64.opt, config/ia64/libgcc-glibc.ver,
config/ia64/libgcc-ia64.ver, config/ia64/linux.h,
config/ia64/sysv4.h, config/ia64/t-hpux, config/ia64/t-ia64,
config/iq2000/abi, config/iq2000/lib2extra-funcs.c,
config/iq2000/t-iq2000, config/libgcc-glibc.ver,
config/m32r/libgcc-glibc.ver, config/m32r/t-linux,
config/m32r/t-m32r, config/m68hc11/t-m68hc11,
config/m68k/t-floatlib, config/m68k/t-linux, config/m68k/t-mlibs,
config/m68k/t-uclinux, config/mcore/t-mcore,
config/mcore/t-mcore-pe, config/mips/20kc.md, config/mips/4130.md,
config/mips/5400.md, config/mips/5500.md, config/mips/crti.asm,
config/mips/crtn.asm, config/mips/irix-crti.asm,
config/mips/irix-crtn.asm, config/mips/libgcc-mips16.ver,
config/mips/mips-dsp.md, config/mips/mips-dspr2.md,
config/mips/mips-fixed.md, config/mips/sb1.md,
config/mips/sr71k.md, config/mips/t-elf, config/mips/t-gofast,
config/mips/t-iris6, config/mips/t-isa3264,
config/mips/t-libgcc-mips16, config/mips/t-linux64,
config/mips/t-mips, config/mips/t-r3900, config/mips/t-rtems,
config/mips/t-sb1, config/mips/t-sde, config/mips/t-sdemtk,
config/mips/t-slibgcc-irix, config/mips/t-sr71k, config/mips/t-st,
config/mips/t-vr, config/mips/t-vxworks, config/mmix/t-mmix,
config/mn10300/t-linux, config/mn10300/t-mn10300,
config/pa/pa32-regs.h, config/pa/t-hpux-shlib, config/pa/t-linux,
config/pa/t-linux64, config/pa/t-pa64, config/pdp11/t-pdp11,
config/picochip/libgccExtras/clzsi2.asm,
config/picochip/t-picochip, config/rs6000/darwin-ldouble-format,
config/rs6000/darwin-libgcc.10.4.ver,
config/rs6000/darwin-libgcc.10.5.ver,
config/rs6000/libgcc-ppc-glibc.ver, config/rs6000/ppc-asm.h,
config/rs6000/t-aix43, config/rs6000/t-aix52,
config/rs6000/t-darwin, config/rs6000/t-fprules,
config/rs6000/t-fprules-fpbit, config/rs6000/t-linux64,
config/rs6000/t-lynx, config/rs6000/t-netbsd,
config/rs6000/t-ppccomm, config/rs6000/t-ppcendian,
config/rs6000/t-ppcgas, config/rs6000/t-rs6000,
config/rs6000/t-rtems, config/rs6000/t-spe,
config/rs6000/t-vxworks, config/s390/libgcc-glibc.ver,
config/score/t-score-elf, config/sh/divcost-analysis,
config/sh/libgcc-glibc.ver, config/sh/t-netbsd, config/sh/t-sh,
config/sh/t-sh64, config/sh/t-superh, config/sh/t-symbian,
config/sparc/libgcc-sparc-glibc.ver, config/sparc/sol2-bi.h,
config/sparc/sol2-gas.h, config/sparc/sol2-gld-bi.h,
config/sparc/t-elf, config/sparc/t-linux64, config/sparc/t-sol2,
config/stormy16/stormy-abi, config/stormy16/t-stormy16,
config/t-darwin, config/t-libunwind, config/t-libunwind-elf,
config/t-linux, config/t-lynx, config/t-slibgcc-elf-ver,
config/t-slibgcc-sld, config/t-sol2, config/t-vxworks,
config/udivmod.c, config/udivmodsi4.c, config/v850/t-v850,
config/v850/t-v850e, config/xtensa/t-xtensa, diagnostic.def,
gdbinit.in, glimits.h, gstab.h, gsyms.h, java/ChangeLog,
java/ChangeLog.ptr, java/ChangeLog.tree-ssa, libgcc-std.ver,
limitx.h, version.c, xcoff.h: Add copyright and license notices.
* config/h8300/genmova.sh: Include copyright and license notices
in generated output.
* config/h8300/mova.md: Regenerate.
* doc/install.texi2html: Include word "Copyright" in copyright
notice and use name "Free Software Foundation, Inc.".
* ChangeLog, ChangeLog-2000, ChangeLog-2001, ChangeLog-2002,
ChangeLog-2003, ChangeLog-2004, ChangeLog-2005, ChangeLog-2006,
ChangeLog-2007, ChangeLog-2008: Correct dates.
ada:
* ChangeLog, ChangeLog.ptr, ChangeLog.tree-ssa: Add copyright and
license notices.
cp:
* ChangeLog, ChangeLog-1993, ChangeLog-1994, ChangeLog-1995,
ChangeLog-1996, ChangeLog-1997, ChangeLog-1998, ChangeLog-1999,
ChangeLog-2000, ChangeLog-2001, ChangeLog-2002, ChangeLog-2003,
ChangeLog-2004, ChangeLog-2005, ChangeLog-2006, ChangeLog-2007,
ChangeLog-2008, ChangeLog.ptr, ChangeLog.tree-ssa, NEWS,
cfns.gperf: Add copyright and license notices.
* cfns.h: Regenerate.
* ChangeLog, ChangeLog-2004: Correct dates.
fortran:
* ChangeLog, ChangeLog-2002, ChangeLog-2003, ChangeLog-2004,
ChangeLog-2005, ChangeLog-2006, ChangeLog-2007, ChangeLog-2008,
ChangeLog.ptr, config-lang.in, ioparm.def, mathbuiltins.def: Add
copyright and license notices.
* ChangeLog, ChangeLog-2005, ChangeLog-2006, ChangeLog-2007,
ChangeLog-2008: Correct dates.
java:
* ChangeLog, ChangeLog.ptr, ChangeLog.tree-ssa: Add copyright and
license notices.
objc:
* ChangeLog: Add copyright and license notices.
objcp:
* ChangeLog: Add copyright and license notices.
po:
* ChangeLog, EXCLUDES: Add copyright and license notices.
testsuite:
* ChangeLog, ChangeLog-1993-2007, ChangeLog-2008, ChangeLog.ptr,
ChangeLog.tree-ssa, README, README.QMTEST, README.compat,
README.gcc, g++.dg/README, g++.dg/compat/break/README,
g++.dg/gomp/gomp.exp, g++.old-deja/g++.brendan/README,
g++.old-deja/g++.oliva/ChangeLog, g++.old-deja/g++.robertl/README,
gcc.c-torture/ChangeLog.0,
gcc.c-torture/execute/builtins/builtins.exp, gcc.dg/README,
gcc.dg/gomp/gomp.exp, gcc.target/frv/frv.exp,
gcc.target/i386/math-torture/math-torture.exp,
gcc.target/mips/inter/mips16-inter.exp,
gcc.target/mips/mips-nonpic/README,
gcc.target/x86_64/abi/README.gcc,
gcc.target/xstormy16/xstormy16.exp, gcc.test-framework/README,
gfortran.dg/g77/README, gfortran.dg/gomp/gomp.exp,
gfortran.fortran-torture/ChangeLog.g95: Add copyright and license
notices.
* ChangeLog-1993-2007, ChangeLog: Correct dates.
From-SVN: r146533
2009-04-21 21:03:23 +02:00
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2018-04-06 22:04:17 +02:00
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved.
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