2002-01-23 22:03:53 +01:00
|
|
|
/* Xtensa configuration settings.
|
2020-01-01 12:51:42 +01:00
|
|
|
Copyright (C) 2001-2020 Free Software Foundation, Inc.
|
2010-05-26 19:36:37 +02:00
|
|
|
Contributed by Bob Wilson (bob.wilson@acm.org) at Tensilica.
|
2002-01-23 22:03:53 +01:00
|
|
|
|
lib1funcs.asm: Avoid use of .Lfe* in .size directives.
* config/xtensa/lib1funcs.asm: Avoid use of .Lfe* in .size directives.
(do_abs, do_addx2, do_addx4, do_addx8): New assembler macros.
(__mulsi3): Use do_addx* instead of ADDX* instructions. Formatting.
(nsau): Rename to do_nsau. Provide alternate version for use when
the NSAU instruction is available.
(__udivsi3, __divsi3, __umodsi3, __modsi3): Use do_nsau macro.
(__divsi3, __modsi3): Use do_abs macro instead of ABS instruction.
* config/xtensa/xtensa-config.h: Update comments to match binutils.
(XCHAL_HAVE_ABS, XCHAL_HAVE_ADDX): Define.
* config/xtensa/xtensa.h (MASK_ABS, MASK_ADDX): Define.
(TARGET_ABS, TARGET_ADDX): Define.
(TARGET_DEFAULT): Conditionally add MASK_ABS and MASK_ADDX.
(TARGET_SWITCHES): Add "abs", "no-abs", "addx", and "no-addx".
* config/xtensa/xtensa.md (*addx2, *addx4, *addx8, *subx2, *subx4,
*subx8): Set predicate condition to TARGET_ADDX.
(abssi2): Set predicate condition to TARGET_ABS.
* doc/invoke.texi (Option Summary): Document new "-mabs", "-mno-abs",
"-maddx", and "-mno-addx" options.
(Xtensa Options): Likewise. Also tag some opcode names with @code.
From-SVN: r67044
2003-05-21 01:39:09 +02:00
|
|
|
This program is free software; you can redistribute it and/or modify
|
|
|
|
it under the terms of the GNU General Public License as published by
|
|
|
|
the Free Software Foundation; either version 2, or (at your option)
|
|
|
|
any later version.
|
|
|
|
|
|
|
|
This program is distributed in the hope that it will be useful, but
|
|
|
|
WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
|
General Public License for more details.
|
|
|
|
|
|
|
|
You should have received a copy of the GNU General Public License
|
|
|
|
along with this program; if not, write to the Free Software
|
2005-05-10 17:22:21 +02:00
|
|
|
Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
|
2002-01-23 22:03:53 +01:00
|
|
|
|
|
|
|
#ifndef XTENSA_CONFIG_H
|
|
|
|
#define XTENSA_CONFIG_H
|
|
|
|
|
lib1funcs.asm: Avoid use of .Lfe* in .size directives.
* config/xtensa/lib1funcs.asm: Avoid use of .Lfe* in .size directives.
(do_abs, do_addx2, do_addx4, do_addx8): New assembler macros.
(__mulsi3): Use do_addx* instead of ADDX* instructions. Formatting.
(nsau): Rename to do_nsau. Provide alternate version for use when
the NSAU instruction is available.
(__udivsi3, __divsi3, __umodsi3, __modsi3): Use do_nsau macro.
(__divsi3, __modsi3): Use do_abs macro instead of ABS instruction.
* config/xtensa/xtensa-config.h: Update comments to match binutils.
(XCHAL_HAVE_ABS, XCHAL_HAVE_ADDX): Define.
* config/xtensa/xtensa.h (MASK_ABS, MASK_ADDX): Define.
(TARGET_ABS, TARGET_ADDX): Define.
(TARGET_DEFAULT): Conditionally add MASK_ABS and MASK_ADDX.
(TARGET_SWITCHES): Add "abs", "no-abs", "addx", and "no-addx".
* config/xtensa/xtensa.md (*addx2, *addx4, *addx8, *subx2, *subx4,
*subx8): Set predicate condition to TARGET_ADDX.
(abssi2): Set predicate condition to TARGET_ABS.
* doc/invoke.texi (Option Summary): Document new "-mabs", "-mno-abs",
"-maddx", and "-mno-addx" options.
(Xtensa Options): Likewise. Also tag some opcode names with @code.
From-SVN: r67044
2003-05-21 01:39:09 +02:00
|
|
|
/* The macros defined here match those with the same names in the Xtensa
|
|
|
|
compile-time HAL (Hardware Abstraction Layer). Please refer to the
|
|
|
|
Xtensa System Software Reference Manual for documentation of these
|
|
|
|
macros. */
|
|
|
|
|
2003-07-10 07:08:27 +02:00
|
|
|
#undef XCHAL_HAVE_BE
|
2002-01-23 22:03:53 +01:00
|
|
|
#define XCHAL_HAVE_BE 1
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_HAVE_DENSITY
|
2002-01-23 22:03:53 +01:00
|
|
|
#define XCHAL_HAVE_DENSITY 1
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_HAVE_CONST16
|
lib2funcs.S (TRAMPOLINE_SIZE): Change from 49 to 59.
* config/xtensa/lib2funcs.S (TRAMPOLINE_SIZE): Change from 49 to 59.
* config/xtensa/xtensa-config.h (XCHAL_HAVE_CONST16,
XCHAL_HAVE_L32R): New.
* config/xtensa/xtensa-protos.h (non_const_move_operand,
xtensa_load_constant, xtensa_function_prologue,
xtensa_function_epilogue): Delete prototypes.
(xtensa_expand_prologue): New.
* config/xtensa/xtensa.c (frame_size_const,
TARGET_ASM_FUNCTION_PROLOGUE, TARGET_MACHINE_DEPENDENT_REORG,
non_const_move_operand, xtensa_load_constant, xtensa_reorg,
xtensa_function_prologue): Delete.
(add_operand, xtensa_mem_offset): Formatting.
(move_operand): If the const16 option is available, allow any SFmode
and SImode constants.
(xtensa_emit_move_sequence): Inline the former contents of
xtensa_load_constant with modifications to handle the const16 option.
(override_options): Add xtensa_char_to_class['W'] and set it to
the general register class only if the const16 option is enabled.
Fix formatting. Disallow PIC when using the const16 option.
(print_operand): Reorganize to switch on "letter" instead of the
RTL code. Add output_operand_lossage calls for invalid cases.
Add support for 't' and 'b' letters.
(xtensa_expand_prologue): New function to replace
xtensa_function_prologue and xtensa_reorg.
(xtensa_function_epilogue): Declare this as static. Delete code
to print the retw.n or retw instruction.
(xtensa_return_addr): Use A0_REG instead of 0.
(xtensa_rtx_costs): Add costs for using the const16 option.
* config/xtensa/xtensa.h (MASK_CONST16, TARGET_CONST16): New.
(TARGET_DEFAULT): Add CONST16 if L32R instructions not available.
(TARGET_SWITCHES): Add "const16" and "no-const16".
(REG_CLASS_FROM_LETTER): Add comment about new 'W' letter.
(EXTRA_CONSTRAINT): Change 'T' constraint to only apply when not
using the const16 option.
(TRAMPOLINE_TEMPLATE): Rewrite to avoid hardwired use of l32r insn.
(TRAMPOLINE_SIZE): Change from 49 to 59.
(INITIALIZE_TRAMPOLINE): Adjust offsets to match new trampoline.
(GO_IF_LEGITIMATE_ADDRESS): Do not allow constant pool addresses
when using the const16 option.
(PREDICATE_CODES): Delete non_const_move_operand.
* config/xtensa/xtensa.md (define_constants): Add A1_REG, A8_REG, and
UNSPECV_ENTRY.
(movdi, movdf): If the source is a constant, always expand to a
sequence of movsi insns.
(movdi_internal, movdf_internal): Remove alternative using l32r insns.
(movsi_internal, movsf_internal): Add alternative using const16 insns.
(movsf): Add const16 support.
(entry, prologue, epilogue): New.
(set_frame_ptr): Add missing mode for unspec_volatile operation.
Likewise for subsequent split pattern.
* doc/invoke.texi (Option Summary, Xtensa Options): Document new
"-mconst16" and "-mno-const16" options.
From-SVN: r66809
2003-05-14 20:37:26 +02:00
|
|
|
#define XCHAL_HAVE_CONST16 0
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_HAVE_ABS
|
lib1funcs.asm: Avoid use of .Lfe* in .size directives.
* config/xtensa/lib1funcs.asm: Avoid use of .Lfe* in .size directives.
(do_abs, do_addx2, do_addx4, do_addx8): New assembler macros.
(__mulsi3): Use do_addx* instead of ADDX* instructions. Formatting.
(nsau): Rename to do_nsau. Provide alternate version for use when
the NSAU instruction is available.
(__udivsi3, __divsi3, __umodsi3, __modsi3): Use do_nsau macro.
(__divsi3, __modsi3): Use do_abs macro instead of ABS instruction.
* config/xtensa/xtensa-config.h: Update comments to match binutils.
(XCHAL_HAVE_ABS, XCHAL_HAVE_ADDX): Define.
* config/xtensa/xtensa.h (MASK_ABS, MASK_ADDX): Define.
(TARGET_ABS, TARGET_ADDX): Define.
(TARGET_DEFAULT): Conditionally add MASK_ABS and MASK_ADDX.
(TARGET_SWITCHES): Add "abs", "no-abs", "addx", and "no-addx".
* config/xtensa/xtensa.md (*addx2, *addx4, *addx8, *subx2, *subx4,
*subx8): Set predicate condition to TARGET_ADDX.
(abssi2): Set predicate condition to TARGET_ABS.
* doc/invoke.texi (Option Summary): Document new "-mabs", "-mno-abs",
"-maddx", and "-mno-addx" options.
(Xtensa Options): Likewise. Also tag some opcode names with @code.
From-SVN: r67044
2003-05-21 01:39:09 +02:00
|
|
|
#define XCHAL_HAVE_ABS 1
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_HAVE_ADDX
|
lib1funcs.asm: Avoid use of .Lfe* in .size directives.
* config/xtensa/lib1funcs.asm: Avoid use of .Lfe* in .size directives.
(do_abs, do_addx2, do_addx4, do_addx8): New assembler macros.
(__mulsi3): Use do_addx* instead of ADDX* instructions. Formatting.
(nsau): Rename to do_nsau. Provide alternate version for use when
the NSAU instruction is available.
(__udivsi3, __divsi3, __umodsi3, __modsi3): Use do_nsau macro.
(__divsi3, __modsi3): Use do_abs macro instead of ABS instruction.
* config/xtensa/xtensa-config.h: Update comments to match binutils.
(XCHAL_HAVE_ABS, XCHAL_HAVE_ADDX): Define.
* config/xtensa/xtensa.h (MASK_ABS, MASK_ADDX): Define.
(TARGET_ABS, TARGET_ADDX): Define.
(TARGET_DEFAULT): Conditionally add MASK_ABS and MASK_ADDX.
(TARGET_SWITCHES): Add "abs", "no-abs", "addx", and "no-addx".
* config/xtensa/xtensa.md (*addx2, *addx4, *addx8, *subx2, *subx4,
*subx8): Set predicate condition to TARGET_ADDX.
(abssi2): Set predicate condition to TARGET_ABS.
* doc/invoke.texi (Option Summary): Document new "-mabs", "-mno-abs",
"-maddx", and "-mno-addx" options.
(Xtensa Options): Likewise. Also tag some opcode names with @code.
From-SVN: r67044
2003-05-21 01:39:09 +02:00
|
|
|
#define XCHAL_HAVE_ADDX 1
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_HAVE_L32R
|
lib2funcs.S (TRAMPOLINE_SIZE): Change from 49 to 59.
* config/xtensa/lib2funcs.S (TRAMPOLINE_SIZE): Change from 49 to 59.
* config/xtensa/xtensa-config.h (XCHAL_HAVE_CONST16,
XCHAL_HAVE_L32R): New.
* config/xtensa/xtensa-protos.h (non_const_move_operand,
xtensa_load_constant, xtensa_function_prologue,
xtensa_function_epilogue): Delete prototypes.
(xtensa_expand_prologue): New.
* config/xtensa/xtensa.c (frame_size_const,
TARGET_ASM_FUNCTION_PROLOGUE, TARGET_MACHINE_DEPENDENT_REORG,
non_const_move_operand, xtensa_load_constant, xtensa_reorg,
xtensa_function_prologue): Delete.
(add_operand, xtensa_mem_offset): Formatting.
(move_operand): If the const16 option is available, allow any SFmode
and SImode constants.
(xtensa_emit_move_sequence): Inline the former contents of
xtensa_load_constant with modifications to handle the const16 option.
(override_options): Add xtensa_char_to_class['W'] and set it to
the general register class only if the const16 option is enabled.
Fix formatting. Disallow PIC when using the const16 option.
(print_operand): Reorganize to switch on "letter" instead of the
RTL code. Add output_operand_lossage calls for invalid cases.
Add support for 't' and 'b' letters.
(xtensa_expand_prologue): New function to replace
xtensa_function_prologue and xtensa_reorg.
(xtensa_function_epilogue): Declare this as static. Delete code
to print the retw.n or retw instruction.
(xtensa_return_addr): Use A0_REG instead of 0.
(xtensa_rtx_costs): Add costs for using the const16 option.
* config/xtensa/xtensa.h (MASK_CONST16, TARGET_CONST16): New.
(TARGET_DEFAULT): Add CONST16 if L32R instructions not available.
(TARGET_SWITCHES): Add "const16" and "no-const16".
(REG_CLASS_FROM_LETTER): Add comment about new 'W' letter.
(EXTRA_CONSTRAINT): Change 'T' constraint to only apply when not
using the const16 option.
(TRAMPOLINE_TEMPLATE): Rewrite to avoid hardwired use of l32r insn.
(TRAMPOLINE_SIZE): Change from 49 to 59.
(INITIALIZE_TRAMPOLINE): Adjust offsets to match new trampoline.
(GO_IF_LEGITIMATE_ADDRESS): Do not allow constant pool addresses
when using the const16 option.
(PREDICATE_CODES): Delete non_const_move_operand.
* config/xtensa/xtensa.md (define_constants): Add A1_REG, A8_REG, and
UNSPECV_ENTRY.
(movdi, movdf): If the source is a constant, always expand to a
sequence of movsi insns.
(movdi_internal, movdf_internal): Remove alternative using l32r insns.
(movsi_internal, movsf_internal): Add alternative using const16 insns.
(movsf): Add const16 support.
(entry, prologue, epilogue): New.
(set_frame_ptr): Add missing mode for unspec_volatile operation.
Likewise for subsequent split pattern.
* doc/invoke.texi (Option Summary, Xtensa Options): Document new
"-mconst16" and "-mno-const16" options.
From-SVN: r66809
2003-05-14 20:37:26 +02:00
|
|
|
#define XCHAL_HAVE_L32R 1
|
2003-07-10 07:08:27 +02:00
|
|
|
|
2004-10-08 02:28:50 +02:00
|
|
|
#undef XSHAL_USE_ABSOLUTE_LITERALS
|
|
|
|
#define XSHAL_USE_ABSOLUTE_LITERALS 0
|
|
|
|
|
2010-05-26 19:36:37 +02:00
|
|
|
#undef XSHAL_HAVE_TEXT_SECTION_LITERALS
|
|
|
|
#define XSHAL_HAVE_TEXT_SECTION_LITERALS 1 /* Set if there is some memory that allows both code and literals. */
|
|
|
|
|
2003-07-10 07:08:27 +02:00
|
|
|
#undef XCHAL_HAVE_MAC16
|
2002-01-23 22:03:53 +01:00
|
|
|
#define XCHAL_HAVE_MAC16 0
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_HAVE_MUL16
|
2008-11-19 19:26:00 +01:00
|
|
|
#define XCHAL_HAVE_MUL16 1
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_HAVE_MUL32
|
2008-11-19 19:26:00 +01:00
|
|
|
#define XCHAL_HAVE_MUL32 1
|
2003-07-10 07:08:27 +02:00
|
|
|
|
2006-01-10 00:41:11 +01:00
|
|
|
#undef XCHAL_HAVE_MUL32_HIGH
|
|
|
|
#define XCHAL_HAVE_MUL32_HIGH 0
|
|
|
|
|
2003-07-10 07:08:27 +02:00
|
|
|
#undef XCHAL_HAVE_DIV32
|
2008-11-19 19:26:00 +01:00
|
|
|
#define XCHAL_HAVE_DIV32 1
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_HAVE_NSA
|
2002-01-23 22:03:53 +01:00
|
|
|
#define XCHAL_HAVE_NSA 1
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_HAVE_MINMAX
|
2008-11-19 19:26:00 +01:00
|
|
|
#define XCHAL_HAVE_MINMAX 1
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_HAVE_SEXT
|
2008-11-19 19:26:00 +01:00
|
|
|
#define XCHAL_HAVE_SEXT 1
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_HAVE_LOOPS
|
2002-03-12 21:02:36 +01:00
|
|
|
#define XCHAL_HAVE_LOOPS 1
|
2003-07-10 07:08:27 +02:00
|
|
|
|
2007-07-18 20:51:21 +02:00
|
|
|
#undef XCHAL_HAVE_THREADPTR
|
2008-11-19 19:26:00 +01:00
|
|
|
#define XCHAL_HAVE_THREADPTR 1
|
2007-07-18 20:51:21 +02:00
|
|
|
|
|
|
|
#undef XCHAL_HAVE_RELEASE_SYNC
|
2008-11-19 19:26:00 +01:00
|
|
|
#define XCHAL_HAVE_RELEASE_SYNC 1
|
2007-07-18 20:51:21 +02:00
|
|
|
|
|
|
|
#undef XCHAL_HAVE_S32C1I
|
2008-11-19 19:26:00 +01:00
|
|
|
#define XCHAL_HAVE_S32C1I 1
|
2007-07-18 20:51:21 +02:00
|
|
|
|
2003-07-10 07:08:27 +02:00
|
|
|
#undef XCHAL_HAVE_BOOLEANS
|
2002-01-23 22:03:53 +01:00
|
|
|
#define XCHAL_HAVE_BOOLEANS 0
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_HAVE_FP
|
2002-01-23 22:03:53 +01:00
|
|
|
#define XCHAL_HAVE_FP 0
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_HAVE_FP_DIV
|
2002-01-23 22:03:53 +01:00
|
|
|
#define XCHAL_HAVE_FP_DIV 0
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_HAVE_FP_RECIP
|
2002-01-23 22:03:53 +01:00
|
|
|
#define XCHAL_HAVE_FP_RECIP 0
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_HAVE_FP_SQRT
|
2002-01-23 22:03:53 +01:00
|
|
|
#define XCHAL_HAVE_FP_SQRT 0
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_HAVE_FP_RSQRT
|
2002-01-23 22:03:53 +01:00
|
|
|
#define XCHAL_HAVE_FP_RSQRT 0
|
2003-07-10 07:08:27 +02:00
|
|
|
|
2010-05-26 19:36:37 +02:00
|
|
|
#undef XCHAL_HAVE_DFP_accel
|
|
|
|
#define XCHAL_HAVE_DFP_accel 0
|
2003-07-10 07:08:27 +02:00
|
|
|
#undef XCHAL_HAVE_WINDOWED
|
2003-07-01 02:14:33 +02:00
|
|
|
#define XCHAL_HAVE_WINDOWED 1
|
2002-01-23 22:03:53 +01:00
|
|
|
|
2008-02-11 18:53:16 +01:00
|
|
|
#undef XCHAL_NUM_AREGS
|
2008-11-19 19:26:00 +01:00
|
|
|
#define XCHAL_NUM_AREGS 32
|
2008-02-11 18:53:16 +01:00
|
|
|
|
2005-12-31 01:29:42 +01:00
|
|
|
#undef XCHAL_HAVE_WIDE_BRANCHES
|
|
|
|
#define XCHAL_HAVE_WIDE_BRANCHES 0
|
|
|
|
|
2004-10-08 02:28:50 +02:00
|
|
|
#undef XCHAL_HAVE_PREDICTED_BRANCHES
|
|
|
|
#define XCHAL_HAVE_PREDICTED_BRANCHES 0
|
|
|
|
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_ICACHE_SIZE
|
2008-11-19 19:26:00 +01:00
|
|
|
#define XCHAL_ICACHE_SIZE 16384
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_DCACHE_SIZE
|
2008-11-19 19:26:00 +01:00
|
|
|
#define XCHAL_DCACHE_SIZE 16384
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_ICACHE_LINESIZE
|
2008-11-19 19:26:00 +01:00
|
|
|
#define XCHAL_ICACHE_LINESIZE 32
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_DCACHE_LINESIZE
|
2008-11-19 19:26:00 +01:00
|
|
|
#define XCHAL_DCACHE_LINESIZE 32
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_ICACHE_LINEWIDTH
|
2008-11-19 19:26:00 +01:00
|
|
|
#define XCHAL_ICACHE_LINEWIDTH 5
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_DCACHE_LINEWIDTH
|
2008-11-19 19:26:00 +01:00
|
|
|
#define XCHAL_DCACHE_LINEWIDTH 5
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_DCACHE_IS_WRITEBACK
|
2008-11-19 19:26:00 +01:00
|
|
|
#define XCHAL_DCACHE_IS_WRITEBACK 1
|
2002-01-23 22:03:53 +01:00
|
|
|
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_HAVE_MMU
|
2002-01-23 22:03:53 +01:00
|
|
|
#define XCHAL_HAVE_MMU 1
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_MMU_MIN_PTE_PAGE_SIZE
|
2002-01-23 22:03:53 +01:00
|
|
|
#define XCHAL_MMU_MIN_PTE_PAGE_SIZE 12
|
|
|
|
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_HAVE_DEBUG
|
2003-07-01 02:14:33 +02:00
|
|
|
#define XCHAL_HAVE_DEBUG 1
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_NUM_IBREAK
|
2003-07-01 02:14:33 +02:00
|
|
|
#define XCHAL_NUM_IBREAK 2
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_NUM_DBREAK
|
2003-07-01 02:14:33 +02:00
|
|
|
#define XCHAL_NUM_DBREAK 2
|
2003-07-10 07:08:27 +02:00
|
|
|
|
|
|
|
#undef XCHAL_DEBUGLEVEL
|
2008-11-19 19:26:00 +01:00
|
|
|
#define XCHAL_DEBUGLEVEL 6
|
2003-07-01 02:14:33 +02:00
|
|
|
|
2003-07-10 07:08:27 +02:00
|
|
|
|
2008-02-11 18:53:16 +01:00
|
|
|
#undef XCHAL_MAX_INSTRUCTION_SIZE
|
|
|
|
#define XCHAL_MAX_INSTRUCTION_SIZE 3
|
|
|
|
|
2004-10-08 02:28:50 +02:00
|
|
|
#undef XCHAL_INST_FETCH_WIDTH
|
|
|
|
#define XCHAL_INST_FETCH_WIDTH 4
|
2003-07-01 02:14:33 +02:00
|
|
|
|
2006-11-27 21:15:58 +01:00
|
|
|
|
|
|
|
#undef XSHAL_ABI
|
|
|
|
#undef XTHAL_ABI_WINDOWED
|
|
|
|
#undef XTHAL_ABI_CALL0
|
|
|
|
#define XSHAL_ABI XTHAL_ABI_WINDOWED
|
|
|
|
#define XTHAL_ABI_WINDOWED 0
|
|
|
|
#define XTHAL_ABI_CALL0 1
|
|
|
|
|
2002-01-23 22:03:53 +01:00
|
|
|
#endif /* !XTENSA_CONFIG_H */
|