Add X86_TUNE_EMIT_VZEROUPPER to indicate if vzeroupper instruction should
be inserted before a transfer of control flow out of the function. It is
turned on by default unless we are tuning for KNL. Users can always use
-mzeroupper or -mno-zeroupper to override X86_TUNE_EMIT_VZEROUPPER.
2017-12-04 Sebastian Peryt <sebastian.peryt@intel.com>
H.J. Lu <hongjiu.lu@intel.com>
gcc/
Bakcported from trunk
PR target/82941
PR target/82942
PR target/82990
* config/i386/i386.c (pass_insert_vzeroupper): Remove
TARGET_AVX512F check from gate condition.
(ix86_check_avx256_register): Changed to ...
(ix86_check_avx_upper_register): ... this. Add extra check for
VALID_AVX512F_REG_OR_XI_MODE.
(ix86_avx_u128_mode_needed): Changed
ix86_check_avx256_register to ix86_check_avx_upper_register.
(ix86_check_avx256_stores): Changed to ...
(ix86_check_avx_upper_stores): ... this. Changed
ix86_check_avx256_register to ix86_check_avx_upper_register.
(ix86_avx_u128_mode_after): Changed
avx_reg256_found to avx_upper_reg_found. Changed
ix86_check_avx256_stores to ix86_check_avx_upper_stores.
(ix86_avx_u128_mode_entry): Changed
ix86_check_avx256_register to ix86_check_avx_upper_register.
(ix86_avx_u128_mode_exit): Ditto.
(ix86_option_override_internal): Set MASK_VZEROUPPER if
neither -mzeroupper nor -mno-zeroupper is used and
TARGET_EMIT_VZEROUPPER is set.
* config/i386/i386.h: (host_detect_local_cpu): New define.
(TARGET_EMIT_VZEROUPPER): New.
* config/i386/x86-tune.def: Add X86_TUNE_EMIT_VZEROUPPER.
2017-12-04 Sebastian Peryt <sebastian.peryt@intel.com>
H.J. Lu <hongjiu.lu@intel.com>
gcc/testsuite/
Backported from trunk
PR target/82941
PR target/82942
PR target/82990
* gcc.target/i386/pr82941-1.c: New test.
* gcc.target/i386/pr82941-2.c: Likewise.
* gcc.target/i386/pr82942-1.c: Likewise.
* gcc.target/i386/pr82942-2.c: Likewise.
* gcc.target/i386/pr82990-1.c: Likewise.
* gcc.target/i386/pr82990-2.c: Likewise.
* gcc.target/i386/pr82990-3.c: Likewise.
* gcc.target/i386/pr82990-4.c: Likewise.
* gcc.target/i386/pr82990-5.c: Likewise.
* gcc.target/i386/pr82990-6.c: Likewise.
* gcc.target/i386/pr82990-7.c: Likewise.
Co-Authored-By: H.J. Lu <hongjiu.lu@intel.com>
From-SVN: r255378
2017-12-03 Jerry DeLisle <jvdelisle@gcc.gnu.org>
Backport from trunk
PR libgfortran/83168
* io/write.c (select_string): Bump size by one to avoid
overrun.
From-SVN: r255373
2017-12-03 Jerry DeLisle <jvdelisle@gcc.gnu.org>
Dominique d'Humieres <dominiq@lps.ens.fr>
Backport from trunk
PR libgfortran/83191
* io/transfer.c (list_formatted_read_scalar): Do not set
namelist_mode bit here. (namelist_read): Likewise.
(data_transfer_init): Clear the mode bit here.
(finalize_transfer): Do set the mode bit just before any calls
to namelist_read or namelist_write. It can now be referred to
in complex_write.
* io/write.c (write_complex): Suppress the leading blanks when
namelist_mode bit is not set to 1.
* gfortran.dg/namelist_95.f90: New test.
Co-Authored-By: Dominique d'Humieres <dominiq@lps.ens.fr>
From-SVN: r255368
2017-12-02 Jerry DeLisle <jvdelisle@gcc.gnu.org>
Backport from trunk
PR libgfortran/83225
* io/io.h (is_internal_unit): Use the unit_is_internal bit.
* io/transfer.c (data_transfer_init): Set the bit to true for
internal units. Use that bit for checks for internal unit
initializations.
* io/unit.c (insert_unit): As a precaution, set the
internal_unit_kind to zero when a unit structure is first created.
From-SVN: r255364
The current rs6000 rtx_cost for comparisons against 0 is very high if
TARGET_ISEL && !TARGET_MFCRF, much higher than for reg-reg comparisons,
much higher than a load of 0 and such a reg-reg-comparison. This leads
to infinite recursion in CSE (see PR81288).
This patch removes the too-high cost, also simplifying this code.
PR 81288/target
* config/rs6000/rs6000.c (rs6000_rtx_costs): Do not handle
TARGET_ISEL && !TARGET_MFCRF differently. Simplify code.
From-SVN: r255337
Backport from mainline
2017-11-03 Jonathan Wakely <jwakely@redhat.com>
* include/bits/node_handle.h (_Node_insert_return::get): Remove, as
per P0508R0.
From-SVN: r255322
gcc/
Backport from mainline
2017-11-30 Jim Wilson <jimw@sifive.com>
* doc/invoke.texi (RISC-V Options): Delete nonexistent -mmemcpy and
-mno-memcpy options. For -mplt, -mfdiv, -mdiv, -msave-restore, and
-mstrict-align, add info on default value. Delete redundant lines for
-mabi. Add missing -mexplicit-relocs docs.
Backport from mainline
2017-11-01 Palmer Dabbelt <palmer@dabbelt.com>
* doc/invoke.texi (RISC-V Options): Use "@minus{}2 GB", not "-2 GB".
* doc/invoke.texi (RISC-V Options): Explicitly name the medlow
and medany code models, and describe what they do.
2017-10-27 Palmer Dabbelt <palmer@dabbelt.com>
PR target/82717
* doc/invoke.texi (RISC-V) <-mabi>: Correct and improve.
From-SVN: r255281
2017-11-29 Martin Jambor <mjambor@suse.cz>
PR ipa/82808
* tree.c (expr_type_first_operand_type_p): New function.
* tree.h (expr_type_first_operand_type_p): Declare it.
* ipa-cp.c (ipa_get_jf_pass_through_result): Use it.
testsuite/
* gcc.dg/ipa/pr82808.c: New test.
From-SVN: r255256
Needed for the UT699 errata workaround to function correctly when
compiling with -fPIC.
Backport from mainline
2017-11-29 Daniel Cederman <cederman@gaisler.com>
gcc/
* config/sparc/sparc.c (sparc_do_work_around_errata): Treat the
movsi_pic_gotdata_op instruction as a load for the UT699 errata
workaround.
From-SVN: r255245
The sequence
st
fdivd / fsqrtd
std
was generated in some cases with -mfix-ut699 when there was
a st before the div/sqrt. This sequence could trigger the b2bst errata.
Now the following safe sequence is generated instead:
st
nop
fdivd / fsqrtd
std
Backport from mainline
2017-11-29 Martin Aberg <maberg@gaisler.com>
gcc/
* config/sparc/sparc.md (divdf3_fix): Add NOP and adjust length
to prevent b2bst errata sequence.
(sqrtdf2_fix): Likewise.
From-SVN: r255244
This patch provides a workaround for the errata described in GRLIB-TN-0013.
If the workaround is enabled it will:
* Prevent div and sqrt instructions in the delay slot.
* Insert NOPs to prevent the sequence (div/sqrt) -> (two or three floating
point operations or loads) -> (div/sqrt).
* Not insert NOPs if any of the floating point operations have a dependency
on the destination register of the first (div/sqrt).
* Not insert NOPs if one of the floating point operations is a (div/sqrt).
* Insert NOPs to prevent (div/sqrt) followed by a branch.
It is applicable to GR712RC, UT700, and UT699.
Backport from mainline
2017-11-29 Daniel Cederman <cederman@gaisler.com>
gcc/
* config/sparc/sparc.c (fpop_reg_depend_p): New function.
(div_sqrt_insn_p): New function.
(sparc_do_work_around_errata): Insert NOP instructions to
prevent sequences that could trigger the TN-0013 errata for
certain LEON3 processors.
(pass_work_around_errata::gate): Also test sparc_fix_lost_divsqrt.
(sparc_option_override): Set sparc_fix_lost_divsqrt appropriately.
* config/sparc/sparc.md (fix_lost_divsqrt): New attribute.
(in_branch_delay): Prevent div and sqrt in delay slot if
fix_lost_divsqrt.
* config/sparc/sparc.opt (sparc_fix_lost_divsqrt): New variable.
From-SVN: r255243
This patch provides a workaround for the errata described in GRLIB-TN-0010.
If the workaround is enabled it will:
* Insert a NOP between load instruction and atomic
instruction (swap, ldstub, casa).
* Insert a NOP at branch target if load in delay slot
and atomic instruction at branch target.
It is applicable to UT700.
Backport from mainline
2017-11-29 Daniel Cederman <cederman@gaisler.com>
gcc/
* config/sparc/sparc.c (atomic_insn_p): New function.
(sparc_do_work_around_errata): Insert NOP instructions to
prevent sequences that could trigger the TN-0010 errata for
UT700.
* config/sparc/sync.md (atomic_compare_and_swap_leon3_1): Make
instruction referable in atomic_insns_p.
From-SVN: r255242
This patch provides a workaround for the errata described in GRLIB-TN-0011.
If the workaround is enabled it will:
* Insert .align 16 before atomic instructions (swap, ldstub, casa).
It is applicable to GR712RC.
Backport from mainline
2017-11-29 Daniel Cederman <cederman@gaisler.com>
gcc/
* config/sparc/sync.md (swapsi): 16-byte align if sparc_fix_gr712rc.
(atomic_compare_and_swap_leon3_1): Likewise.
(ldstub): Likewise.
From-SVN: r255241
This patch provides a workaround for the errata described in GRLIB-TN-0012.
If the workaround is enabled it will:
* Prevent any floating-point operation from being placed in the
delay slot of an annulled integer branch.
* Place a NOP at the branch target of an integer branch if it is
a floating-point operation or a floating-point branch.
It is applicable to GR712RC.
Backport from mainline
2017-11-29 Daniel Cederman <cederman@gaisler.com>
gcc/
* config/sparc/sparc.c (fpop_insn_p): New function.
(sparc_do_work_around_errata): Insert NOP instructions to
prevent sequences that could trigger the TN-0012 errata for
GR712RC.
(pass_work_around_errata::gate): Also test sparc_fix_gr712rc.
* config/sparc/sparc.md (fix_gr712rc): New attribute.
(in_branch_annul_delay): Prevent floating-point instructions
in delay slot of annulled integer branch.
From-SVN: r255240
gcc/
Backport from mainline
2017-11-04 Andrew Waterman <andrew@sifive.com>
* config/riscv/riscv.c (riscv_option_override): Conditionally set
TARGET_STRICT_ALIGN based upon -mtune argument.
Backport from mainline
2017-05-04 Andrew Waterman <andrew@sifive.com>
* config/riscv/riscv.opt (mstrict-align): New option.
* config/riscv/riscv.h (STRICT_ALIGNMENT): Use it. Update comment.
(SLOW_UNALIGNED_ACCESS): Define.
(riscv_slow_unaligned_access): Declare.
* config/riscv/riscv.c (riscv_tune_info): Add slow_unaligned_access
field.
(riscv_slow_unaligned_access): New variable.
(rocket_tune_info): Set slow_unaligned_access to true.
(optimize_size_tune_info): Set slow_unaligned_access to false.
(riscv_cpu_info_table): Add entry for optimize_size_tune_info.
(riscv_valid_lo_sum_p): Use TARGET_STRICT_ALIGN.
(riscv_option_override): Set riscv_slow_unaligned_access.
* doc/invoke.texi: Add -mstrict-align to RISC-V.
From-SVN: r255221
gcc/
Backport from mainline
2017-11-07 Michael Clark <michaeljclark@mac.com>
* config/riscv/linux.h (MUSL_ABI_SUFFIX): New define.
(MUSL_DYNAMIC_LINKER): Likewise.
From-SVN: r255216
2017-11-28 Paul Thomas <pault@gcc.gnu.org>
PR fortran/83021
* resolve.c (resolve_component): Only escape for use assciated
vtypes if the current namespace has no proc_name and is most
particularly block data.
From-SVN: r255205
If we have a PARALLEL of two SETs, and one half is unused, we currently
happily split that into two instructions (albeit the unused one is
useless). Worse, as PR82621 shows, combine will happily merge this
insn into I3 even if some intervening insn sets the same register
again, which is wrong.
This fixes it by not splitting PARALLELs with REG_UNUSED notes. It
all is handled fine by combine in that case; just the "single set
that is unused" case isn't handled properly.
This also results in better code: combine will now actually throw
away the unused SET. (It still won't do that in an I3).
PR rtl-optimization/82621
* combine.c (try_combine): Do not split PARALLELs of two SETs if the
dest of one of those SETs is unused.
From-SVN: r255142
2017-11-23 Paul Thomas <pault@gcc.gnu.org>
Backported from trunk
PR fortran/79072
* trans-expr.c (trans_class_vptr_len_assignment): Set from_len
if the temporary is unlimited polymorphic.
* trans-stmt.c (trans_associate_var): Use the fake result decl
to obtain the 'len' field from an explicit function result when
in that function scope.
2017-11-23 Paul Thomas <pault@gcc.gnu.org>
Backported from trunk
PR fortran/79072
* gfortran.dg/class_result_5.f90: New test.
* gfortran.dg/class_result_6.f90: New test.
From-SVN: r255120
2017-11-21 Paul Thomas <pault@gcc.gnu.org>
Backported from trunk fix for PR82586
PR fortran/78686
* resolve.c (resolve_generic_f): Check usage of derived type by
calling gfc_use_derived.
2017-11-21 Paul Thomas <pault@gcc.gnu.org>
Backported from trunk fix for PR82586
PR fortran/78686
* gfortran.dg/pr78686.f90: New test.
From-SVN: r255029
GCC Administrator
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Jim Wilson
Martin Jambor
Daniel Cederman
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