* configure.ac (mips*-*-*linux*, mips*-*-gnu*): Use mt-mips-gnu.
* configure: Regenerate.
config/
* mt-mips16-compat: New file, taken from mt-mips-elfoabi.
* mt-mips-elfoabi: Include mt-mips16-compat.
* mt-mips-gnu: New file.
gcc/
* config.gcc (mips*-*-linux*, mips64*-*-linux*): Add
mips/t-libgcc-mips16 to tmake_file.
* config/mips/mips-protos.h (mips_call_type): New enum.
(mips_pic_base_register, mips_got_load): Declare.
(mips_restore_gp): Take an rtx argument.
(mips_use_pic_fn_addr_reg_p): Declare.
(mips_expand_call): Replace the sibcall_p argument with
a mips_call_type argument. Add a lazy_p parameter.
(mips_split_call): Declare.
* config/mips/mips.h (MIPS16_PIC_TEMP_REGNUM): New macro.
(MIPS16_PIC_TEMP): Likewise.
(reg_class): Delete M16_NA_REGS.
(REG_CLASS_NAMES, REG_CLASS_CONTENTS): Update accordingly.
(SYMBOL_FLAG_BIND_NOW, SYMBOL_REF_BIND_NOW_P): New macros.
(mips_split_hi_p): Declare.
* config/mips/mips.c (mips_split_hi_p): New array.
(mips_regno_to_class): Change M16_NA_REGS entries to M16_REGS.
(mips_got_symbol_type_p): New function.
(mips_global_symbol_p): Check SYMBOL_REF_EXTERNAL_P.
(mips16_stub_function_p): New function.
(mips16_local_function_p): Likewise.
(mips_use_pic_fn_addr_reg_p): Likewise.
(mips_cannot_force_const_mem): Return false for HIGHs.
Extend CONST_INT and symbolic handling to MIPS16, using
mips_symbol_insns to check that the base symbol type is a
legitimate constant. Reject GOT-based constants if
TARGET_MIPS16_PCREL_LOADS.
(mips_const_insns): Check targetm.cannot_force_const_mem when
decomposing a symbolic base and a large offset.
(mips_emit_call_insn): Add ORIG_ADDR and ADDR parameters.
When calling a function that needs $25 from MIPS16 code,
move the target address into $25 separately and add a USE
to the call insn.
(mips16_gp_pseudo_reg): Insert the initializer immediately
before the first real insn.
(mips_pic_base_register, mips_got_load): New functions.
(mips_split_symbol): Generalize the name of the LO_SUM_OUT
parameter to LOW_OUT. Say that it can be any valid SET_SRC
when splitting a load-address operation. Split SYMBOL_GOT_DISP
constants and highs of SYMBOL_GOT_PAGE_OFST constants.
(mips_call_tls_get_addr): Update the call to mips_expand_call,
also passing NULL_RTX rather than const0_rtx as the aux argument.
(mips_rewrite_small_data_p): Check mips_lo_relocs and mips_split_p
instead of TARGET_EXPLICIT_RELOCS.
(mips_ok_for_lazy_binding_p): Check SYMBOL_REF_BIND_NOW_P.
(mips_load_call_address): Replace the sibcall_p argument with
a mips_call_type argument. Use mips_got_load.
(mips16_local_alias): New structure.
(mips16_local_aliases): New variable.
(mips16_local_aliases_hash): New function.
(mips16_local_aliases_eq): Likewise.
(mips16_local_alias): Likewise.
(mips16_stub_function): Likewise.
(mips16_build_function_stub): Create a local alias for the target
function. Handle TARGET_ABICALLS. For PIC abicalls, emit a
.cpload directive and an R_MIPS_NONE relocation for the target
function, then load the alias rather than the function itself.
Wrap the non-PIC abicalls version in ".option pic0/.option pic2".
(mips16_copy_fpr_return_value): Use mips16_stub_function and
mips_expand_call. Set SYMBOL_REF_BIND_NOW on the symbol.
(mips16_build_call_stub): Replace the FN parameter with an
FN_PTR parameter. Force the address into a register if it
isn't a call_insn_operand; don't rely on the caller to do this.
If a call to a locally-defined and locally-binding MIPS16
function must be made indirectly, redirect the call to the
function's local alias. Use mips16_stub_function_p,
mips16_stub_function, mips_expand_call and use_reg.
Set SYMBOL_FLAG_BIND_NOW on __mips_call_* symbols.
Use explicit %hi and %lo accesses where possible.
Use MIPS_CALL to generate the correct code form of a
jal instruction. Add clobbers of $18 instead of uses.
Update the call to mips_emit_call_insn.
(mips_expand_call): Replace the SIBCALL_P argument with a
mips_call_type argument and handle the new MIPS_CALL_EPILOGUE value.
Take a LAZY_P parameter. Call mips16_build_call_stub first,
allowing it to modify the call address. Update the calls to
mips_load_call_address and mips_emit_call_insn.
(mips_split_call): New function.
(mips_init_relocs): Clear mips_split_hi_p. Only use %gp_rel if
!TARGET_MIPS16. Split SYMBOL_GOT_DISP, and the high parts of
SYMBOL_GOT_PAGE_OFST, for MIPS16 code.
(mips_global_pointer): Check mips16_cfun_returns_in_fpr_p.
(mips_extra_live_on_entry): Include MIPS16_PIC_TEMP_REGNUM
if TARGET_MIPS16.
(mips_cprestore_slot): New function.
(mips_restore_gp): Take a TEMP parameter. Handle TARGET_MIPS16
and use mips_cprestore_slot.
(mips_output_function_prologue): Handle TARGET_MIPS16 for
LOADGP_OLDABI.
(mips_emit_loadgp): Move into MIPS16_PIC_TEMP for MIPS16,
then use a copygp_mips16 instruction to set up $28.
(mips_expand_prologue): Initialize the cprestore slot for MIPS16 too.
(mips16_lay_out_constants): Call split_all_insns_noflow.
(mips_reorg_process_insns): Explicitly set all_noreorder_p to
false if TARGET_MIPS16.
(mips_reorg): Don't call vr4130_align_insns if TARGET_MIPS16.
(mips_output_mi_thunk): Use mips_got_symbol_type_p. Use the
mips_dangerous_for_la25_p approach for MIPS16 PIC calls too.
(mips_set_mips16_mode): Always set MASK_EXPLICIT_RELOCS for
MIPS16 code. Allow MIPS16 o32 PIC.
(mips_override_options): Allow MIPS16 o32 PIC.
* config/mips/mips.md: Lower CONST_GP_P moves into register moves
after reload if TARGET_USE_GOT.
(UNSPEC_COPYGP): New constant.
(length): Use a default length of 8 for MIPS16 GOT loads.
(*got_disp<mode>): Check mips_split_p instead of TARGET_XGOT.
(*got_page<mode>): Check mips_split_hi_p.
(*got_disp<mode>, *got_page<mode>): Use mips_got_load.
(unspec_got<mode>, unspec_call<mode>): New expanders.
(load_got<mode>, load_call<mode>): Remove the length attributes.
Use a got attribute instead of a type attribute.
(copygp_mips16): New insn.
(restore_gp): Add a scratch clobber and pass it to mips_restore_gp.
(load_call<mode>): Use a "d" constraint instead of an "r" constraint.
(sibcall, sibcall_value, call, call_value): Update the calls
to mips_expand_call.
(call_internal, call_value_internal): Use mips_split_call.
(call_value_multiple_internal): Likewise.
(call_split): Move after call_internal (the insn it is split from).
(call_internal_direct, call_value_internal_direct): Turn into
define_insn_and_splits. Split if TARGET_SPLIT_CALLS.
(call_direct_split, call_value_direct_split): New patterns.
* config/mips/constraints.md (c): Handle TARGET_MIPS16 first
and use M16_REGS instead of M16_NA_REGS.
* config/mips/predicates.md (const_call_insn_operand): Replace
the TARGET_ABSOLUTE_ABICALLS-based check with a more general
mips_use_pic_fn_addr_reg_p check.
(move_operand): Reject HIGHs if mips_split_hi_p.
* config/mips/mips16.S: Assembly as empty if the ABI is not suitable.
(__mips16_floatunsisf): Inline __mips16_floatsisf.
(CALL_STUB_NO_RET, CALL_STUB_REG): Copy the target register to $25.
* config/mips/libgcc-mips16.ver: New file.
* config/mips/t-libgcc-mips16 (SHLIB_MAPFILES): Add
$(srcdir)/config/mips/libgcc-mips16.ver.
gcc/testsuite/
* lib/target-supports.exp (check_profiling_available): Return false
for -p and -pg on MIPS16 targets.
From-SVN: r138912
gcc/
PR target/35802
* config/mips/mips.h (reg_class): Remove V1_REG.
(REG_CLASS_NAMES, REG_CLASS_CONTENTS): Update accordingly.
* config/mips/mips.c (mips_regno_to_class): Map $3 to M16_NA_REGS
instead of V1_REGS.
(mips_get_tp): New function.
(mips_legitimize_tls_address): Use it.
* config/mips/constraints.md (v): Delete.
* config/mips/mips.md (TLS_GET_TP_REGNUM): New constant.
(tls_get_tp_<mode>): Allow any GPR destination and clobber $3.
After reload, split into a move and ...
(*tls_get_tp_<mode>_split): ...this new instruction.
gcc/testsuite/
PR target/35802
* gcc.target/mips/pr35802.c: New test.
From-SVN: r137670
gcc/
* config/mips/mips-protos.h (mips_split_const_insns): Declare.
* config/mips/mips.c (mips_split_const_insns): New function.
* config/mips/mips.md (move_type): New attribute.
(mode): Move attribute definition earlier in file. Add "TI"
and "TF".
(dword_mode): New attribute.
(type): Avoid long line. Map "move_type"s to "type"s,
choosing "multi" for doubleword moves if appropriate.
Swap MTC/MFC comments to match their declaration order.
(extended_mips16): Default to "yes" if "move_type" is "sll0",
"type" is "branch" or "jal" is "direct".
(length): Handle "extended_mips16" first. Make the default
"0" for "ghost" instructions. Set the length from "move_type".
(truncdisi2, truncdihi2, truncdiqi2): Use "move_type" instead
of "type", with "sll0" for the register alternative. Remove the
"extended_mips16" attribute.
(zero_extendsidi2, *clear_upper32): Use "move_type" instead
of "type", with "shift_shift" for the register alternative.
Remove the "length" attribute.
(*extend<SHORT:mode><GPR:mode>2, *extendqihi2): Likewise.
(*zero_extend<SHORT:mode><GPR:mode>2): Use "move_type" instead
of "type", with "andi" for the register alternative.
(*zero_extendqihi2): Likewise.
(*zero_extend<SHORT:mode><GPR:mode>2_mips16e): Use a "move_type"
of "andi" instead of a "type" of "arith".
(*zero_extend<SHORT:mode><GPR:mode>2_mips16): Use "move_type"
instead of "type".
(*zero_extendqihi2_mips16, mov_<load>l, mov_<load>r, mov_<store>l)
(mov_<store>r, *mov<mode>_ra): Likewise.
(extendsidi2): Use "move_type" instead of "type", with "move"
for the register alternative.
(*extend<SHORT:mode><GPR:mode>2_mips16e): Use "move_type" instead
of "type", with "signext" for the register alternative.
(*extend<SHORT:mode><GPR:mode>2_se<SHORT:size>): Likewise.
(*extendqihi2_mips16e, *extendqihi2_seb): Likewise.
(fix_truncdfsi2_insn, fix_truncsfsi2_insn, fix_truncdfdi2)
(fix_truncsfdi2, floatsidf2, floatdidf2, floatsisf2, floatdisf2)
(floatdisf2, *branch_equality<mode>_mips16): Likewise.
(unnamed branch insn): Likewise.
(*movdi_gp32_fp64): Fold into...
(*movdi_32bit): ...here.
(*movdf_hardfloat_64bit, *movdf_hardfloat_32bit): Combine into...
(*movdf_hardfloat): ...this new pattern.
(*movdf_softfloat): Remove redundant FPR alternatives.
(*movti, *movti_mips16, *movtf, *movtf_mips16): Add "mode" attributes.
(*movv2sf_hardfloat_64bit, *movv2sf_hardfloat_32bit): Combine into...
(*movv2sf): ...this new pattern. Use "DF" rather than "SF" for
the "move" attribute.
(*movdi_32bit): Use "move_type" instead of "type" and remove the
"length" attribute. Use "fpload" and "fpstore" instead of "load"
and "store" for COP loads and stores.
(*movdi_32bit_mips16, *movdi_64bit, *movsi_internal, movcc)
(*movhi_internal, *movhi_mips16, *movqi_internal, *movqi_mips16)
(*movsf_hardfloat, *movsf_softfloat, *movsi_mips16, *movdf_hardfloat)
(*movdf_softfloat, *movdf_mips16, *movti, *movti_mips16, *movtf)
(*movtf_mips16, *movv2sf): Likewise.
(mfhi<GPR:mode>_<HILO:mode>, mflo<GPR:mode>_<HILO:mode>)
(load_low<mode>, load_high<mode>, store_word<mode>, mthc1<mode>)
(mfhc1<mode>): Use "move_type" instead of "move".
(*low<mode>_mips16): Use "extended_mips16" instead of "length".
(loadgp_blockage): Remove the "length" attribute.
(blockage, set_got_version, update_got_version): Likewise.
(call_internal): Remove the "extended_mips16" attribute.
(call_value_internal, call_value_multiple_internal): Likewise.
* config/mips/loongson.md (mov<mode>_internal): Use "move_type"
instead of "move".
* config/mips/mips-dsp.md (mips_lbux, mips_lhx, mips_lwx): Remove
the "length" attribute.
From-SVN: r137194
* config/mips/mips.h (ISA_HAS_CONDMOVE): Slice ISA_HAS_FP_CONDMOVE
from it.
(ISA_HAS_FP_CONDMOVE): New macro.
(ISA_HAS_FP_MADD4_MSUB4, ISA_HAS_FP_MADD3_MSUB3): New macros.
(ISA_HAS_NMADD_NMSUB): Rename to ISA_HAS_NMADD4_NMSUB4.
(ISA_HAS_NMADD3_NMSUB3): New macro.
* config/mips/mips.c (mips_rtx_costs): Update.
* config/mips/mips.md (MOVECC): Don't use FP conditional moves when
compiling for ST Loongson 2E/2F.
(madd<mode>): Rename to madd4<mode>. Update.
(madd3<mode>): New pattern.
(msub<mode>): Rename to msub4<mode>. Update.
(msub3<mode>): New pattern.
(nmadd<mode>): Rename to nmadd4<mode>. Update.
(nmadd3<mode>): New pattern.
(nmadd<mode>_fastmath): Rename to nmadd4<mode>_fastmath. Update.
(nmadd3<mode>_fastmath): New pattern.
(nmsub<mode>): Rename to nmsub4<mode>. Update.
(nmsub3<mode>): New pattern.
(nmsub<mode>_fastmath): Rename to nmsub4<mode>_fastmath. Update.
(nmsub3<mode>_fastmath): New pattern.
(mov<SCALARF:mode>_on_<MOVECC:mode>, mov<mode>cc): Update.
From-SVN: r136887
gcc/
* doc/md.texi: Synchronize with later constraints.md change.
* longlong.h (umul_ppmm): Replace the MIPS asm implementation
with a C implementation.
* config/mips/mips.c (mips_legitimize_move): Remove MFHI and
MFLO handling.
(mips_subword): Assume TImode for CONST_INTs if TARGET_64BIT.
(mips_split_doubleword_move): Use special MTHI and MFHI instructions
when moving to and from MD_REGNUM.
(mips_output_move): Don't handle moves from GPRs to HI_REGNUM.
Handle moves from LO_REGNUM to GPRs using MFLO, MACC or DMACC.
Handle byte and halfword moves.
(mips_hard_regno_mode_ok_p): Handle MD_REGS and DSP_ACC_REGS
separately.
* config/mips/constraints.md (h): Turn into NO_REGS.
(l, x): Update documentation.
* config/mips/mips.md (UNSPEC_MFHILO): Delete.
(UNSPEC_MFHI, UNSPEC_MTHI, UNSPEC_SET_HILO): New.
(UNSPEC_TLS_LDM, UNSPEC_TLS_GET_TP): Renumber.
(HILO): New mode iterator.
(MOVE128): Add TI.
(any_div): New code iterator.
(u): Extend code attribute to div and udiv.
(*add<mode>3_mips16, *movdi_64bit_mips16, *movsi_mips16): Use
d_operand in the splitters. Remove redundant CONST_INT checks.
(mulsi3_mult3, mul<mode>3_internal, mul<mode>3_r4000, *mul_acc_si)
(*macc, *msac, *msac_using_macc, *macc2, *msac2, *mul_sub_si)
(*muls): Remove "=h" clobbers. Adjust peephole2s and define_splits
accordingly, using normal moves instead of unspecs to move LO into
a GPR. Use d_operand and lo_operand instead of *_REG_P checks.
(<u>mulsidi3): Handle expansion in C code.
(<u>mulsidi3_32bit_internal): Rename to...
(<u>mulsidi3_32bit): ...this.
(<u>mulsidi3_32bit_r4000): Fix insn separator.
(*<u>mulsidi3_64bit): Rename to...
(<u>mulsidi3_64bit): ...this. Combine DImode "=h" and "=l" clobbers
into a TImode "=x" clobber. In the split, use an UNSPEC_SET_HILO
to set LO and HI to the multiplication result. Use a normal move
for MFLO and an unspec for MFHI.
(*<u>mulsidi3_64bit_parts): Replace with...
(<u>mulsidi3_64bit_hilo): ...this new instruction.
(<su>mulsi3_highpart): Extend to TARGET_FIX_R4000.
(<su>mulsi3_highpart_internal): Turn into a define_insn_and_split
and extend it to TARGET_FIX_R4000. Store the destination in a GPR
instead of HI. Split the instruction into a separate multiplication
and MFHI if !TARGET_FIX_R4000.
(<su>muldi3_highpart): Likewise.
(<su>mulsi3_highpart_mulhi_internal): Remove the first alternative
and the "=h" clobber.
(*<su>mulsi3_highpart_neg_mulhi_internal): Likewise.
(<u>mulditi3): New expander.
(<u>mulditi3_internal, <u>mulditi3_r4000): New patterns.
(madsi): Remove "=h" clobber.
(divmod<mode>4, udivmod<mode>4): Turn into define_insn_and_splits.
Force the modulus result to be a GPR and split the instruction into
a division followed by an MFHI after reload.
(<u>divmod<GPR:mode>4_hilo_<HILO:mode>): New instruction.
(*lea_high64): Use d_operand in the define_peephole2. Likewise
the MIPS16 HIGH define_split.
(*movdi_32bit, *movdi_gp32_fp64, *movdi_32bit_mips16): Change type
of acc<->gpr moves to "multi".
(*movdi_64bit): Replace the single "x" alternative with
alternatives for moving into and out of "a".
(*movhi_internal, *movqi_internal): Likewise. Use mips_output_move.
(*movsi_internal): Extend the "d<-A" alternative to "d<-a".
(*movdi_64bit_mips16, *movsi_mips16): Add d<-a alternatives.
Use d_operand in the splitters. Remove redundant CONST_INT checks.
(*movhi_mips16, *movqi_mips16): Likewise. Use mips_output_move.
(movti): New expander.
(*movti, *movti_mips16): New insns.
(mfhilo_<mode>, *mfhilo_<mode>, *mfhilo_<mode>_macc): Delete.
(mfhi<GPR:mode>_<HILO:mode>): New pattern.
(mthi<GPR:mode>_<HILO:mode>): Likewise.
* config/mips/predicates.md (fpr_operand): Delete.
(d_operand): New predicate.
gcc/testsuite/
* gcc.dg/torture/mips-hilo-1.c: Delete.
* gcc.target/mips/pr35232.c: Likewise.
* gcc.target/mips/fix-vr4130-1.c: Use modulus to create an mfhi.
* gcc.target/mips/fix-vr4130-3.c: Likewise.
* gcc.target/mips/int-moves-1.c: New test.
* gcc.target/mips/int-moves-2.c: Likewise.
* gcc.target/mips/fix-r4000-1.c: Likewise.
* gcc.target/mips/fix-r4000-2.c: Likewise.
* gcc.target/mips/fix-r4000-3.c: Likewise.
* gcc.target/mips/fix-r4000-4.c: Likewise.
* gcc.target/mips/fix-r4000-5.c: Likewise.
* gcc.target/mips/fix-r4000-6.c: Likewise.
* gcc.target/mips/fix-r4000-7.c: Likewise.
* gcc.target/mips/fix-r4000-8.c: Likewise.
* gcc.target/mips/fix-r4000-9.c: Likewise.
* gcc.target/mips/fix-r4000-10.c: Likewise.
* gcc.target/mips/fix-r4000-11.c: Likewise.
* gcc.target/mips/fix-r4000-12.c: Likewise.
* gcc.target/mips/timode-1.c: Likewise.
* gcc.target/mips/timode-2.c: Likewise.
From-SVN: r136600
gcc/
* config/mips/mips.c (mips_emit_loadgp): Return early if
there is nothing do to, otherwise emit a blockage if
!TARGET_EXPLICIT_RELOCS || crtl->profile.
* config/mips/mips.md (loadgp_blockage): Use SI rather than DI.
From-SVN: r136294
gcc/
* config/mips/mips.c (mips_valid_offset_p): New function.
(mips_valid_lo_sum_p): Likewise.
(mips_classify_address): Use them.
(mips_force_address): New function.
(mips_legitimize_address): Use it.
* config/mips/mips.md (MOVE128): New mode iterator.
(movtf): Require TARGET_64BIT. Remove empty strings.
(*movtf_internal): Rename to...
(*movtf): ...this and require !TARGET_MIPS16. Use "m" instead
of "R" and use {,fp}{load,store} attributes instead of "multi".
Use a separate define_split.
(*movtf_mips16): New pattern.
gcc/testsuite/
* gcc.target/mips/fpr-moves-7.c: New test.
* gcc.target/mips/fpr-moves-8.c: New test.
From-SVN: r136253
gcc/
* config/mips/mips-protos.h (mips_expand_before_return): Declare.
* config/mips/mips.c (mips_expand_before_return): New function.
(mips_expand_epilogue): Call it.
* config/mips/mips.md (return): Turn into a define_expand.
(*return): New insn.
From-SVN: r136252
2008-05-20 David Daney <ddaney@avtrex.com>
* config/mips/mips.md (UNSPEC_SYNC_NEW_OP_12,
UNSPEC_SYNC_OLD_OP_12,
UNSPEC_SYNC_EXCHANGE_12): New define_constants.
(UNSPEC_SYNC_EXCHANGE, UNSPEC_MEMORY_BARRIER,
UNSPEC_SET_GOT_VERSION,
UNSPEC_UPDATE_GOT_VERSION): Renumber.
(optab, insn): Add 'plus' and 'minus' to define_code_attr.
(atomic_hiqi_op): New define_code_iterator.
(sync_compare_and_swap<mode>): Call
mips_expand_atomic_qihi instead of
mips_expand_compare_and_swap_12.
(compare_and_swap_12): Use MIPS_COMPARE_AND_SWAP_12 instead of
MIPS_COMPARE_AND_SWAP_12_0. Pass argument to
MIPS_COMPARE_AND_SWAP_12.
(sync_<optab><mode>, sync_old_<optab><mode>,
sync_new_<optab><mode>, sync_nand<mode>, sync_old_nand<mode>,
sync_new_nand<mode>): New define_expands for HI and QI mode
operands.
(sync_<optab>_12, sync_old_<optab>_12, sync_new_<optab>_12,
sync_nand_12, sync_old_nand_12, sync_new_nand_12): New insns.
(sync_lock_test_and_set<mode>): New define_expand for HI and QI
modes.
(test_and_set_12): New insn.
(sync_old_add<mode>, sync_new_add<mode>, sync_old_<optab><mode>,
sync_new_<optab><mode>, sync_old_nand<mode>,
sync_new_nand<mode>, sync_lock_test_and_set<mode>): Add early
clobber to operand 0 for SI and DI mode insns.
* config/mips/mips-protos.h (mips_gen_fn_6, mips_gen_fn_5,
mips_gen_fn_4): New typedefs.
(mips_gen_fn_ptrs): Define new union type.
(mips_expand_compare_and_swap_12): Remove declaration.
(mips_expand_atomic_qihi): Declare function.
* config/mips/mips.c (mips_expand_compare_and_swap_12): Rename to...
(mips_expand_atomic_qihi): ... this. Use new generator function
parameter.
* config/mips/mips.h (MIPS_COMPARE_AND_SWAP_12): Add OPS parameter.
(MIPS_COMPARE_AND_SWAP_12_0): Delete macro.
(MIPS_COMPARE_AND_SWAP_12_ZERO_OP,
MIPS_COMPARE_AND_SWAP_12_NONZERO_OP,
MIPS_SYNC_OP_12, MIPS_SYNC_OP_12_NOT_NOP,
MIPS_SYNC_OP_12_NOT_NOT, MIPS_SYNC_OLD_OP_12,
MIPS_SYNC_OLD_OP_12_NOT_NOP, MIPS_SYNC_OLD_OP_12_NOT_NOP_REG,
MIPS_SYNC_OLD_OP_12_NOT_NOT, MIPS_SYNC_OLD_OP_12_NOT_NOT_REG,
MIPS_SYNC_NEW_OP_12, MIPS_SYNC_NEW_OP_12_NOT_NOP,
MIPS_SYNC_NEW_OP_12_NOT_NOT, MIPS_SYNC_EXCHANGE_12,
MIPS_SYNC_EXCHANGE_12_ZERO_OP,
MIPS_SYNC_EXCHANGE_12_NONZERO_OP): New macros.
From-SVN: r135684
2008-05-08 David Daney <ddaney@avtrex.com>
* lib/target-supports.exp (check_effective_target_sync_int_long): Add
mips*-*-*.
(check_effective_target_sync_char_short): Same.
2008-05-08 David Daney <ddaney@avtrex.com>
Richard Sandiford <rsandifo@nildram.co.uk>
* config/mips/mips.md (mips_expand_compare_and_swap_12): Handle
special case of constant zero operands.
* config/mips/mips.c (mips_expand_compare_and_swap_12): Zero extend
old and new values. Special case constant zero values.
* config/mips/mips.h (MIPS_COMPARE_AND_SWAP): Skip 'sync' if compare
fails.
(MIPS_COMPARE_AND_SWAP_12): Handle constant zero operands.
(MIPS_COMPARE_AND_SWAP_12_0): New macro.
Co-Authored-By: Richard Sandiford <rsandifo@nildram.co.uk>
From-SVN: r135088
gcc/
2008-04-23 David Daney <ddaney@avtrex.com>
* config/mips/mips.md (UNSPEC_COMPARE_AND_SWAP_12): New
unspec_volitile.
(UNSPEC_SYNC_OLD_OP, UNSPEC_SYNC_NEW_OP, UNSPEC_SYNC_EXCHANGE,
UNSPEC_MEMORY_BARRIER, UNSPEC_SET_GOT_VERSION,
UNSPEC_UPDATE_GOT_VERSION): Renumber.
(sync_compare_and_swap<mode>): New expand for QI and HI modes.
(compare_and_swap_12): New insn.
* config/mips/mips-protos.h (mips_expand_compare_and_swap_12): Declare.
* config/mips/mips.c (mips_force_binary): New function.
(mips_emit_int_order_test, mips_expand_synci_loop): Use it.
(mips_expand_compare_and_swap_12): New function.
* config/mips/mips.h (MIPS_COMPARE_AND_SWAP_12): New macro.
gcc/testsuite/
* gcc.target/mips/gcc-have-sync-compare-and-swap-1.c: Expect
__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 and
__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 to be defined.
* gcc.target/mips/gcc-have-sync-compare-and-swap-2.c: Likewise.
From-SVN: r134695
* config/mips/mips.md (GPR2): New mode iterator.
(seq): Add comment.
(*seq_<mode>, *seq_<mode>_mips16, *sne_<mode>, *sgt<u>_<mode>,
*sgt<u>_<mode>_mips16, *sge<u>_<mode>, *slt<u>_<mode>,
*slt<u>_<mode>_mips16 *sle<u>_<mode>, *sle<u>_<mode>_mips16):
Rewrite these to take two modes, the mode of comparison and the
mode of the destination.
* config/mips/mips.c (mips_expand_scc): Instead of having
paradoxical subreg as destination, expand "narrowing" scc if mode
of comparison is SI and target is requested in DI mode.
(mips_emit_int_order_test): Update comment. Make mode of
comparison match CMP0 rather than TARGET. When creating inverse
target use mode of TARGET.
testsuite/
* gcc.target/mips/scc-2.c: New test.
* gcc.target/mips/scc-3.c: New test.
* gcc.target/mips/scc-4.c: New test.
From-SVN: r134167
* config/mips/mips.md (any_gt, any_ge, any_lt, any_le): New code
iterators.
(u): Add attribute values for gt, gtu, ge, geu, lt, ltu, le and
leu.
(sgt<u>): Merge sgt and sgtu into new expander.
(sgt, sgtu): Remove expanders.
(*sgt<u>_<mode>): Merge *sgt_<mode> and *sgtu_<mode> into new
pattern.
(*sgt_<mode>, *sgtu_<mode>): Remove patterns.
(*sgt<u>_<mode>_mips16): Merge *sgt_<mode>_mips16 and
*sgtu_<mode>_mips16 into new pattern.
(*sgt_<mode>_mips16, *sgtu_<mode>_mips16): Remove patterns.
(sge<u>): Merge sge and sgeu into new expander.
(sge, sgeu): Remove expanders.
(*sge<u>_<mode>): Merge *sge_<mode> and second *sge_<mode> into
new pattern.
(*sge_<mode>, second *sge_<mode>): Remove patterns.
(slt<u>): Merge slt and sltu into new expander.
(slt, sltu): Remove expanders.
(*slt<u>_<mode>): Merge *slt_<mode> and *sltu_<mode> into new
pattern.
(*slt_<mode>, *sltu_<mode>): Remove patterns.
(*slt<u>_<mode>_mips16): Merge *slt_<mode>_mips16 and
*sltu_<mode>_mips16 into new pattern.
(*slt_<mode>_mips16, *sltu_<mode>_mips16): Remove patterns.
(sle<u>): Merge sle and sleu into new expander.
(sle, sleu): Remove expanders.
(*sle<u>_<mode>): Merge *sle_<mode> and *sleu_<mode> into new
pattern.
(*sle_<mode>, *sleu_<mode>): Remove patterns.
(*sle<u>_<mode>_mips16): Merge *sle_<mode>_mips16 and
*sleu_<mode>_mips16 into new pattern.
(*sle_<mode>_mips16, *sleu_<mode>_mips16): Remove patterns.
testsuite/
* gcc.target/mips/scc-1.c: New test.
From-SVN: r133872
gcc/
PR target/34981
* config/mips/mips-protos.h (mips_expand_call): Return an rtx.
* config/mips/mips.h (FIRST_PSEUDO_REGISTER): Rename FAKE_CALL_REGNO
to GOT_VERSION_REGNUM.
(CALL_REALLY_USED_REGISTERS): Set the GOT_VERSION_REGNUM entry to 0.
(EPILOGUE_USES): Include GOT_VERSION_REGNUM if TARGET_USE_GOT.
* config/mips/mips.c (mips_emit_call_insn): New function.
(mips_call_tls_get_addr): Call mips_expand_call directly.
(mips16_copy_fpr_return_value): Use mips_emit_call_insn rather than
emit_call_insn.
(mips16_build_call_stub): Likewise. Return the call insn or null.
(mips_expand_call): Update the call to mips16_build_call_stub
accordingly and a remove redundant condition. Assert that MIPS16
stubs do not use lazy binding. Use mips_emit_call_insn and return
the call insn.
(mips_extra_live_on_entry): Include GOT_VERSION_REGNUM if
TARGET_USE_GOT.
(mips_hard_regno_mode_ok_p): Allow SImode for GOT_VERSION_REGNUM.
(mips_avoid_hazard): Remove hazard_set handling.
* config/mips/mips.md (UNSPEC_EH_RECEIVER): Rename to...
(UNSPEC_RESTORE_GP): ...this.
(UNSPEC_SET_GOT_VERSION, UNSPEC_UPDATE_GOT_VERSION): New constants.
(FAKE_CALL_REGNO): Rename to...
(GOT_VERSION_REGNUM): ...this.
(type): Add "ghost" value. Add an associated insn reservation.
(hazard_set): Remove.
(exception_receiver): Rename to...
(restore_gp): ...this and update the unspec identifier accordingly.
(exception_receiver, nonlocal_got_receiver): New expanders.
(load_call<mode>): Use GOT_VERSION_REGNUM. Don't set
FAKE_CALL_REGNO. Remove hazard_set attribute.
(set_got_version, update_got_version): New patterns.
gcc/testsuite/
PR target/34981
* gcc.target/mips/lazy-binding-1.c: New test.
* gcc.target/mips/mips.exp (setup_mips_tests): Set
mips_forced_no_abicalls and mips_forced_no_shared.
(dg-mips-options): Avoid using -mabicalls with an implicit -mabi=eabi.
Avoid using small data with -mabicalls. Don't make -G0 force
-mn-abicalls. Skip -mabicalls and -mshared tests if the multilib
forces the opposite option.
From-SVN: r131860
gcc/
PR target/34831
* config/mips/mips.md (div<mode>3): Use <recip_condition> when
deciding whether to use reciprocal instructions.
gcc/testsuite/
PR target/34831
* gcc.target/mips/pr34831.c: New test.
From-SVN: r131662
gcc/
* config/mips/mips.c (mips_emit_loadgp): Replace gen_* calls with
separate gen_*_si and gen_*_di calls. Pass pic_offset_table_rtx
as the first argument.
* config/mips/mips.md (loadgp_newabi, loadgp_absolute)
(loadgp_rtp): Rename to...
(loadgp_newabi_<mode>, loadgp_absolute<mode>, loadgp_rtp<mode>):
...these. Add modes to all operands. Add the target register
as an operand. Combine loadgp_rtp<mode> with its splitter.
From-SVN: r131118
2007-12-18 David Daney <ddaney@avtrex.com>
* config/mips/mips.md (clear_hazard): Use PRINT_OPERAND punctuation
instead of .set push and .set pop.
From-SVN: r131038
gcc/
PR target/32406
* builtins.c (expand_builtin_nonlocal_goto): Also emit a use
of GP register, if valid and fixed.
Revert:
2007-06-21 David Daney <ddaney@avtrex.com>
PR target/32406
* config/mips/mips.md (define_constants): Rename UNSPEC_EH_RECEIVER
to UNSPEC_NONLOCAL_GOTO_RECEIVER globally.
(exception_receiver): Renamed to ...
(nonlocal_goto_receiver): ... this.
From-SVN: r130493
gcc/
* config/mips/mips-protos.h (mips_regno_mode_ok_for_base_p): Give
the STRICT_P argument type "bool" rather than "int".
(mips_legitimate_address_p): Likewise.
(fp_register_operand, lo_operand): Delete.
(mips_subword): Give the HIGH_P argument type "bool" rather than "int".
(mips_emit_scc): Rename to...
(mips_expand_scc): ...this.
(gen_conditional_branch): Rename to...
(mips_expand_conditional_branch): ...this.
(gen_conditional_move): Rename to...
(mips_expand_conditional_move): ...this.
(mips_gen_conditional_trap): Rename to...
(mips_expand_conditional_trap): ...this and take an rtx code instead
of an operands array.
(mips_expand_call): Give the SIBCALL_P argument type "bool"
rather than "int".
(mips_emit_fcc_reload): Rename to...
(mips_expand_fcc_reload): ...this.
(init_cumulative_args): Rename to...
(mips_init_cumulative_args): ...this and remove the libname argument.
(function_arg_advance): Rename to...
(mips_function_arg_advance): ...this.
(function_arg): Rename to...
(mips_function_arg): ...this and use "rtx" instead of
"struct rtx_def *".
(function_arg_boundary): Rename to...
(mips_function_arg_boundary): ...this.
(mips_expand_unaligned_load): Rename to...
(mips_expand_ext_as_unaligned_load): ...this and give the WIDTH
and BITPOS arguments type "HOST_WIDE_INT".
(mips_expand_unaligned_store): Rename to...
(mips_expand_ins_as_unaligned_store): ...this and give the WIDTH
and BITPOS arguments type "HOST_WIDE_INT".
(override_options): Rename to...
(mips_override_options): ...this.
(print_operand): Rename to...
(mips_print_operand): ...this.
(print_operand_address): Rename to...
(mips_print_operand_address): ...this.
(mips_output_ascii): Remove the PREFIX argument.
(mips_expand_epilogue): Give the SIBCALL_P argument type "bool"
rather than "int".
(mips_can_use_return_insn): Return a "bool" rather than an "int".
(mips_function_value): Remove the FUNC argument. Use "rtx" instead
of "struct rtx_def *".
(mips_secondary_reload_class): Give the IN_P argument type "bool"
rather than "int".
(build_mips16_call_stub): Delete.
(mips_store_data_bypass_p): Return a "bool" rather than an "int".
(mips_use_ins_ext_p): Give the second and third arguments type
"HOST_WIDE_INT" rather than "rtx".
* config/mips/mips.h: Update after the above changes. Tweak comments
and formatting.
(SECONDARY_INPUT_RELOAD_CLASS): Pass a boolean IN_P argument.
(SECONDARY_OUTPUT_RELOAD_CLASS): Likewise.
(mips_print_operand_punct, mips_hard_regno_mode_ok): Change the
element type from "char" to "bool".
(mips_section_threshold, sym_lineno, set_noat, mips_branch_likely)
(mips_cpu_info_table): Delete.
* config/mips/mips.md: Update after the above changes. Tweak some
formatting.
* config/mips/mips-ps-3d.md: Likewise.
* config/mips/mips.c: Tweak comments and formatting.
Use NULL-like macros rather than 0 in various places.
(mips_section_threshold): Rename to...
(mips_small_data_threshold): ...this and give it an unsigned type.
(num_source_filenames): Remove explicit initialization.
(sdb_label_count): Likewise.
(sym_lineno): Delete.
(set_noat): Make static.
(mips_branch_likely): Likewise, and give it type "bool".
(mips_isa_info): Rename to...
(mips_isa_option_info): ...this.
(mips_flag_delayed_branch): Rename to...
(mips_base_delayed_branch): ...this.
(mips_split_addresses): Delete.
(mips_print_operand_punct, mips_hard_regno_mode_ok): Change the
element type from "char" to "bool".
(mips_regno_to_class): Add an explicit array size.
(mips16_flipper): Change from type "int" to type "bool".
(mips_comp_type_attributes): Remove redundant FUNCTION_TYPE check.
(mips_tls_operand_p): Rename to...
(mips_tls_symbol_p): ...this.
(mips_global_symbol_p): Remove redundant "const".
(mips_offset_within_alignment_p): Simplify.
(mips_regno_mode_ok_for_base_p): Change the name of the last argument
to STRICT_P and give it type bool.
(mips_valid_base_register_p): Likewise.
(mips_classify_address): Likewise.
(mips_legitimate_address_p): Likewise.
(mips16_unextended_reference_p): Take the offset as an
"unsigned HOST_WIDE_INT" rather than an "rtx". Simplify.
(mips_const_insns): Use IN_RANGE.
(mips_force_temporary): Remove an unnecessary copy_rtx.
(mips16_gp_pseudo_reg): Simplify.
(mips_split_symbol): Remove an unnecessary copy_rtx.
(mips_legitimize_tls_address): Only create registers if we need them.
(mips_legitimize_address): Use mips_split_plus.
(mips_move_integer): Swap DEST and TEMP arguments. Rename local
variable COST to NUM_OPS.
(mips_legitimize_move): Use gen_lowpart.
(mips_rewrite_small_data): Rename the OP parameter to PATTERN.
(m16_check_op): Use IN_RANGE.
(mips_subword): Give the HIGH_P argument type "bool" rather than "int".
(mips_split_doubleword_move): Pass booleans to mips_subword.
(mips_output_move): Store the mode in a local variable.
Explicitly assert that this function does not deal with
MFLO and MFHI. Use SMALL_OPERAND_UNSIGNED. Make order of
cases more consistent.
(mips_relational_operand_ok_p): Rename to...
(mips_int_order_operand_ok_p): ...this.
(mips_canonicalize_comparison): Rename to...
(mips_canonicalize_int_order_test): ...this.
(mips_emit_int_relational): Rename to...
(mips_emit_int_order_test): ...this. Store the mode in a local
variable.
(mips_reverse_fp_cond_p): Rename to...
(mips_reversed_fp_cond): ...this.
(mips_emit_compare): Make the order of the statements more consistent.
(mips_emit_scc): Rename to...
(mips_expand_scc): ...this.
(gen_conditional_branch): Rename to...
(mips_expand_conditional_branch): ...this.
(gen_conditional_move): Rename to...
(mips_expand_conditional_move): ...this. Build the condition
separately from the main pattern.
(mips_gen_conditional_trap): Rename to...
(mips_expand_conditional_trap): ...this and take an rtx code instead
of an operands array. Simplify.
(init_cumulative_args): Rename to...
(mips_init_cumulative_args): ...this. Use memset rather than a
copy from a zeroed static. Use prototype_p and stdarg_p.
(mips_arg_info): Rename to...
(mips_get_arg_info): ...this and put the INFO argument first.
(function_arg): Rename to...
(mips_function_arg): ...this and use "rtx" instead of
"struct rtx_def *". Only split structures into chunks if
TARGET_HARD_FLOAT, rather than checking !TARGET_SOFT_FLOAT on
a chunk-by-chunk basis. Use SCALAR_FLOAT_TYPE_P instead of a
comparison with REAL_TYPE. Rename local variable REG to REGNO
and make it unsigned.
(function_arg_advance): Rename to...
(mips_function_arg_advance): ...this.
(function_arg_boundary): Rename to...
(mips_function_arg_boundary): ...this.
(mips_pad_arg_upward): Use SCALAR_INT_MODE_P instead of a comparison
with MODE_INT.
(mips_fpr_return_fields): Use SCALAR_FLOAT_TYPE_P instead of a
comparison with REAL_TYPE.
(mips_function_value): Remove the FUNC argument. Rename local
variable UNSIGNEDP to UNSIGNED_P.
(mips_return_in_memory): Use IN_RANGE.
(mips_setup_incoming_varargs): Pass a boolean rather than an int
to FUNCTION_ARG_ADVANCE.
(mips_gimplify_va_arg_expr): Rename local variable INDIRECT
to INDIRECT_P. Remove a redundant mips_abi check. Only calculate
SIZE and RSIZE if needed.
(mips16_stub): Rename FPRET to FP_RET_P and give it type "bool"
rather than "int".
(build_mips16_function_stub): Rename to...
(mips16_build_function_stub): ...this.
(build_mips16_call_stub): Rename to...
(mips16_build_call_stub): ...this. Make static, and return a
"bool" rather than an "int". Rename the ARG_SIZE argument to
ARGS_SIZE. Rename the local variable FPRET to FP_RET_P and give
it type "bool". Use "jr" rather than "j". Use XNEW. Simplify.
(mips_load_call_address): Give the SIBCALL_P argument type "bool"
rather than "int".
(mips_expand_call): Likewise. Assert that MIPS16 calls via stubs
are not sibling ones.
(mips_emit_fcc_reload): Rename to...
(mips_expand_fcc_reload): ...this.
(mips_get_unaligned_mem): Give the WIDTH and BITPOS arguments type
"HOST_WIDE_INT".
(mips_expand_unaligned_load): Rename to...
(mips_expand_ext_as_unaligned_load): ...this and give the WIDTH
and BITPOS arguments type "HOST_WIDE_INT". Remove redundant
SUBREG_BYTE check.
(mips_expand_unaligned_store): Rename to...
(mips_expand_ins_as_unaligned_store): ...this and give the WIDTH
and BITPOS arguments type "HOST_WIDE_INT".
(mips_use_ins_ext_p): Rename second and third arguments to WIDTH
and BITPOS and give them type "HOST_WIDE_INT" rather than "rtx".
Use IN_RANGE.
(mips_init_split_addresses): Replace with...
(mips_split_addresses_p): ...this new function.
(mips_init_relocs): Check mips_split_addresses_p () rather than
mips_split_addresses. Always initialize mips_split_p with booleans.
(print_operand_reloc): Rename to...
(mips_print_operand_reloc): ...this. Use a gcc_assert rather than
a fatal_error.
(print_operand): Rename to...
(mips_print_operand): ...this.
(print_operand_address): Rename to...
(mips_print_operand_address): ...this. Use GP_REG_FIRST.
(mips_in_small_data_p): Simplify.
(mips_output_ascii): Remove the PREFIX argument and "register"
keywords. Use the STRING parameter directly and cast to
"unsigned char".
(mips16e_collect_argument_save_p): Use IN_RANGE.
(mips_function_has_gp_insn): Simplify.
(mips_set_return_address): Use BITSET_P.
(mips_restore_gp): Use a separate statement to pick the base
register.
(mips_output_function_prologue): Use a local FRAME variable.
(mips_save_reg): Pass booleans to mips_subword.
(mips_expand_prologue): Use a local FRAME variable. Use
cprestore_size to detect when .cprestore is needed.
(mips_restore_reg): Use GP_REG_FIRST.
(mips_expand_epilogue): Give the SIBCALL_P argument type "bool"
rather than "int". Use local FRAME and REGNO variables.
(mips_can_use_return_insn): Return a "bool" rather than an "int".
(mips_secondary_reload_class): Give the IN_P argument type "bool"
rather than "int".
(mips_linked_madd_p): Rename arguments to OUT_INSN and IN_INSN.
(mips_store_data_bypass_p): Return a "bool" rather than an "int".
(vr4130_swap_insns_p): Rename local variables to DEP1_P and DEP2_P.
(mips_74k_agen_init): Assume INSN satisfies USEFUL_INSN_P.
(mips_variable_issue): Do nothing unless INSN satisfies USEFUL_INSN_P.
(builtin_description): Rename to...
(mips_builtin_description): ...this.
(mips_bdesc): Rename to...
(mips_ps_bdesc): ...this.
(sb1_bdesc): Rename to...
(mips_sb1_bdesc): ...this.
(dsp_bdesc): Rename to...
(mips_dsp_bdesc): ...this.
(dsp_32only_bdesc): Rename to...
(mips_dsp_32only_bdesc): ...this.
(bdesc_map): Rename to...
(mips_bdesc_map): ...this.
(bdesc_arrays): Rename to...
(mips_bdesc_arrays): ...this.
(mips_prepare_builtin_arg): Rename OP to OPNO and ARGNUM to ARGNO.
Tweak error message.
(mips_expand_builtin_direct): Rename HAS_TARGET to HAS_TARGET_P.
Rename local variables I and J to OPNO and ARGNO respectively.
Assert that the number of arguments is no more than the number of
input operands.
(mips_expand_builtin_compare): Use an array of arguments rather
than an array of operands. Assert that the number of operands is
as expected.
(add_constant): Rename to...
(mips16_add_constant): ...this. Use XNEW.
(dump_constants_1): Rename to...
(mips16_emit_constants_1): ...this. Use ALL_SCALAR_FIXED_POINT_MODE_P.
(dump_constants): Rename to...
(mips16_emit_constants): ...this.
(mips_sim_wait_reg, mips_sim_record_set): Use END_REGNO.
(mips_set_mips16_mode): Don't call mips_init_split_addresses.
Assign mips16_p to was_mips16_p.
(mips_parse_cpu): Tweak warning message.
(override_options): Rename to...
(mips_override_options): ...this. Move the mips_cost initialization
out of the "shared with GAS" block. Quote option names in error
messages.
(mips_conditional_register_usage): Make local variable REGNO unsigned.
(mips_order_regs_for_local_alloc): Remove register keyword.
From-SVN: r129532
gcc/
* doc/invoke.texi (-mpaired-single): Don't say that the option
requires 64-bit code.
* config/mips/mips-protos.h (mips_modes_tieable_p): Declare.
* config/mips/mips.h (ISA_HAS_PAIRED_SINGLE): New macro.
(ISA_HAS_NMADD_NMSUB): Add a mode argument. Return true for
V2SF if ISA_MIPS32R2.
(MODES_TIEABLE_P): Use mips_modes_tieable_p.
* config/mips/mips.c (mips_rtx_costs): Pass a mode argument
to ISA_HAS_NMADD_NMSUB.
(mips_split_doubleword_move): Handle V2SF.
(mips_modes_tieable_p): New function.
(override_options): Report a warning rather than an error when
-mpaired-single is used on ISAs that don't support it; use
ISA_HAS_PAIRED_SINGLE to check that case.
* config/mips/mips.md (MOVE64): New mode iterator. Replace DI
and DF move splitters with a single MOVE64 splitter, thereby adding
a V2SF splitter too.
(SPLITF): Add TARGET_DOUBLE_FLOAT conditions to DI and DF.
Add a TARGET_FLOAT64 condition to TF. Add V2SF to the iterator.
(HALFMODE): Add V2SF.
(*nmadd<mode>, *nmadd<mode>_fastmath, *nmsub<mode>)
(*nmsub<mode>_fastmath): Add a mode argument to ISA_HAS_NMADD_NMSUB.
(movv2sf_hardfloat_64bit): Tweak ordering of conditions.
(movv2sf_hardfloat_32bit): New pattern.
(load_low<mode>, load_high<mode>, store_word<mode>): Remove
TARGET_DOUBLE_FLOAT conditions.
gcc/testsuite/
* gcc.dg/vect/vect.exp: Extend -mpaired-single handling to all
MIPS targets.
* g++.dg/vect/vect.exp: Likewise.
* lib/fortran-torture.exp: Likewise.
* gcc.target/mips/mips-ps-1.c: Use mpaired_single rather than
mipsisa64*-*-* as the target selector. Remove -mips64,
-mhard-float and -mgp64 from the options list.
* gcc.target/mips/mips-ps-2.c: Likewise.
* gcc.target/mips/mips-ps-3.c: Likewise.
* gcc.target/mips/mips-ps-4.c: Likewise.
* gcc.target/mips/mips-ps-6.c: Likewise.
* gcc.target/mips/mips-ps-5.c: Remove -mhard-float from the
options list.
* gcc.target/mips/sb1-1.c: Likewise.
* gcc.target/mips/mips-ps-type.c: Likewise.
* gcc.target/mips/mips-ps-7.c: New test.
* gcc.target/mips/mips-ps-type-2.c: Likewise.
* gcc.target/mips/fpr-moves-6.c: Remove XFAIL.
* gcc.target/mips/mips.exp (setup_mips_tests): Set mips_fp and
mips_gp instead of mips_fp64 and mips_gp64. Treat -mgp32 -mfp64
as forcing an ABI and an architecture.
(is_gp32_flag, is_gp64_flag): Fold into...
(dg-mips-options): ...here. Make -mpaired-single imply -mfp64,
then -mfp64 imply -mhard-float. Apply register rules after the
loop. Handle -march=mipsN like -mipsN.
From-SVN: r129522
gcc/
* config/mips/mips.c (mips_expand_call): Use FAKE_CALL_REGNO.
(mips_avoid_hazard): Allow multiple sets for HAZARD_DELAY,
and pick the first.
* config/mips/mips.md (load_call<mode>): Don't make the unspec
depend on FAKE_CALL_REGNO. Set FAKE_CALL_REGNO.
From-SVN: r129449
gcc/
PR target/33635
* config/mips/mips-protos.h (mips_split_64bit_move): Rename to...
(mips_split_doubleword_move): ...this.
* config/mips/mips.c (mips_subword): Extend to handle 64-bit words;
use natural endianness for multi-format FPR values.
(mips_split_64bit_move): Rename to...
(mips_split_doubleword_move): ...this and extend to 64-bit words.
Use move_doubleword_fpr* patterns for moves involving FPRs.
(mips_save_reg): Update the call to mips_split_64bit_move.
(mips_secondary_reload_class): Return NO_REGS for any reload of a
nonzero constant into an FPR if the constant can be forced to memory.
* config/mips/mips.md: Update the splitter calls to
mips_split_64bit_move.
(UNSPEC_LOAD_DF_LOW): Rename to...
(UNSPEC_LOAD_LOW): ...this.
(UNSPEC_LOAD_DF_HIGH): Rename to...
(UNSPEC_LOAD_HIGH): ...this.
(UNSPEC_STORE_DF_HIGH): Rename to...
(UNSPEC_STORE_WORD): ...this.
(SPLITF): New mode iterator.
(HALFMODE): New mode attribute.
(movtf): New expander.
(*movtf_internal): New define_insn_and_split.
(move_doubleword_fpr<mode>): New expander.
(load_df_low, load_df_high, store_df_high, mthc1, mfhc1): Replace
with...
(load_low<mode>, load_high<mode>, store_word<mode>, mthc1<mode>)
(mfhc1<mode>): ...these more general patterns.
gcc/testsuite/
PR target/33635
* gcc.target/mips/mips.exp (setup_mips_tests): Set mips_isa_rev
and mips_forced_be.
(dg-mips-options): Handle -EL and -mel. Make -mfp64 imply
-mhard-float and a suitable ISA. Improve handling of -mipsXrY
options.
* gcc.target/mips/fpr-moves-1.c: New test.
* gcc.target/mips/fpr-moves-2.c: Likewise.
* gcc.target/mips/fpr-moves-3.c: Likewise.
* gcc.target/mips/fpr-moves-4.c: Likewise.
* gcc.target/mips/fpr-moves-5.c: Likewise.
* gcc.target/mips/fpr-moves-6.c: Likewise.
* gcc.target/mips/mips32r2-mxhc1.c: Remove -march=mips32r2
From-SVN: r128991
gcc/
* config/mips/mips.c (mips_split_64bit_move): Use gen_rtx_REG_offset
rather than gen_lowpart to change a register from DImode to DFmode.
(mips_cannot_change_mode_class): Only allow FPRs to change mode if
both FROM and TO are integer modes that are no bigger than 4 bytes.
(mips_mode_ok_for_mov_fmt_p): New function.
(mips_preferred_reload_class): Use it instead of FLOAT_MODE_P.
(mips_secondary_reload_class): Tweak formatting and comments.
Use reg_class_subset_p instead of direct comparisons with
classes. Only allow direct FPR<->FPR moves for modes that
satisfy mips_mode_ok_for_mov_fmt_p. Only allow loads and stores
for 4- and 8-byte types. Handle reloads in which X is an FPR.
* config/mips/mips.md (*movdi_gp32_fp64): Remove f<-f alternative.
(*movdi_64bit): Likewise.
(*movsi_internal): Likewise.
(*movhi_internal): Likewise.
(*movqi_internal): Likewise.
From-SVN: r128894
gcc/
* config/mips/mips.md (SHORT): Fix long line.
(SUBDI): New mode iterator. Extend the shift-and-truncate insns
to QImode and HImoe.
gcc/testsuite/
* gcc.target/mips/truncate-1.c: New test.
From-SVN: r128525
* configure.ac (mips*-sde-elf*): New stanza. Add target-libiberty
to $skipdirs and only disable gprof for newlib. Use the normal
mips*-elf* handling in other respects.
* configure: Regnerate.
gcc/
2007-xx-xx Nigel Stephens <nigel@mips.com>
David Ung <davidu@mips.com>
Thiemo Seufer <ths@mips.com>
Richard Sandiford <richard@codesourcery.com>
* config.gcc (mips*-sde-elf*): Add support for the SDE C libraries.
* configure.ac: Add a mipssde threading type.
* configure: Regenerate.
* config/mips/sdemtk.h: New file.
* config/mips/t-sdemtk: Likewise.
* config/mips/sdemtk.opt: Likewise.
* gthr-mipssde.h: Likewise.
* config/mips/sde.h (FUNCTION_PROFILER): Move to config/mips/sdemtk.h.
* config/mips/mips.h (MIPS_SAVE_REG_FOR_PROFILING_P): New macro.
(MIPS_ICACHE_SYNC): New macro, split from ...
* config/mips/mips.md (clear_cache): ...here.
* config/mips/mips.c (mips_save_reg_p): Check
MIPS_SAVE_REG_FOR_PROFILING_P on profiled functions.
(build_mips16_function_stub): Use targetm.strip_name_encoding.
(build_mips16_call_stub): Likewise.
libstdc++-v3/
2007-xx-xx Thiemo Seufer <ths@mips.com>
* crossconfig.m4 (mips*-sde-elf*): New stanza.
* configure: Regenerate.
From-SVN: r128495
gcc/
* config/mips/mips.c (mips_symbol_insns_1): Allow LEAs of
SYMBOL_FORCE_TO_MEM constants.
(mips_rtx_costs): Give a cost of 1 to force_to_mem_operands.
(mips16_rewrite_pool_refs_info): New structure.
(mips16_rewrite_pool_constant): New function, split out from...
(mips16_rewrite_pool_refs): ...here. Take a pointer to a
mips16_rewrite_pool_refs_info structure rather than a pointer
to a constant pool. Force force_to_mem_operands into memory.
(mips16_lay_out_constants): Update call to mips16_rewrite_pool_refs.
* config/mips/predicates.md (force_to_mem_operand): New predicate.
* config/mips/constraints.md (kf): New constraint.
* config/mips/mips.md (*movdi_64bit_mips16): Add a d <- kf alternative.
(*movsi_mips16): Likewise.
From-SVN: r128365
* config/mips/mips.c (mips_scalar_mode_supported_p): Declare.
(TARGET_SCALAR_MODE_SUPPORTED_P): Define.
(mips_emit_compare): Process fixed-point modes.
(mips_pad_arg_upward): Support fixed-point types.
(override_options): Allow fixed-point modes in accumulators.
(mips_pass_by_reference): Pass DQ, UDQ, DA, and UDA modes in registers.
(mips_vector_mode_supported_p): Support V2HQmode, V2UHQmode, V2HAmode,
V2UHAmode, V4QQmode, and V4UQQmode when TARGET_DSP.
(mips_scalar_mode_supported_p): New function to accept fixed-point
modes if the width is not greater than two BITS_PER_WORD.
* config/mips/mips.h (SHORT_FRACT_TYPE_SIZE, FRACT_TYPE_SIZE,
LONG_FRACT_TYPE_SIZE, LONG_LONG_FRACT_TYPE_SIZE,
SHORT_ACCUM_TYPE_SIZE, ACCUM_TYPE_SIZE, LONG_ACCUM_TYPE_SIZE,
LONG_LONG_ACCUM_TYPE_SIZE): Define.
* config/mips/mips.md ("d"): Update mode attribute for fixed-point
modes.
("IMODE"): New mode attribute.
(mips-fixed.md): Include.
* config/mips/mips-modes.def: Create VECTOR_MODES for FRACT, UFRACT,
ACCUM, UACCUM.
* config/mips/mips-fixed.md: New file.
From-SVN: r128360
* config/mips/mips.md (UNSPEC_MEMORY_BARRIER): New entry in
define_constants.
(memory_barrier): Rewrote as an insn that clobbers memory.
From-SVN: r128349
gcc/
* config/mips/mips.c (build_mips16_call_stub): Emit all direct
float calls here, rather than leaving some to the caller.
Use call_internal_direct and call_value_internal_direct.
* config/mips/mips.md (call_internal_direct): New pattern.
(call_value_internal_direct): Likewise.
From-SVN: r128233
Richard Sandiford
Maxim Kuvyrkov
Mark Shinwell
Sandip Matte
David Daney
Richard Sandiford
Adam Nemet
Richard Sandiford
Richard Sandiford
Chao-ying Fu
Janis Johnson