2018-03-15 Olga Makhotina <olga.makhotina@intel.com>
gcc/
* config/i386/sgxintrin.h (_enclv_u32): New intrinsic.
(__enclv_bc, __enclv_cd, __enclv_generic): New definitions.
(ERDINFO, ETRACKC, ELDBC, ELDUC): New leaves.
gcc/testsuite/
* gcc.target/i386/sgx.c (_enclv_u32): Test new intrinsic.
From-SVN: r258560
I was a bit over-enthusiastic, we still support xilinxfp.
* config/rs6000/rs6000.c (abi_v4_pass_in_fpr): Add back the
TARGET_DOUBLE_FLOAT and TARGET_SINGLE_FLOAT conditions on the DFmode
resp. SFmode cases.
From-SVN: r258557
2018-03-15 Richard Biener <rguenther@suse.de>
PR c/84873
* c-gimplify.c (c_gimplify_expr): Do not fold expressions.
* c-c++-common/pr84873.c: New testcase.
From-SVN: r258556
PR target/84860
* optabs.c (emit_conditional_move): Pass address of cmode's copy
rather than address of cmode as last argument to prepare_cmp_insn.
* gcc.c-torture/compile/pr84860.c: New test.
From-SVN: r258552
PR c/84853
* c-typeck.c (build_binary_op) <case RSHIFT_EXPR, case LSHIFT_EXPR>:
If code1 is INTEGER_TYPE, only allow code0 VECTOR_TYPE if it has
INTEGER_TYPE element type.
* gcc.dg/pr84853.c: New test.
From-SVN: r258550
We avoid complaining about unexpanded packs when inside a lambda,
since the lambda as a whole could be part of a pack expansion.
But that can only be true if the lambda is in a template context.
* pt.c (check_for_bare_parameter_packs): Don't return early for a
lambda in non-template context.
From-SVN: r258548
In order for std::less<T*> etc. to meet the total order requirements of
[comparisons] p2 we need to cast unrelated pointers to uintptr_t before
comparing them. Those casts aren't allowed in constant expressions, so
only cast when __builtin_constant_p says the result of the comparison is
not a compile-time constant (because the arguments are not constants, or
the result of the comparison is unspecified). When the result is
constant just compare the pointers directly without casting.
This ensures that the function can be called in constant expressions
with suitable arguments, but still yields a total order even for
otherwise unspecified pointer comparisons.
For std::less<void> etc. add new overloads for pointers, which use
std::less<common_type_t<T*,U*>> directly. Also change the generic
overloads to detect when the comparison would call a built-in relational
operator with pointer operands, and dispatch that case to the
corresponding specialization for void pointers.
PR libstdc++/78420
* include/bits/stl_function.h (greater<_Tp*>, less<_Tp*>)
(greater_equal<_Tp*>, less_equal<_Tp>*): Add partial specializations
to ensure total order for pointers.
(greater<void>, less<void>, greater_equal<void>, less_equal<void>):
Add operator() overloads for pointer arguments and make generic
overloads dispatch to new _S_cmp functions when comparisons would
use built-in operators for pointers.
* testsuite/20_util/function_objects/comparisons_pointer.cc: New.
From-SVN: r258540
gcc/ChangeLog:
2018-03-14 Carl Love <cel@us.ibm.com>
PR target/84422
* config/rs6000/rs6000-builtin.def: Change expansion for
VMULESW to BU_P8V_AV_2.
Change expansion for VMULEUW to BU_P8V_AV_2.
* config/rs6000/rs6000.c: Change
ALTIVEC_BUILTIN_VMULESW to P8V_BUILTIN_VMULESW.
Change ALTIVEC_BUILTIN_VMULEUW to P8V_BUILTIN_VMULEUW.
Change ALTIVEC_BUILTIN_VMULOSW to P8V_BUILTIN_VMULOSW.
Change ALTIVEC_BUILTIN_VMULOUW to P8V_BUILTIN_VMULOUW.
* config/rs6000/rs6000-c.c: Change
ALTIVEC_BUILTIN_VMULESW to P8V_BUILTIN_VMULESW.
Change ALTIVEC_BUILTIN_VMULEUW to P8V_BUILTIN_VMULEUW.
Change ALTIVEC_BUILTIN_VMULOSW to P8V_BUILTIN_VMULOSW.
Change ALTIVEC_BUILTIN_VMULOUW to P8V_BUILTIN_VMULOUW.
From-SVN: r258539
* pt.c (convert_template_argument): Don't substitute into type of
non-type parameter if we don't have enough arg levels.
(unify): Likewise.
From-SVN: r258533
gcc/ChangeLog:
2018-03-14 Carl Love <cel@us.ibm.com>
* config/rs6000/rs6000-c.c: Add macro definitions for
ALTIVEC_BUILTIN_VEC_PERMXOR.
* config/rs6000/rs6000.h: Add #define for vec_permxor builtin.
* config/rs6000/rs6000-builtin.def: Add macro expansions for VPERMXOR.
* config/rs6000/altivec.md (altivec_vpermxor): New define expand.
* config/rs6000/rs6000-p8swap.c (rtx_is_swappable_p): Add case
UNSPEC_VPERMXOR.
* config/doc/extend.texi: Add prototypes for vec_permxor.
gcc/testsuite/ChangeLog:
2018-03-14 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/builtins-7-runnable.c: New test file.
From-SVN: r258530
2018-03-14 Martin Liska <mliska@suse.cz>
PR ipa/8480
* g++.dg/lto/pr84805_0.C: New test.
* g++.dg/lto/pr84805_1.C: New test.
* g++.dg/lto/pr84805_2.C: New test.
From-SVN: r258529
PR c/84852 reports an ICE inside diagnostic_show_locus when printing
a diagnostic for a source file with a #line >= 2^31:
#line 7777777777
int foo (void) { return strlen(""); }
where we're attempting to print a fix-it hint at the top of the file
and underline the "strlen" (two "line spans").
The
#line 7777777777
won't fix within the 32-bit linenum_type, and is truncated from
0x1cf977871
to
0xcf977871
i.e. 3482810481 in decimal.
Such a #line is reported by -pedantic and -pedantic-errors, but we
shouldn't ICE.
The ICE is an assertion failure within layout::calculate_line_spans,
where the line spans have not been properly sorted.
The layout_ranges are stored as int, rather than linenum_type,
giving line -812156815 for the error, and line 1 for the fix-it hint.
However, line_span uses linenum_type rather than int.
line_span::comparator compares these values as int, and hence
decides that (linenum_type)3482810481 aka (int)-812156815 is less
than line 1.
This leads to this assertion failing in layout::calculate_line_spans:
1105 gcc_assert (next->m_first_line >= current->m_first_line);
since it isn't the case that 1 >= 3482810481.
The underlying problem is the mix of types for storing line numbers:
in parts of libcpp and diagnostic-show-locus.c we use linenum_type;
in other places (including libcpp's expanded_location) we use int.
I looked at using linenum_type throughout, but doing so turned into
a large patch, so this patch fixes the ICE in a less invasive way
by merely using linenum_type more consistently just within
diagnostic-show-locus.c, and fixing line_span::comparator to properly
handle line numbers (and line number differences) >= 2^31, by using
a new helper function for linenum_type differences, computing the
difference using long long, and using the sign of the difference
(as the difference might not fit in the "int" return type imposed
by qsort).
gcc/ChangeLog:
PR c/84852
* diagnostic-show-locus.c (class layout_point): Convert m_line
from int to linenum_type.
(line_span::comparator): Use linenum "compare" function when
comparing line numbers.
(test_line_span): New function.
(layout_range::contains_point): Convert param "row" from int to
linenum_type.
(layout_range::intersects_line_p): Likewise.
(layout::will_show_line_p): Likewise.
(layout::print_source_line): Likewise.
(layout::should_print_annotation_line_p): Likewise.
(layout::print_annotation_line): Likewise.
(layout::print_leading_fixits): Likewise.
(layout::annotation_line_showed_range_p): Likewise.
(struct line_corrections): Likewise for field m_row.
(line_corrections::line_corrections): Likewise for param "row".
(layout::print_trailing_fixits): Likewise.
(layout::get_state_at_point): Likewise.
(layout::get_x_bound_for_row): Likewise.
(layout::print_line): Likewise.
(diagnostic_show_locus): Likewise for locals "last_line" and
"row".
(selftest::diagnostic_show_locus_c_tests): Call test_line_span.
* input.c (selftest::test_linenum_comparisons): New function.
(selftest::input_c_tests): Call it.
* selftest.c (selftest::test_assertions): Test ASSERT_GT,
ASSERT_GT_AT, ASSERT_LT, and ASSERT_LT_AT.
* selftest.h (ASSERT_GT): New macro.
(ASSERT_GT_AT): New macro.
(ASSERT_LT): New macro.
(ASSERT_LT_AT): New macro.
gcc/testsuite/ChangeLog:
PR c/84852
* gcc.dg/fixits-pr84852-1.c: New test.
* gcc.dg/fixits-pr84852-2.c: New test.
libcpp/ChangeLog:
* include/line-map.h (compare): New function on linenum_type.
From-SVN: r258526
This fixes more than half of our testcase failures on BE.
libsanitizer/
* sanitizer_common/sanitizer_stacktrace.cc
(BufferedStackTrace::FastUnwindStack): Use the correct frame offset
for PowerPC SYSV ABI.
From-SVN: r258525
distribute_links tries to place a log_link for whatever the destination
of the modified instruction is. It shouldn't do that when that dest
is pc_rtx, which isn't actually a register.
* combine.c (distribute_links): Don't make a link based on pc_rtx.
From-SVN: r258523
2018-03-14 Martin Liska <mliska@suse.cz>
* tree.c (record_node_allocation_statistics): Use
get_stats_node_kind.
(get_stats_node_kind): New function extracted from
record_node_allocation_statistics.
(free_node): Use get_stats_node_kind.
From-SVN: r258521
scan-assembler-times and scan-tree-dump-times dejagnu directives show a
different output in the summary files depending on whether they PASS or
FAIL. This means that dg-cmp-results would not show a regression because
it would not see a connection between the two output.
The difference comes from the FAIL showing the number of actual times
the pattern was match, presumably to help debugging. This patch moves
the info regarding the actual number of times the pattern match in a
separate verbose message. This keeps the message unchanged but let
developers have the required debug message with -v.
2018-03-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/testsuite/
* lib/scanasm.exp (scan-assembler-times): Move FAIL debug info into a
separate verbose message.
* lib/scandump.exp (scan-dump-times): Likewise.
From-SVN: r258519
PR sanitizer/83392
* sanopt.c (maybe_optimize_ubsan_ptr_ifn): Handle also
INTEGER_CST offset, add it together with bitpos / 8 and
sign extend based on POINTER_SIZE.
* c-c++-common/ubsan/ptr-overflow-sanitization-1.c: Adjust expected
check count from 17 to 14.
From-SVN: r258516
2018-03-14 Richard Biener <rguenther@suse.de>
PR tree-optimization/84830
* tree-ssa-pre.c (compute_antic_aux): Intersect the new ANTIC_IN
with the old one to avoid oscillations.
* gcc.dg/torture/pr84830.c: New testcase.
From-SVN: r258514
2018-03-13 Vladimir Makarov <vmakarov@redhat.com>
PR target/83712
* lra-assigns.c (find_all_spills_for): Ignore uninteresting
pseudos.
(assign_by_spills): Return a flag of reload assignment failure.
Do not process the reload assignment failures. Do not spill other
reload pseudos if they has the same reg class. Update n if
necessary.
(lra_assign): Add a return arg. Set up from the result of
assign_by_spills call.
(find_reload_regno_insns, lra_split_hard_reg_for): New functions.
* lra-constraints.c (split_reg): Add a new arg. Use it instead of
usage_insns if it is not NULL.
(spill_hard_reg_in_range): New function.
(split_if_necessary, inherit_in_ebb): Pass a new arg to split_reg.
* lra-int.h (spill_hard_reg_in_range, lra_split_hard_reg_for): New
function prototypes.
(lra_assign): Change prototype.
* lra.c (lra): Add code to deal with fails by splitting hard reg
live ranges.
From-SVN: r258504
PR c++/84843
* decl.c (duplicate_decls): For redefinition of built-in, use error
and return error_mark_node. For redeclaration, return error_mark_node
rather than olddecl if !flag_permissive.
* g++.dg/ext/pr84843-1.C: New test.
* g++.dg/ext/pr84843-2.C: New test.
From-SVN: r258503
RISC-V relies on aggressive linker relaxation to get good code size. As
a result no text symbol addresses can be known until link time, which
means that alignment must be handled during the link. This alignment
pass is essentially just another linker relaxation, so this has the
unfortunate side effect that linker relaxation is required for
correctness on many RISC-V targets.
The RISC-V assembler has supported an ".option norelax" for a long time
because there are situations in which linker relaxation is a bad idea --
the canonical example is when trying to materialize the initial value of
the global pointer into a register, which would otherwise be relaxed to
a NOP. We've been relying on users who want to disable relaxation for
an entire link to pass "-Wl,--no-relax", but that still relies on the
linker relaxing R_RISCV_ALIGN to handle alignment despite it not being
strictly necessary.
This patch adds a GCC option, "-mno-relax", that disable linker
relaxation by adding ".option norelax" to the top of every generated
assembly file. The assembler is smart enough to handle alignment at
assemble time for files that have never emitted a relaxable relocation,
so this is sufficient to really disable all relaxations in the linker,
which results in significantly faster link times for large objects.
This also has the side effect of allowing toolchains that don't support
linker relaxation (LLVM and the Linux module loader) to function
correctly. Toolchains that don't support linker relaxation should
default to "-mno-relax" and error when presented with any R_RISCV_ALIGN
relocation as those need to be handled for correctness.
gcc/ChangeLog
2018-03-13 Palmer Dabbelt <palmer@sifive.com>
* config/riscv/riscv.opt (mrelax): New option.
* config/riscv/riscv.c (riscv_file_start): Emit ".option
"norelax" when riscv_mrelax is disabled.
* doc/invoke.texi (RISC-V): Document "-mrelax" and "-mno-relax".
From-SVN: r258499
This patch fixes improper handling of comma operator expression in a
struct field initializer as described in:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46921
Currently, function output_init_element () does not evaluate the left
hand expression in a comma operator that's used for a struct
initializer field if the right hand side is zero-sized. However, the
left hand expression must be evaluated if it's found to have side
effects (for example, a function call).
Patch was successfully bootstrapped and tested on x86_64-linux.
gcc/c:
2018-03-13 David Pagan <dave.pagan@oracle.com>
PR c/46921
* c-typeck.c (output_init_element): Ensure field initializer
expression is always evaluated if there are side effects.
gcc/testsuite:
2018-03-13 David Pagan <dave.pagan@oracle.com>
PR c/46921
* gcc.dg/pr46921.c: New test.
From-SVN: r258497
gcc/c-family/ChangeLog:
PR tree-optimization/84725
* c-attribs.c (handle_nonstring_attribute): Allow attribute nonstring
with all three narrow character types, including their qualified forms.
gcc/testsuite/ChangeLog:
PR tree-optimization/84725
* c-c++-common/Wstringop-truncation-4.c: New test.
* c-c++-common/attr-nonstring-5.c: New test.
From-SVN: r258492
I hadn't realised that on big-endian targets, VEC_UNPACK*HI_EXPR unpacks
the low-numbered lanes and VEC_UNPACK*LO_EXPR unpacks the high-numbered
lanes. This meant that both the SVE patterns and the handling of
fully-masked loops were wrong.
The patch deals with that by making sure that all vec_unpack* optabs
are define_expands, using BYTES_BIG_ENDIAN to choose the appropriate
define_insn. This in turn meant that we can get rid of the duplication
between the signed and unsigned patterns for predicates. (We provide
implementations of both the signed and unsigned optabs because the sign
doesn't matter for predicates: every element contains only one
significant bit.)
Also, the float unpacks need to unpack one half of the input vector,
but the unpacked upper bits are "don't care". There are two obvious
ways of handling that: use an unpack (filling with zeros) or use a ZIP
(filling with a duplicate of the low bits). The code previously used
unpacks, but the sequence involved a subreg that is semantically an
element reverse on big-endian targets. Using the ZIP patterns avoids
that, and at the moment there's no reason to prefer one over the other
for performance reasons, so the patch switches to ZIP unconditionally.
As the comment says, it would be easy to optimise this later if UUNPK
turns out to be better for some implementations.
2018-03-13 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* tree-vect-loop-manip.c (vect_maybe_permute_loop_masks):
Reverse the choice between VEC_UNPACK_LO_EXPR and VEC_UNPACK_HI_EXPR
for big-endian.
* config/aarch64/iterators.md (hi_lanes_optab): New int attribute.
* config/aarch64/aarch64-sve.md
(*aarch64_sve_<perm_insn><perm_hilo><mode>): Rename to...
(aarch64_sve_<perm_insn><perm_hilo><mode>): ...this.
(*extend<mode><Vwide>2): Rename to...
(aarch64_sve_extend<mode><Vwide>2): ...this.
(vec_unpack<su>_<perm_hilo>_<mode>): Turn into a define_expand,
renaming the old pattern to...
(aarch64_sve_punpk<perm_hilo>_<mode>): ...this. Only define
unsigned packs.
(vec_unpack<su>_<perm_hilo>_<SVE_BHSI:mode>): Turn into a
define_expand, renaming the old pattern to...
(aarch64_sve_<su>unpk<perm_hilo>_<SVE_BHSI:mode>): ...this.
(*vec_unpacku_<perm_hilo>_<mode>_no_convert): Delete.
(vec_unpacks_<perm_hilo>_<mode>): Take BYTES_BIG_ENDIAN into
account when deciding which SVE instruction the optab should use.
(vec_unpack<su_optab>_float_<perm_hilo>_vnx4si): Likewise.
gcc/testsuite/
* gcc.target/aarch64/sve/unpack_fcvt_signed_1.c: Expect zips rather
than unpacks.
* gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c: Likewise.
* gcc.target/aarch64/sve/unpack_float_1.c: Likewise.
From-SVN: r258489
tlsdesc calls are guaranteed to preserve all Advanced SIMD registers,
but are not guaranteed to preserve the SVE extension of them.
The calls also don't preserve the SVE predicate registers.
The long-term plan for handling the SVE vector registers is CLOBBER_HIGH,
which adds a clobber equivalent of TARGET_HARD_REGNO_CALL_PART_CLOBBERED.
The pattern can then directly model the fact that the low 128 bits are
preserved and the upper bits are clobbered.
However, it's too late now for that to be included in GCC 8, so this
patch conservatively treats the whole vector register as being clobbered.
This has the obvious disadvantage that compiling for SVE can make NEON
code worse, but I don't think there's much we can do about that until
CLOBBER_HIGH is in.
2018-03-13 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* config/aarch64/aarch64.md (V4_REGNUM, V8_REGNUM, V12_REGNUM)
(V20_REGNUM, V24_REGNUM, V28_REGNUM, P1_REGNUM, P2_REGNUM, P3_REGNUM)
(P4_REGNUM, P5_REGNUM, P6_REGNUM, P8_REGNUM, P9_REGNUM, P10_REGNUM)
(P11_REGNUM, P12_REGNUM, P13_REGNUM, P14_REGNUM): New define_constants.
(tlsdesc_small_<mode>): Turn a define_expand and use
tlsdesc_small_sve_<mode> for SVE. Rename original define_insn to...
(tlsdesc_small_advsimd_<mode>): ...this.
(tlsdesc_small_sve_<mode>): New pattern.
gcc/testsuite/
* gcc.target/aarch64/sve/tls_1.c: New test.
* gcc.target/aarch64/sve/tls_2.C: Likewise.
From-SVN: r258488
