zlib:
* Makefile.am: Make target library a convenience library.
* Makefile.in: Rebuilt.
libffi:
* Makefile.am: libfficonvenience -> libffi_convenience.
* Makefile.in: Rebuilt.
boehm-gc:
* Makefile.am: Make a convenience library.
* Makefile.in: Rebuilt.
libjava:
Build a single libgcj.so, without separate gc and zlib libraries.
* configure.in: Use convenience libraries for boehm-gc and zlib. Set
SYS_ZLIBS if system zlib is used.
* configure: Rebuilt.
* Makefile.am: Use boehm-gc and zlib convenience libraries.
* Makefile.in: Rebuilt.
* libtool-version: Increment .so version number.
From-SVN: r50900
* config/mips/mips.h (CAN_ELIMINATE): Don't eliminate rap to $fp
(s8), but rather HARD_FRAME_POINTER_REGNUM. Add parentheses
where appropriate. Make the second reference to
leaf_function_p a function call, as intended. Reindented.
From-SVN: r50899
cp:
PR c++/4361
* cp-tree.h (CLASSTYPE_METHOD_VEC): Document where templated
conversion operators go.
(struct lang_decl_flags): Add template_conv_p and unused
bitfields.
(DECL_TEMPLATE_CONV_FN_P): New macro.
* call.c (build_user_type_conversion_1): Don't check second type
conversion of overload set first.
* class.c (add_method): Make sure templated conversion operators
all end up on slot 2.
* lex.c (do_identifier): A conversion operator token might be
satisfied by a templated conversion operator.
* mangle.c (struct globals) Add internal_mangling_p member.
(write_template_param): Do internal mangling, if needed.
(mangle_conv_op_name_for_type): Request internal mangling.
* pt.c (check_explicit_specialization): Use
CLASSTYPE_FIRST_CONVERSION_SLOT.
(template_parm_this_level_p): New function.
(push_template_decl_real): Determine DECL_TEMPLATE_CONV_FN_P.
* search.c (lookup_fn_fields_1): Template conversions will be on
the first slot.
* typeck.c (build_component_ref): Preserve the type of an
conversion operator name on the overload type.
(build_x_function_call): Retrieve the conversion operator name.
testsuite:
* g++.dg/template/conv1.C: New test.
* g++.dg/template/conv2.C: New test.
* g++.dg/template/conv3.C: New test.
* g++.dg/template/conv4.C: New test.
From-SVN: r50889
* config/m68hc11/m68hc11.c (m68hc11_override_options): Don't use
soft registers by default for 68HC12.
(m68hc11_conditional_register_usage): Don't use Z register for 68HC12
when compiling with -fomit-frame-pointer.
(expand_prologue): Use push/pop to allocate 4-bytes of locals on 68HC12.
(expand_epilogue): Likewise.
(m68hc11_gen_rotate): Use exg when rotating by 8.
From-SVN: r50882
* config/m68hc11/m68hc11-protos.h (ix_reg): Declare.
* config/m68hc11/m68hc11.md ("addsi3"): Use general_operand for sources.
(splits): Remove unused add splits.
("*addhi3_68hc12"): Tune constraints.
("addhi_sp"): Try to use X instead of Y in all cases and if the
constant fits in 8-bits and D is dead use abx/aby instructions.
("*addhi3"): Remove extern declaration of ix_reg.
("*subsi3"): Optimize and provide new split.
("subhi3"): Cleanup.
("*subhi3_sp"): Avoid saving X if we know it is dead.
(arith splits): For 68hc12 save the address register on the stack
and do the arithmetic operation with a pop.
From-SVN: r50880
2002-03-15 Chris Demetriou <cgd@broadcom.com>
* config/mips/mips.h (SUBTARGET_CPP_SIZE_SPEC): Provide an
MEABI case for each definition of SUBTARGET_CPP_SIZE_SPEC,
and define it so that regardless of target CPU size,
__SIZE_TYPE__ and __PTRDIFF_TYPE__ are defined in terms
of "int" rather than "long."
From-SVN: r50868
* ltmain.sh (taglist): Initialized. Don't let `CC' tag out of it.
(relink_command): Added --tag flags.
(mode=install): If relinking fails; error out.
From-SVN: r50855
* Makefile.am (jv_convert_LDADD): Don't list libraries that are
already implicitly brought in from libgcj.la.
(gij_LDADD, rmic_LDADD, rmiregistry_LDADD): Likewise.
* Makefile.in: Rebuilt.
From-SVN: r50853
* config/m68hc11/m68hc11.md ("tstqi_1"): Try to use ldab instead of tst.
("tstqi" split): Avoid using memory for tstqi on address register.
(splits): Remove constraints.
("cmphi_1_hc12"): New from "cmphi_1" and tuned for 68HC12.
("cmpdf", "cmpsf"): Remove since not used.
("*tbeq", "*tbne", "*tbeq8", "*tbne8"): Also look in cc_status.value2.
(peephole2): New peepholes to optimize tstqi and pre inc/dec addressing.
From-SVN: r50849
* config/m68hc11/m68hc11.c (m68hc11_symbolic_p): New function.
(m68hc11_indirect_p): New function.
(m68hc11_override_options): Must set MASK_NO_DIRECT_MODE for 68HC12.
(m68hc11_gen_highpart): Use TARGET_NO_DIRECT_MODE instead of
TARGET_M6812.
(asm_print_register): Likewise.
* config/m68hc11/m68hc11-protos.h (m68hc11_symbolic_p): Declare.
(m68hc11_indirect_p): Declare.
* config/m68hc11/m68hc11.h (EXTRA_CONSTRAINT): New constraint 'R', 'Q'.
(TARGET_NO_DIRECT_MODE, TARGET_RELAX): New.
(TARGET_SWITCHES): New option -mrelax.
* config/m68hc11/m68hc11.md ("andsi3"): Allow soft register for
destination.
("iorsi3", "xorsi3"): Likewise.
("andhi3", "andqi3", "iorhi3", "iorqi3"): Use a define_expand.
("*andhi3_mem"): New to handle destination in memory with bclr
and a scratch register.
("*andqi3_mem", "*iorhi3_mem", "*iorqi3_mem"): Likewise.
("*andhi3_const"): New when operand2 is constant.
("*andqi3_const", "*iorhi3_const", "*iorqi3_const"): Likewise.
("*andhi3_gen"): Cleanup of the old "andhi3".
("*andqi3_gen", "*iorhi3_gen", "*iorqi3_gen"): Likewise.
("xorqi3"): Update constraints.
From-SVN: r50843
* config/m68hc11/m68hc11.c (m68hc11_small_indexed_indirect_p): Look
for reg_equiv_memory_loc when the operand is a register that does
not get a hard register (stack location).
(tst_operand): After reload, accept all memory operand.
(symbolic_memory_operand): Fix detection of symbolic references.
* config/m68hc11/m68hc11.h (VALID_CONSTANT_OFFSET_P): For 68HC12
accept symbols and any constant.
From-SVN: r50839
* config/m68hc11/m68hc11.c (emit_move_after_reload): Add a REG_INC
note on the insn that sets the soft frame register.
(must_parenthesize): ix and iy are also reserved names.
(print_operand_address): One more place where parenthesis are required
to avoid confusion with register names.
(m68hc11_gen_movhi): Allow push of stack pointer.
(m68hc11_check_z_replacement): Fix handling of parallel with a
clobber.
(m68hc11_z_replacement): Must update the REG_INC notes to tell what
the replacement register is.
* config/m68hc11/m68hc11.h (REG_CLASS_CONTENTS): Switch Z_REGS
and D8_REGS classes.
(MODES_TIEABLE_P): All modes are tieable except QImode.
From-SVN: r50837
* config/m68hc11/m68hc11.c (m6812_cost): Make cost of add higher
than a shift to avoid adding a register with itself.
(m68hc11_memory_move_cost): Take into account NO_REGS.
(m68hc11_register_move_cost): Update and use memory move cost
for soft registers.
(m68hc11_address_cost): Make cost of valid offset not 0 so that
it gives more opportunities to cse to optimize.
* config/m68hc11/m68hc11.h (REGISTER_MOVE_COST): Pass the mode.
* config/m68hc11/m68hc11-protos.h (m68hc11_register_move_cost): Update.
From-SVN: r50833
2002-03-15 Eric Blake <ebb9@email.byu.edu>
For PR java/5902:
* libjava.compile/PR5902.java: Does not need to execute.
For PR java/5913:
* libjava.compile/PR5913.java: Ditto.
From-SVN: r50829
PR bootstrap/4128
* config/sparc/sparc.c (gen_v9_scc): Move early clobber test
before movrXX only, use reg_overlap_mentioned_p.
Only special case NE if just one insn can be generated.
* gcc.c-torture/compile/20020315-1.c: New test.
From-SVN: r50826
* varasm.c (assemble_variable): Call resolve_unique_section before
checking DECL_SECTION_NAME. Use zeros for a decl with DECL_INITIAL
of error_mark_node.
From-SVN: r50824
PR c++/5857
* decl.c (duplicate_decls): Use merge_types instead of common_type.
* typeck.c (common_type): Just hand off to
type_after_usual_arithmetic_conversions and
composite_pointer_type.
(merge_types): New fn.
(commonparms): Use it instead of common_type.
(type_after_usual_arithmetic_conversions): Also handle COMPLEX_TYPE.
(composite_pointer_type): Also handle attributes.
* cp-tree.h: Declare merge_types.
From-SVN: r50820
