Commit Graph

179728 Commits

Author SHA1 Message Date
Richard Biener b1570930df move permute optimization to optimize-slp
This moves optimizing permutes of SLP reductions to vect_optimize_slp,
eliding the global slp_loads array.

2020-09-29  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.c (vect_analyze_slp): Move SLP reduction
	re-arrangement and SLP graph load gathering...
	(vect_optimize_slp): ... here.
	* tree-vectorizer.h (vec_info::slp_loads): Remove.
2020-09-29 14:44:04 +02:00
Hongyu Wang d68f4d2ecb Add missing FSF copyright notes for x86 intrinsic headers.
gcc/ChangeLog:

	PR target/97231
	* config/i386/amxbf16intrin.h: Add FSF copyright notes.
	* config/i386/amxint8intrin.h: Ditto.
	* config/i386/amxtileintrin.h: Ditto.
	* config/i386/avx512vp2intersectintrin.h: Ditto.
	* config/i386/avx512vp2intersectvlintrin.h: Ditto.
	* config/i386/pconfigintrin.h: Ditto.
	* config/i386/tsxldtrkintrin.h: Ditto.
	* config/i386/wbnoinvdintrin.h: Ditto.
2020-09-29 05:40:53 -07:00
Richard Biener 29aef377d8 tree-optimization/97238 - fix typo causing ICE
This fixes a typo causing a NULL dereference.

2020-09-29  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/97238
	* tree-ssa-reassoc.c (ovce_extract_ops): Fix typo.

	* gcc.dg/pr97238.c: New testcase.
2020-09-29 14:39:49 +02:00
Andrew Stubbs 6f51395197 libgomp: disable barriers in nested teams
Both GCN and NVPTX allow nested parallel regions, but the barrier
implementation did not allow the nested teams to run independently of each
other (due to hardware limitations).  This patch fixes that, under the
assumption that each thread will create a new subteam of one thread, by
simply not using barriers when there's no other thread to synchronise.

libgomp/ChangeLog:

	* config/gcn/bar.c (gomp_barrier_wait_end): Skip the barrier if the
	total number of threads is one.
	(gomp_team_barrier_wake): Likewise.
	(gomp_team_barrier_wait_end): Likewise.
	(gomp_team_barrier_wait_cancel_end): Likewise.
	* config/nvptx/bar.c (gomp_barrier_wait_end): Likewise.
	(gomp_team_barrier_wake): Likewise.
	(gomp_team_barrier_wait_end): Likewise.
	(gomp_team_barrier_wait_cancel_end): Likewise.
	* testsuite/libgomp.c-c++-common/nested-parallel-unbalanced.c: New test.
2020-09-29 11:48:04 +01:00
Richard Sandiford 95e10b8aa1 arm: Add new vector mode macros
The AArch32 port now has three vector extensions: iwMMXt, Neon
and MVE.  We already have some named expanders that are shared
by all three, and soon we'll need more.

One way of handling this would be to use define_mode_iterators
that specify the condition for each mode.  For example,

  (V16QI "TARGET_NEON || TARGET_HAVE_MVE")
  (V8QI "TARGET_NEON || TARGET_REALLY_IWMXXT")
  ...
  (V2SF "TARGET_NEON && flag_unsafe_math_optimizations")

etc.  However, we'll need several mode iterators, and it would
be repetitive to specify the mode condition every time.

This patch therefore introduces per-mode macros that say whether
we can perform general arithmetic on the mode.  Initially there are
two sets of macros:

ARM_HAVE_NEON_<MODE>_ARITH
  true if Neon can handle general arithmetic on <MODE>

ARM_HAVE_<MODE>_ARITH
  true if any vector extension can handle general arithmetic on <MODE>

The macro definitions themselves are undeniably ugly, but hopefully
they're justified by the simplifications they allow.

The patch converts the addition patterns to use this scheme.

Previously there were three copies of the V8HF and V4HF addition
patterns for Neon:

(1) *add<VDQ:mode>3_neon, which provided plus:VnHF even without
    TARGET_NEON_FP16INST.  This was probably harmless since all the
    named patterns had an appropriate guard, but it is possible that
    something could have tried to generate the plus directly, such as
    by using a REG_EQUAL note to generate a new pattern.

(2) addv8hf3_neon and addv4hf3, which had the correct
    TARGET_NEON_FP16INST target condition, but unnecessarily required
    flag_unsafe_math_optimizations.  Unlike VnSF operations, VnHF
    operations do not force flush to zero.

(3) add<VH:mode>3_fp16, which provided plus:VnHF with the
    correct conditions (TARGET_NEON_FP16INST, with no
    flag_unsafe_math_optimizations test).

The patch in essence renames add<VH:mode>3_fp16 to *add<VH:mode>3_neon
(part of *add<VDQ:mode>3_neon) and removes the other two patterns.

gcc/
	* config/arm/arm.h (ARM_HAVE_NEON_V8QI_ARITH, ARM_HAVE_NEON_V4HI_ARITH)
	(ARM_HAVE_NEON_V2SI_ARITH, ARM_HAVE_NEON_V16QI_ARITH): New macros.
	(ARM_HAVE_NEON_V8HI_ARITH, ARM_HAVE_NEON_V4SI_ARITH): Likewise.
	(ARM_HAVE_NEON_V2DI_ARITH, ARM_HAVE_NEON_V4HF_ARITH): Likewise.
	(ARM_HAVE_NEON_V8HF_ARITH, ARM_HAVE_NEON_V2SF_ARITH): Likewise.
	(ARM_HAVE_NEON_V4SF_ARITH, ARM_HAVE_V8QI_ARITH, ARM_HAVE_V4HI_ARITH)
	(ARM_HAVE_V2SI_ARITH, ARM_HAVE_V16QI_ARITH, ARM_HAVE_V8HI_ARITH)
	(ARM_HAVE_V4SI_ARITH, ARM_HAVE_V2DI_ARITH, ARM_HAVE_V4HF_ARITH)
	(ARM_HAVE_V2SF_ARITH, ARM_HAVE_V8HF_ARITH, ARM_HAVE_V4SF_ARITH):
	Likewise.
	* config/arm/iterators.md (VNIM, VNINOTM): Delete.
	* config/arm/vec-common.md (add<VNIM:mode>3, addv8hf3)
	(add<VNINOTM:mode>3): Replace with...
	(add<VDQ:mode>3): ...this new expander.
	* config/arm/neon.md (*add<VDQ:mode>3_neon): Use the new
	ARM_HAVE_NEON_<MODE>_ARITH macros as the C condition.
	(addv8hf3_neon, addv4hf3, add<VFH:mode>3_fp16): Delete in
	favor of the above.
	(neon_vadd<VH:mode>): Use gen_add<mode>3 instead of
	gen_add<mode>3_fp16.

gcc/testsuite/
	* gcc.target/arm/armv8_2-fp16-arith-2.c: Expect FP16 vectorization
	even without -ffast-math.
2020-09-29 11:41:26 +01:00
Kito Cheng 30784833af RISC-V: Define __riscv_cmodel_medany for PIC mode.
- According the conclusion in RISC-V C API document, we decide to deprecat
   the __riscv_cmodel_pic marco

 - __riscv_cmodel_pic is deprecated and will removed in next GCC
   release.

[1] https://github.com/riscv/riscv-c-api-doc/pull/11

gcc/ChangeLog:

	* config/riscv/riscv-c.c (riscv_cpu_cpp_builtins): Define
	__riscv_cmodel_medany when PIC mode.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/predef-3.c: Update testcase.
	* gcc.target/riscv/predef-6.c: Ditto.
2020-09-29 16:59:14 +08:00
Alex Coplan f322701e24 aarch64: Fix ordering of aarch64-cores.def
This patch moves the entry for Neoverse N2 (an Armv8.5-A CPU) after
Saphira (an Armv8.4-A CPU) to preserve the overall ordering in the file.

Committing as obvious.

gcc/ChangeLog:

	* config/aarch64/aarch64-cores.def: Move neoverse-n2 after saphira.
	* config/aarch64/aarch64-tune.md: Regenerate.
2020-09-29 09:10:27 +01:00
Martin Liska e46858e4ee switch conversion: make a rapid speed up
gcc/ChangeLog:

	PR tree-optimization/96979
	* tree-switch-conversion.c (jump_table_cluster::can_be_handled):
	Make a fast bail out.
	(bit_test_cluster::can_be_handled): Likewise here.
	* tree-switch-conversion.h (get_range): Use wi::to_wide instead
	of a folding.

gcc/testsuite/ChangeLog:

	PR tree-optimization/96979
	* g++.dg/tree-ssa/pr96979.C: New test.
2020-09-29 09:26:07 +02:00
Martin Liska 37ffe56c01 Revert "switch lowering: limit number of cluster attemps"
This reverts commit c6df6039e9.
2020-09-29 09:26:07 +02:00
David Edelsohn 82693c4421 testsuite: Skip symver1 on AIX.
symver1.c only is valid on ELF targets.  Add AIX to the skip list.

gcc/testsuite/ChangeLog

2020-09-28  David Edelsohn  <dje.gcc@gmail.com>

	* gcc.dg/ipa/symver1.c: Skip on AIX.
2020-09-28 21:23:41 -04:00
Maciej W. Rozycki 090d3f5ab3 RISC-V/libgcc: Use `-fasynchronous-unwind-tables' for LIB2_DIVMOD_FUNCS
Use `-fasynchronous-unwind-tables' rather than `-fexceptions
-fnon-call-exceptions' in LIB2_DIVMOD_FUNCS compilation flags so as to
provide unwind tables for the affected functions while not pulling the
unwinder proper, which is not required here.

Beyond saving program space it fixes a RISC-V glibc build error due to
unsatisfied `malloc' and `free' references from the unwinder causing
link errors with `ld.so' where libgcc has been built at -O0.

	libgcc/
	* config/riscv/t-elf (LIB2_DIVMOD_EXCEPTION_FLAGS): New
	variable.
2020-09-29 01:20:01 +01:00
GCC Administrator e84761c6f3 Daily bump. 2020-09-29 00:16:30 +00:00
David Malcolm c0ed6afef7 analyzer: add some missing FINAL OVERRIDEs
Spotted by cppcheck.

gcc/analyzer/ChangeLog:
	* region-model.h (binop_svalue::dyn_cast_binop_svalue): Remove
	redundant "virtual".  Add FINAL OVERRIDE.
	(widening_svalue::dyn_cast_widening_svalue): Add FINAL OVERRIDE.
	(compound_svalue::dyn_cast_compound_svalue): Likewise.
	(conjured_svalue::dyn_cast_conjured_svalue): Likewise.
2020-09-28 19:52:14 -04:00
David Malcolm 20d16d61dd analyzer: remove unused field
I added this field (and the struct itself) in the rewrite of region and
value-handling (808f4dfeb3), but the field
was never used.

Found by cppcheck.

gcc/analyzer/ChangeLog:
	* diagnostic-manager.cc (null_assignment_sm_context::m_visitor):
	Remove unused field.
2020-09-28 19:51:46 -04:00
David Malcolm 01eabbeadb analyzer: fix ICE on non-pointer longjmp [PR97233]
gcc/analyzer/ChangeLog:
	PR analyzer/97233
	* analyzer.cc (is_longjmp_call_p): Require the initial argument
	to be a pointer.
	* engine.cc (exploded_node::on_longjmp): Likewise.

gcc/testsuite/ChangeLog:
	PR analyzer/97233
	* gcc.dg/analyzer/pr97233.c: New test.
2020-09-28 19:50:24 -04:00
David Malcolm 53d28fd4e1 analyzer: fix sm_state_map::print
In 10fc42a839 I converted state_t from
unsigned to const state *, but missed this comparison against 0.

gcc/analyzer/ChangeLog:
	* program-state.cc (sm_state_map::print): Update check
	for m_global_state being the start state.
2020-09-28 19:49:45 -04:00
Ian Lance Taylor 9042b6605c net: add hurd build tag
Patch from Svante Signell.

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/257857
2020-09-28 16:16:54 -07:00
Aldy Hernandez 77a23a825c irange_allocator class
This is the irange storage class.  It is used to allocate the
minimum amount of storage needed for a given irange.  Storage is
automatically freed at destruction of the storage class.

It is meant for long term storage, as opposed to int_range_max
which is meant for intermediate temporary results on the stack.

The general gist is:

	irange_allocator alloc;

	// Allocate an irange of 5 sub-ranges.
	irange *p = alloc.allocate (5);

	// Allocate an irange of 3 sub-ranges.
	irange *q = alloc.allocate (3);

	// Allocate an irange with as many sub-ranges as are currently
	// used in "some_other_range".
	irange *r = alloc.allocate (some_other_range);

gcc/ChangeLog:

	* value-range.h (class irange): Add irange_allocator friend.
	(class irange_allocator): New.
2020-09-29 00:23:53 +02:00
Tobias Burnus 69c56ce673 libgfortran/m4/unpack.m4: Silence -Wmaybe-uninitialized
libgfortran/ChangeLog:

	* m4/unpack.m4 (unpack0_'rtype_code`,
	unpack1_'rtype_code`): Move 'rstride[0]' initialization outside
	conditional branch to silence -Wmaybe-uninitialized.
	* generated/unpack_c10.c: Regenerate.
	* generated/unpack_c16.c: Regenerate.
	* generated/unpack_c4.c: Regenerate.
	* generated/unpack_c8.c: Regenerate.
	* generated/unpack_i1.c: Regenerate.
	* generated/unpack_i16.c: Regenerate.
	* generated/unpack_i2.c: Regenerate.
	* generated/unpack_i4.c: Regenerate.
	* generated/unpack_i8.c: Regenerate.
	* generated/unpack_r10.c: Regenerate.
	* generated/unpack_r16.c: Regenerate.
	* generated/unpack_r4.c: Regenerate.
	* generated/unpack_r8.c: Regenerate.
2020-09-28 23:10:31 +02:00
Ian Lance Taylor 5f394e2d4c libbacktrace: build mtest.dSYM if using dsymutil
libbacktrace/ChangeLog:
	PR libbacktrace/97082
	* Makefile.am (check_DATA): Add mtest.dSYM if USE_DSYMUTIL.
	* Makefile.in: Regenerate.
2020-09-28 13:54:57 -07:00
Ian Lance Taylor 7c363a4e04 libbacktrace: only run dsymutil with Mach-O
libbacktrace/ChangeLog:
	PR libbacktrace/97227
	* configure.ac (USE_DSYMUTIL): Define instead of HAVE_DSYMUTIL.
	* Makefile.am: Change all uses of HAVE_DSYMUTIL to USE_DSYMUTIL.
	* configure: Regenerate.
	* Makefile.in: Regenerate.
2020-09-28 13:49:39 -07:00
Tobias Burnus 2a10a2c068 OpenMP: Handle cpp_implicit_alias in declare-target discovery (PR96390)
gcc/ChangeLog:

	PR middle-end/96390
	* omp-offload.c (omp_discover_declare_target_tgt_fn_r): Handle
	alias nodes.

libgomp/ChangeLog:

	PR middle-end/96390
	* testsuite/libgomp.c++/pr96390.C: New test.
	* testsuite/libgomp.c-c++-common/pr96390.c: New test.
2020-09-28 18:08:05 +02:00
Patrick Palka 361e32eeaa libstdc++: Rearrange some range adaptors' data members
Since the standard range adaptors are specified to derive from the empty
class view_base, having their first data member store the underlying
view is suboptimal, for if the underlying view also derives from
view_base then the two view_base subobjects will be adjacent; this
prevents the compiler from applying the empty base optimization to elide
away the storage for these two empty bases.

This patch improves the situation by declaring the _M_base data member
last instead of first in each range adaptor that has more than one data
member, so that the empty base optimization can apply in more cases.

libstdc++-v3/ChangeLog:

	* include/std/ranges (filter_view): Declare the data member
	_M_base last instead of first, and adjust constructors' member
	initializer lists accordingly.
	(transform_view): Likewise.
	(take_view): Likewise.
	(take_while_view): Likewise.
	(drop_view): Likewise.
	(drop_while_view): Likewise.
	(join_view): Likewise.
	(split_view): Likewise (and tweak nearby formatting).
	(reverse_view): Likewise.
	* testsuite/std/ranges/adaptors/sizeof.cc: Update expected
	sizes.
2020-09-28 12:05:32 -04:00
Patrick Palka ea51fba504 libstdc++: Add test that tracks range adaptors' sizes
libstdc++-v3/ChangeLog:

	* testsuite/std/ranges/adaptors/sizeof.cc: New test.
2020-09-28 11:55:21 -04:00
Patrick Palka 620db4ca60 libstdc++: Reduce the size of a subrange with empty sentinel type
libstdc++-v3/ChangeLog:

	* include/bits/ranges_util.h (subrange::_M_end): Give it
	[[no_unique_address]].
	* testsuite/std/ranges/subrange/sizeof.cc: New test.
2020-09-28 11:55:04 -04:00
Patrick Palka 623443357e libstdc++: Reduce the size of an unbounded iota_view
libstdc++-v3/ChangeLog:

	* include/std/ranges (iota_view::_M_bound): Give it
	[[no_unique_address]].
	* testsuite/std/ranges/iota/iota_view.cc: Check that an
	unbounded iota_view has minimal size.
2020-09-28 11:54:57 -04:00
Paul A. Clarke e189d5c931 rs6000: Add tests for _mm_insert_epi{8,32,64}
Copied from gcc.target/i386.

2020-09-23  Paul A. Clarke  <pc@us.ibm.com>

gcc/testsuite/ChangeLog:

	* gcc.target/powerpc/sse4_1-pinsrb.c: New test.
	* gcc.target/powerpc/sse4_1-pinsrd.c: New test.
	* gcc.target/powerpc/sse4_1-pinsrq.c: New test.
2020-09-28 08:11:52 -05:00
Paul A. Clarke 4d09cc9157 rs6000: Support _mm_insert_epi{8,32,64}
Add compatibility implementations for SSE4.1 intrinsics
_mm_insert_epi8, _mm_insert_epi32, _mm_insert_epi64.

2020-09-23  Paul A. Clarke  <pc@us.ibm.com>

gcc/
	* config/rs6000/smmintrin.h (_mm_insert_epi8): New.
	(_mm_insert_epi32): New.
	(_mm_insert_epi64): New.
2020-09-28 08:11:51 -05:00
liuhongt 5c609842d1 Enable GCC support for AMX-TILE,AMX-INT8,AMX-BF16.
AMX-TILE:ldtilecfg/sttilecfg/tileloadd/tileloaddt1/tilezero/tilerelease
AMX-INT8:tdpbssd/tdpbsud/tdpbusd/tdpbuud
AMX-BF16:tdpbf16ps

gcc/ChangeLog

	* common/config/i386/i386-common.c (OPTION_MASK_ISA2_AMX_TILE_SET,
	OPTION_MASK_ISA2_AMX_INT8_SET, OPTION_MASK_ISA2_AMX_BF16_SET,
	OPTION_MASK_ISA2_AMX_TILE_UNSET, OPTION_MASK_ISA2_AMX_INT8_UNSET,
	OPTION_MASK_ISA2_AMX_BF16_UNSET, OPTION_MASK_ISA2_XSAVE_UNSET):
	New marcos.
	(ix86_handle_option): Hanlde -mamx-tile, -mamx-int8, -mamx-bf16.
	* common/config/i386/i386-cpuinfo.h (processor_types): Add
	FEATURE_AMX_TILE, FEATURE_AMX_INT8, FEATURE_AMX_BF16.
	* common/config/i386/cpuinfo.h (XSTATE_TILECFG,
	XSTATE_TILEDATA, XCR_AMX_ENABLED_MASK): New macro.
	(get_available_features): Enable AMX features only if
	their states are suoorited by OSXSAVE.
	* common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY
	for amx-tile, amx-int8, amx-bf16.
	* config.gcc: Add amxtileintrin.h, amxint8intrin.h,
	amxbf16intrin.h to extra headers.
	* config/i386/amxbf16intrin.h: New file.
	* config/i386/amxint8intrin.h: Ditto.
	* config/i386/amxtileintrin.h: Ditto.
	* config/i386/cpuid.h (bit_AMX_BF16, bit_AMX_TILE, bit_AMX_INT8):
	New macro.
	* config/i386/i386-c.c (ix86_target_macros_internal): Define
	__AMX_TILE__, __AMX_INT8__, AMX_BF16__.
	* config/i386/i386-options.c (ix86_target_string): Add
	-mamx-tile, -mamx-int8, -mamx-bf16.
	(ix86_option_override_internal): Handle AMX-TILE,
	AMX-INT8, AMX-BF16.
	* config/i386/i386.h (TARGET_AMX_TILE, TARGET_AMX_TILE_P,
	TARGET_AMX_INT8, TARGET_AMX_INT8_P, TARGET_AMX_BF16_P,
	PTA_AMX_TILE, PTA_AMX_INT8, PTA_AMX_BF16): New macros.
	* config/i386/i386.opt: Add -mamx-tile, -mamx-int8, -mamx-bf16.
	* config/i386/immintrin.h: Include amxtileintrin.h,
	amxint8intrin.h, amxbf16intrin.h.
	* doc/invoke.texi: Document -mamx-tile, -mamx-int8, -mamx-bf16.
	* doc/extend.texi: Document amx-tile, amx-int8, amx-bf16.
	* doc/sourcebuild.texi ((Effective-Target Keywords, Other
	hardware attributes): Document amx_int8, amx_tile, amx_bf16.

gcc/testsuite/ChangeLog

	* lib/target-supports.exp (check_effective_target_amx_tile,
	check_effective_target_amx_int8,
	check_effective_target_amx_bf16): New proc.
	* g++.dg/other/i386-2.C: Add -mamx-tile, -mamx-int8, -mamx-bf16.
	* g++.dg/other/i386-3.C: Ditto.
	* gcc.target/i386/sse-12.c: Ditto.
	* gcc.target/i386/sse-13.c: Ditto.
	* gcc.target/i386/sse-14.c: Ditto.
	* gcc.target/i386/sse-22.c: Ditto.
	* gcc.target/i386/sse-23.c: Ditto.
	* gcc.target/i386/funcspec-56.inc: Add new target attribute.
	* gcc.target/i386/amx-check.h: New header file.
	* gcc.target/i386/amxbf16-asmatt-1.c: New test.
	* gcc.target/i386/amxint8-asmatt-1.c: New test.
	* gcc.target/i386/amxtile-asmatt-1.c: Ditto.
	* gcc.target/i386/amxbf16-asmintel-1.c: Ditto.
	* gcc.target/i386/amxint8-asmintel-1.c: Ditto.
	* gcc.target/i386/amxtile-asmintel-1.c: Ditto.
	* gcc.target/i386/amxbf16-dpbf16ps-2.c: Ditto.
	* gcc.target/i386/amxint8-dpbssd-2.c: Ditto.
	* gcc.target/i386/amxint8-dpbsud-2.c: Ditto.
	* gcc.target/i386/amxint8-dpbusd-2.c: Ditto.
	* gcc.target/i386/amxint8-dpbuud-2.c: Ditto.
	* gcc.target/i386/amxtile-2.c: Ditto.
2020-09-28 05:30:30 -07:00
Andrea Corallo 92f0d3d03a aarch64: Do not alter force_reg returned rtx expanding pauth builtins
2020-09-21  Andrea Corallo  <andrea.corallo@arm.com>

	* config/aarch64/aarch64-builtins.c
	(aarch64_general_expand_builtin): Do not alter value on a
	force_reg returned rtx.
2020-09-28 12:31:57 +02:00
Richard Sandiford 1923f615f7 aarch64: Add HF routines to libgcc_s.so
The libgcc HF support routines were being linked into libgcc_s.so,
but weren't being exported.

libgcc/
	* config/aarch64/libgcc-softfp.ver: New file.
	* config/aarch64/t-softfp (SHLIB_MAPFILES): Add it.
2020-09-28 11:26:53 +01:00
Mark Eggleston 53673d763f Revert "Fortran : ICE in build_field PR95614"
This reverts commit e5a76af3a2.
2020-09-28 11:02:58 +01:00
Eric Botcazou cc997e0cc4 Add missing end location information
In some cases we would fail to put the end location information on the
outermost BIND_EXPR of a function, which is problematic when there is
a dynamic stack allocation.

gcc/ada/ChangeLog:
	* gcc-interface/trans.c (Subprogram_Body_to_gnu): Set the end locus
	of body and declaration earlier.
2020-09-28 09:32:27 +02:00
Eric Botcazou 88795e14ae Fix bogus alignment warning on address clause
The compiler gives a bogus alignment warning on an address clause and
a discriminated record type with variable size.

gcc/ada/ChangeLog:
	* gcc-interface/decl.c (maybe_saturate_size): Add ALIGN parameter
	and round down the result to ALIGN.
	(gnat_to_gnu_entity): Adjust calls to maybe_saturate_size.

gcc/testsuite/ChangeLog:
	* gnat.dg/addr16.adb: New test.
	* gnat.dg/addr16_pkg.ads: New helper.
2020-09-28 09:32:27 +02:00
Eric Botcazou dabef758bf Revert recent changes to lower_try_finally_dup_block
This reverts the recent changes made to lower_try_finally_dup_block and
aimed at tweaking the souce location info for __builtin_stack_restore.

gcc/ChangeLog:
	* tree-eh.c (lower_try_finally_dup_block): Revert latest change.
2020-09-28 09:32:27 +02:00
GCC Administrator 4383c595ce Daily bump. 2020-09-28 00:16:21 +00:00
Jan Hubicka e24817aa7a Fix handling of stores in modref_summary::useful_p
* ipa-modref.c (modref_summary::useful_p): Fix testing of stores.
2020-09-27 23:44:15 +02:00
Jakub Jelinek a4b31d5807 optabs: Don't reuse target for multi-word expansions if it overlaps operand(s) [PR97073]
The following testcase is miscompiled on i686-linux, because
we try to expand a double-word bitwise logic operation with op0
being a (mem:DI u) and target (mem:DI u+4), i.e. partial overlap, and
thus end up with:
	movl	4(%esp), %eax
	andl	u, %eax
	movl	%eax, u+4
! movl u+4, %eax optimized out
	andl	8(%esp), %eax
	movl	%eax, u+8
rather than with the desired:
	movl	4(%esp), %edx
	movl	8(%esp), %eax
	andl	u, %edx
	andl	u+4, %eax
	movl	%eax, u+8
	movl	%edx, u+4
because the store of the first word to target overwrites the second word of
the operand.
expand_binop for this (and several similar places) already check for target
== op0 or target == op1, this patch just adds reg_overlap_mentioned_p calls
next to it.
Pedantically, at least for some of these it might be sufficient to force
a different target if there is overlap but target is not rtx_equal_p to
the operand (e.g. in this bitwise logical case, but e.g. not in the shift
cases where there is reordering), though that would go against the
preexisting target == op? checks and the rationale that REG_EQUAL notes in
that case isn't correct.

2020-09-27  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/97073
	* optabs.c (expand_binop, expand_absneg_bit, expand_unop,
	expand_copysign_bit): Check reg_overlap_mentioned_p between target
	and operand(s) and if it returns true, force a pseudo as target.

	* gcc.c-torture/execute/pr97073.c: New test.
2020-09-27 23:18:26 +02:00
Clément Chigot 3c11f25fb8 aix: Use $(AR) without -X32_64 to build FAT libraries.
AIX FAT libraries should be built with the version of AR chosen by configure.
The GNU Make $(AR) variable includes the AIX -X32_64 option needed
by the default Makefile rules to accept both 32 bit and 64 bit object files.
The -X32_64 option conflicts with ar archiving objects of the same name
used to build FAT libraries.

This patch changes the Makefile fragments for AIX FAT libraries to use $(AR),
but strips the -X32_64 option from the Make variable.

libgcc/ChangeLog:

2020-09-27  Clement Chigot  <clement.chigot@atos.net>

	* config/rs6000/t-slibgcc-aix: Use $(AR) without -X32_64.

libatomic/ChangeLog:

2020-09-27  Clement Chigot  <clement.chigot@atos.net>

	* config/t-aix: Use $(AR) without -X32_64.

libgomp/ChangeLog:

2020-09-27  Clement Chigot  <clement.chigot@atos.net>

	* config/t-aix: Use $(AR) without -X32_64.

libstdc++-v3/ChangeLog:

2020-09-27  Clement Chigot  <clement.chigot@atos.net>

	* config/os/aix/t-aix: Use $(AR) without -X32_64.

libgfortran/ChangeLog:

2020-09-27  Clement Chigot  <clement.chigot@atos.net>

	* config/t-aix: Use $(AR) without -X32_64.
2020-09-27 12:43:29 -04:00
Mark Eggleston e5a76af3a2 Fortran : ICE in build_field PR95614
Local identifiers can not be the same as a module name.  Original
patch by Steve Kargl resulted in name clashes between common block
names and local identifiers.  A local identifier can be the same as
a global identier if that identifier represents a common.  The patch
was modified to allow global identifiers that represent a common
block.

2020-09-27  Steven G. Kargl  <kargl@gcc.gnu.org>
	    Mark Eggleston  <markeggleston@gcc.gnu.org>

gcc/fortran/

	PR fortran/95614
	* decl.c (gfc_get_common): Use gfc_match_common_name instead
	of match_common_name.
	* decl.c (gfc_bind_idents): Use gfc_match_common_name instead
	of match_common_name.
	* match.c : Rename match_common_name to gfc_match_common_name.
	* match.c (gfc_match_common): Use gfc_match_common_name instead
	of match_common_name.
	* match.h : Rename match_common_name to gfc_match_common_name.
	* resolve.c (resolve_common_vars): Check each symbol in a
	common block has a global symbol.  If there is a global symbol
	issue an error if the symbol type is known as is not a common
	block name.

2020-09-27  Mark Eggleston  <markeggleston@gcc.gnu.org>

gcc/testsuite/

	PR fortran/95614
	* gfortran.dg/pr95614_1.f90: New test.
	* gfortran.dg/pr95614_2.f90: New test.
2020-09-27 11:47:08 +01:00
Xionghu Luo 683e55facf IFN: Implement IFN_VEC_SET for ARRAY_REF with VIEW_CONVERT_EXPR
This patch enables transformation from ARRAY_REF(VIEW_CONVERT_EXPR) to
VEC_SET internal function in gimple-isel pass if target supports
vec_set with variable index by checking can_vec_set_var_idx_p.

gcc/ChangeLog:

2020-09-27  Xionghu Luo  <luoxhu@linux.ibm.com>

	* gimple-isel.cc (gimple_expand_vec_set_expr): New function.
	(gimple_expand_vec_cond_exprs): Rename to ...
	(gimple_expand_vec_exprs): ... this and call
	gimple_expand_vec_set_expr.
	* internal-fn.c (vec_set_direct): New define.
	(expand_vec_set_optab_fn): New function.
	(direct_vec_set_optab_supported_p): New define.
	* internal-fn.def (VEC_SET): New DEF_INTERNAL_OPTAB_FN.
	* optabs.c (can_vec_set_var_idx_p): New function.
	* optabs.h (can_vec_set_var_idx_p): New declaration.
2020-09-27 00:27:32 -05:00
GCC Administrator 91dd4a3864 Daily bump. 2020-09-27 00:16:24 +00:00
Jonathan Wakely e6923541fa libstdc++: Use __libc_single_threaded to optimise atomics [PR 96817]
Glibc 2.32 adds a global variable that says whether the process is
single-threaded. We can use this to decide whether to elide atomic
operations, as a more precise and reliable indicator than
__gthread_active_p.

This means that guard variables for statics and reference counting in
shared_ptr can use less expensive, non-atomic ops even in processes that
are linked to libpthread, as long as no threads have been created yet.
It also means that we switch to using atomics if libpthread gets loaded
later via dlopen (this still isn't supported in general, for other
reasons).

We can't use __libc_single_threaded to replace __gthread_active_p
everywhere. If we replaced the uses of __gthread_active_p in std::mutex
then we would elide the pthread_mutex_lock in the code below, but not
the pthread_mutex_unlock:

  std::mutex m;
  m.lock();            // pthread_mutex_lock
  std::thread t([]{}); // __libc_single_threaded = false
  t.join();
  m.unlock();          // pthread_mutex_unlock

We need the lock and unlock to use the same "is threading enabled"
predicate, and similarly for init/destroy pairs for mutexes and
condition variables, so that we don't try to release resources that were
never acquired.

There are other places that could use __libc_single_threaded, such as
_Sp_locker in src/c++11/shared_ptr.cc and locale init functions, but
they can be changed later.

libstdc++-v3/ChangeLog:

	PR libstdc++/96817
	* include/ext/atomicity.h (__gnu_cxx::__is_single_threaded()):
	New function wrapping __libc_single_threaded if available.
	(__exchange_and_add_dispatch, __atomic_add_dispatch): Use it.
	* libsupc++/guard.cc (__cxa_guard_acquire, __cxa_guard_abort)
	(__cxa_guard_release): Likewise.
	* testsuite/18_support/96817.cc: New test.
2020-09-26 20:32:36 +01:00
Jan Hubicka 3991912e26 Fix handling of clobbers in ipa-modref.c
* ipa-modref.c (analyze_stmt): Do not skip clobbers in early pass.
	* ipa-pure-const.c (analyze_stmt): Update comment.
2020-09-26 18:41:21 +02:00
David Edelsohn 081b3517b4 aix: Fix _STDC_FORMAT_MACROS in inttypes.h [PR97044]
AIX protects the STDC Format Macros in a manner that can prevent the
definition of the macros depending on the order of header inclusion.

The protection of the macros was referenced in C99, removed in C11, and
never specified in any C++ standard. Also, the macros are in the namespace
reserved to the implementation (compiler) so the compiler is permitted to
choose to inject those names.

fixincludes/ChangeLog:

2020-09-17  David Edelsohn  <dje.gcc@gmail.com>

	PR target/97044
	* inclhack.def (aix_inttypes): New fix.
	* fixincl.x: Regenerate.
	* tests/base/sys/inttypes.h: New file.
2020-09-26 15:59:24 +00:00
David Edelsohn e721d1137f aix: collect2 visibility
The code that collect2 generates, compiles and links into applications
and shared libraries to initialize constructors and register DWARF tables
is built with the compiler options used to invoke the linker.  If the
compiler options change the visibility from default, the library
initialization routines will not be visible and this can prevent
initialization.

This patch checks if the command line sets visibiliity and then adds
GCC pragmas to the initialization code generated by collect2 if
necessary to define the visibility on global, exported functions as default.

gcc/ChangeLog:

2020-09-26  David Edelsohn  <dje.gcc@gmail.com>
	    Clement Chigot  <clement.chigot@atos.com>

	* collect2.c (visibility_flag): New.
	(main): Detect -fvisibility.
	(write_c_file_stat): Push and pop default visibility.
2020-09-26 11:26:47 -04:00
Paul Thomas 5b26b3b3f5 Correct overwrite of alloc_comp_result_2.f90 in fix of PR96495.
2020-26-09  Paul Thomas  <pault@gcc.gnu.org>

gcc/testsuite/
	PR fortran/96495
	* gfortran.dg/alloc_comp_result_2.f90 : Restore original.
	* gfortran.dg/alloc_comp_result_3.f90 : New test.
2020-09-26 12:32:35 +01:00
Jan Hubicka a8d2d89de2 Add modref testcases
gcc/testsuite/

	* gcc.dg/lto/modref-1_0.c: New test.
	* gcc.dg/lto/modref-1_1.c: New test.
	* gcc.dg/tree-ssa/modref-2.c: New test.
2020-09-26 10:44:53 +02:00
Jan Hubicka ada353b879 Implement iterative dataflow in mod-ref
cc1plus stats are now:

Alias oracle query stats:
  refs_may_alias_p: 62971744 disambiguations, 73160711 queries
  ref_maybe_used_by_call_p: 141176 disambiguations, 63867883 queries
  call_may_clobber_ref_p: 23573 disambiguations, 29322 queries
  nonoverlapping_component_refs_p: 0 disambiguations, 37720 queries
  nonoverlapping_refs_since_match_p: 19432 disambiguations, 55659 must overlaps, 75860 queries
  aliasing_component_refs_p: 54724 disambiguations, 753570 queries
  TBAA oracle: 24124230 disambiguations 56228428 queries
               16058141 are in alias set 0
               10338303 queries asked about the same object
               125 queries asked about the same alias set
               0 access volatile
               3919230 are dependent in the DAG
               1788399 are aritificially in conflict with void *

Modref stats:
  modref use: 10408 disambiguations, 46993 queries
  modref clobber: 1418549 disambiguations, 1951251 queries
  4898707 tbaa queries (2.510547 per modref query)
  396878 base compares (0.203397 per modref query)

PTA query stats:
  pt_solution_includes: 975364 disambiguations, 13604284 queries
  pt_solutions_intersect: 1026606 disambiguations, 13181198 queries

So compared to
https://gcc.gnu.org/pipermail/gcc-patches/2020-September/554692.html we get 25%
use disambiguations and 91% more clobber disambiguations.

Tramp3d is

Alias oracle query stats:
  refs_may_alias_p: 2056905 disambiguations, 2317461 queries
  ref_maybe_used_by_call_p: 7137 disambiguations, 2093762 queries
  call_may_clobber_ref_p: 234 disambiguations, 234 queries
  nonoverlapping_component_refs_p: 0 disambiguations, 4313 queries
  nonoverlapping_refs_since_match_p: 329 disambiguations, 10200 must overlaps, 10616 queries
  aliasing_component_refs_p: 858 disambiguations, 34600 queries
  TBAA oracle: 894996 disambiguations 1695991 queries
               138346 are in alias set 0
               470668 queries asked about the same object
               0 queries asked about the same alias set
               0 access volatile
               191666 are dependent in the DAG
               315 are aritificially in conflict with void *

Modref stats:
  modref use: 842 disambiguations, 2265 queries
  modref clobber: 14833 disambiguations, 28900 queries
  34884 tbaa queries (1.207059 per modref query)
  5041 base compares (0.174429 per modref query)

PTA query stats:
  pt_solution_includes: 313372 disambiguations, 525724 queries
  pt_solutions_intersect: 130374 disambiguations, 415138 queries

So about twice many use and 40% clobber disambiguations.

Bootstrapped/regtested x86_64-linux, I plan to commit it later today after
more testing.

2020-09-26  Jan Hubicka  <hubicka@ucw.cz>

	* ipa-inline-transform.c: Include ipa-modref-tree.h and ipa-modref.h.
	(inline_call): Call ipa_merge_modref_summary_after_inlining.
	* ipa-inline.c (ipa_inline): Do not free summaries.
	* ipa-modref.c (dump_records): Fix formating.
	(merge_call_side_effects): Break out from ...
	(analyze_call): ... here; record recursive calls.
	(analyze_stmt): Add new parameter RECURSIVE_CALLS.
	(analyze_function): Do iterative dataflow on recursive calls.
	(compute_parm_map): New function.
	(ipa_merge_modref_summary_after_inlining): New function.
	(collapse_loads): New function.
	(modref_propagate_in_scc): Break out from ...
	(pass_ipa_modref::execute): ... here; Do iterative dataflow.
	* ipa-modref.h (ipa_merge_modref_summary_after_inlining): Declare.
2020-09-26 10:43:57 +02:00
Jakub Jelinek a29bd4f59e openmp: Improve #pragma omp simd vectorization
As mentioned earlier, the vectorizer punts on vectorization of loops with non-constant
steps.  As for OpenMP loops it is by the language restriction always possible to compute
the number of loop iterations before the loop, this change helps those cases
by computing it and using an alternate IV that iterates from 0 to < niterations with
step of 1 next to the normal IV which will be just linear in that.

List of functions where we compared to current trunk vectorize some loops where we
previously didn't (for c-c++-common only listing the C function names, both C and C++
are affected though):

gcc/testsuite/gcc.dg/vect/vect-simd-17.c doit
gcc/testsuite/gcc.dg/vect/vect-simd-18.c foo
gcc/testsuite/gcc.dg/vect/vect-simd-19.c foo
gcc/testsuite/gcc.dg/vect/vect-simd-20.c foo
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_f_simd_auto
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_f_simd_guided32
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_f_simd_runtime
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_f_simd_static
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_f_simd_static32
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_pf_simd_auto._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_pf_simd_guided32._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_pf_simd_runtime._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_pf_simd_static32._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_pf_simd_static._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_simd_normal
libgomp/testsuite/libgomp.c-c++-common/for-2.c f5_simd_normal
libgomp/testsuite/libgomp.c-c++-common/for-2.c f6_simd_normal
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_auto._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_ds128_auto._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_ds128_guided32._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_ds128_runtime._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_ds128_static32._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_ds128_static._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_guided32._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_runtime._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_static32._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_static._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_ds_ds128_normal
libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_ds_normal
libgomp/testsuite/libgomp.c-c++-common/for-4.c f3_taskloop_simd_normal._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_tpf_simd_auto._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_tpf_simd_guided32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_tpf_simd_runtime._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_tpf_simd_static32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_tpf_simd_static._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_t_simd_normal._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_auto._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_ds128_auto._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_ds128_guided32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_ds128_runtime._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_ds128_static32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_ds128_static._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_guided32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_runtime._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_static32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_static._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttds_ds128_normal._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttds_normal._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-5.c f5_t_simd_normal._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-5.c f6_t_simd_normal._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_auto._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_ds128_auto._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_ds128_guided32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_ds128_runtime._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_ds128_static32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_ds128_static._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_guided32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_runtime._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_static32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_static._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tds_ds128_normal._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tds_normal._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_auto._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_ds128_auto._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_ds128_guided32._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_ds128_runtime._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_ds128_static32._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_ds128_static._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_guided32._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_runtime._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_static32._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_static._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_ds_ds128_normal
libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_ds_normal
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_auto._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_ds128_auto._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_ds128_guided32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_ds128_runtime._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_ds128_static32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_ds128_static._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_guided32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_runtime._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_static32._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_static._omp_fn.1
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tds_ds128_normal._omp_fn.0
libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tds_normal._omp_fn.0

2020-09-26  Jakub Jelinek  <jakub@redhat.com>

	* omp-expand.c (expand_omp_simd): Help vectorizer for the collapse == 1
	and non-composite collapse > 1 case with non-constant innermost loop
	step by precomputing number of iterations before loop and using an
	alternate IV from 0 to number of iterations - 1 with step of 1.

	* gcc.dg/vect/vect-simd-17.c: Expect 11 or more vectorized loops.
	* gcc.dg/vect/vect-simd-18.c: New test.
	* gcc.dg/vect/vect-simd-19.c: New test.
	* gcc.dg/vect/vect-simd-20.c: New test.
2020-09-26 10:10:09 +02:00