Every caller passes in 'FLAG_PRESENT', 'FLAG_CREATE'. Change the remaining
'FLAG_COPY' into the usual map kind.
No functional changes.
libgomp/
* oacc-mem.c (present_create_copy): Refactor into...
(goacc_enter_data): ... this. Adjust all users.
From-SVN: r279535
PR92970 "OpenACC 2.5: 'acc_delete' etc. on non-present data is a no-op" is an
actual bug fix, and the other ones are fall-out, currently undefined behavior.
libgomp/
PR libgomp/92726
PR libgomp/92970
PR libgomp/92984
* oacc-mem.c (delete_copyout): No-op behavior if 'lookup_host'
fails.
(GOACC_enter_exit_data): Simplify accordingly.
* testsuite/libgomp.oacc-c-c++-common/pr92970-1.c: New file,
subsuming...
* testsuite/libgomp.oacc-c-c++-common/lib-17.c: ... this file...
* testsuite/libgomp.oacc-c-c++-common/lib-18.c: ..., and this
file.
* testsuite/libgomp.oacc-c-c++-common/pr92984-1.c: New file,
subsuming...
* testsuite/libgomp.oacc-c-c++-common/lib-21.c: ... this file...
* testsuite/libgomp.oacc-c-c++-common/lib-29.c: ..., and this
file.
* testsuite/libgomp.oacc-c-c++-common/pr92726-1.c: New file,
subsuming...
* testsuite/libgomp.oacc-c-c++-common/lib-28.c: ... this file.
From-SVN: r279532
This got changed to 'attribute_hidden' in r271128, but it's not actually used
outside of 'libgomp/target.c'.
libgomp/
* target.c (gomp_unmap_tgt): Make it 'static'.
* libgomp.h (gomp_unmap_tgt): Remove.
From-SVN: r279529
Several tuning settings in cores.def are not consistent.
Set the tuning for Cortex-A76AE and Cortex-A77 to neoversen1 so
it is the same as for Cortex-A76 and Neoverse N1.
Set the tuning for Neoverse E1 to cortexa73 so it's the same as for
Cortex-A65. Set the scheduler for Cortex-A65 and Cortex-A65AE to
cortexa53.
gcc/
* config/aarch64/aarch64-cores.def:
("cortex-a76ae"): Use neoversen1 tuning.
("cortex-a77"): Likewise.
("cortex-a65"): Use cortexa53 scheduler.
("cortex-a65ae"): Likewise.
("neoverse-e1"): Use cortexa73 tuning.
From-SVN: r279526
* ipa-param-manipulation.h (get_original_index): Declare.
* ipa-param-manipulation.c (ipa_param_adjustments::get_original_index):
New member function.
* ipa-prop.c (ipcp_get_parm_bits): New function.
* ipa-prop.h (ipcp_get_parm_bits): Declare.
* tree-ssa-ccp.c: Include cgraph.h, alloc-pool.h, symbol-summary.h,
ipa-utils.h and ipa-prop.h
(get_default_value): Use ipcp_get_parm_bits.
* gcc.dg/ipa/ipa-bit-cp.c: New testcase.
* gcc.dg/ipa/ipa-bit-cp-1.c: New testcase.
* gcc.dg/ipa/ipa-bit-cp-2.c: New testcase.
Co-Authored-By: Martin Jambor <mjambor@suse.cz>
From-SVN: r279523
this->X::~X() is handled by finish_class_member_access_expr and its
lookup_destructor subroutine; let's use it in cp_parser_lookup_name for the
case where this-> is implicit.
I tried replacing the other destructor code here with just the call to
lookup_destructor, but that regressed handling of naming the destructor
outside a non-static member function.
* parser.c (cp_parser_lookup_name): Use lookup_destructor.
* typeck.c (lookup_destructor): No longer static.
From-SVN: r279522
* gcc-interface/trans.c (Pragma_to_gnu) <Pragma_Warnings>: Push a
diagnostics state for pragma Warnings (Off) before turning off all
the warnings and only pop it for pragma Warnings (On).
From-SVN: r279519
2019-12-18 Justin Squirek <squirek@adacore.com>
gcc/ada/
* sem_ch6.adb (Analyze_Function_Return): Modify handling of
extended return statements to check accessibility of access
discriminants.
(Check_Aggregate_Accessibility): Removed.
(Check_Return_Obj_Accessibility): Added to centralize checking
of return aggregates and subtype indications in the case of an
extended return statement.
From-SVN: r279518
2019-12-18 Arnaud Charlet <charlet@adacore.com>
gcc/ada/
* libgnat/s-atopar.ads, libgnat/s-atopex.ads (Atomic_Type): Can
now be marked Atomic. This requires marking the unit Ada 202x.
From-SVN: r279516
2019-12-18 Arnaud Charlet <charlet@adacore.com>
gcc/ada/
* libgnat/a-nbnbin.ads, libgnat/a-nbnbin.adb,
libgnat/a-nbnbre.ads, libgnat/a-nbnbre.adb: Replace
Optional_Big_* types by a simple check and exception raise in
Get_Bignum.
(Set_Bignum): Arg should be 'out' and not 'in out'.
(Invalid_Big_Integer, No_Big_Real): Removed.
(Is_Valid): Now convention Intrinsic.
From-SVN: r279515
2019-12-18 Gary Dismukes <dismukes@adacore.com>
gcc/ada/
* sem_res.adb (Resolve_Type_Conversion): Add handling for access
types with designated operand and target types that are
referenced in places that have a limited view of an interface
type by retrieving the nonlimited view when it exists. Add ???
comments related to missing limited_with_clause handling for
Target (in the non-access case).
From-SVN: r279513
2019-12-18 Ed Schonberg <schonberg@adacore.com>
gcc/ada/
* par-ch12.adb (P_Formal_Derived_Type_Definition): In Ada_2020
the keyword WITH can indicate the start of aspect specifications
and not a private type extension.
* sem_ch12.adb (Analyze_Formal_Type): Indicate that it is a
first subtype.
(Instantiate_Type): New procedure
Check_Shared_Variable_Control_Aspects to verify matching rules
between formal and actual types. Note that an array type with
aspect Atomic_Components is considered compatible with an array
type whose component type is Atomic, even though the array types
do not carry the same aspect.
* sem_ch13.adb (Analyze_One_Aspect): Allow shared variable
control aspects to appear on formal types.
(Rep_Item_Too_Early): Exclude aspects on formal types.
* sem_prag.adb (Mark_Type): Handle properly pragmas that come
from aspects on formal types.
(Analyze_Pragma, case Atomic_Components): Handle formal types.
From-SVN: r279512
2019-12-18 Javier Miranda <miranda@adacore.com>
gcc/ada/
* debug.adb: Document -gnatd_K as a reserved switch for the
detection of known problem issues of previous releases.
From-SVN: r279510
2019-12-18 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* layout.adb (Layout_Type): In the case of composite types, do
not copy the Esize onto the RM_Size if the latter is not set.
* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Record_Type>:
Also cap the alignment if an Object_Size clause has been
specified. Pass VAR_DECL in the call to validate_size for the
Esize of a type.
(validate_size): Be prepared to give an error on an Object_Size
clause.
From-SVN: r279507
2019-12-18 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* einfo.ads (Handling of Type'Size Value): Add references to the
introduction of Object_Size in Ada 2020.
* sem_eval.adb (Subtypes_Statically_Match): Likewise.
From-SVN: r279506
2019-12-18 Bob Duff <duff@adacore.com>
gcc/ada/
* sem_ch3.adb (Derive_Subprogram): Do not set the
Requires_Overriding flag in the above-mentioned case.
From-SVN: r279505
2019-12-18 Bob Duff <duff@adacore.com>
gcc/ada/
* sem_ch8.adb (Note_Redundant_Use): It was already checking for
a use clause in the visible part of the child. Add an additional
check for a use clause in the context clause of the child.
From-SVN: r279504
2019-12-12 Michael Meissner <meissner@linux.ibm.com>
* config/rs6000/predicates.md (add_operand): Allow eI constants.
* config/rs6000/rs6000.md (add<mode>3): Add alternative to
generate PADDI for 34-bit constants if -mcpu=future.
From-SVN: r279476
2019-12-17 Michael Meissner <meissner@linux.ibm.com>
* config/rs6000/rs6000.md (movsi_internal1): Add alternative to
use PLI to load up 32-bit constants if -mcpu=future.
From-SVN: r279475
2019-12-17 Michael Meissner <meissner@linux.ibm.com>
* config/rs6000/rs6000.c (num_insns_constant_gpr): Return 1 if the
constant can be loaded with PLI if -mcpu=future.
* config/rs6000/rs6000.md (movdi_internal64): Add alternative to
use PLI to load up 34-bit constants if -mcpu=future.
From-SVN: r279474
We changed months back to use the pre-generic form for constexpr evaluation,
but explain_invalid_constexpr_fn was still using DECL_SAVED_TREE. This
mostly works, but misses some issues due to folding. So with this patch we
save the pre-generic form of constexpr functions even when we know they
can't produce a constant result.
* constexpr.c (register_constexpr_fundef): Do store the body of a
template instantiation that is not potentially constant.
(explain_invalid_constexpr_fn): Look it up.
(cxx_eval_call_expression): Check fundef->result.
From-SVN: r279473
The variable templates patch way back when forgot to add handling here. The
simplest answer seems to be recursing to the underlying declaration.
* decl.c (redeclaration_error_message): Recurse for variable
templates.
From-SVN: r279472
PR c++/59655
* pt.c (push_tinst_level_loc): If limit_bad_template_recursion,
set TREE_NO_WARNING on tldcl.
* decl2.c (no_linkage_error): Treat templates with TREE_NO_WARNING
as defined during error recovery.
* g++.dg/cpp0x/diag3.C: New test.
From-SVN: r279470
This patch extends support for -mpure-code to all thumb-1 processors,
by removing the need for MOVT.
Symbol addresses are built using upper8_15, upper0_7, lower8_15 and
lower0_7 relocations, and constants are built using sequences of
movs/adds and lsls instructions.
The extension of the *thumb1_movhf pattern uses always the same size
(6) although it can emit a shorter sequence when possible. This is
similar to what *arm32_movhf already does.
CASE_VECTOR_PC_RELATIVE is now false with -mpure-code, to avoid
generating invalid assembly code with differences from symbols from
two different sections (the difference cannot be computed by the
assembler).
Tests pr45701-[12].c needed a small adjustment to avoid matching
upper8_15 when looking for the r8 register.
Test no-literal-pool.c is augmented with __fp16, so it now uses
-mfp16-format=ieee.
Test thumb1-Os-mult.c generates an inline code sequence with
-mpure-code and computes the multiplication by using a sequence of
add/shift rather than using the multiply instruction, so we skip it in
presence of -mpure-code.
With -mcpu=cortex-m0, the pure-code/no-literal-pool.c fails because
code like:
static char *p = "Hello World";
char *
testchar ()
{
return p + 4;
}
generates 2 indirections (I removed non-essential directives/code)
.section .rodata
.LC0:
.ascii "Hello World\000"
.data
p:
.word .LC0
.section .rodata
.LC2:
.word p
.section .text,"0x20000006",%progbits
testchar:
push {r7, lr}
add r7, sp, #0
movs r3, #:upper8_15:#.LC2
lsls r3, #8
adds r3, #:upper0_7:#.LC2
lsls r3, #8
adds r3, #:lower8_15:#.LC2
lsls r3, #8
adds r3, #:lower0_7:#.LC2
ldr r3, [r3]
ldr r3, [r3]
adds r3, r3, #4
movs r0, r3
mov sp, r7
@ sp needed
pop {r7, pc}
By contrast, when using -mcpu=cortex-m4, the code looks like:
.section .rodata
.LC0:
.ascii "Hello World\000"
.data
p:
.word .LC0
testchar:
push {r7}
add r7, sp, #0
movw r3, #:lower16:p
movt r3, #:upper16:p
ldr r3, [r3]
adds r3, r3, #4
mov r0, r3
mov sp, r7
pop {r7}
bx lr
I haven't found yet how to make code for cortex-m0 apply upper/lower
relocations to "p" instead of .LC2. The current code looks functional,
but could be improved.
2019-10-18 Christophe Lyon <christophe.lyon@linaro.org>
gcc/
* config/arm/arm-protos.h (thumb1_gen_const_int): Add new prototype.
* config/arm/arm.c (arm_option_check_internal): Remove restriction
on MOVT for -mpure-code.
(thumb1_gen_const_int): New function.
(thumb1_legitimate_address_p): Support -mpure-code.
(thumb1_rtx_costs): Likewise.
(thumb1_size_rtx_costs): Likewise.
(arm_thumb1_mi_thunk): Likewise.
* config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Likewise.
* config/arm/thumb1.md (thumb1_movsi_symbol_ref): New.
(*thumb1_movhf): Support -mpure-code.
gcc/testsuite/
* gcc.target/arm/pr45701-1.c: Adjust for -mpure-code.
* gcc.target/arm/pr45701-2.c: Likewise.
* gcc.target/arm/pure-code/no-literal-pool.c: Add tests for
__fp16.
* gcc.target/arm/pure-code/pure-code.exp: Remove thumb2 and movt
conditions.
* gcc.target/arm/thumb1-Os-mult.c: Skip if -mpure-code is used.
From-SVN: r279463
