This patch removes the special casing for targets with relaxed
memory ordering and handles guard accesses with equivalent
atomic load acquire operations. In this process we change the
algorithm to load the guard variable with an atomic load that
has ACQUIRE semantics.
This then means that on targets which have weak memory models, the
fast path is inlined and can directly use a load-acquire instruction
where available (and yay! one more hook gone).
2015-06-04 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
PR c++/66192
PR target/66200
* doc/tm.texi: Regenerate.
* doc/tm.texi.in (TARGET_RELAXED_ORDERING): Delete.
* target.def (TARGET_RELAXED_ORDERING): Likewise.
* config/alpha/alpha.c (TARGET_RELAXED_ORDERING): Likewise.
* config/ia64/ia64.c (TARGET_RELAXED_ORDERING): Likewise.
* config/rs6000/rs6000.c (TARGET_RELAXED_ORDERING): Likewise.
* config/sparc/linux.h (SPARC_RELAXED_ORDERING): Likewise.
* config/sparc/linux64.h (SPARC_RELAXED_ORDERING): Likewise.
* config/sparc/sparc.c (TARGET_RELAXED_ORDERING): Likewise.
* config/sparc/sparc.h (SPARC_RELAXED_ORDERING): Likewise.
* system.h (TARGET_RELAXED_ORDERING): Poison.
2015-06-04 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
PR c++/66192
PR target/66200
* cp-tree.h (get_guard_cond): Adjust declaration
* decl.c (expand_static_init): Use atomic load acquire
and adjust call to get_guard_cond.
* decl2.c (build_atomic_load_byte): New function.
(get_guard_cond): Handle thread_safety.
(one_static_initialization_or_destruction): Adjust call to
get_guard_cond.
From-SVN: r224118
gcc/c-family/ChangeLog:
2015-05-20 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* c-cppbuiltin.c (c_cpp_builtins): Check the value of
STACK_GROWS_DOWNWARD rather than if it is defined.
gcc/ChangeLog:
2015-05-20 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* *.c: Check the value of STACK_GROWS_DOWNWARD rather than if it
is defined.
* config/**/*.h: Define STACK_GROWS_DOWNWARD to an integer.
* defaults.h: Provide default for STACK_GROWS_DOWNWARD.
* doc/tm.texi.in: Update references to STACK_GROWS_DOWNWARD.
* doc/tm.texi: Regenerate.
From-SVN: r223513
2015-05-14 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/65862
* target.def (ira_change_pseudo_allocno_class): New hook.
* targhooks.c (default_ira_change_pseudo_allocno_class): Default
value of the hook.
* targhooks.h (default_ira_change_pseudo_allocno_class): New
extern
* doc/tm.texi.in (TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS): Add the
hook.
* ira-costs.c (find_costs_and_classes): Call the hook and change
classes when it is necessary.
* doc/tm.texi: Update.
From-SVN: r223202
* target.def (attribute_table): Mention that struct attribute_spec
is defined in tree-core.h rather than tree.h
* doc/tm.texi: Regenerate.
From-SVN: r222688
* sched-deps.c (sched_macro_fuse_insns): Do not check modified_in_p
in the not conditional jump case.
* doc/tm.texi (TARGET_SCHED_MACRO_FUSION_PAIR_P): Update description.
* target.def (TARGET_SCHED_MACRO_FUSION_PAIR_P): Update description.
* gcc.target/aarch64/fuse_adrp_add_1.c: New test.
From-SVN: r218012
As opposed to always being a decl. This is a prerequisite
to allowing the static chain to be loaded for indirect calls.
* targhooks.c (default_static_chain): Remove check for
DECL_STATIC_CHAIN.
* config/moxie/moxie.c (moxie_static_chain): Likewise.
* config/i386/i386.c (ix86_static_chain): Allow decl or type
as the first argument.
* config/xtensa/xtensa.c (xtensa_static_chain): Change the name
of the unused first parameter.
* doc/tm.texi (TARGET_STATIC_CHAIN): Document the first parameter
may be a type.
* target.def (static_chain): Likewise.
From-SVN: r217769
gcc/
* common.opt (foffload, foffload-abi): New options.
* config/i386/i386.c (ix86_offload_options): New static function.
(TARGET_OFFLOAD_OPTIONS): Define.
* coretypes.h (enum offload_abi): New enum.
* doc/tm.texi: Regenerate.
* doc/tm.texi.in (TARGET_OFFLOAD_OPTIONS): Document.
* gcc.c (offload_targets): New static variable.
(handle_foffload_option): New static function.
(driver_handle_option): Handle OPT_foffload_.
(driver::maybe_putenv_OFFLOAD_TARGETS): Set OFFLOAD_TARGET_NAMES
according to offload_targets.
* hooks.c (hook_charptr_void_null): New hook.
* hooks.h (hook_charptr_void_null): Declare.
* lto-opts.c: Include lto-section-names.h.
(lto_write_options): Append options from target offload_options hook and
store them to offload_lto section. Do not store target-specific,
driver and diagnostic options in offload_lto section.
* lto-wrapper.c (merge_and_complain): Handle OPT_foffload_ and
OPT_foffload_abi_.
(append_compiler_options, append_linker_options)
(append_offload_options): New static functions.
(compile_offload_image): Add new arguments with options.
Call append_compiler_options and append_offload_options.
(compile_images_for_offload_targets): Add new arguments with options.
(find_and_merge_options): New static function.
(run_gcc): Outline options handling into the new functions:
find_and_merge_options, append_compiler_options, append_linker_options.
* opts.c (common_handle_option): Don't handle OPT_foffload_.
Forbid OPT_foffload_abi_ for non-offload compiler.
* target.def (offload_options): New target hook.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
From-SVN: r217493
* target.def (call_args, end_call_args): New hooks.
* hooks.c (hook_void_rtx_tree): New empty function.
* hooks.h (hook_void_rtx_tree): Declare.
* doc/tm.texi.in (TARGET_CALL_ARGS, TARGET_END_CALL_ARGS): Add.
* doc/tm.texi: Regenerate.
* calls.c (expand_call): Slightly rearrange the code. Use the two new
hooks.
(expand_library_call_value_1): Use the two new hooks.
From-SVN: r217199
* target.def (no_register_allocation): New data hook.
* doc/tm.texi.in: Add @hook TARGET_NO_REGISTER_ALLOCATION.
* doc/tm.texi: Regenerate.
* ira.c (gate_ira): New function.
(pass_data_ira): Set has_gate.
(pass_ira): Add a gate function.
(pass_data_reload): Likewise.
(pass_reload): Add a gate function.
(pass_ira): Use it.
* reload1.c (eliminate_regs): If reg_eliminate_is NULL, assert that
no register allocation happens on the target and return.
* final.c (alter_subreg): Ensure register is not a pseudo before
calling simplify_subreg.
(output_operand): Assert that x isn't a pseudo only if doing
register allocation.
From-SVN: r217122
This patch removes the target macro LIBGCC2_LONG_DOUBLE_TYPE_SIZE.
After recent changes, this macro was used in two ways in libgcc: to
determine the mode of long double in dfp-bit.h, and to determine
whether a particular mode has excess precision for use in complex
multiplication.
The former is concerned specifically with long double: it relates to
use of strtold for converting between decimal and binary floating
point. This is replaced by comparing __LDBL_MANT_DIG__ with the
appropriate __LIBGCC_*_MANT_DIG__ macro. The latter is replaced
__LIBGCC_*_EXCESS_PRECISION__ predefined macros.
Remarks:
* Comparing (__LDBL_MANT_DIG__ == __LIBGCC_XF_MANT_DIG__) is more
fragile than it looks; it's possible for XFmode to have 53-bit
mantissa (TARGET_96_ROUND_53_LONG_DOUBLE, on FreeBSD and
DragonFlyBSD 32-bit), in which case such a comparison would not
distinguish XFmode and DFmode as possible modes for long double.
Fortunately, no target supporting that form of XFmode also supports
long double = double (but if some target did, we'd need e.g. an
additional macro giving the exponent range of each mode).
Furthermore, this code doesn't actually get used for x86 (or any
other target with XFmode support), because x86 uses BID not DPD and
BID has its own conversion code (which handles conversions for both
XFmode and TFmode without needing to go via strtold). And FreeBSD
and DragonFlyBSD aren't among the targets with DFP support. So
while in principle this code is fragile and it's a deficiency that
it can't support both XFmode and TFmode at once (something that
can't be solved with the string conversion approach without libc
having TS 18661 functions such as strtof128), all these issues
should not be a problem in practice.
* If other cases of excess precision are supported in future, the code
for defining __LIBGCC_*_EXCESS_PRECISION__ may need updating.
Although the most likely such cases might not actually involve
excess precision for any mode used in libgcc - FLT_EVAL_METHOD being
32 to do _Float16 arithmetic on _Float32 should have the effect of
_Complex _Float16 arithmetic using __mulsc3 and __divsc3, rather
than currently nonexistent __mulhc3 and __divhc3 as in bug 63250 for
ARM.
* As has been noted in the context of simultaneous support for
__float128 and __ibm128 on Power, the semantics of macros such as
LONG_DOUBLE_TYPE_SIZE are problematic because they rely on a
poorly-defined precision value for floating-point modes (which seems
to be intended as the number of significant bits in the
representation, e.g. 80 for XFmode which may be either 12 or 16
bytes) uniquely identifying a mode (although defining an arbitrarily
different value for one of the modes you wish to distinguish may
work as a hack). It would be cleaner to have a target hook that
gives a machine mode directly for float, double and long double,
rather than going via these precision values. By eliminating all
use of these macros (FLOAT_TYPE_SIZE, DOUBLE_TYPE_SIZE,
LONG_DOUBLE_TYPE_SIZE) from code built for the target, this patch
facilitates such a conversion to a hook (which I suppose would take
some suitable enum as an argument to identify which of the three
types to return a mode for).
(The issue of multiple type support for DFP conversions would apply
in that Power case.
<https://gcc.gnu.org/ml/gcc-patches/2014-07/msg01084.html> doesn't
seem to touch on it, but it would seem reasonable to punt on it
initially as hard to fix. There would also be the issue of getting
functions such as __powikf2, __mulkc3, __divkc3 defined, but that's
rather easier to address.)
Bootstrapped with no regressions on x86_64-unknown-linux-gnu.
gcc:
* doc/tm.texi.in (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* doc/tm.texi: Regenerate.
* system.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Poison.
* config/alpha/alpha.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/i386/i386-interix.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE):
Remove.
* config/i386/i386.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/i386/rtemself.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/ia64/ia64.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/m68k/m68k.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/m68k/netbsd-elf.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE):
Remove.
* config/mips/mips.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/mips/n32-elf.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/msp430/msp430.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/rl78/rl78.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/rs6000/rs6000.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/rx/rx.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/s390/s390.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/sparc/freebsd.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/sparc/linux.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/sparc/linux64.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/sparc/netbsd-elf.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE):
Remove.
gcc/c-family:
* c-cppbuiltin.c (c_cpp_builtins): Define
__LIBGCC_*_EXCESS_PRECISION__ macros for supported floating-point
modes.
libgcc:
* dfp-bit.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
(__LIBGCC_XF_MANT_DIG__): Define if not already defined.
(LONG_DOUBLE_HAS_XF_MODE): Define in terms of
__LIBGCC_XF_MANT_DIG__.
(__LIBGCC_TF_MANT_DIG__): Define if not already defined.
(LONG_DOUBLE_HAS_TF_MODE): Define in terms of
__LIBGCC_TF_MANT_DIG__.
* libgcc2.c (NOTRUNC): Define in terms of
__LIBGCC_*_EXCESS_PRECISION__, not LIBGCC2_LONG_DOUBLE_TYPE_SIZE.
* libgcc2.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
From-SVN: r215491
gcc/ChangeLog:
* config/arc/arc.c (arc_can_follow_jump): Strengthen both params
from const_rtx to const rtx_insn *. Update union members from rtx
to rtx_insn *.
* doc/tm.texi (TARGET_CAN_FOLLOW_JUMP): Autogenerated change.
* hooks.c (hook_bool_const_rtx_const_rtx_true): Rename to...
(hook_bool_const_rtx_insn_const_rtx_insn_true): ...this, and
strengthen both params from const_rtx to const rtx_insn *.
* hooks.h (hook_bool_const_rtx_const_rtx_true): Likewise.
(hook_bool_const_rtx_insn_const_rtx_insn_true): Likewise.
* reorg.c (follow_jumps): Strengthen param "jump" from rtx to
rtx_insn *.
* target.def (can_follow_jump): Strengthen both params from
const_rtx to const rtx_insn *, and update default implementation
from hook_bool_const_rtx_const_rtx_true to
hook_bool_const_rtx_insn_const_rtx_insn_true.
From-SVN: r215269
This patch removes the LIBGCC2_HAS_{SF,DF,XF,TF}_MODE target macros,
replacing them by predefines with -fbuilding-libgcc, together with a
target hook that can influence those predefines when needed.
The new default is that a floating-point mode is supported in libgcc
if (a) it passes the scalar_mode_supported_p hook (otherwise it's not
plausible for it to be supported in libgcc) and (b) it's one of those
four modes (since those are the modes for which libgcc hardcodes the
possibility of support). The target hook can override the default
choice (in either direction) for modes that pass
scalar_mode_supported_p (although overriding in the direction of
returning true when the default would return false only makes sense if
all relevant functions are specially defined in libgcc for that
particular target).
The previous default settings depended on various settings such as
LIBGCC2_LONG_DOUBLE_TYPE_SIZE, as well as targets defining the above
target macros if the default wasn't correct.
The default scalar_mode_supported_p only declares a floating-point
mode to be supported if it matches one of float / double / long
double. This means that in most cases where a mode is only supported
conditionally in libgcc (TFmode only supported if it's the mode of
long double, most commonly), the default gets things right. Overrides
were needed in the following cases:
* SFmode would always have been supported in libgcc (the condition was
BITS_PER_UNIT == 8, true for all current targets), but pdp11
defaults to 64-bit float, and in that case SFmode would fail
scalar_mode_supported_p. I don't know if libgcc actually built for
pdp11 (and the port may well no longer be being used), but this
patch adds a scalar_mode_supported_p hook to it to ensure SFmode is
treated as supported.
* Certain i386 and ia64 targets need the new hook to match the
existing cases for when XFmode or TFmode support is present in
libgcc. For i386, the hook can always declare XFmode to be
supported - the cases where it's not are the cases where long double
is TFmode, in which case XFmode fails scalar_mode_supported_p[*] -
but TFmode support needs to be conditional. (And of the targets not
defining LIBGCC2_HAS_TF_MODE before this patch, some defined
LONG_DOUBLE_TYPE_SIZE to 64, so ensuring LIBGCC2_HAS_TF_MODE would
always be false, while others did not define it, so allowing it to
be true in the -mlong-double-128 case. This patch matches that
logic, although I suspect all the latter targets would have been
broken if you tried to enable -mlong-double-128 by default, for lack
of the soft-fp TFmode support in libgcc, which is separately
configured.)
[*] I don't know if it's deliberate not to support __float80 at all
with -mlong-double-128.
In order to implement the default version of the new hook,
insn-modes.h was made to contain macros such as HAVE_TFmode for each
machine mode, so the default hook can contain conditionals on whether
XFmode and TFmode exist (to match the hardcoding of a list of modes in
libgcc). This is also used in fortran/trans-types.c; previously it
had a conditional on defined(LIBGCC2_HAS_TF_MODE) (a bit dubious,
since it ignored the value of the macro), which is replaced by testing
defined(HAVE_TFmode), in conjunction with requiring
targetm.libgcc_floating_mode_supported_p.
(Fortran is testing something stronger than that hook: not only is
libgcc support required, but also libm or equivalent. Thus, it has a
test for ENABLE_LIBQUADMATH_SUPPORT in the case that the mode is
TFmode and that's not the same as any of the three standard types.
The old and new tests are intended to accept exactly the same set of
modes for all targets.)
Apart from the four target macros eliminated by this patch, it gets us
closer to eliminating LIBGCC2_LONG_DOUBLE_TYPE_SIZE as well, though a
few more places using that macro need changing first.
Bootstrapped with no regressions on x86_64-unknown-linux-gnu; also
built cc1 for crosses to ia64-elf and pdp11-none as a minimal test of
changes for those targets.
gcc:
* target.def (libgcc_floating_mode_supported_p): New hook.
* targhooks.c (default_libgcc_floating_mode_supported_p): New
function.
* targhooks.h (default_libgcc_floating_mode_supported_p): Declare.
* doc/tm.texi.in (LIBGCC2_HAS_DF_MODE, LIBGCC2_HAS_XF_MODE)
(LIBGCC2_HAS_TF_MODE): Remove.
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): New @hook.
* doc/tm.texi: Regenerate.
* genmodes.c (emit_insn_modes_h): Define HAVE_%smode for each
machine mode.
* system.h (LIBGCC2_HAS_SF_MODE, LIBGCC2_HAS_DF_MODE)
(LIBGCC2_HAS_XF_MODE, LIBGCC2_HAS_TF_MODE): Poison.
* config/i386/cygming.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/darwin.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/djgpp.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/dragonfly.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/freebsd.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/gnu-user-common.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/i386-interix.h (IX86_NO_LIBGCC_TFMODE): Define.
* config/i386/i386.c (ix86_libgcc_floating_mode_supported_p): New
function.
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Define.
* config/i386/i386elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/lynx.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/netbsd-elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/netbsd64.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/nto.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/openbsd.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/openbsdelf.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/rtemself.h (IX86_NO_LIBGCC_TFMODE): Define.
* config/i386/sol2.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/vx-common.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/ia64/elf.h (IA64_NO_LIBGCC_TFMODE): Define.
* config/ia64/freebsd.h (IA64_NO_LIBGCC_TFMODE): Define.
* config/ia64/hpux.h (LIBGCC2_HAS_XF_MODE, LIBGCC2_HAS_TF_MODE):
Remove.
* config/ia64/ia64.c (TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P):
New macro.
(ia64_libgcc_floating_mode_supported_p): New function.
* config/ia64/linux.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/ia64/vms.h (IA64_NO_LIBGCC_XFMODE)
(IA64_NO_LIBGCC_TFMODE): Define.
* config/msp430/msp430.h (LIBGCC2_HAS_DF_MODE): Remove.
* config/pdp11/pdp11.c (TARGET_SCALAR_MODE_SUPPORTED_P): New
macro.
(pdp11_scalar_mode_supported_p): New function.
* config/rl78/rl78.h (LIBGCC2_HAS_DF_MODE): Remove.
* config/rx/rx.h (LIBGCC2_HAS_DF_MODE): Remove.
gcc/c-family:
* c-cppbuiltin.c (c_cpp_builtins): Define __LIBGCC_HAS_%s_MODE__
macros for floating-point modes.
gcc/fortran:
* trans-types.c (gfc_init_kinds): Check
targetm.libgcc_floating_mode_supported_p for floating-point
modes. Check HAVE_TFmode instead of LIBGCC2_HAS_TF_MODE.
libgcc:
* libgcc2.h (LIBGCC2_HAS_SF_MODE): Define using
__LIBGCC_HAS_SF_MODE__.
(LIBGCC2_HAS_DF_MODE): Define using __LIBGCC_HAS_DF_MODE__.
(LIBGCC2_HAS_XF_MODE): Define using __LIBGCC_HAS_XF_MODE__.
(LIBGCC2_HAS_TF_MODE): Define using __LIBGCC_HAS_TF_MODE__.
* config/libbid/bid_gcc_intrinsics.h
(LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Do not define.
(LIBGCC2_HAS_XF_MODE): Define using __LIBGCC_HAS_XF_MODE__.
(LIBGCC2_HAS_TF_MODE): Define using __LIBGCC_HAS_TF_MODE__.
* fixed-bit.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Do not define.
(LIBGCC2_HAS_SF_MODE): Define using __LIBGCC_HAS_SF_MODE__.
(LIBGCC2_HAS_DF_MODE): Define using __LIBGCC_HAS_DF_MODE__.
From-SVN: r215215
gcc:
* config/i386/cygming.h (TF_SIZE): Remove.
* config/i386/darwin.h (TF_SIZE): Remove.
* config/i386/dragonfly.h (TF_SIZE): Remove.
* config/i386/freebsd.h (TF_SIZE): Remove.
* config/i386/gnu-user-common.h (TF_SIZE): Remove.
* config/i386/openbsdelf.h (TF_SIZE): Remove.
* config/i386/sol2.h (TF_SIZE): Remove.
* config/ia64/hpux.h (XF_SIZE, TF_SIZE): Remove.
* config/ia64/linux.h (TF_SIZE): Remove.
* doc/tm.texi.in (SF_SIZE, DF_SIZE, XF_SIZE, TF_SIZE): Remove.
* doc/tm.texi: Regenerate.
* system.h (SF_SIZE, DF_SIZE, XF_SIZE, TF_SIZE): Poison.
gcc/c-family:
* c-cppbuiltin.c (c_cpp_builtins): Define macros for mantissa
digits of floating-point modes if -fbuilding-libgcc.
libgcc:
* libgcc2.c (SF_SIZE): Change all uses to __LIBGCC_SF_MANT_DIG__.
(DF_SIZE): Change all uses to __LIBGCC_DF_MANT_DIG__.
(XF_SIZE): Change all uses to __LIBGCC_XF_MANT_DIG__.
(TF_SIZE): Change all uses to __LIBGCC_TF_MANT_DIG__.
* libgcc2.h (SF_SIZE): Change to __LIBGCC_SF_MANT_DIG__. Give
error if not defined and LIBGCC2_HAS_SF_MODE is defined.
(DF_SIZE): Change to __LIBGCC_DF_MANT_DIG__. Give error if not
defined and LIBGCC2_HAS_DF_MODE is defined.
(XF_SIZE): Change to __LIBGCC_XF_MANT_DIG__. Give error if not
defined and LIBGCC2_HAS_XF_MODE is defined.
(TF_SIZE): Change to __LIBGCC_TF_MANT_DIG__. Give error if not
defined and LIBGCC2_HAS_TF_MODE is defined.
From-SVN: r215014
gcc/
* target.def (reorder): Strengthen param "ready" of this DEFHOOK
from rtx * to rtx_insn **.
(reorder2): Likewise.
(dependencies_evaluation_hook): Strengthen params "head", "tail"
from rtx to rtx_insn *.
* doc/tm.texi: Update mechanically for above change to target.def.
* sched-int.h (note_list): Strengthen this variable from rtx to
rtx_insn *.
(remove_notes): Likewise for both params.
(restore_other_notes): Likewise for return type and first param.
(struct ready_list): Strengthen field "vec" from rtx * to
rtx_insn **.
(struct dep_replacement): Strenghten field "insn" from rtx to
rtx_insn *.
(struct deps_desc): Likewise for fields "last_debug_insn",
"last_args_size".
(struct haifa_sched_info): Likewise for callback field
"can_schedule_ready_p"'s param, for first param of "new_ready"
callback field, for both params of "rank" callback field, for
first field of "print_insn" callback field (with a const), for
both params of "contributes_to_priority" callback, for param
of "insn_finishes_block_p" callback, for fields "prev_head",
"next_tail", "head", "tail", for first param of "add_remove_insn"
callback, for first param of "begin_schedule_ready" callback, for
both params of "begin_move_insn" callback, and for second param
of "advance_target_bb" callback.
(add_dependence): Likewise for params 1 and 2.
(sched_analyze): Likewise for params 2 and 3.
(deps_analyze_insn): Likewise for param 2.
(ready_element): Likewise for return type.
(ready_lastpos): Strengthen return type from rtx * to rtx_insn **.
(try_ready): Strenghten param from rtx to rtx_insn *.
(sched_emit_insn): Likewise for return type.
(record_delay_slot_pair): Likewise for params 1 and 2.
(add_delay_dependencies): Likewise for param.
(contributes_to_priority): Likewise for both params.
(find_modifiable_mems): Likewise.
* config/arm/arm.c (cortexa7_sched_reorder): Strengthen param
"ready" from rtx * to rtx_insn **. Strengthen locals "insn",
"first_older_only_insn" from rtx to rtx_insn *.
(arm_sched_reorder): Strengthen param "ready" from rtx * to
rtx_insn **.
* config/c6x/c6x.c (struct c6x_sched_context): Strengthen field
"last_scheduled_iter0" from rtx to rtx_insn *.
(init_sched_state): Replace use of NULL_RTX with NULL for insn.
(c6x_sched_reorder_1): Strengthen param "ready" and locals
"e_ready", "insnp" from rtx * to rtx_insn **. Strengthen local
"insn" from rtx to rtx_insn *.
(c6x_sched_reorder): Strengthen param "ready" from rtx * to
rtx_insn **.
(c6x_sched_reorder2): Strengthen param "ready" and locals
"e_ready", "insnp" from rtx * to rtx_insn **. Strengthen local
"insn" from rtx to rtx_insn *.
(c6x_variable_issue): Add a checked cast when assigning from insn
to ss.last_scheduled_iter0.
(split_delayed_branch): Strengthen param "insn" and local "i1"
from rtx to rtx_insn *.
(split_delayed_nonbranch): Likewise.
(undo_split_delayed_nonbranch): Likewise for local "insn".
(hwloop_optimize): Likewise for locals "seq", "insn", "prev",
"entry_after", "end_packet", "head_insn", "tail_insn",
"new_insns", "last_insn", "this_iter", "prev_stage_insn".
Strengthen locals "orig_vec", "copies", "insn_copies" from rtx *
to rtx_insn **. Remove now-redundant checked cast on last_insn,
but add a checked cast on loop->start_label. Consolidate calls to
avoid assigning result of gen_spkernel to "insn", now an
rtx_insn *.
* config/i386/i386.c (do_reorder_for_imul): Strengthen param
"ready" from rtx * to rtx_insn **. Strengthen local "insn" from
rtx to rtx_insn *.
(swap_top_of_ready_list): Strengthen param "ready" from rtx * to
rtx_insn **. Strengthen locals "top", "next" from rtx to
rtx_insn *.
(ix86_sched_reorder): Strengthen param "ready" from rtx * to
rtx_insn **. Strengthen local "insn" from rtx to rtx_insn *.
(add_parameter_dependencies): Strengthen params "call", "head" and
locals "insn", "last", "first_arg" from rtx to rtx_insn *.
(avoid_func_arg_motion): Likewise for params "first_arg", "insn".
(add_dependee_for_func_arg): Likewise for param "arg" and local
"insn".
(ix86_dependencies_evaluation_hook): Likewise for params "head",
"tail" and locals "insn", "first_arg".
* config/ia64/ia64.c (ia64_dependencies_evaluation_hook): Likewise
for params "head", "tail" and locals "insn", "next", "next_tail".
(ia64_dfa_sched_reorder): Strengthen param "ready" and locals
"e_ready", "insnp" from rtx * to rtx_insn **. Strengthen locals
"insn", "lowest", "highest" from rtx to rtx_insn *.
(ia64_sched_reorder): Strengthen param "ready" from rtx * to
rtx_insn **.
(ia64_sched_reorder2): Likewise.
* config/mep/mep.c (mep_find_ready_insn): Strengthen return type
and local "insn" from rtx to rtx_insn *. Strengthen param "ready"
from rtx * to rtx_insn **.
(mep_move_ready_insn): Strengthen param "ready" from rtx * to
rtx_insn **.
(mep_print_sched_insn): Strengthen param "insn" from rtx to
rtx_insn *.
(mep_sched_reorder): Strengthen param "ready" from rtx * to
rtx_insn **. Strengthen locals "core_insn", "cop_insn" from rtx
to rtx_insn *.
* config/mips/mips.c (mips_promote_ready): Strengthen param "ready"
from rtx * to rtx_insn **. Strengthen local "new_head" from rtx
to rtx_insn *.
(mips_maybe_swap_ready): Strengthen param "ready" from rtx * to
rtx_insn **. Strengthen local "temp" from rtx to rtx_insn *.
(mips_macc_chains_reorder): Strengthen param "ready" from rtx * to
rtx_insn **.
(vr4130_reorder): Likewise.
(mips_74k_agen_reorder): Likewise. Strengthen local "insn" from
rtx to rtx_insn *.
(mips_sched_reorder_1): Strengthen param "ready" from rtx * to
rtx_insn **.
(mips_sched_reorder): Likewise.
(mips_sched_reorder2): Likewise.
* config/picochip/picochip.c (picochip_sched_reorder): Likewise.
* config/rs6000/rs6000.c (rs6000_sched_reorder): Likewise.
Strengthen local "tmp" from rtx to rtx_insn *.
(rs6000_sched_reorder2): Likewise.
* config/s390/s390.c (s390_z10_prevent_earlyload_conflicts):
Likewise. Update sizeof(rtx) to sizeof(rtx_insn *) in memmove.
(s390_sched_reorder): Strengthen param "ready" from rtx * to
rtx_insn **. Strengthen local "tmp" from rtx to rtx_insn *.
* config/sh/sh.c (rank_for_reorder): Strengthen locals "tmp",
"tmp2" from rtx to rtx_insn *.
(swap_reorder): Strengthen param "a" from rtx * to rtx_insn **.
Strengthen local "insn" from rtx to rtx_insn *.
(ready_reorder): Strengthen param "ready" from rtx * to
rtx_insn **. Update sizeof(rtx) to sizeof(rtx_insn *) in qsort.
(sh_reorder): Strengthen param "ready" from rtx * to rtx_insn **.
(sh_reorder2): Likewise.
* config/spu/spu.c (spu_sched_reorder): Likewise. Strengthen
local "insn" from rtx to rtx_insn *.
* haifa-sched.c (note_list): Strengthen this variable from rtx to
rtx_insn *.
(scheduled_insns): Strengthen this variable from vec<rtx> to
vec<rtx_insn *>.
(set_modulo_params): Likewise for locals "i1", "i2".
(record_delay_slot_pair): Likewise for params "i1", "i2".
(add_delay_dependencies): Likewise for param "insn".
(cond_clobbered_p): Likewise.
(recompute_todo_spec): Likewise for local "prev".
(last_scheduled_insn): Likewise for this variable.
(nonscheduled_insns_begin): Likewise.
(model_set_excess_costs): Strengthen param "insns" from rtx * to
rtx_insn **.
(rank_for_schedule): Strengthen locals "tmp", "tmp2" from rtx to
rtx_insn *.
(swap_sort): Strengthen param "a" from rtx * to rtx_insn **.
Strengthen local "insn" from rtx to rtx_insn *.
(queue_insn): Strengthen param "insn" from rtx to rtx_insn *.
(ready_lastpos): Strengthen return type from rtx * to rtx_insn **.
(ready_add): Strengthen param "insn" from rtx to rtx_insn *.
(ready_remove_first): Likewise for return type and local "t".
(ready_element): Likewise for return type.
(ready_remove): Likewise for return type and local "t".
(ready_sort): Strengthen local "first" from rtx * to rtx_insn **.
(check_clobbered_conditions): Strengthen local "x" from rtx to
rtx_insn *, adding a checked cast.
(schedule_insn): Likewise for param "insn".
(remove_notes): Likewise for params "head", "tail" and locals
"next_tail", "insn", "next".
(struct haifa_saved_data): Likewise for fields
"last_scheduled_insn", "nonscheduled_insns_begin".
(save_backtrack_point): Update for change to field "vec" of
struct ready_list.
(toggle_cancelled_flags): Strengthen local "first" from rtx * to
rtx_insn **.
(restore_last_backtrack_point): Likewise. Strengthen local "insn"
from rtx to rtx_insn *
(resolve_dependencies): Strengthen param "insn" from rtx to
rtx_insn *
(restore_other_notes): Likewise for return type, for param "head"
and local "note_head".
(undo_all_replacements): Likewise for local "insn".
(first_nonscheduled_insn): Likewise for return type and local "insn".
(queue_to_ready): Likewise for local "insn", adding checked casts.
(early_queue_to_ready): Likewise for local "insn".
(debug_ready_list_1): Strengthen local "p" from rtx * to
rtx_insn **.
(move_insn): Strengthen param "insn" and local "note" from rtx to
rtx_insn *
(insn_finishes_cycle_p): Likewise for param "insn".
(max_issue): Likewise for local "insn".
(choose_ready): Likewise. Strengthen param "insn_ptr" from rtx *
to rtx_insn **.
(commit_schedule): Strengthen param "prev_head" and local "insn"
from rtx to rtx_insn *
(prune_ready_list): Likewise for local "insn".
(schedule_block): Likewise for locals "prev_head", "head", "tail",
"skip_insn", "insn", "failed_insn", "x", adding a checked cast.
(set_priorities): Likewise for local "prev_head".
(try_ready): Likewise for param "next".
(fix_tick_ready): Likewise.
(change_queue_index): Likewise.
(sched_extend_ready_list): Update for change to field "vec" of
struct ready_list.
(generate_recovery_code): Strengthen param "insn" from rtx to
rtx_insn *.
(begin_speculative_block): Likewise.
(create_check_block_twin): Likewise for param "insn" and locals
"label", "check", "twin". Introduce local "check_pat" to avoid
"check" being used as a plain rtx before being used as an insn.
(fix_recovery_deps): Add a checked cast to rtx_insn * when
extracting elements from ready_list.
(sched_remove_insn): Strengthen param "insn" from rtx to
rtx_insn *.
(sched_emit_insn): Likewise for return type.
(ready_remove_first_dispatch): Likewise for return type and local
"insn".
* hw-doloop.c (discover_loop): Add a checked cast to rtx_insn *.
* modulo-sched.c (sms_print_insn): Strengthen from const_rtx to
const rtx_insn *.
* sched-deps.c (add_dependence): Strengthen params "con", "pro"
from rtx to rtx_insn *.
(add_dependence_list): Likewise for param "insn". Add a checked
cast.
(add_dependence_list_and_free): Strengthen param "insn" from rtx
to rtx_insn *. Strengthen param "list_p" from rtx * to
rtx_insn **.
(chain_to_prev_insn): Strengthen param "insn" and locals
"prec_nonnote", "i" from rtx to rtx_insn *.
(flush_pending_lists): Likewise for param "insn".
(cur_insn): Likewise for this variable.
(haifa_start_insn): Add a checked cast.
(note_dep): Strengthen param "e" from rtx to rtx_insn *.
(sched_analyze_reg): Likewise for param "insn".
(sched_analyze_1): Likewise.
(sched_analyze_2): Likewise. Add checked casts.
(sched_analyze_insn): Likewise. Also for local "prev".
(deps_analyze_insn): Likewise for param "insn".
(sched_analyze): Likewise for params "head", "tail" and local "insn".
(add_dependence_1): Likewise for params "insn", "elem".
(struct mem_inc_info): Likewise for fields "inc_insn", "mem_insn".
(parse_add_or_inc): Likewise for param "insn".
(find_inc): Likewise for local "inc_cand".
(find_modifiable_mems): Likewise for params "head", "tail" and
locals "insn", "next_tail".
* sched-ebb.c (init_ready_list): Likewise for local "insn".
(begin_schedule_ready): Likewise for param "insn".
(begin_move_insn): Likewise for params "insn" and "last".
(ebb_print_insn): Strengthen param "insn" from const_rtx to
const rtx_insn *.
(rank): Strengthen params "insn1", "insn2" from rtx to rtx_insn *.
(ebb_contributes_to_priority): Likewise for params "next", "insn".
(ebb_add_remove_insn): Likewise for param "insn".
(advance_target_bb): Likewise.
* sched-rgn.c (rgn_estimate_number_of_insns): Likewise for local
"insn".
(check_live): Likewise for param "insn".
(init_ready_list): Likewise for local "insn".
(can_schedule_ready_p): Likewise for param "insn".
(begin_schedule_ready): Likewise.
(new_ready): Likewise for param "next".
(rgn_print_insn): Likewise for param "insn".
(rgn_rank): Likewise for params "insn1", "insn2".
(contributes_to_priority): Likewise for params "next", "insn".
(rgn_insn_finishes_block_p): Likewise for param "insn".
(add_branch_dependences): Likewise for params "head", "tail" and
locals "insn", "last".
(rgn_add_remove_insn): Likewise for param "insn".
(advance_target_bb): Likewise.
* sel-sched-dump.c (sel_print_insn): Strengthen param "insn" from
const_rtx to const rtx_insn *.
* sel-sched-dump.h (sel_print_insn): Likewise.
* sel-sched-ir.c (advance_deps_context): Add a checked cast.
(deps_init_id): Likewise.
* sel-sched.c (convert_vec_av_set_to_ready): Likewise.
(invoke_reorder_hooks): Strengthen local "arr" from rtx * to
rtx_insn **.
From-SVN: r214481
Jeff Law
Trevor Saunders
Alan Modra
Ramana Radhakrishnan
Vladimir Makarov
Richard Henderson
Kyrylo Tkachov
Caroline Tice
H.J. Lu
Jakub Jelinek
Bernd Schmidt
Joern Rennecke
Zhenqiang Chen
Jakub Jelinek
Kaz Kojima
Tom de Vries
Bin Cheng
James Greenhalgh
Zhenqiang Chen
Eric Botcazou
Ilya Verbin
Eric Botcazou
Ilya Enkovich
Richard Sandiford
Kirill Yukhin
Joseph Myers
David Malcolm
Matthew Fortune
Kito Cheng