Commit Graph

170375 Commits

Author SHA1 Message Date
Richard Sandiford
801790b37c [AArch64] Prefer FPRs over GPRs for CLASTB
This patch makes the SVE CLASTB GPR alternative more expensive than the
FPR alternative in order to avoid unnecessary cross-file moves.  It also
fixes the prefix used to print the FPR; <vw> only handles 32-bit and
64-bit elements.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-sve.md (fold_extract_last_<mode>):
	Disparage the GPR alternative relative to the FPR one.
	Fix handling of 8-bit and 16-bit FPR values.

gcc/testsuite/
	* gcc.target/aarch64/sve/clastb_8.c: New test.

From-SVN: r274191
2019-08-07 19:08:55 +00:00
Richard Sandiford
b0760a40be [AArch64] Merge SVE reduction patterns
The reorg showed that we had an unnecessary separation between
the bitwise and max/min reductions for integers, and the
addition and max/min reductions for fp.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/iterators.md (BITWISEV): Delete.
	(SVE_INT_REDUCTION, SVE_FP_REDUCTION): New int iterators.
	(optab): Handle UNSPEC_UMAXV, UNSPEC_UMINV, UNSPEC_SMAXV,
	UNSPEC_SMINV, UNSPEC_FADDV, UNSPEC_FMAXNMV, UNSPEC_FMAXV,
	UNSPEC_FMINNMV, UNSPEC_FMINV.
	(bit_reduc_op): Delete.
	(sve_int_op): New int attribute.
	(sve_fp_op): Handle UNSPEC_FADDV, UNSPEC_FMAXNMV, UNSPEC_FMAXV,
	UNSPEC_FMINNMV, UNSPEC_FMINV.
	* config/aarch64/aarch64-sve.md
	(reduc_<MAXMINV:maxmin_uns>_scal_<SVE_I:mode>)
	(*reduc_<MAXMINV:maxmin_uns>_scal_<SVE_I:mode>)
	(reduc_<BITWISEV:optab>_scal_<SVE_I:mode>)
	(*reduc_<BITWISEV:optab>_scal_<SVE_I:mode>): Merge into...
	(reduc_<SVE_INT_REDUCTION:optab>_scal_<SVE_I:mode>)
	(*reduc_<SVE_INT_REDUCTION:optab>_scal_<SVE_I:mode>): ...these
	new patterns.
	(reduc_plus_scal_<SVE_F:mode>, *reduc_plus_scal_<SVE_I:mode>)
	(reduc_<FMAXMINV:optab>_scal_<SVE_F:mode>)
	(*reduc_<FMAXMINV:optab>_scal_<SVE_F:mode>): Merge into...
	(reduc_<SVE_FP_REDUCTION:optab>_scal_<SVE_F:mode>)
	(*reduc_<SVE_FP_REDUCTION:optab>_scal_<SVE_F:mode>): ...these
	new patterns.

From-SVN: r274190
2019-08-07 19:05:42 +00:00
Richard Sandiford
0d80d083a2 [AArch64] Merge SVE ternary FP operations
This patch combines the four individual fused multiply-add optabs
into one pattern and uses unspecs instead of rtx codes.  This is
part of a series of patches that change the SVE FP patterns so that
they can describe cases in which the predicate isn't all-true.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-sve.md (fma<mode>4, *fma<mode>4)
	(fnma<mode>4, *fnma<mode>4, fnms<mode>4, *fnms<mode>4)
	(fms<mode>4, *fms<mode>4): Replace with...
	(<SVE_COND_FP_TERNARY:optab><SVE_F:mode>4)
	(*<SVE_COND_FP_TERNARY:optab><SVE_F:mode>4): ...these new patterns.
	Use unspecs instead of rtx codes.
	(cond_<optab><mode>, *cond_<optab><mode>_2, *cond_<optab><mode>_4)
	(*cond_<optab><mode>_any): Add the predicate to SVE_COND_FP_TERNARY.

From-SVN: r274189
2019-08-07 19:01:37 +00:00
Richard Sandiford
214c42faa0 [AArch64] Merge SVE FMAXNM/FMINNM patterns
This patch makes us use the same define_insn for both the smax/smin
and fmax/fmin optabs.  It also continues the process started by
the earlier FP unary patch of moving predicated FP patterns from
rtx codes to unspecs.

There's no need to handle the FMAX and FMIN instructions until
the ACLE patch, since we only use FMAXNM and FMINNM at present.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/iterators.md (SVE_COND_FP_MAXMIN_PUBLIC): New
	int iterator.
	(maxmin_uns_op): Handle UNSPEC_COND_FMAXNM and UNSPEC_COND_FMINNM.
	* config/aarch64/aarch64-sve.md
	(<FMAXMIN:su><FMAXMIN:maxmin><SVE_F:mode>3): Rename to...
	(<SVE_COND_FP_MAXMIN_PUBLIC:optab><SVE_F:mode>3): ...this and
	use a single unspec for the rhs.
	(*<su><maxmin><mode>3): Delete.
	(<maxmin_uns><SVE_F:mode>3): Use a single unspec for the rhs.

From-SVN: r274188
2019-08-07 18:56:48 +00:00
Richard Sandiford
d45b20a553 [AArch64] Merge SVE FP unary patterns
This patch merges the SVE FP rounding patterns with the other SVE
FP unary patterns.

At the moment, we only generate unary FP operations for full vectors,
so we can use (sqrt:VNx4SF ...) etc. in the rtl pattern.  With the ACLE,
it's also possible to generate predicated operations on partial vectors
without specifying a value for inactive lanes.  (sqrt:VNx4SF ...) would
then have different faulting behaviour from the instruction that the
pattern generates.

This patch therefore uses unspecs to represent the operations instead.
Later patches make this change for other patterns.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/iterators.md (UNSPEC_COND_FABS, UNSPEC_COND_FNEG)
	(UNSPEC_COND_FRINTA, UNSPEC_COND_FRINTI, UNSPEC_COND_FRINTM)
	(UNSPEC_COND_FRINTN, UNSPEC_COND_FRINTP, UNSPEC_COND_FRINTX)
	(UNSPEC_COND_FRINTZ, UNSPEC_COND_FSQRT): New unspecs.
	(optab, sve_fp_op): Handle them.
	(SVE_FP_UNARY): Delete.
	(optab): Remove sqrt entry.
	(sve_fp_op): Remove neg, abs and sqrt entries.
	(SVE_COND_FP_UNARY): New int iterator.
	* config/aarch64/aarch64-sve.md (<frint_pattern><mode>2)
	(*<frint_pattern><mode>2): Delete.
	(<SVE_FP_UNARY:optab><SVE_F:mode>2): Replace with...
	(<SVE_COND_FP_UNARY:optab><SVE_F:mode>2): ...this.
	(*<SVE_FP_UNARY:optab><SVE_F:mode>2): Replace with...
	(*<SVE_COND_FP_UNARY:optab><SVE_F:mode>2): ...this.

From-SVN: r274187
2019-08-07 18:51:40 +00:00
Richard Sandiford
8ad84de26e [AArch64] Remove redundant SVE FADDA pattern
*pred_fold_left_plus_<mode> could no longer match anything, since
UNSPEC_FADDA now takes three operands.  Predicated FADDAs should
now go through mask_fold_left_plus_<mode> instead.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-sve.md (*pred_fold_left_plus_<mode>): Delete.

From-SVN: r274186
2019-08-07 18:47:26 +00:00
Richard Sandiford
cb18e86dd0 [AArch64] Make SVE UNSPEC_COND_*s match the insn mnemonic
This patch makes the UNSPEC_COND* names match the instruction mnemonics,
rather than having the previous mixture in which some used instructions
while others used operator names.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/iterators.md (UNSPEC_COND_ADD): Rename to...
	(UNSPEC_COND_FADD): ...this.
	(UNSPEC_COND_SUB): Rename to...
	(UNSPEC_COND_FSUB): ...this.
	(UNSPEC_COND_MUL): Rename to...
	(UNSPEC_COND_FMUL): ...this.
	(UNSPEC_COND_DIV): Rename to...
	(UNSPEC_COND_FDIV): ...this.
	(UNSPEC_COND_MAX): Rename to...
	(UNSPEC_COND_FMAXNM): ...this.
	(UNSPEC_COND_MIN): Rename to...
	(UNSPEC_COND_FMINNM): ...this.
	(UNSPEC_COND_LT): Rename to...
	(UNSPEC_COND_FCMLT): ...this.
	(UNSPEC_COND_LE): Rename to...
	(UNSPEC_COND_FCMLE): ...this.
	(UNSPEC_COND_EQ): Rename to...
	(UNSPEC_COND_FCMEQ): ...this.
	(UNSPEC_COND_NE): Rename to...
	(UNSPEC_COND_FCMNE): ...this.
	(UNSPEC_COND_GE): Rename to...
	(UNSPEC_COND_FCMGE): ...this.
	(UNSPEC_COND_GT): Rename to...
	(UNSPEC_COND_FCMGT): ...this.
	(SVE_COND_FP_BINARY, SVE_COND_FP_CMP, optab, cmp_op, sve_fp_op)
	(sve_fp_op_rev): Update accordingly.
	* config/aarch64/aarch64.c (aarch64_unspec_cond_code): Likewise.

From-SVN: r274185
2019-08-07 18:43:01 +00:00
Richard Sandiford
915d28fe74 [AArch64] Reorganise aarch64-sve.md
aarch64-sve.md was getting a bit jumbled, with related operations
separated by unrelated operations.  Also, many SVE instructions need
to have several patterns due to the various ways in which predication
can be used, and it was getting hard to tell which instructions had a
complete set of patterns.

This patch therefore tries to use an explicit grouping scheme.
Banner comments are usually frowned on, but md files have been
a traditional exception (e.g. when using Mike's template for
new targets).

The patch also lists the instructions implemented by each section,
so that it's possible to search the file by instruction mnemonic.

I wouldn't be surprised if I end up having to rip out the contents
section, but I found it useful for the month or so that that I've
been using it locally.  The patch checks that the contents remain
up-to-date by running a checking script during an early stage of
the build.

No functional change intended.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-sve.md: Reorganize contents and add
	banner comments.
	* config/aarch64/check-sve-md.awk: New file.
	* config/aarch64/t-aarch64 (s-check-sve-md): New rule.
	(insn-conditions.md): Depend on it.

From-SVN: r274184
2019-08-07 18:37:21 +00:00
Uros Bizjak
e3b4d9d702 re PR target/91385 (Zero-extended negation (*negsi2_1_zext) is not generated)
PR target/91385
	* config/i386/sse.md (*negsi2_1_zext): Simplify insn pattern.
	(*negsi2_cmpz_zext): Ditto.

testsuite/ChangeLog:

	PR target/91385
	* gcc.target/i386/pr91385.c: New test.

From-SVN: r274183
2019-08-07 20:34:11 +02:00
Richard Sandiford
871b49afaf [AArch64] Remove unused commutative attribute
The commutative attribute was once used by the SVE conditional binary
expanders, but it's now dead code.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/iterators.md (commutative): Remove.

From-SVN: r274182
2019-08-07 18:32:21 +00:00
Marek Polacek
842901d0ca PR c++/81429 - wrong parsing of constructor with C++11 attribute.
* parser.c (cp_parser_constructor_declarator_p): Handle the scenario
	when a parameter declaration begins with [[attribute]].

	* g++.dg/cpp0x/gen-attrs-68.C: New test.
	* g++.dg/cpp0x/gen-attrs-69.C: New test.

From-SVN: r274181
2019-08-07 17:32:12 +00:00
Richard Earnshaw
c822ac7daa PR driver/91130 Use CL_DRIVER when handling of COLLECT_GCC_OPTIONS in lto-wrapper.c
Some options are handled differently by the main driver (gcc, g++,
etc) from the back-end compiler programs (cc1, cc1plus, etc) in that
in the driver they do not take an additional argument, while in the
compiler programs they do.  The processing option option CL_DRIVER
controls this alternative interpretation of the options.

The environment variable COLLECT_GCC_OPTIONS is the list of options to
add to a compile if the compiler re-invokes itself at some point.  As
such, the options are driver options, so CL_DRIVER should be used when
processing this list.  Currently lto-wrapper is doing this
incorrectly.

	PR driver/91130
	* lto-wrapper.c (find_and_merge_options): Use CL_DRIVER when
	processing COLLECT_GCC_OPTIONS.
	(run_gcc): Likewise.

From-SVN: r274176
2019-08-07 16:15:35 +00:00
Marek Polacek
529bc4103b PR c++/91346 - Implement P1668R1, allow unevaluated asm in constexpr.
* constexpr.c (cxx_eval_constant_expression): Handle ASM_EXPR.
	(potential_constant_expression_1) <case ASM_EXPR>: Allow.
	* cp-tree.h (finish_asm_stmt): Adjust.
	* parser.c (cp_parser_asm_definition): Grab the locaion of "asm" and
	use it.  Change an error to a pedwarn.  Allow asm in C++2a, warn
	otherwise.
	* pt.c (tsubst_expr): Pass a location down to finish_asm_stmt.
	* semantics.c (finish_asm_stmt): New location_t parameter.  Use it.

	* g++.dg/cpp2a/inline-asm1.C: New test.
	* g++.dg/cpp2a/inline-asm2.C: New test.
	* g++.dg/cpp1y/constexpr-neg1.C: Adjust dg-error.

From-SVN: r274169
2019-08-07 14:20:40 +00:00
Bernd Edlinger
699ce759c2 re PR tree-optimization/91109 ([arm] gcc.c-torture/execute/20040709-1.c fails since r273135)
2019-08-07  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        PR tree-optimization/91109
        * lra-remat.c (update_scratch_ops): Remove assignment of the
        hard register.

From-SVN: r274163
2019-08-07 13:45:06 +00:00
Richard Sandiford
8600364582 Make IPA predicate::size a poly_int64
This patch changes the IPA predicate::size field from a HOST_WIDE_INT
to a poly_int64.

2019-08-07  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* data-streamer.h (streamer_write_poly_uint64): Declare.
	(streamer_read_poly_uint64): Likewise.
	* data-streamer-in.c (streamer_read_poly_uint64): New function.
	* data-streamer-out.c (streamer_write_poly_uint64): Likewise.
	* ipa-predicate.h (condition::size): Turn into a poly_int64.
	(add_condition): Take a poly_int64 size.
	* ipa-predicate.c (add_condition): Likewise.
	* ipa-prop.h (ipa_load_from_parm_agg): Take a poly_int64 size pointer.
	* ipa-prop.c (ipa_load_from_parm_agg): Likewise.
	(ipcp_modif_dom_walker::before_dom_children): Update accordingly.
	* ipa-fnsummary.c (evaluate_conditions_for_known_args): Handle
	condition::size as a poly_int64.
	(unmodified_parm_1): Take a poly_int64 size pointer.
	(unmodified_parm): Likewise.
	(unmodified_parm_or_parm_agg_item): Likewise.
	(set_cond_stmt_execution_predicate): Update accordingly.
	(set_switch_stmt_execution_predicate): Likewise.
	(will_be_nonconstant_expr_predicate): Likewise.
	(will_be_nonconstant_predicate): Likewise.
	(inline_read_section): Stream condition::size as a poly_int.
	(ipa_fn_summary_write): Likewise.

From-SVN: r274162
2019-08-07 13:18:35 +00:00
Martin Liska
12bbb1f78e Replace int with boolean in predicate functions.
2019-08-07  Martin Liska  <mliska@suse.cz>

	* fold-const.c (twoval_comparison_p): Replace int
	with bool as a return type.
	(simple_operand_p): Likewise.
	(operand_equal_p): Replace int with bool as a return type.
	* fold-const.h (operand_equal_p): Likewise.

From-SVN: r274161
2019-08-07 12:45:57 +00:00
Janne Blomqvist
4047bab96d PR 53796 Make inquire(file=, recl=) conform to F2018
In my original patch to fix PR 53796 I forgot to fix the behavior for
unconnected units when inquiring via filename. This patch fixes that.

Regtested on x86_64-pc-linux-gnu, committed as obvious.

libgfortran/ChangeLog:

2019-08-07  Janne Blomqvist  <jb@gcc.gnu.org>

	PR fortran/53796
	* io/inquire.c (inquire_via_filename): Set recl to -1 for
	unconnected units.

gcc/testsuite/ChangeLog:

2019-08-07  Janne Blomqvist  <jb@gcc.gnu.org>

	PR fortran/53796
	* gfortran.dg/inquire_recl_f2018.f90: Test for unconnected unit
	with inquire via filename.

From-SVN: r274160
2019-08-07 10:34:10 +03:00
Jakub Jelinek
398e3feb8a tree-core.h (enum omp_clause_code): Adjust OMP_CLAUSE_USE_DEVICE_PTR OpenMP description.
* tree-core.h (enum omp_clause_code): Adjust OMP_CLAUSE_USE_DEVICE_PTR
	OpenMP description.  Add OMP_CLAUSE_USE_DEVICE_ADDR clause.
	* tree.c (omp_clause_num_ops, omp_clause_code_name): Add entries
	for OMP_CLAUSE_USE_DEVICE_ADDR clause.
	(walk_tree_1): Handle OMP_CLAUSE_USE_DEVICE_ADDR.
	* tree-pretty-print.c (dump_omp_clause): Likewise.
	* tree-nested.c (convert_nonlocal_omp_clauses,
	convert_local_omp_clauses): Likewise.
	* gimplify.c (gimplify_scan_omp_clauses, gimplify_adjust_omp_clauses):
	Likewise.
	* omp-low.c (scan_sharing_clauses, lower_omp_target): Likewise.
	Treat OMP_CLAUSE_USE_DEVICE_ADDR like OMP_CLAUSE_USE_DEVICE_PTR
	clause with array or reference to array types, no matter what type
	except for reference it has.
gcc/c-family/
	* c-pragma.h (enum pragma_omp_clause): Add
	PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR.  Set PRAGMA_OACC_CLAUSE_USE_DEVICE
	equal to PRAGMA_OMP_CLAUSE_USE_DEVICE_PTR instead of being a separate
	enumeration value.
gcc/c/
	* c-parser.c (c_parser_omp_clause_name): Parse use_device_addr clause.
	(c_parser_omp_clause_use_device_addr): New function.
	(c_parser_omp_all_clauses): Handle PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR.
	(OMP_TARGET_DATA_CLAUSE_MASK): Add PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR.
	(c_parser_omp_target_data): Handle PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR
	like PRAGMA_OMP_CLAUSE_USE_DEVICE_PTR, adjust diagnostics about no
	map or use_device_* clauses.
	* c-typeck.c (c_finish_omp_clauses): For OMP_CLAUSE_USE_DEVICE_PTR
	in OpenMP, require pointer type rather than pointer or array type.
	Handle OMP_CLAUSE_USE_DEVICE_ADDR.
gcc/cp/
	* parser.c (cp_parser_omp_clause_name): Parse use_device_addr clause.
	(cp_parser_omp_all_clauses): Handle PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR.
	(OMP_TARGET_DATA_CLAUSE_MASK): Add PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR.
	(cp_parser_omp_target_data): Handle PRAGMA_OMP_CLAUSE_USE_DEVICE_ADDR
	like PRAGMA_OMP_CLAUSE_USE_DEVICE_PTR, adjust diagnostics about no
	map or use_device_* clauses.
	* semantics.c (finish_omp_clauses): For OMP_CLAUSE_USE_DEVICE_PTR
	in OpenMP, require pointer or reference to pointer type rather than
	pointer or array or reference to pointer or array type. Handle
	OMP_CLAUSE_USE_DEVICE_ADDR.
	* pt.c (tsubst_omp_clauses): Handle OMP_CLAUSE_USE_DEVICE_ADDR.
gcc/testsuite/
	* c-c++-common/gomp/target-data-1.c (foo): Use use_device_addr clause
	instead of use_device_ptr clause where required by OpenMP 5.0, add
	further tests for both use_device_ptr and use_device_addr clauses.
libgomp/
	* testsuite/libgomp.c/target-18.c (struct S): New type.
	(foo): Use use_device_addr clause instead of use_device_ptr clause
	where required by OpenMP 5.0, add further tests for both use_device_ptr
	and use_device_addr clauses.
	* testsuite/libgomp.c++/target-9.C (struct S): New type.
	(foo): Use use_device_addr clause instead of use_device_ptr clause
	where required by OpenMP 5.0, add further tests for both use_device_ptr
	and use_device_addr clauses.  Add t and u arguments.
	(main): Adjust caller.

From-SVN: r274159
2019-08-07 09:27:10 +02:00
Kewen Lin
4e708f5ebd rs6000: support vector int type rotatert
gcc/ChangeLog

2019-08-07  Kewen Lin  <linkw@gcc.gnu.org>

    * config/rs6000/vector.md (vrotr<mode>3): New define_expand.

gcc/testsuite/ChangeLog

2019-08-07  Kewen Lin  <linkw@gcc.gnu.org>

    * gcc.target/powerpc/vec_rotate-1.c: New test.
    * gcc.target/powerpc/vec_rotate-2.c: New test.
    * gcc.target/powerpc/vec_rotate-3.c: New test.
    * gcc.target/powerpc/vec_rotate-4.c: New test.

From-SVN: r274158
2019-08-07 07:11:14 +00:00
Alexandre Oliva
b69e0fabc2 wrap math.h for M_PI et al in target/i386 tests
Most but not all of the tests that expect M_PI, M_PI_2 and/or M_PI_4
to be defined in math.h explicitly exclude one target system that does
not satisfy this non-standard assumption.

This patch introduces a wrapper header that includes math.h and then
conditionally supplies the missing non-standard macro definitions.
With that, we can drop the dg-skip-if "no M_PI" exclusions.


for  gcc/testsuite/ChangeLog

	* gcc.target/i386/math_m_pi.h: New.
	* gcc.target/i386/sse4_1-round.h: Use it.
	* gcc.target/i386/pr73350.c: Likewise.
	* gcc.target/i386/avx512f-vfixupimmpd-2.c: Likewise.
	* gcc.target/i386/avx512f-vfixupimmps-2.c: Likewise.
	* gcc.target/i386/avx512f-vfixupimmsd-2.c: Likewise.
	* gcc.target/i386/avx512f-vfixupimmss-2.c: Likewise.
	* gcc.target/i386/avx512f-vfixupimmss-2.c: Likewise.
	* gcc.target/i386/avx-ceil-sfix-2-vec.c: Likewise.  Drop
	dg-skip-if "no M_PI".
	* gcc.target/i386/avx-cvt-2-vec.c: Likewise.
	* gcc.target/i386/avx-floor-sfix-2-vec.c: Likewise.
	* gcc.target/i386/avx-rint-sfix-2-vec.c: Likewise.
	* gcc.target/i386/avx-round-sfix-2-vec.c: Likewise.
	* gcc.target/i386/avx512f-ceil-sfix-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-ceil-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-ceilf-sfix-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-ceilf-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-floor-sfix-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-floor-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-floorf-sfix-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-floorf-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-rint-sfix-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-rintf-sfix-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-round-sfix-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-roundf-sfix-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-trunc-vec-1.c: Likewise.
	* gcc.target/i386/avx512f-truncf-vec-1.c: Likewise.
	* gcc.target/i386/sse2-cvt-vec.c: Likewise.
	* gcc.target/i386/sse4_1-ceil-sfix-vec.c: Likewise.
	* gcc.target/i386/sse4_1-ceil-vec.c: Likewise.
	* gcc.target/i386/sse4_1-ceilf-sfix-vec.c: Likewise.
	* gcc.target/i386/sse4_1-ceilf-vec.c: Likewise.
	* gcc.target/i386/sse4_1-floor-sfix-vec.c: Likewise.
	* gcc.target/i386/sse4_1-floor-vec.c: Likewise.
	* gcc.target/i386/sse4_1-floorf-sfix-vec.c: Likewise.
	* gcc.target/i386/sse4_1-floorf-vec.c: Likewise.
	* gcc.target/i386/sse4_1-rint-sfix-vec.c: Likewise.
	* gcc.target/i386/sse4_1-rint-vec.c: Likewise.
	* gcc.target/i386/sse4_1-rintf-sfix-vec.c: Likewise.
	* gcc.target/i386/sse4_1-rintf-vec.c: Likewise.
	* gcc.target/i386/sse4_1-round-sfix-vec.c: Likewise.
	* gcc.target/i386/sse4_1-round-vec.c: Likewise.
	* gcc.target/i386/sse4_1-roundf-sfix-vec.c: Likewise.
	* gcc.target/i386/sse4_1-roundf-vec.c: Likewise.
	* gcc.target/i386/sse4_1-roundsd-4.c: Likewise.
	* gcc.target/i386/sse4_1-roundss-4.c: Likewise.
	* gcc.target/i386/sse4_1-trunc-vec.c: Likewise.
	* gcc.target/i386/sse4_1-truncf-vec.c: Likewise.

From-SVN: r274157
2019-08-07 06:35:39 +00:00
Kito Cheng
609d9bdeab RISC-V: Handle g extension in multilib-generator
gcc/ChangeLog

	* gcc/config/riscv/multilib-generator: (canonical_order): Add 'g'.
	(arch_canonicalize): Support rv32g and rv64g and fix error
	handling.

From-SVN: r274156
2019-08-07 03:12:34 +00:00
GCC Administrator
8a54b93d0c Daily bump.
From-SVN: r274155
2019-08-07 00:16:44 +00:00
Steven G. Kargl
e0af8f52b1 re PR fortran/91359 (logical function X returns .TRUE. - Warning: spaghetti code)
2019-08-06  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/91359
	* trans-decl.c (gfc_generate_return): Ensure something is returned
	from a function.

2019-08-06  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/91359
	* gfortran.dg/pr91359_1.f: New test.
	* gfortran.dg/pr91359_2.f: Ditto.

From-SVN: r274149
2019-08-06 21:32:09 +00:00
Steven G. Kargl
1a3920654f re PR fortran/42546 (ALLOCATED statement typo in the docs and for scalar variables)
2019-08-01  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/42546
	* check.c(gfc_check_allocated): Add comment pointing to ...
	* intrinsic.c(sort_actual): ... the checking done here.
 
2019-08-01  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/42546
	* gfortran.dg/allocated_1.f90: New test.
	* gfortran.dg/allocated_2.f90: Ditto.

From-SVN: r274147
2019-08-06 19:46:29 +00:00
Jonathan Wakely
ffc500dd41 P1651R0 bind_front should not unwrap reference_wrapper
P1651R0 bind_front should not unwrap reference_wrapper
	* include/std/functional (bind_front): Don't unwrap reference_wrapper.
	* include/std/version (__cpp_lib_bind_front): Update value.
	* testsuite/20_util/function_objects/bind_front/1.cc: Fix test for
	feature test macro.
	* testsuite/20_util/function_objects/bind_front/2.cc: New test.

From-SVN: r274146
2019-08-06 16:57:55 +01:00
Jonathan Wakely
a38b51bc3a Specialize std::numbers constants for __float128
* include/std/numbers [!__STRICT_ANSI__ && _GLIBCXX_USE_FLOAT128]
	(e_v, log2e_v, log10e_v, pi_v, inv_pi_v, inv_sqrtpi_v, ln2_v, ln10_v)
	(sqrt2_v, sqrt3_v, inv_sqrt3, egamma_v, phi_v): Add explicit
	specializations for __float128.
	* testsuite/26_numerics/numbers/float128.cc: New test.

From-SVN: r274145
2019-08-06 16:57:51 +01:00
Rainer Orth
1934e97d51 Fix gcc.target/i386/avx512vp2intersect-2intersect-1b.c etc. execution tests
gcc/testsuite:
	* gcc.target/i386/avx512vp2intersect-2intersect-1b.c (AVX512F):
	Remove.
	(AVX512VP2INTERSECT): Define.
	* gcc.target/i386/avx512vp2intersect-2intersectvl-1b.c (AVX512F):
	Remove.
	(AVX512VP2INTERSECT): Define.

From-SVN: r274144
2019-08-06 14:53:24 +00:00
Jason Merrill
d40e363107 PR c++/91378 - ICE with noexcept and auto return type.
Here, since the call to g is not type-dependent, we call mark_used on it to
determine its return type.  This also wants to instantiate the
noexcept-expression.  But since nothing in maybe_instantiate_noexcept was
calling push_to_top_level, we substituted b.i with processing_template_decl
set, so we left it unresolved for later access checking.  As a result, the
type of C::g<int> remained instantiation-dependent, leading to an ICE in
type_dependent_expression_p on the assert that the type of a function
template with no dependent template arguments must be non-dependent.

	* pt.c (maybe_instantiate_noexcept): push_to_top_level.

From-SVN: r274143
2019-08-06 10:07:59 -04:00
Paolo Carlini
1a013865be decl.c (check_array_designated_initializer): Use cp_expr_loc_or_input_loc in one place.
/cp
2019-08-06  Paolo Carlini  <paolo.carlini@oracle.com>

	* decl.c (check_array_designated_initializer): Use
	cp_expr_loc_or_input_loc in one place.

/testsuite
2019-08-06  Paolo Carlini  <paolo.carlini@oracle.com>

	* g++.dg/cpp0x/desig1.C: Check location too.

From-SVN: r274141
2019-08-06 09:56:44 +00:00
Martin Liska
3a961aea3b Add operator new/delete to cgraph_node::dump.
2019-08-06  Martin Liska  <mliska@suse.cz>

	* cgraph.c (cgraph_node::dump): Dump DECL_IS_OPERATOR_NEW_P
	and DECL_IS_OPERATOR_DELETE_P.

From-SVN: r274139
2019-08-06 07:38:16 +00:00
Jakub Jelinek
d81ab49d05 tree.h (OMP_CLAUSE_LASTPRIVATE_TASKLOOP_IV): Rename to ...
* tree.h (OMP_CLAUSE_LASTPRIVATE_TASKLOOP_IV): Rename to ...
	(OMP_CLAUSE_LASTPRIVATE_LOOP_IV): ... this.  Adjust comment.
	* gimplify.c (gimple_add_tmp_var): In SIMD contexts, turn addressable
	new vars into GOVD_PRIVATE rather than GOVD_LOCAL.
	(gimplify_omp_for): Don't do C++ random access iterator clause
	adjustments on combined constructs from OMP_LOOP.  For OMP_LOOP,
	don't predetermine the artificial iterator in case of C++ random
	access iterators as lastprivate, but private.  For OMP_LOOP, force
	bind expr around simd body and force for_pre_body before the
	construct.  Use OMP_CLAUSE_LASTPRIVATE_LOOP_IV instead of
	OMP_CLAUSE_LASTPRIVATE_TASKLOOP_IV.
	(gimplify_omp_loop): Add firstprivate clauses on OMP_PARALLEL for
	diff var of C++ random access iterators.  Handle
	OMP_CLAUSE_FIRSTPRIVATE.  For OMP_CLAUSE_LASTPRIVATE_LOOP_IV, if
	not outermost also add OMP_CLAUSE_FIRSTPRIVATE, and in both cases
	clear OMP_CLAUSE_LASTPRIVATE_LOOP_IV on the lastprivate clause
	on the OMP_FOR and OMP_DISTRIBUTE constructs if any.
	* omp-low.c (lower_rec_input_clauses): For
	OMP_CLAUSE_LASTPRIVATE_LOOP_IV on simd copy construct the private
	variables instead of default constructing them.
	(lower_lastprivate_clauses): Use OMP_CLAUSE_LASTPRIVATE_LOOP_IV
	instead of OMP_CLAUSE_LASTPRIVATE_TASKLOOP_IV and move the
	is_taskloop_ctx check from the assert to the guarding condition.
gcc/cp/
	* parser.c (cp_parser_omp_for_loop): For OMP_LOOP, ignore parallel
	clauses and predetermine iterator as lastprivate.
	* semantics.c (handle_omp_for_class_iterator): Use
	OMP_CLAUSE_LASTPRIVATE_LOOP_IV instead of
	OMP_CLAUSE_LASTPRIVATE_TASKLOOP_IV, set it for lastprivate also
	on OMP_LOOP construct.  If a clause is missing for class iterator
	on OMP_LOOP, add firstprivate clause, and if there is private
	clause, turn it into firstprivate too.
	(finish_omp_for): Formatting fix.  For OMP_LOOP, adjust
	OMP_CLAUSE_LASTPRIVATE_LOOP_IV clause CP_CLAUSE_INFO, so that it
	uses copy ctor instead of default ctor.
	* cp-gimplify.c (cp_gimplify_expr): Handle OMP_LOOP like
	OMP_DISTRIBUTE etc.
	(cp_fold_r): Likewise.
	(cp_genericize_r): Likewise.
	(cxx_omp_finish_clause): Also finish lastprivate clause with
	OMP_CLAUSE_LASTPRIVATE_LOOP_IV flag.
	* pt.c (tsubst_omp_clauses): Handle OMP_CLAUSE_BIND.
	(tsubst_omp_for_iterator): For OMP_LOOP, ignore parallel
	clauses and predetermine iterator as lastprivate.
	* constexpr.c (potential_constant_expression_1): Handle OMP_LOOP
	like OMP_DISTRIBUTE etc.
libgomp/
	* testsuite/libgomp.c++/loop-13.C: New test.
	* testsuite/libgomp.c++/loop-14.C: New test.
	* testsuite/libgomp.c++/loop-15.C: New test.

From-SVN: r274138
2019-08-06 09:26:32 +02:00
Kito Cheng
7551a6e467 RISC-V: Handle extensions combination correctly in multilib-generator.
Input string consist of four parts:
  <primary arch>-<abi>-<additional arches>-<extensions>

and generator doing combination with <extensions> part, but it just
append the extension at the end of arch string, it might generate
invalid arch.

For example, without this patch `./multilib-generator rv32imafc-ilp32--d`
will generate:

MULTILIB_OPTIONS = march=rv32imafc/march=rv32imafcd mabi=ilp32
                                         ^^^^^^^^^^

and rv32imafcd is not in canonical order.

Tested with python 2.7 and python 3.6/3.7.

gcc/ChangeLog

	* gcc/config/riscv/multilib-generator: (canonical_order): New.
	(arch_canonicalize): Dito.
	Apply arch_canonicalize for alts.

From-SVN: r274137
2019-08-06 03:16:40 +00:00
Marek Polacek
c026e33449 DR 2413 - typename in conversion-function-ids.
* parser.c (cp_parser_conversion_type_id): Call
	cp_parser_type_specifier_seq with CP_PARSER_FLAGS_TYPENAME_OPTIONAL
	instead of CP_PARSER_FLAGS_NONE.

	* g++.dg/cpp2a/typename17.C: New test.

From-SVN: r274136
2019-08-06 02:23:43 +00:00
Martin Sebor
5e74e93c1c PR middle-end/50476 - Warn of pointer set to object whose lifetime is limited
gcc/testsuite/ChangeLog:
	* gcc.dg/uninit-pr50476.c: New test.

From-SVN: r274135
2019-08-05 18:30:02 -06:00
GCC Administrator
57771366f3 Daily bump.
From-SVN: r274134
2019-08-06 00:16:25 +00:00
Martin Sebor
57436cb10e PR c++/60517 - warning/error for taking address of member of a temporary object
testsuite/ChangeLog:
	* g++.dg/pr60517.C: New test.

From-SVN: r274130
2019-08-05 18:08:45 -06:00
Michael Meissner
0598953368 Add missing ChangeLog entry.
2019-08-02  Michael Meissner  <meissner@linux.ibm.com>

	* config/rs6000/future.md: New file.
	* config/rs6000/rs6000.md: Include future.md.
	* config/rs6000/t-rs6000 (MD_INCLUDES): Add future.md.

From-SVN: r274129
2019-08-05 23:07:31 +00:00
Martin Sebor
75720b3e45 extend.texi (Common Variable Attributes): Document alias attribute.
gcc/ChangeLog:

	* doc/extend.texi (Common Variable Attributes): Document alias
	attribute.

From-SVN: r274127
2019-08-05 16:40:49 -06:00
Paolo Carlini
f9d0ca4043 cp-tree.h (cp_expr_loc_or_input_loc): New.
2019-08-05  Paolo Carlini  <paolo.carlini@oracle.com>

	* cp-tree.h (cp_expr_loc_or_input_loc): New.
	(cxx_incomplete_type_diagnostic): Use it.
	* call.c (build_converted_constant_expr_internal, convert_like_real,
	convert_arg_to_ellipsis, convert_for_arg_passing, build_over_call,
	build_cxx_call, perform_implicit_conversion_flags,
	initialize_reference): Likewise.
	* constexpr.c (cxx_eval_internal_function, cxx_eval_call_expression,
	eval_and_check_array_index, cxx_eval_store_expression,
	cxx_eval_statement_list, cxx_eval_loop_expr,
	cxx_eval_constant_expression, potential_constant_expression_1):
	Likewise.
	* constraint.cc (check_for_logical_overloads,
	satisfy_predicate_constraint): Likewise.
	* cp-gimplify.c (cp_gimplify_expr): Likewise.
	* cvt.c (cp_convert_to_pointer, convert_to_reference,
	cp_convert_and_check, ocp_convert, maybe_warn_nodiscard): Likewise.
	* decl.c (pop_switch): Likewise.
	* decl2.c (delete_sanity): Likewise.
	* error.c (location_of): Likewise.
	* init.c (maybe_warn_list_ctor, build_aggr_init,
	warn_placement_new_too_small, build_new_1, build_vec_init): Likewise.
	* lex.c (unqualified_name_lookup_error): Likewise.
	* parser.c (cp_parser_initializer_list, cp_parser_omp_for_cond):
	Likewise.
	* pt.c (check_for_bare_parameter_packs, check_valid_ptrmem_cst_expr,
	unify_arg_conversion, convert_nontype_argument,
	tsubst_copy_and_build, resolve_typename_type): Likewise.
	* semantics.c (maybe_convert_cond, finish_call_expr,
	cp_build_vec_convert): Likewise.
	* typeck.c (decay_conversion, rationalize_conditional_expr,
	cp_build_unary_op, build_x_compound_expr_from_list,
	maybe_warn_about_returning_address_of_local,
	maybe_warn_pessimizing_move): Likewise.
	* typeck2.c (check_narrowing, digest_init_r,
	process_init_constructor_array): Likewise.

From-SVN: r274124
2019-08-05 20:04:22 +00:00
Tom Honermann
8744c37d54 PR c++/88095, CTAD for literal operator templates per P0732
This patch fixes PR c++/88095: class nontype template parameter UDL string
literals doesn't accepts deduction placeholder

It also addresses a latent issue; literal operator templates with template
parameter packs of literal class type were previously accepted.  The patch
corrects this and adds a test (udlit-class-nttp-neg.C).

This fix is needed for one of the char8_t remediation approaches documented
in P1423, and may be helpful for existing code bases impacted by the char8_t
changes adopted via P0482 for C++20.

gcc/cp/ChangeLog:

2019-08-02  Tom Honermann  <tom@honermann.net>

        * parser.c (cp_parser_template_declaration_after_parameters): Enable
        class template argument deduction for non-type template parameters
        in literal operator templates.

gcc/testsuite/ChangeLog:

2019-08-02  Tom Honermann  <tom@honermann.net>

        PR c++/88095
        * g++.dg/cpp2a/udlit-class-nttp-ctad.C: New test.
        * g++.dg/cpp2a/udlit-class-nttp-ctad-neg.C: New test.
        * g++.dg/cpp2a/udlit-class-nttp-ctad-neg2.C: New test.
        * g++.dg/cpp2a/udlit-class-nttp.C: New test.
        * g++.dg/cpp2a/udlit-class-nttp-neg.C: New test.
        * g++.dg/cpp2a/udlit-class-nttp-neg2.C: New test.

From-SVN: r274123
2019-08-05 15:34:23 -04:00
Steven G. Kargl
719f5a10e7 re PR fortran/91372 (Error: Unclassifiable statement)
2019-08-05  Steven g. Kargl  <kargl@gcc.gnu.org>

	PR fortran/91372
	* decl.c (gfc_match_data): Allow an implied do-loop to nestle against
	DATA.

2019-08-05  Steven g. Kargl  <kargl@gcc.gnu.org>

	PR fortran/91372
	* gfortran.dg/pr91372.f90: New test.

From-SVN: r274122
2019-08-05 19:24:31 +00:00
Marek Polacek
ab574db6b9 PR c++/91338 - Implement P1161R3: Deprecate a[b,c].
* c-opts.c (c_common_post_options): Enable -Wcomma-subscript by
	default for C++2a, unless -Wno-deprecated.
	* c.opt (Wcomma-subscript): New warning.

	* parser.c (cp_parser_postfix_open_square_expression): Warn about uses
	of a comma operator within a subscripting expression.
	(cp_parser_skip_to_closing_square_bracket_1): New function, made out
	of...
	(cp_parser_skip_to_closing_square_bracket): ...this.

	* doc/invoke.texi: Document -Wcomma-subscript.

	* g++.dg/cpp2a/comma1.C: New test.
	* g++.dg/cpp2a/comma2.C: New test.
	* g++.dg/cpp2a/comma3.C: New test.
	* g++.dg/cpp2a/comma4.C: New test.

From-SVN: r274121
2019-08-05 19:01:15 +00:00
Jason Merrill
ea55c91543 * semantics.c (force_paren_expr): Preserve location.
From-SVN: r274120
2019-08-05 13:38:18 -04:00
Richard Sandiford
55f863c4d6 Make function_code a 32-bit field
Adding SVE intrinsics on top of the existing AArch64 intrinsics blows
the 12-bit function_code in tree_function_decl.  That bitfield has no
spare bits, but it comes at the end of the structure and is preceded
by a pointer, so on LP64 hosts there's currently a 32-bit hole at end.

This patch therefore makes function_code an independent field and
moves the bitfield to the 32-bit hole.

I wondered about instead making function_code 16 bits, so that the
patch leaves 28 spare bits instead of just 12.  That seemed a bit
short-term though; I can't guarantee that we won't blow 16 bits once
the SVE2 functions are added...

If we run out of bits again, we can start chomping from the top
of the enum.  E.g. 24 bits should surely be enough, but there's
no point paying the overhead of the masking until we need it.

2019-08-05  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-core.h (tree_function_decl): Make function_code an
	independent field.  Group the remaining bitfields into bytes
	and move decl_type so that it contines to be at a byte boundary.
	Leave 12 bits for future expansion.

From-SVN: r274119
2019-08-05 16:47:04 +00:00
Richard Sandiford
868363d4f5 Fold MASK_LOAD/STORE with an all-true mask
This patch folds IFN_MASK_LOAD and IFN_MASK_STOREs to normal accesses
if the mask is all-true.  This can happen for fully-masked loops that
didn't actually need to be (which could be handled by the vectoriser
instead), or for unrolled fully-masked loops whose first iteration is
guaranteed to operate on a full vector.  It's also useful when the
accesses are generated directly by intrinsics (to follow for SVE).

2019-08-05  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* gimple-fold.c (gimple_fold_mask_load_store_mem_ref)
	(gimple_fold_mask_load, gimple_fold_mask_store): New functions.
	(gimple_fold_call): Use them to fold IFN_MASK_LOAD and
	IFN_MASK_STORE.

gcc/testsuite/
	* gcc.target/aarch64/sve/mask_load_1.c: New test.

From-SVN: r274118
2019-08-05 16:46:58 +00:00
Richard Sandiford
779724a591 Add a gimple_move_vops helper function
I needed to add another instance of this idiom, so thought it'd
be worth having a helper function.

2019-08-05  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* gimple.h (gimple_move_vops): Declare.
	* gimple.c (gimple_move_vops): New function
	* gimple-fold.c (replace_call_with_call_and_fold)
	(gimple_fold_builtin_memory_op, gimple_fold_builtin_memset)
	(gimple_fold_builtin_stpcpy, fold_builtin_atomic_compare_exchange)
	(gimple_fold_call): Use it.
	* ipa-param-manipulation.c (ipa_modify_call_arguments): Likewise.
	* tree-call-cdce.c (use_internal_fn): Likewise.
	* tree-if-conv.c (predicate_load_or_store): Likewise.
	* tree-ssa-ccp.c (optimize_atomic_bit_test_and): Likewise.
	* tree-ssa-math-opts.c (pass_cse_reciprocals::execute): Likewise.
	* tree-ssa-propagate.c (finish_update_gimple_call): Likewise.
	(update_call_from_tree): Likewise.
	* tree-vect-stmts.c (vectorizable_load): Likewise.
	* tree-vectorizer.c (adjust_simduid_builtins): Likewise.

From-SVN: r274117
2019-08-05 16:46:48 +00:00
Jozef Lawrynowicz
09eff11aa4 pr80993.c: Add cleanup-saved-temps to final actions.
2019-08-05  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* gcc.target/msp430/pr80993.c: Add cleanup-saved-temps to final
	actions.

From-SVN: r274116
2019-08-05 14:02:35 +00:00
Martin Liska
efe5143f89 Handle new operators with no arguments in DCE.
2019-08-05  Martin Liska  <mliska@suse.cz>

	PR c++/91334
	* tree-ssa-dce.c (propagate_necessity): Handle new operators
	with not arguments.
	(eliminate_unnecessary_stmts): Likewise.
2019-08-05  Martin Liska  <mliska@suse.cz>

	PR c++/91334
	* g++.dg/torture/pr91334.C: New test.

From-SVN: r274115
2019-08-05 12:53:01 +00:00
Richard Biener
a2001d445a re PR tree-optimization/91169 (cd2a31a FAILs)
2019-08-05  Richard Biener  <rguenther@suse.de>

	PR middle-end/91169
	* fold-const.c (get_array_ctor_element_at_index): Create
	offset_ints according to the sign of the index type and treat
	that as signed if it is obviously so.

	* gnat.dg/array37.adb: New testcase.

From-SVN: r274114
2019-08-05 12:30:49 +00:00
Jakub Jelinek
96d5c6dcf6 re PR target/91341 (Missing AVX Intrinsics: load/store u2)
PR target/91341
	* config/i386/avxintrin.h (_mm256_loadu2_m128, _mm256_storeu2_m128,
	_mm256_loadu2_m128d, _mm256_storeu2_m128d, _mm256_loadu2_m128i,
	_mm256_storeu2_m128i): New function.

	* gcc.target/i386/avx-loadu2-m128-1.c: New test.
	* gcc.target/i386/avx-loadu2-m128-2.c: New test.
	* gcc.target/i386/avx-loadu2-m128d-1.c: New test.
	* gcc.target/i386/avx-loadu2-m128d-2.c: New test.
	* gcc.target/i386/avx-loadu2-m128i-1.c: New test.
	* gcc.target/i386/avx-loadu2-m128i-2.c: New test.
	* gcc.target/i386/avx-storeu2-m128-1.c: New test.
	* gcc.target/i386/avx-storeu2-m128-2.c: New test.
	* gcc.target/i386/avx-storeu2-m128d-1.c: New test.
	* gcc.target/i386/avx-storeu2-m128d-2.c: New test.
	* gcc.target/i386/avx-storeu2-m128i-1.c: New test.
	* gcc.target/i386/avx-storeu2-m128i-2.c: New test.

From-SVN: r274109
2019-08-05 10:00:30 +02:00